Re: [PATCH 6/6][ARM] Implement support for ACLE Coprocessor MCRR and MRRC intrinsics
Hi Andre, On 06/01/17 15:15, Kyrill Tkachov wrote: On 06/01/17 14:58, Andre Vieira (lists) wrote: On 05/01/17 11:11, Kyrill Tkachov wrote: Hi Andre, On 09/11/16 10:12, Andre Vieira (lists) wrote: Hi, This patch implements support for the ARM ACLE Coprocessor MCR and MRC intrinsics. See below a table mapping the intrinsics to their respective instructions: +---+---+ | Intrinsic signature | Instruction pattern | +---+---+ |void __arm_mcrr(coproc, opc1, uint64_t value, CRm) | MCRR coproc, opc1, Rt, Rt2, CRm | +---+---+ |void __arm_mcrr2(coproc, opc1, uint64_t value, CRm)| MCRR2 coproc, opc1, Rt, Rt2, CRm | +---+---+ |uint64_t __arm_mrrc(coproc, opc1, CRm) | MRRC coproc, opc1, Rt, Rt2, CRm | +---+---+ |uint64_t __arm_mrrc2(coproc, opc1, CRm)| MRRC2 coproc, opc1, Rt, Rt2, CRm | +---+---+ Note that any untyped variable in the intrinsic signature is required to be a compiler-time constant and has the type 'unsigned int'. We do some boundary checks for coproc:[0-15], opc1[0-7] CR*:[0-31]. If either of these requirements are not met a diagnostic is issued. I added a new arm_arch variable for ARMv5TE to use when deciding whether or not the MCRR and MRCC intrinsics are available. Is this OK for trunk? Same as with the previous two patches the define_insns need constraints and also I believe you'll want to rebase this patch on top of Richard's rework of the architecture feature bits for the ARMv5TE hunk. Thanks, Kyrill Regards, Andre gcc/ChangeLog: 2016-11-09 Andre Vieira * config/arm/arm.md (): New. (): New. * config/arm/arm.c (arm_arch5te): New. (arm_option_override): Set arm_arch5te. (arm_coproc_builtin_available): Add support for mcrr, mcrr2, mrrc and mrrc2. * config/arm/arm-builtins.c (MCRR_QUALIFIERS): Define to... (arm_mcrr_qualifiers): ... this. New. (MRRC_QUALIFIERS): Define to... (arm_mrrc_qualifiers): ... this. New. * config/arm/arm_acle.h (__arm_mcrr, __arm_mcrr2, __arm_mrrc, __arm_mrrc2): New. * config/arm/arm_acle_builtins.def (mcrr, mcrr2, mrrc, mrrc2): New. * config/arm/iterators.md (MCRRI, mcrr, MCRR): New. (MRRCI, mrrc, MRRC): New. * config/arm/unspecs.md (VUNSPEC_MCRR, VUNSPEC_MCRR2, VUNSPEC_MRRC, VUNSPEC_MRRC2): New. gcc/testsuite/ChangeLog: 2016-11-09 Andre Vieira * gcc.target/arm/acle/mcrr: New. * gcc.target/arm/acle/mcrr2: New. * gcc.target/arm/acle/mrrc: New. * gcc.target/arm/acle/mrrc2: New. Hi, Reworked this patch according to comments, rebased and fixed the availability of MCRR2/MRRC2 to only be available for ARMv6 and later. Is this OK for trunk? Ok. Thanks, Kyrill Also, can you please propose a patch for the GCC 7 changes page mentioning this work? Thanks, Kyrill Regards, Andre gcc/ChangeLog: 2017-01-xx Andre Vieira * config/arm/arm.md (): New. (): New. * config/arm/arm.c (arm_arch5te): New. (arm_option_override): Set arm_arch5te. (arm_coproc_builtin_available): Add support for mcrr, mcrr2, mrrc and mrrc2. * config/arm/arm-builtins.c (MCRR_QUALIFIERS): Define to... (arm_mcrr_qualifiers): ... this. New. (MRRC_QUALIFIERS): Define to... (arm_mrrc_qualifiers): ... this. New. * config/arm/arm_acle.h (__arm_mcrr, __arm_mcrr2, __arm_mrrc, __arm_mrrc2): New. * config/arm/arm_acle_builtins.def (mcrr, mcrr2, mrrc, mrrc2): New. * config/arm/iterators.md (MCRRI, mcrr, MCRR): New. (MRRCI, mrrc, MRRC): New. * config/arm/unspecs.md (VUNSPEC_MCRR, VUNSPEC_MCRR2, VUNSPEC_MRRC, VUNSPEC_MRRC2): New. gcc/testsuite/ChangeLog: 2017-01-xx Andre Vieira * gcc.target/arm/acle/mcrr: New. * gcc.target/arm/acle/mcrr2: New. * gcc.target/arm/acle/mrrc: New. * gcc.target/arm/acle/mrrc2: New.
Re: [PATCH 6/6][ARM] Implement support for ACLE Coprocessor MCRR and MRRC intrinsics
On 06/01/17 14:58, Andre Vieira (lists) wrote: On 05/01/17 11:11, Kyrill Tkachov wrote: Hi Andre, On 09/11/16 10:12, Andre Vieira (lists) wrote: Hi, This patch implements support for the ARM ACLE Coprocessor MCR and MRC intrinsics. See below a table mapping the intrinsics to their respective instructions: +---+---+ | Intrinsic signature | Instruction pattern | +---+---+ |void __arm_mcrr(coproc, opc1, uint64_t value, CRm) | MCRR coproc, opc1, Rt, Rt2, CRm | +---+---+ |void __arm_mcrr2(coproc, opc1, uint64_t value, CRm)| MCRR2 coproc, opc1, Rt, Rt2, CRm | +---+---+ |uint64_t __arm_mrrc(coproc, opc1, CRm) | MRRC coproc, opc1, Rt, Rt2, CRm | +---+---+ |uint64_t __arm_mrrc2(coproc, opc1, CRm)| MRRC2 coproc, opc1, Rt, Rt2, CRm | +---+---+ Note that any untyped variable in the intrinsic signature is required to be a compiler-time constant and has the type 'unsigned int'. We do some boundary checks for coproc:[0-15], opc1[0-7] CR*:[0-31]. If either of these requirements are not met a diagnostic is issued. I added a new arm_arch variable for ARMv5TE to use when deciding whether or not the MCRR and MRCC intrinsics are available. Is this OK for trunk? Same as with the previous two patches the define_insns need constraints and also I believe you'll want to rebase this patch on top of Richard's rework of the architecture feature bits for the ARMv5TE hunk. Thanks, Kyrill Regards, Andre gcc/ChangeLog: 2016-11-09 Andre Vieira * config/arm/arm.md (): New. (): New. * config/arm/arm.c (arm_arch5te): New. (arm_option_override): Set arm_arch5te. (arm_coproc_builtin_available): Add support for mcrr, mcrr2, mrrc and mrrc2. * config/arm/arm-builtins.c (MCRR_QUALIFIERS): Define to... (arm_mcrr_qualifiers): ... this. New. (MRRC_QUALIFIERS): Define to... (arm_mrrc_qualifiers): ... this. New. * config/arm/arm_acle.h (__arm_mcrr, __arm_mcrr2, __arm_mrrc, __arm_mrrc2): New. * config/arm/arm_acle_builtins.def (mcrr, mcrr2, mrrc, mrrc2): New. * config/arm/iterators.md (MCRRI, mcrr, MCRR): New. (MRRCI, mrrc, MRRC): New. * config/arm/unspecs.md (VUNSPEC_MCRR, VUNSPEC_MCRR2, VUNSPEC_MRRC, VUNSPEC_MRRC2): New. gcc/testsuite/ChangeLog: 2016-11-09 Andre Vieira * gcc.target/arm/acle/mcrr: New. * gcc.target/arm/acle/mcrr2: New. * gcc.target/arm/acle/mrrc: New. * gcc.target/arm/acle/mrrc2: New. Hi, Reworked this patch according to comments, rebased and fixed the availability of MCRR2/MRRC2 to only be available for ARMv6 and later. Is this OK for trunk? Ok. Thanks, Kyrill Regards, Andre gcc/ChangeLog: 2017-01-xx Andre Vieira * config/arm/arm.md (): New. (): New. * config/arm/arm.c (arm_arch5te): New. (arm_option_override): Set arm_arch5te. (arm_coproc_builtin_available): Add support for mcrr, mcrr2, mrrc and mrrc2. * config/arm/arm-builtins.c (MCRR_QUALIFIERS): Define to... (arm_mcrr_qualifiers): ... this. New. (MRRC_QUALIFIERS): Define to... (arm_mrrc_qualifiers): ... this. New. * config/arm/arm_acle.h (__arm_mcrr, __arm_mcrr2, __arm_mrrc, __arm_mrrc2): New. * config/arm/arm_acle_builtins.def (mcrr, mcrr2, mrrc, mrrc2): New. * config/arm/iterators.md (MCRRI, mcrr, MCRR): New. (MRRCI, mrrc, MRRC): New. * config/arm/unspecs.md (VUNSPEC_MCRR, VUNSPEC_MCRR2, VUNSPEC_MRRC, VUNSPEC_MRRC2): New. gcc/testsuite/ChangeLog: 2017-01-xx Andre Vieira * gcc.target/arm/acle/mcrr: New. * gcc.target/arm/acle/mcrr2: New. * gcc.target/arm/acle/mrrc: New. * gcc.target/arm/acle/mrrc2: New.
Re: [PATCH 6/6][ARM] Implement support for ACLE Coprocessor MCRR and MRRC intrinsics
On 05/01/17 11:11, Kyrill Tkachov wrote: > Hi Andre, > > On 09/11/16 10:12, Andre Vieira (lists) wrote: >> Hi, >> >> This patch implements support for the ARM ACLE Coprocessor MCR and MRC >> intrinsics. See below a table mapping the intrinsics to their respective >> instructions: >> >> +---+---+ >> >> | Intrinsic signature | >> Instruction pattern | >> +---+---+ >> >> |void __arm_mcrr(coproc, opc1, uint64_t value, CRm) | >> MCRR coproc, opc1, Rt, Rt2, CRm | >> +---+---+ >> >> |void __arm_mcrr2(coproc, opc1, uint64_t value, CRm)| >> MCRR2 coproc, opc1, Rt, Rt2, CRm | >> +---+---+ >> >> |uint64_t __arm_mrrc(coproc, opc1, CRm) | >> MRRC coproc, opc1, Rt, Rt2, CRm | >> +---+---+ >> >> |uint64_t __arm_mrrc2(coproc, opc1, CRm)| >> MRRC2 coproc, opc1, Rt, Rt2, CRm | >> +---+---+ >> >> Note that any untyped variable in the intrinsic signature is required to >> be a compiler-time constant and has the type 'unsigned int'. We do some >> boundary checks for coproc:[0-15], opc1[0-7] CR*:[0-31]. If either of >> these requirements are not met a diagnostic is issued. >> >> I added a new arm_arch variable for ARMv5TE to use when deciding whether >> or not the MCRR and MRCC intrinsics are available. >> >> Is this OK for trunk? > > Same as with the previous two patches the define_insns need constraints > and also I believe you'll want to rebase this patch on top of Richard's > rework of the > architecture feature bits for the ARMv5TE hunk. > > Thanks, > Kyrill > >> Regards, >> Andre >> >> gcc/ChangeLog: >> 2016-11-09 Andre Vieira >> >>* config/arm/arm.md (): New. >>(): New. >>* config/arm/arm.c (arm_arch5te): New. >>(arm_option_override): Set arm_arch5te. >>(arm_coproc_builtin_available): Add support for mcrr, mcrr2, mrrc >>and mrrc2. >>* config/arm/arm-builtins.c (MCRR_QUALIFIERS): Define to... >>(arm_mcrr_qualifiers): ... this. New. >>(MRRC_QUALIFIERS): Define to... >>(arm_mrrc_qualifiers): ... this. New. >>* config/arm/arm_acle.h (__arm_mcrr, __arm_mcrr2, __arm_mrrc, >>__arm_mrrc2): New. >>* config/arm/arm_acle_builtins.def (mcrr, mcrr2, mrrc, mrrc2): New. >>* config/arm/iterators.md (MCRRI, mcrr, MCRR): New. >>(MRRCI, mrrc, MRRC): New. >>* config/arm/unspecs.md (VUNSPEC_MCRR, VUNSPEC_MCRR2, VUNSPEC_MRRC, >>VUNSPEC_MRRC2): New. >> >> gcc/testsuite/ChangeLog: >> >> 2016-11-09 Andre Vieira >> >>* gcc.target/arm/acle/mcrr: New. >>* gcc.target/arm/acle/mcrr2: New. >>* gcc.target/arm/acle/mrrc: New. >>* gcc.target/arm/acle/mrrc2: New. >> > Hi, Reworked this patch according to comments, rebased and fixed the availability of MCRR2/MRRC2 to only be available for ARMv6 and later. Is this OK for trunk? Regards, Andre gcc/ChangeLog: 2017-01-xx Andre Vieira * config/arm/arm.md (): New. (): New. * config/arm/arm.c (arm_arch5te): New. (arm_option_override): Set arm_arch5te. (arm_coproc_builtin_available): Add support for mcrr, mcrr2, mrrc and mrrc2. * config/arm/arm-builtins.c (MCRR_QUALIFIERS): Define to... (arm_mcrr_qualifiers): ... this. New. (MRRC_QUALIFIERS): Define to... (arm_mrrc_qualifiers): ... this. New. * config/arm/arm_acle.h (__arm_mcrr, __arm_mcrr2, __arm_mrrc, __arm_mrrc2): New. * config/arm/arm_acle_builtins.def (mcrr, mcrr2, mrrc, mrrc2): New. * config/arm/iterators.md (MCRRI, mcrr, MCRR): New. (MRRCI, mrrc, MRRC): New. * config/arm/unspecs.md (VUNSPEC_MCRR, VUNSPEC_MCRR2, VUNSPEC_MRRC, VUNSPEC_MRRC2): New. gcc/testsuite/ChangeLog: 2017-01-xx Andre Vieira * gcc.target/arm/acle/mcrr: New. * gcc.target/arm/acle/mcrr2: New. * gcc.target/arm/acle/mrrc: New. * gcc.target/arm/acle/mrrc2: New. diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c index 1a983b27961e96cfab651244af3ba1fb44b87d2e..689219c1923bc0f720f70870bfde8b60f7514167 100644 --- a/gcc/config/arm/arm-builtins.c +++ b/gcc/config/arm/arm-builtins.c @@ -217,6 +217,24 @@ arm_mrc_qualifiers[SIMD_MAX_BUILTIN_ARGS] qualifier_unsigned_immediate, qualifier_unsigned_immediate }; #define MRC_QUALIFIERS \ (arm_mrc_qualifiers) + +/* void (unsigned immediate, unsigned immediate, T, unsigned immediate). */ +static enum arm_type_qual
Re: [PATCH 6/6][ARM] Implement support for ACLE Coprocessor MCRR and MRRC intrinsics
Hi Andre, On 09/11/16 10:12, Andre Vieira (lists) wrote: Hi, This patch implements support for the ARM ACLE Coprocessor MCR and MRC intrinsics. See below a table mapping the intrinsics to their respective instructions: +---+---+ | Intrinsic signature | Instruction pattern | +---+---+ |void __arm_mcrr(coproc, opc1, uint64_t value, CRm) | MCRR coproc, opc1, Rt, Rt2, CRm | +---+---+ |void __arm_mcrr2(coproc, opc1, uint64_t value, CRm)| MCRR2 coproc, opc1, Rt, Rt2, CRm | +---+---+ |uint64_t __arm_mrrc(coproc, opc1, CRm) | MRRC coproc, opc1, Rt, Rt2, CRm | +---+---+ |uint64_t __arm_mrrc2(coproc, opc1, CRm)| MRRC2 coproc, opc1, Rt, Rt2, CRm | +---+---+ Note that any untyped variable in the intrinsic signature is required to be a compiler-time constant and has the type 'unsigned int'. We do some boundary checks for coproc:[0-15], opc1[0-7] CR*:[0-31]. If either of these requirements are not met a diagnostic is issued. I added a new arm_arch variable for ARMv5TE to use when deciding whether or not the MCRR and MRCC intrinsics are available. Is this OK for trunk? Same as with the previous two patches the define_insns need constraints and also I believe you'll want to rebase this patch on top of Richard's rework of the architecture feature bits for the ARMv5TE hunk. Thanks, Kyrill Regards, Andre gcc/ChangeLog: 2016-11-09 Andre Vieira * config/arm/arm.md (): New. (): New. * config/arm/arm.c (arm_arch5te): New. (arm_option_override): Set arm_arch5te. (arm_coproc_builtin_available): Add support for mcrr, mcrr2, mrrc and mrrc2. * config/arm/arm-builtins.c (MCRR_QUALIFIERS): Define to... (arm_mcrr_qualifiers): ... this. New. (MRRC_QUALIFIERS): Define to... (arm_mrrc_qualifiers): ... this. New. * config/arm/arm_acle.h (__arm_mcrr, __arm_mcrr2, __arm_mrrc, __arm_mrrc2): New. * config/arm/arm_acle_builtins.def (mcrr, mcrr2, mrrc, mrrc2): New. * config/arm/iterators.md (MCRRI, mcrr, MCRR): New. (MRRCI, mrrc, MRRC): New. * config/arm/unspecs.md (VUNSPEC_MCRR, VUNSPEC_MCRR2, VUNSPEC_MRRC, VUNSPEC_MRRC2): New. gcc/testsuite/ChangeLog: 2016-11-09 Andre Vieira * gcc.target/arm/acle/mcrr: New. * gcc.target/arm/acle/mcrr2: New. * gcc.target/arm/acle/mrrc: New. * gcc.target/arm/acle/mrrc2: New.
Re: [PATCH 6/6][ARM] Implement support for ACLE Coprocessor MCRR and MRRC intrinsics
On 09/11/16 10:12, Andre Vieira (lists) wrote:
> Hi,
>
> This patch implements support for the ARM ACLE Coprocessor MCR and MRC
> intrinsics. See below a table mapping the intrinsics to their respective
> instructions:
>
> +---+---+
> | Intrinsic signature |
> Instruction pattern |
> +---+---+
> |void __arm_mcrr(coproc, opc1, uint64_t value, CRm) |
> MCRR coproc, opc1, Rt, Rt2, CRm |
> +---+---+
> |void __arm_mcrr2(coproc, opc1, uint64_t value, CRm)|
> MCRR2 coproc, opc1, Rt, Rt2, CRm |
> +---+---+
> |uint64_t __arm_mrrc(coproc, opc1, CRm) |
> MRRC coproc, opc1, Rt, Rt2, CRm |
> +---+---+
> |uint64_t __arm_mrrc2(coproc, opc1, CRm)|
> MRRC2 coproc, opc1, Rt, Rt2, CRm |
> +---+---+
> Note that any untyped variable in the intrinsic signature is required to
> be a compiler-time constant and has the type 'unsigned int'. We do some
> boundary checks for coproc:[0-15], opc1[0-7] CR*:[0-31]. If either of
> these requirements are not met a diagnostic is issued.
>
> I added a new arm_arch variable for ARMv5TE to use when deciding whether
> or not the MCRR and MRCC intrinsics are available.
>
> Is this OK for trunk?
>
> Regards,
> Andre
>
> gcc/ChangeLog:
> 2016-11-09 Andre Vieira
>
> * config/arm/arm.md (): New.
> (): New.
> * config/arm/arm.c (arm_arch5te): New.
> (arm_option_override): Set arm_arch5te.
> (arm_coproc_builtin_available): Add support for mcrr, mcrr2, mrrc
> and mrrc2.
> * config/arm/arm-builtins.c (MCRR_QUALIFIERS): Define to...
> (arm_mcrr_qualifiers): ... this. New.
> (MRRC_QUALIFIERS): Define to...
> (arm_mrrc_qualifiers): ... this. New.
> * config/arm/arm_acle.h (__arm_mcrr, __arm_mcrr2, __arm_mrrc,
> __arm_mrrc2): New.
> * config/arm/arm_acle_builtins.def (mcrr, mcrr2, mrrc, mrrc2): New.
> * config/arm/iterators.md (MCRRI, mcrr, MCRR): New.
> (MRRCI, mrrc, MRRC): New.
> * config/arm/unspecs.md (VUNSPEC_MCRR, VUNSPEC_MCRR2, VUNSPEC_MRRC,
> VUNSPEC_MRRC2): New.
>
> gcc/testsuite/ChangeLog:
>
> 2016-11-09 Andre Vieira
>
> * gcc.target/arm/acle/mcrr: New.
> * gcc.target/arm/acle/mcrr2: New.
> * gcc.target/arm/acle/mrrc: New.
> * gcc.target/arm/acle/mrrc2: New.
>
Hi,
I realize I forgot to mention that for these intrinsics 'Rt' will hold
the low half and 'Rt2' the higher half of either the argument 'value'
for MCRR{,2} or the return value for MRRC{,2}.
Cheers,
Andre
[PATCH 6/6][ARM] Implement support for ACLE Coprocessor MCRR and MRRC intrinsics
Hi,
This patch implements support for the ARM ACLE Coprocessor MCR and MRC
intrinsics. See below a table mapping the intrinsics to their respective
instructions:
+---+---+
| Intrinsic signature |
Instruction pattern |
+---+---+
|void __arm_mcrr(coproc, opc1, uint64_t value, CRm) |
MCRR coproc, opc1, Rt, Rt2, CRm |
+---+---+
|void __arm_mcrr2(coproc, opc1, uint64_t value, CRm)|
MCRR2 coproc, opc1, Rt, Rt2, CRm |
+---+---+
|uint64_t __arm_mrrc(coproc, opc1, CRm) |
MRRC coproc, opc1, Rt, Rt2, CRm |
+---+---+
|uint64_t __arm_mrrc2(coproc, opc1, CRm)|
MRRC2 coproc, opc1, Rt, Rt2, CRm |
+---+---+
Note that any untyped variable in the intrinsic signature is required to
be a compiler-time constant and has the type 'unsigned int'. We do some
boundary checks for coproc:[0-15], opc1[0-7] CR*:[0-31]. If either of
these requirements are not met a diagnostic is issued.
I added a new arm_arch variable for ARMv5TE to use when deciding whether
or not the MCRR and MRCC intrinsics are available.
Is this OK for trunk?
Regards,
Andre
gcc/ChangeLog:
2016-11-09 Andre Vieira
* config/arm/arm.md (): New.
(): New.
* config/arm/arm.c (arm_arch5te): New.
(arm_option_override): Set arm_arch5te.
(arm_coproc_builtin_available): Add support for mcrr, mcrr2, mrrc
and mrrc2.
* config/arm/arm-builtins.c (MCRR_QUALIFIERS): Define to...
(arm_mcrr_qualifiers): ... this. New.
(MRRC_QUALIFIERS): Define to...
(arm_mrrc_qualifiers): ... this. New.
* config/arm/arm_acle.h (__arm_mcrr, __arm_mcrr2, __arm_mrrc,
__arm_mrrc2): New.
* config/arm/arm_acle_builtins.def (mcrr, mcrr2, mrrc, mrrc2): New.
* config/arm/iterators.md (MCRRI, mcrr, MCRR): New.
(MRRCI, mrrc, MRRC): New.
* config/arm/unspecs.md (VUNSPEC_MCRR, VUNSPEC_MCRR2, VUNSPEC_MRRC,
VUNSPEC_MRRC2): New.
gcc/testsuite/ChangeLog:
2016-11-09 Andre Vieira
* gcc.target/arm/acle/mcrr: New.
* gcc.target/arm/acle/mcrr2: New.
* gcc.target/arm/acle/mrrc: New.
* gcc.target/arm/acle/mrrc2: New.
diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c
index
44f255356dcc3ea6b8f554ba96f99fd7856bf6a1..ab641d6d5fb5f64b5f3317f461e13e5222150237
100644
--- a/gcc/config/arm/arm-builtins.c
+++ b/gcc/config/arm/arm-builtins.c
@@ -216,6 +216,24 @@ arm_mrc_qualifiers[SIMD_MAX_BUILTIN_ARGS]
qualifier_unsigned_immediate, qualifier_unsigned_immediate };
#define MRC_QUALIFIERS \
(arm_mrc_qualifiers)
+
+/* void (unsigned immediate, unsigned immediate, T, unsigned immediate). */
+static enum arm_type_qualifiers
+arm_mcrr_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+ = { qualifier_void, qualifier_unsigned_immediate,
+ qualifier_unsigned_immediate, qualifier_none,
+ qualifier_unsigned_immediate };
+#define MCRR_QUALIFIERS \
+ (arm_mcrr_qualifiers)
+
+/* T (unsigned immediate, unsigned immediate, unsigned immediate). */
+static enum arm_type_qualifiers
+arm_mrrc_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+ = { qualifier_none, qualifier_unsigned_immediate,
+ qualifier_unsigned_immediate, qualifier_unsigned_immediate };
+#define MRRC_QUALIFIERS \
+ (arm_mrrc_qualifiers)
+
/* The first argument (return type) of a store should be void type,
which we represent with qualifier_void. Their first operand will be
a DImode pointer to the location to store to, so we must use
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index
25439a343e8540c5fca5cbe19e8b76e2fdb97a73..3f4e2a39580217b6564f047998681e5b8419e741
100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -797,6 +797,9 @@ int arm_arch5 = 0;
/* Nonzero if this chip supports the ARM Architecture 5E extensions. */
int arm_arch5e = 0;
+/* Nonzero if this chip supports the ARM Architecture 5TE extensions. */
+int arm_arch5te = 0;
+
/* Nonzero if this chip supports the ARM Architecture 6 extensions. */
int arm_arch6 = 0;
@@ -3231,6 +3234,7 @@ arm_option_override (void)
arm_arch4t = arm_arch4 && (ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB));
arm_arch5 = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH5);
arm_arch5e = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH5E);
+ arm_arch5te = arm_arch5e && ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB);
arm_arch6 = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH6);
arm_arch6k
