Re: [PATCH V2] RISC-V: Fix missing boolean_expression in zmmul extension
Committed to trunk :) On Fri, May 24, 2024 at 7:58 PM Kito Cheng wrote: > > LGTM > > Liao Shihua 於 2024年5月24日 週五 13:05 寫道: >> >> Update v1->v2 >> Add testcase for this patch. >> >> Missing boolean_expression TARGET_ZMMUL in riscv_rtx_costs() cause different >> instructions when >> multiplying an integer with a constant. ( >> https://github.com/riscv-collab/riscv-gnu-toolchain/issues/1482 ) >> >> int foo(int *ib) { >> *ib = *ib * 33938; >> return 0; >> } >> >> rv64im: >> lw a4,0(a1) >> li a5,32768 >> addiw a5,a5,1170 >> mulwa5,a5,a4 >> sw a5,0(a1) >> ret >> >> rv64i_zmmul: >> lw a4,0(a1) >> slliw a5,a4,5 >> addwa5,a5,a4 >> slliw a5,a5,3 >> addwa5,a5,a4 >> slliw a5,a5,3 >> addwa5,a5,a4 >> slliw a5,a5,3 >> addwa5,a5,a4 >> slliw a5,a5,1 >> sw a5,0(a1) >> ret >> >> Fixed. >> >> gcc/ChangeLog: >> >> * config/riscv/riscv.cc (riscv_rtx_costs): Add TARGET_ZMMUL. >> >> gcc/testsuite/ChangeLog: >> >> * gcc.target/riscv/zmmul-3.c: New test. >> >> --- >> gcc/config/riscv/riscv.cc| 2 +- >> gcc/testsuite/gcc.target/riscv/zmmul-3.c | 8 >> 2 files changed, 9 insertions(+), 1 deletion(-) >> create mode 100644 gcc/testsuite/gcc.target/riscv/zmmul-3.c >> >> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc >> index 85df5b7ab49..580ae007181 100644 >> --- a/gcc/config/riscv/riscv.cc >> +++ b/gcc/config/riscv/riscv.cc >> @@ -3753,7 +3753,7 @@ riscv_rtx_costs (rtx x, machine_mode mode, int >> outer_code, int opno ATTRIBUTE_UN >> case MULT: >>if (float_mode_p) >> *total = tune_param->fp_mul[mode == DFmode]; >> - else if (!TARGET_MUL) >> + else if (!(TARGET_MUL || TARGET_ZMMUL)) >> /* Estimate the cost of a library call. */ >> *total = COSTS_N_INSNS (speed ? 32 : 6); >>else if (GET_MODE_SIZE (mode).to_constant () > UNITS_PER_WORD) >> diff --git a/gcc/testsuite/gcc.target/riscv/zmmul-3.c >> b/gcc/testsuite/gcc.target/riscv/zmmul-3.c >> new file mode 100644 >> index 000..ae9752462e4 >> --- /dev/null >> +++ b/gcc/testsuite/gcc.target/riscv/zmmul-3.c >> @@ -0,0 +1,8 @@ >> +/* { dg-do compile } */ >> +/* { dg-options "-march=rv64iafdc_zmmul -mabi=lp64d" } */ >> +int foo1(int a) >> +{ >> +return a * 99; >> +} >> + >> +/* { dg-final { scan-assembler-times "mulw\t" 1 } } */ >> \ No newline at end of file >> -- >> 2.34.1 >>
Re: [PATCH V2] RISC-V: Fix missing boolean_expression in zmmul extension
LGTM Liao Shihua 於 2024年5月24日 週五 13:05 寫道: > Update v1->v2 > Add testcase for this patch. > > Missing boolean_expression TARGET_ZMMUL in riscv_rtx_costs() cause > different instructions when > multiplying an integer with a constant. ( > https://github.com/riscv-collab/riscv-gnu-toolchain/issues/1482 ) > > int foo(int *ib) { > *ib = *ib * 33938; > return 0; > } > > rv64im: > lw a4,0(a1) > li a5,32768 > addiw a5,a5,1170 > mulwa5,a5,a4 > sw a5,0(a1) > ret > > rv64i_zmmul: > lw a4,0(a1) > slliw a5,a4,5 > addwa5,a5,a4 > slliw a5,a5,3 > addwa5,a5,a4 > slliw a5,a5,3 > addwa5,a5,a4 > slliw a5,a5,3 > addwa5,a5,a4 > slliw a5,a5,1 > sw a5,0(a1) > ret > > Fixed. > > gcc/ChangeLog: > > * config/riscv/riscv.cc (riscv_rtx_costs): Add TARGET_ZMMUL. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/zmmul-3.c: New test. > > --- > gcc/config/riscv/riscv.cc| 2 +- > gcc/testsuite/gcc.target/riscv/zmmul-3.c | 8 > 2 files changed, 9 insertions(+), 1 deletion(-) > create mode 100644 gcc/testsuite/gcc.target/riscv/zmmul-3.c > > diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc > index 85df5b7ab49..580ae007181 100644 > --- a/gcc/config/riscv/riscv.cc > +++ b/gcc/config/riscv/riscv.cc > @@ -3753,7 +3753,7 @@ riscv_rtx_costs (rtx x, machine_mode mode, int > outer_code, int opno ATTRIBUTE_UN > case MULT: >if (float_mode_p) > *total = tune_param->fp_mul[mode == DFmode]; > - else if (!TARGET_MUL) > + else if (!(TARGET_MUL || TARGET_ZMMUL)) > /* Estimate the cost of a library call. */ > *total = COSTS_N_INSNS (speed ? 32 : 6); >else if (GET_MODE_SIZE (mode).to_constant () > UNITS_PER_WORD) > diff --git a/gcc/testsuite/gcc.target/riscv/zmmul-3.c > b/gcc/testsuite/gcc.target/riscv/zmmul-3.c > new file mode 100644 > index 000..ae9752462e4 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/zmmul-3.c > @@ -0,0 +1,8 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv64iafdc_zmmul -mabi=lp64d" } */ > +int foo1(int a) > +{ > +return a * 99; > +} > + > +/* { dg-final { scan-assembler-times "mulw\t" 1 } } */ > \ No newline at end of file > -- > 2.34.1 > >
[PATCH V2] RISC-V: Fix missing boolean_expression in zmmul extension
Update v1->v2 Add testcase for this patch. Missing boolean_expression TARGET_ZMMUL in riscv_rtx_costs() cause different instructions when multiplying an integer with a constant. ( https://github.com/riscv-collab/riscv-gnu-toolchain/issues/1482 ) int foo(int *ib) { *ib = *ib * 33938; return 0; } rv64im: lw a4,0(a1) li a5,32768 addiw a5,a5,1170 mulwa5,a5,a4 sw a5,0(a1) ret rv64i_zmmul: lw a4,0(a1) slliw a5,a4,5 addwa5,a5,a4 slliw a5,a5,3 addwa5,a5,a4 slliw a5,a5,3 addwa5,a5,a4 slliw a5,a5,3 addwa5,a5,a4 slliw a5,a5,1 sw a5,0(a1) ret Fixed. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_rtx_costs): Add TARGET_ZMMUL. gcc/testsuite/ChangeLog: * gcc.target/riscv/zmmul-3.c: New test. --- gcc/config/riscv/riscv.cc| 2 +- gcc/testsuite/gcc.target/riscv/zmmul-3.c | 8 2 files changed, 9 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/riscv/zmmul-3.c diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 85df5b7ab49..580ae007181 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -3753,7 +3753,7 @@ riscv_rtx_costs (rtx x, machine_mode mode, int outer_code, int opno ATTRIBUTE_UN case MULT: if (float_mode_p) *total = tune_param->fp_mul[mode == DFmode]; - else if (!TARGET_MUL) + else if (!(TARGET_MUL || TARGET_ZMMUL)) /* Estimate the cost of a library call. */ *total = COSTS_N_INSNS (speed ? 32 : 6); else if (GET_MODE_SIZE (mode).to_constant () > UNITS_PER_WORD) diff --git a/gcc/testsuite/gcc.target/riscv/zmmul-3.c b/gcc/testsuite/gcc.target/riscv/zmmul-3.c new file mode 100644 index 000..ae9752462e4 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zmmul-3.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64iafdc_zmmul -mabi=lp64d" } */ +int foo1(int a) +{ +return a * 99; +} + +/* { dg-final { scan-assembler-times "mulw\t" 1 } } */ \ No newline at end of file -- 2.34.1