Re: [PATCH V3] PR88497 - Extend reassoc for vector bit_field_ref

2019-07-03 Thread Richard Biener 
On Wed, 3 Jul 2019, Kewen.Lin wrote:

> Hi Richard,
> 
> Thanks very much for reviewing my patch.  I'll update it as your comments.
> Before sending the next version, I've several questions embedded for further 
> check.
> 
> on 2019/7/2 下午8:43, Richard Biener wrote:
> > On Wed, 20 Mar 2019, Kewen.Lin wrote:
> > 
> >> +/* { dg-require-effective-target vect_double } */
> >> +/* { dg-require-effective-target powerpc_vsx_ok { target { powerpc*-*-* } 
> >> } } */
> >> +/* { dg-options "-O2 -ffast-math" } */
> >> +/* { dg-options "-O2 -ffast-math -mvsx -fdump-tree-reassoc1" { target { 
> >> powerpc*-*-* } } } */
> > 
> > Use
> > 
> > /* { dg-additional-options "-mvsx" { target { powerpc...
> > 
> > that saves duplicate typing.  I guess that x86_64/i?86 also works
> > if you enable SSE2 - can you check that and do adjustments accordingly?
> > 
> 
> OK, I'll learn SSE2 and update it. 

I think most testcases should just pass with SSE2.

> >> +/* Hold the information of one specific VECTOR_TYPE SSA_NAME.
> >> +- offsets: for different BIT_FIELD_REF offsets accessing same VECTOR.
> >> +- ops_indexes: the index of vec ops* for each relavant BIT_FIELD_REF. 
> >>  */
> >> +struct v_info
> >> +{
> >> +  auto_vec offsets;
> > 
> > with SVE this probably needs to be poly_int64 or so
> > 
> 
> OK, will extend it to poly_int64 (can it be negative? or poly_uint64 better?)
> 
> >> +  auto_vec ops_indexes;
> >> +};
> > 
> > To have less allocations you could use a
> > 
> >  auto_vec, 32> elements;
> > 
> > or even
> > 
> >  hash_map > >
> > 
> > where you use .release() in the cleanup and .create (TYPE_VECTOR_SUBPARTS 
> > (vector_type)) during collecting and then can use quick_push ()
> > (ah, no - duplicates...).
> > 
> 
> Good idea!
> 
> >> +
> >> +typedef struct v_info *v_info_ptr;
> >> +
> >> +/* Comparison function for qsort on unsigned BIT_FIELD_REF offsets.  */
> >> +static int
> >> +unsigned_cmp (const void *p_i, const void *p_j)
> >> +{
> >> +  if (*(const unsigned HOST_WIDE_INT *) p_i
> >> +  >= *(const unsigned HOST_WIDE_INT *) p_j)
> >> +return 1;
> >> +  else
> >> +return -1;
> > 
> > That's an issue with some qsort implementations comparing
> > an element against itself.
> > 
> > I think so you should add the equality case.
> > 
> 
> The equality case seems already involved in ">=".
> Do you mean that I need to make it equality case explicitly? 
> Or return zero for "=="? like:
> 
>
>const unsigned HOST_WIDE_INT val_i = *(const unsigned HOST_WIDE_INT *) p_i;
>const unsigned HOST_WIDE_INT val_j = *(const unsigned HOST_WIDE_INT *) p_j;
>if (val_i != val_j)
>  return val_i > val_j? 1: -1;
>else
>  return 0;

Yes.  It needs to return zero, otherwise some qsort will endlessly
swap two same elements.

> >> +
> >> +   TODO:
> >> +1) The current implementation restrict all candidate VECTORs should 
> >> have
> >> +   the same VECTOR type, but it can be extended into different groups 
> >> by
> >> +   VECTOR types in future if any profitable cases found.
> >> +2) The current implementation requires the whole VECTORs should be 
> >> fully
> >> +   covered, but it can be extended to support partial, checking 
> >> adjacent
> >> +   but not fill the whole, it may need some cost model to define the
> >> +   boundary to do or not.
> >> +
> 
> >> +  tree elem_type = TREE_TYPE (vec_type);
> >> +  unsigned HOST_WIDE_INT size = TREE_INT_CST_LOW (TYPE_SIZE 
> >> (elem_type));
> >> +  if (size != TREE_INT_CST_LOW (op1))
> > 
> >   if (!tree_int_cst_equal (TYPE_SIZE (elem_type), op1))
> > 
> > avoids some of the TREE_INT_CST_LOW we like to avoid.
> > 
> > You miss a check for op2 % op1 being zero.  Given you store a 
> > HOST_WIDE_INT offset you also want to check for INTEGER_CST op1/op2
> > (beware of SVE...).
> 
> OK, thanks!  For op2 % op1 == zero, I thought it's a must for granted, I'll 
> fix it.
> I think it can be constructed in IR artificially, but since I have almost 
> none knowledge 
> on other targets vector support, I'm curious that does it exist in real world 
> codes?

BIT_FIELD_REF is quite unconstrained, you could build a testcase
for the GIMPLE frontend quite easily.  Note that the first reassoc
runs before vector lowering so vector code written via vector
extensions does not necessarily have target support but will be lowered
later.

> btw, BIT_FIELD_REF in tree.def says the op1/op2 is constant, it looks need to 
> be updated
> due to SVE?

A POLY_CONST_INT is also "constant" in some sense ;)
 
> > 
> > There's also a poly-int friendly multiple_p predicate so you could
> > have the initial checks SVE friendly but bail out on non-INTEGER_CST
> > offset later.
> > 
> 
> Got it, thanks!
> 
> > 
> > Since you are using a hashtable keyed off SSA name pointers code
> > generation will depend on host addresses here if you consider
> > there's one mismatching vector type that might become ref_vec
> > dependent on the order of

Re: [PATCH V3] PR88497 - Extend reassoc for vector bit_field_ref

2019-07-02 Thread Kewen.Lin 
Hi Richard,

Thanks very much for reviewing my patch.  I'll update it as your comments.
Before sending the next version, I've several questions embedded for further 
check.

on 2019/7/2 下午8:43, Richard Biener wrote:
> On Wed, 20 Mar 2019, Kewen.Lin wrote:
> 
>> +/* { dg-require-effective-target vect_double } */
>> +/* { dg-require-effective-target powerpc_vsx_ok { target { powerpc*-*-* } } 
>> } */
>> +/* { dg-options "-O2 -ffast-math" } */
>> +/* { dg-options "-O2 -ffast-math -mvsx -fdump-tree-reassoc1" { target { 
>> powerpc*-*-* } } } */
> 
> Use
> 
> /* { dg-additional-options "-mvsx" { target { powerpc...
> 
> that saves duplicate typing.  I guess that x86_64/i?86 also works
> if you enable SSE2 - can you check that and do adjustments accordingly?
> 

OK, I'll learn SSE2 and update it. 

>> +/* Hold the information of one specific VECTOR_TYPE SSA_NAME.
>> +- offsets: for different BIT_FIELD_REF offsets accessing same VECTOR.
>> +- ops_indexes: the index of vec ops* for each relavant BIT_FIELD_REF.  
>> */
>> +struct v_info
>> +{
>> +  auto_vec offsets;
> 
> with SVE this probably needs to be poly_int64 or so
> 

OK, will extend it to poly_int64 (can it be negative? or poly_uint64 better?)

>> +  auto_vec ops_indexes;
>> +};
> 
> To have less allocations you could use a
> 
>  auto_vec, 32> elements;
> 
> or even
> 
>  hash_map > >
> 
> where you use .release() in the cleanup and .create (TYPE_VECTOR_SUBPARTS 
> (vector_type)) during collecting and then can use quick_push ()
> (ah, no - duplicates...).
> 

Good idea!

>> +
>> +typedef struct v_info *v_info_ptr;
>> +
>> +/* Comparison function for qsort on unsigned BIT_FIELD_REF offsets.  */
>> +static int
>> +unsigned_cmp (const void *p_i, const void *p_j)
>> +{
>> +  if (*(const unsigned HOST_WIDE_INT *) p_i
>> +  >= *(const unsigned HOST_WIDE_INT *) p_j)
>> +return 1;
>> +  else
>> +return -1;
> 
> That's an issue with some qsort implementations comparing
> an element against itself.
> 
> I think so you should add the equality case.
> 

The equality case seems already involved in ">=".
Do you mean that I need to make it equality case explicitly? 
Or return zero for "=="? like:

   
   const unsigned HOST_WIDE_INT val_i = *(const unsigned HOST_WIDE_INT *) p_i;
   const unsigned HOST_WIDE_INT val_j = *(const unsigned HOST_WIDE_INT *) p_j;
   if (val_i != val_j)
 return val_i > val_j? 1: -1;
   else
 return 0;

>> +
>> +   TODO:
>> +1) The current implementation restrict all candidate VECTORs should have
>> +   the same VECTOR type, but it can be extended into different groups by
>> +   VECTOR types in future if any profitable cases found.
>> +2) The current implementation requires the whole VECTORs should be fully
>> +   covered, but it can be extended to support partial, checking adjacent
>> +   but not fill the whole, it may need some cost model to define the
>> +   boundary to do or not.
>> +

>> +  tree elem_type = TREE_TYPE (vec_type);
>> +  unsigned HOST_WIDE_INT size = TREE_INT_CST_LOW (TYPE_SIZE 
>> (elem_type));
>> +  if (size != TREE_INT_CST_LOW (op1))
> 
>   if (!tree_int_cst_equal (TYPE_SIZE (elem_type), op1))
> 
> avoids some of the TREE_INT_CST_LOW we like to avoid.
> 
> You miss a check for op2 % op1 being zero.  Given you store a 
> HOST_WIDE_INT offset you also want to check for INTEGER_CST op1/op2
> (beware of SVE...).

OK, thanks!  For op2 % op1 == zero, I thought it's a must for granted, I'll fix 
it.
I think it can be constructed in IR artificially, but since I have almost none 
knowledge 
on other targets vector support, I'm curious that does it exist in real world 
codes?

btw, BIT_FIELD_REF in tree.def says the op1/op2 is constant, it looks need to 
be updated
due to SVE?

> 
> There's also a poly-int friendly multiple_p predicate so you could
> have the initial checks SVE friendly but bail out on non-INTEGER_CST
> offset later.
> 

Got it, thanks!

> 
> Since you are using a hashtable keyed off SSA name pointers code
> generation will depend on host addresses here if you consider
> there's one mismatching vector type that might become ref_vec
> dependent on the order of elements in the hashtable.  That's
> a no-no.
> 
> Even if doing it like above looks to possibly save compile-time
> by avoiding qsort calls I think the appropriate thing to do is
> to partition the vector candidates into sets of compatible
> vectors (consider summing two v2df and two v4df vectors for example)
> and then take out ones you disqualify because they do not cover
> the vector in full.
> 

You are absolutely right, the randomness of hashtable keys order could 
be a problem here.  The partition part is TODO 1).  Since Power has only
one kind whole vector width now, doesn't have v2df and v4df co-existence,
it's put into TODO.  I will extend it in the next version of patch, add
one more hashtable from vector type mode to v_info_map, feel free to
correct me if you have any concerns.

Re: [PATCH V3] PR88497 - Extend reassoc for vector bit_field_ref

2019-07-02 Thread Richard Biener 
On Wed, 20 Mar 2019, Kewen.Lin wrote:

> Hi,
> 
> Please refer to below link for previous threads.
> https://gcc.gnu.org/ml/gcc-patches/2019-03/msg00348.html
> 
> Comparing to patch v2, I've moved up the vector operation target 
> check upward together with vector type target check.  Besides, I
> ran bootstrap and regtest on powerpc64-linux-gnu (BE), updated 
> testcases' requirements and options for robustness.
> 
> Is it OK for GCC10?
> 
> 
> gcc/ChangeLog
> 
> 2019-03-20  Kewen Lin  
> 
>   PR target/88497
>   * tree-ssa-reassoc.c (reassociate_bb): Swap the positions of 
>   GIMPLE_BINARY_RHS check and gimple_visited_p check, call new 
>   function undistribute_bitref_for_vector.
>   (undistribute_bitref_for_vector): New function.
>   (cleanup_vinfo_map): Likewise.
>   (unsigned_cmp): Likewise.
> 
> gcc/testsuite/ChangeLog
> 
> 2019-03-20  Kewen Lin  
> 
>   * gcc.dg/tree-ssa/pr88497-1.c: New test.
>   * gcc.dg/tree-ssa/pr88497-2.c: Likewise.
>   * gcc.dg/tree-ssa/pr88497-3.c: Likewise.
>   * gcc.dg/tree-ssa/pr88497-4.c: Likewise.
>   * gcc.dg/tree-ssa/pr88497-5.c: Likewise.
> 
> ---
>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c |  44 +
>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c |  33 
>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-3.c |  33 
>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-4.c |  33 
>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-5.c |  33 
>  gcc/tree-ssa-reassoc.c| 306 
> +-
>  6 files changed, 477 insertions(+), 5 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-3.c
>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-4.c
>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-5.c
> 
> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c 
> b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
> new file mode 100644
> index 000..99c9af8
> --- /dev/null
> +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
> @@ -0,0 +1,44 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target vect_double } */
> +/* { dg-require-effective-target powerpc_vsx_ok { target { powerpc*-*-* } } 
> } */
> +/* { dg-options "-O2 -ffast-math" } */
> +/* { dg-options "-O2 -ffast-math -mvsx -fdump-tree-reassoc1" { target { 
> powerpc*-*-* } } } */

Use

/* { dg-additional-options "-mvsx" { target { powerpc...

that saves duplicate typing.  I guess that x86_64/i?86 also works
if you enable SSE2 - can you check that and do adjustments accordingly?

> +
> +/* To test reassoc can undistribute vector bit_field_ref summation.
> +
> +   arg1 and arg2 are two arrays whose elements of type vector double.
> +   Assuming:
> + A0 = arg1[0], A1 = arg1[1], A2 = arg1[2], A3 = arg1[3],
> + B0 = arg2[0], B1 = arg2[1], B2 = arg2[2], B3 = arg2[3],
> +
> +   Then:
> + V0 = A0 * B0, V1 = A1 * B1, V2 = A2 * B2, V3 = A3 * B3,
> +
> +   reassoc transforms
> +
> + accumulator += V0[0] + V0[1] + V1[0] + V1[1] + V2[0] + V2[1]
> +   + V3[0] + V3[1];
> +
> +   into:
> +
> + T = V0 + V1 + V2 + V3
> + accumulator += T[0] + T[1];
> +
> +   Fewer bit_field_refs, only two for 128 or more bits vector.  */
> +
> +typedef double v2df __attribute__ ((vector_size (16)));
> +double
> +test (double accumulator, v2df arg1[], v2df arg2[])
> +{
> +  v2df temp;
> +  temp = arg1[0] * arg2[0];
> +  accumulator += temp[0] + temp[1];
> +  temp = arg1[1] * arg2[1];
> +  accumulator += temp[0] + temp[1];
> +  temp = arg1[2] * arg2[2];
> +  accumulator += temp[0] + temp[1];
> +  temp = arg1[3] * arg2[3];
> +  accumulator += temp[0] + temp[1];
> +  return accumulator;
> +}
> +/* { dg-final { scan-tree-dump-times "BIT_FIELD_REF" 2 "reassoc1" { target { 
> powerpc*-*-* } } } } */
> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c 
> b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
> new file mode 100644
> index 000..61ed0bf5
> --- /dev/null
> +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
> @@ -0,0 +1,33 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target vect_float } */
> +/* { dg-require-effective-target powerpc_altivec_ok { target { powerpc*-*-* 
> } } } */
> +/* { dg-options "-O2 -ffast-math" } */
> +/* { dg-options "-O2 -ffast-math -maltivec -fdump-tree-reassoc1" { target { 
> powerpc*-*-* } } } */
> +
> +/* To test reassoc can undistribute vector bit_field_ref on multiplication.
> +
> +   v1, v2, v3, v4 of type vector float.
> +
> +   reassoc transforms
> +
> + accumulator *= v1[0] * v1[1] * v1[2] * v1[3] *
> +v2[0] * v2[1] * v2[2] * v2[3] *
> +v3[0] * v3[1] * v3[2] * v3[3] *
> +v4[0] * v4[1] * v4[2] * v4[3] ;
> +
> +   into:
> +
> + T = v1 * v2 * v3 * v4;
> + accumulator *= T[0] * T[1] * T[2] * T[3];
> +
> +   Fewer bit_field_refs, only four for 128 or more bits vector.  */
>

[PING^5] [PATCH V3] PR88497 - Extend reassoc for vector bit_field_ref

2019-06-25 Thread Kewen.Lin 
Hi all,

Gentle ping for this patch:

https://gcc.gnu.org/ml/gcc-patches/2019-03/msg00966.html

on 2019/6/11 上午10:46, Kewen.Lin wrote:
> Hi,
> 
> Gentle ping again.  Thanks!
> 
> Kewen
> 
> on 2019/5/21 上午10:02, Kewen.Lin wrote:
>> Hi,
>>
>> Gentle ping again.  Thanks!
>>
>>
>> Kewen
>>
>> on 2019/5/5 下午2:15, Kewen.Lin wrote:
>>> Hi,
>>>
>>> I'd like to gentle ping for this patch:
>>> https://gcc.gnu.org/ml/gcc-patches/2019-03/msg00966.html
>>>
>>> OK for trunk now?
>>>
>>> Thanks!
>>>
>>> on 2019/3/20 上午11:14, Kewen.Lin wrote:
 Hi,

 Please refer to below link for previous threads.
 https://gcc.gnu.org/ml/gcc-patches/2019-03/msg00348.html

 Comparing to patch v2, I've moved up the vector operation target 
 check upward together with vector type target check.  Besides, I
 ran bootstrap and regtest on powerpc64-linux-gnu (BE), updated 
 testcases' requirements and options for robustness.

 Is it OK for GCC10?


 gcc/ChangeLog

 2019-03-20  Kewen Lin  

PR target/88497
* tree-ssa-reassoc.c (reassociate_bb): Swap the positions of 
GIMPLE_BINARY_RHS check and gimple_visited_p check, call new 
function undistribute_bitref_for_vector.
(undistribute_bitref_for_vector): New function.
(cleanup_vinfo_map): Likewise.
(unsigned_cmp): Likewise.

 gcc/testsuite/ChangeLog

 2019-03-20  Kewen Lin  

* gcc.dg/tree-ssa/pr88497-1.c: New test.
* gcc.dg/tree-ssa/pr88497-2.c: Likewise.
* gcc.dg/tree-ssa/pr88497-3.c: Likewise.
* gcc.dg/tree-ssa/pr88497-4.c: Likewise.
* gcc.dg/tree-ssa/pr88497-5.c: Likewise.

 ---
  gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c |  44 +
  gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c |  33 
  gcc/testsuite/gcc.dg/tree-ssa/pr88497-3.c |  33 
  gcc/testsuite/gcc.dg/tree-ssa/pr88497-4.c |  33 
  gcc/testsuite/gcc.dg/tree-ssa/pr88497-5.c |  33 
  gcc/tree-ssa-reassoc.c| 306 
 +-
  6 files changed, 477 insertions(+), 5 deletions(-)
  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-3.c
  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-4.c
  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-5.c

 diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c 
 b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
 new file mode 100644
 index 000..99c9af8
 --- /dev/null
 +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
 @@ -0,0 +1,44 @@
 +/* { dg-do compile } */
 +/* { dg-require-effective-target vect_double } */
 +/* { dg-require-effective-target powerpc_vsx_ok { target { powerpc*-*-* } 
 } } */
 +/* { dg-options "-O2 -ffast-math" } */
 +/* { dg-options "-O2 -ffast-math -mvsx -fdump-tree-reassoc1" { target { 
 powerpc*-*-* } } } */
 +
 +/* To test reassoc can undistribute vector bit_field_ref summation.
 +
 +   arg1 and arg2 are two arrays whose elements of type vector double.
 +   Assuming:
 + A0 = arg1[0], A1 = arg1[1], A2 = arg1[2], A3 = arg1[3],
 + B0 = arg2[0], B1 = arg2[1], B2 = arg2[2], B3 = arg2[3],
 +
 +   Then:
 + V0 = A0 * B0, V1 = A1 * B1, V2 = A2 * B2, V3 = A3 * B3,
 +
 +   reassoc transforms
 +
 + accumulator += V0[0] + V0[1] + V1[0] + V1[1] + V2[0] + V2[1]
 ++ V3[0] + V3[1];
 +
 +   into:
 +
 + T = V0 + V1 + V2 + V3
 + accumulator += T[0] + T[1];
 +
 +   Fewer bit_field_refs, only two for 128 or more bits vector.  */
 +
 +typedef double v2df __attribute__ ((vector_size (16)));
 +double
 +test (double accumulator, v2df arg1[], v2df arg2[])
 +{
 +  v2df temp;
 +  temp = arg1[0] * arg2[0];
 +  accumulator += temp[0] + temp[1];
 +  temp = arg1[1] * arg2[1];
 +  accumulator += temp[0] + temp[1];
 +  temp = arg1[2] * arg2[2];
 +  accumulator += temp[0] + temp[1];
 +  temp = arg1[3] * arg2[3];
 +  accumulator += temp[0] + temp[1];
 +  return accumulator;
 +}
 +/* { dg-final { scan-tree-dump-times "BIT_FIELD_REF" 2 "reassoc1" { 
 target { powerpc*-*-* } } } } */
 diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c 
 b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
 new file mode 100644
 index 000..61ed0bf5
 --- /dev/null
 +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
 @@ -0,0 +1,33 @@
 +/* { dg-do compile } */
 +/* { dg-require-effective-target vect_float } */
 +/* { dg-require-effective-target powerpc_altivec_ok { target { 
 powerpc*-*-* } } } */
 +/* { dg-options "-O2 -ffast-math" } */
 +/* { dg-options "-O2 -ffast-math -maltivec -fdump-tree-reassoc1" {

[PING^4] [PATCH V3] PR88497 - Extend reassoc for vector bit_field_ref

2019-06-10 Thread Kewen.Lin 
Hi,

Gentle ping again.  Thanks!

Kewen

on 2019/5/21 上午10:02, Kewen.Lin wrote:
> Hi,
> 
> Gentle ping again.  Thanks!
> 
> 
> Kewen
> 
> on 2019/5/5 下午2:15, Kewen.Lin wrote:
>> Hi,
>>
>> I'd like to gentle ping for this patch:
>> https://gcc.gnu.org/ml/gcc-patches/2019-03/msg00966.html
>>
>> OK for trunk now?
>>
>> Thanks!
>>
>> on 2019/3/20 上午11:14, Kewen.Lin wrote:
>>> Hi,
>>>
>>> Please refer to below link for previous threads.
>>> https://gcc.gnu.org/ml/gcc-patches/2019-03/msg00348.html
>>>
>>> Comparing to patch v2, I've moved up the vector operation target 
>>> check upward together with vector type target check.  Besides, I
>>> ran bootstrap and regtest on powerpc64-linux-gnu (BE), updated 
>>> testcases' requirements and options for robustness.
>>>
>>> Is it OK for GCC10?
>>>
>>>
>>> gcc/ChangeLog
>>>
>>> 2019-03-20  Kewen Lin  
>>>
>>> PR target/88497
>>> * tree-ssa-reassoc.c (reassociate_bb): Swap the positions of 
>>> GIMPLE_BINARY_RHS check and gimple_visited_p check, call new 
>>> function undistribute_bitref_for_vector.
>>> (undistribute_bitref_for_vector): New function.
>>> (cleanup_vinfo_map): Likewise.
>>> (unsigned_cmp): Likewise.
>>>
>>> gcc/testsuite/ChangeLog
>>>
>>> 2019-03-20  Kewen Lin  
>>>
>>> * gcc.dg/tree-ssa/pr88497-1.c: New test.
>>> * gcc.dg/tree-ssa/pr88497-2.c: Likewise.
>>> * gcc.dg/tree-ssa/pr88497-3.c: Likewise.
>>> * gcc.dg/tree-ssa/pr88497-4.c: Likewise.
>>> * gcc.dg/tree-ssa/pr88497-5.c: Likewise.
>>>
>>> ---
>>>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c |  44 +
>>>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c |  33 
>>>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-3.c |  33 
>>>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-4.c |  33 
>>>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-5.c |  33 
>>>  gcc/tree-ssa-reassoc.c| 306 
>>> +-
>>>  6 files changed, 477 insertions(+), 5 deletions(-)
>>>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
>>>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
>>>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-3.c
>>>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-4.c
>>>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-5.c
>>>
>>> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c 
>>> b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
>>> new file mode 100644
>>> index 000..99c9af8
>>> --- /dev/null
>>> +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
>>> @@ -0,0 +1,44 @@
>>> +/* { dg-do compile } */
>>> +/* { dg-require-effective-target vect_double } */
>>> +/* { dg-require-effective-target powerpc_vsx_ok { target { powerpc*-*-* } 
>>> } } */
>>> +/* { dg-options "-O2 -ffast-math" } */
>>> +/* { dg-options "-O2 -ffast-math -mvsx -fdump-tree-reassoc1" { target { 
>>> powerpc*-*-* } } } */
>>> +
>>> +/* To test reassoc can undistribute vector bit_field_ref summation.
>>> +
>>> +   arg1 and arg2 are two arrays whose elements of type vector double.
>>> +   Assuming:
>>> + A0 = arg1[0], A1 = arg1[1], A2 = arg1[2], A3 = arg1[3],
>>> + B0 = arg2[0], B1 = arg2[1], B2 = arg2[2], B3 = arg2[3],
>>> +
>>> +   Then:
>>> + V0 = A0 * B0, V1 = A1 * B1, V2 = A2 * B2, V3 = A3 * B3,
>>> +
>>> +   reassoc transforms
>>> +
>>> + accumulator += V0[0] + V0[1] + V1[0] + V1[1] + V2[0] + V2[1]
>>> + + V3[0] + V3[1];
>>> +
>>> +   into:
>>> +
>>> + T = V0 + V1 + V2 + V3
>>> + accumulator += T[0] + T[1];
>>> +
>>> +   Fewer bit_field_refs, only two for 128 or more bits vector.  */
>>> +
>>> +typedef double v2df __attribute__ ((vector_size (16)));
>>> +double
>>> +test (double accumulator, v2df arg1[], v2df arg2[])
>>> +{
>>> +  v2df temp;
>>> +  temp = arg1[0] * arg2[0];
>>> +  accumulator += temp[0] + temp[1];
>>> +  temp = arg1[1] * arg2[1];
>>> +  accumulator += temp[0] + temp[1];
>>> +  temp = arg1[2] * arg2[2];
>>> +  accumulator += temp[0] + temp[1];
>>> +  temp = arg1[3] * arg2[3];
>>> +  accumulator += temp[0] + temp[1];
>>> +  return accumulator;
>>> +}
>>> +/* { dg-final { scan-tree-dump-times "BIT_FIELD_REF" 2 "reassoc1" { target 
>>> { powerpc*-*-* } } } } */
>>> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c 
>>> b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
>>> new file mode 100644
>>> index 000..61ed0bf5
>>> --- /dev/null
>>> +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
>>> @@ -0,0 +1,33 @@
>>> +/* { dg-do compile } */
>>> +/* { dg-require-effective-target vect_float } */
>>> +/* { dg-require-effective-target powerpc_altivec_ok { target { 
>>> powerpc*-*-* } } } */
>>> +/* { dg-options "-O2 -ffast-math" } */
>>> +/* { dg-options "-O2 -ffast-math -maltivec -fdump-tree-reassoc1" { target 
>>> { powerpc*-*-* } } } */
>>> +
>>> +/* To test reassoc can undistribute vector bit_field_ref on multiplication.
>>> +
>>> +   v1, v2, v3, v4 of type vector float.
>>> +
>>> +   reassoc transforms
>>> +
>>> + accumulator *= v1[0] * v1[1] * v1[2] * v1[3] *

[PING] [PATCH V3] PR88497 - Extend reassoc for vector bit_field_ref

2019-05-20 Thread Kewen.Lin 
Hi,

Gentle ping again.  Thanks!


Kewen

on 2019/5/5 下午2:15, Kewen.Lin wrote:
> Hi,
> 
> I'd like to gentle ping for this patch:
> https://gcc.gnu.org/ml/gcc-patches/2019-03/msg00966.html
> 
> OK for trunk now?
> 
> Thanks!
> 
> on 2019/3/20 上午11:14, Kewen.Lin wrote:
>> Hi,
>>
>> Please refer to below link for previous threads.
>> https://gcc.gnu.org/ml/gcc-patches/2019-03/msg00348.html
>>
>> Comparing to patch v2, I've moved up the vector operation target 
>> check upward together with vector type target check.  Besides, I
>> ran bootstrap and regtest on powerpc64-linux-gnu (BE), updated 
>> testcases' requirements and options for robustness.
>>
>> Is it OK for GCC10?
>>
>>
>> gcc/ChangeLog
>>
>> 2019-03-20  Kewen Lin  
>>
>>  PR target/88497
>>  * tree-ssa-reassoc.c (reassociate_bb): Swap the positions of 
>>  GIMPLE_BINARY_RHS check and gimple_visited_p check, call new 
>>  function undistribute_bitref_for_vector.
>>  (undistribute_bitref_for_vector): New function.
>>  (cleanup_vinfo_map): Likewise.
>>  (unsigned_cmp): Likewise.
>>
>> gcc/testsuite/ChangeLog
>>
>> 2019-03-20  Kewen Lin  
>>
>>  * gcc.dg/tree-ssa/pr88497-1.c: New test.
>>  * gcc.dg/tree-ssa/pr88497-2.c: Likewise.
>>  * gcc.dg/tree-ssa/pr88497-3.c: Likewise.
>>  * gcc.dg/tree-ssa/pr88497-4.c: Likewise.
>>  * gcc.dg/tree-ssa/pr88497-5.c: Likewise.
>>
>> ---
>>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c |  44 +
>>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c |  33 
>>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-3.c |  33 
>>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-4.c |  33 
>>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-5.c |  33 
>>  gcc/tree-ssa-reassoc.c| 306 
>> +-
>>  6 files changed, 477 insertions(+), 5 deletions(-)
>>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
>>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
>>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-3.c
>>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-4.c
>>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-5.c
>>
>> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c 
>> b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
>> new file mode 100644
>> index 000..99c9af8
>> --- /dev/null
>> +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
>> @@ -0,0 +1,44 @@
>> +/* { dg-do compile } */
>> +/* { dg-require-effective-target vect_double } */
>> +/* { dg-require-effective-target powerpc_vsx_ok { target { powerpc*-*-* } } 
>> } */
>> +/* { dg-options "-O2 -ffast-math" } */
>> +/* { dg-options "-O2 -ffast-math -mvsx -fdump-tree-reassoc1" { target { 
>> powerpc*-*-* } } } */
>> +
>> +/* To test reassoc can undistribute vector bit_field_ref summation.
>> +
>> +   arg1 and arg2 are two arrays whose elements of type vector double.
>> +   Assuming:
>> + A0 = arg1[0], A1 = arg1[1], A2 = arg1[2], A3 = arg1[3],
>> + B0 = arg2[0], B1 = arg2[1], B2 = arg2[2], B3 = arg2[3],
>> +
>> +   Then:
>> + V0 = A0 * B0, V1 = A1 * B1, V2 = A2 * B2, V3 = A3 * B3,
>> +
>> +   reassoc transforms
>> +
>> + accumulator += V0[0] + V0[1] + V1[0] + V1[1] + V2[0] + V2[1]
>> +  + V3[0] + V3[1];
>> +
>> +   into:
>> +
>> + T = V0 + V1 + V2 + V3
>> + accumulator += T[0] + T[1];
>> +
>> +   Fewer bit_field_refs, only two for 128 or more bits vector.  */
>> +
>> +typedef double v2df __attribute__ ((vector_size (16)));
>> +double
>> +test (double accumulator, v2df arg1[], v2df arg2[])
>> +{
>> +  v2df temp;
>> +  temp = arg1[0] * arg2[0];
>> +  accumulator += temp[0] + temp[1];
>> +  temp = arg1[1] * arg2[1];
>> +  accumulator += temp[0] + temp[1];
>> +  temp = arg1[2] * arg2[2];
>> +  accumulator += temp[0] + temp[1];
>> +  temp = arg1[3] * arg2[3];
>> +  accumulator += temp[0] + temp[1];
>> +  return accumulator;
>> +}
>> +/* { dg-final { scan-tree-dump-times "BIT_FIELD_REF" 2 "reassoc1" { target 
>> { powerpc*-*-* } } } } */
>> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c 
>> b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
>> new file mode 100644
>> index 000..61ed0bf5
>> --- /dev/null
>> +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
>> @@ -0,0 +1,33 @@
>> +/* { dg-do compile } */
>> +/* { dg-require-effective-target vect_float } */
>> +/* { dg-require-effective-target powerpc_altivec_ok { target { powerpc*-*-* 
>> } } } */
>> +/* { dg-options "-O2 -ffast-math" } */
>> +/* { dg-options "-O2 -ffast-math -maltivec -fdump-tree-reassoc1" { target { 
>> powerpc*-*-* } } } */
>> +
>> +/* To test reassoc can undistribute vector bit_field_ref on multiplication.
>> +
>> +   v1, v2, v3, v4 of type vector float.
>> +
>> +   reassoc transforms
>> +
>> + accumulator *= v1[0] * v1[1] * v1[2] * v1[3] *
>> +v2[0] * v2[1] * v2[2] * v2[3] *
>> +v3[0] * v3[1] * v3[2] * v3[3] *
>> +v4[0] * v4[1] * v4[2] * v4[3] ;
>> +
>> +   into:
>> +
>> + T = v1 * v2 *

[PING] [PATCH V3] PR88497 - Extend reassoc for vector bit_field_ref

2019-05-05 Thread Kewen.Lin 
Hi,

I'd like to gentle ping for this patch:
https://gcc.gnu.org/ml/gcc-patches/2019-03/msg00966.html

OK for trunk now?

Thanks!

on 2019/3/20 上午11:14, Kewen.Lin wrote:
> Hi,
> 
> Please refer to below link for previous threads.
> https://gcc.gnu.org/ml/gcc-patches/2019-03/msg00348.html
> 
> Comparing to patch v2, I've moved up the vector operation target 
> check upward together with vector type target check.  Besides, I
> ran bootstrap and regtest on powerpc64-linux-gnu (BE), updated 
> testcases' requirements and options for robustness.
> 
> Is it OK for GCC10?
> 
> 
> gcc/ChangeLog
> 
> 2019-03-20  Kewen Lin  
> 
>   PR target/88497
>   * tree-ssa-reassoc.c (reassociate_bb): Swap the positions of 
>   GIMPLE_BINARY_RHS check and gimple_visited_p check, call new 
>   function undistribute_bitref_for_vector.
>   (undistribute_bitref_for_vector): New function.
>   (cleanup_vinfo_map): Likewise.
>   (unsigned_cmp): Likewise.
> 
> gcc/testsuite/ChangeLog
> 
> 2019-03-20  Kewen Lin  
> 
>   * gcc.dg/tree-ssa/pr88497-1.c: New test.
>   * gcc.dg/tree-ssa/pr88497-2.c: Likewise.
>   * gcc.dg/tree-ssa/pr88497-3.c: Likewise.
>   * gcc.dg/tree-ssa/pr88497-4.c: Likewise.
>   * gcc.dg/tree-ssa/pr88497-5.c: Likewise.
> 
> ---
>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c |  44 +
>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c |  33 
>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-3.c |  33 
>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-4.c |  33 
>  gcc/testsuite/gcc.dg/tree-ssa/pr88497-5.c |  33 
>  gcc/tree-ssa-reassoc.c| 306 
> +-
>  6 files changed, 477 insertions(+), 5 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-3.c
>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-4.c
>  create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-5.c
> 
> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c 
> b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
> new file mode 100644
> index 000..99c9af8
> --- /dev/null
> +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
> @@ -0,0 +1,44 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target vect_double } */
> +/* { dg-require-effective-target powerpc_vsx_ok { target { powerpc*-*-* } } 
> } */
> +/* { dg-options "-O2 -ffast-math" } */
> +/* { dg-options "-O2 -ffast-math -mvsx -fdump-tree-reassoc1" { target { 
> powerpc*-*-* } } } */
> +
> +/* To test reassoc can undistribute vector bit_field_ref summation.
> +
> +   arg1 and arg2 are two arrays whose elements of type vector double.
> +   Assuming:
> + A0 = arg1[0], A1 = arg1[1], A2 = arg1[2], A3 = arg1[3],
> + B0 = arg2[0], B1 = arg2[1], B2 = arg2[2], B3 = arg2[3],
> +
> +   Then:
> + V0 = A0 * B0, V1 = A1 * B1, V2 = A2 * B2, V3 = A3 * B3,
> +
> +   reassoc transforms
> +
> + accumulator += V0[0] + V0[1] + V1[0] + V1[1] + V2[0] + V2[1]
> +   + V3[0] + V3[1];
> +
> +   into:
> +
> + T = V0 + V1 + V2 + V3
> + accumulator += T[0] + T[1];
> +
> +   Fewer bit_field_refs, only two for 128 or more bits vector.  */
> +
> +typedef double v2df __attribute__ ((vector_size (16)));
> +double
> +test (double accumulator, v2df arg1[], v2df arg2[])
> +{
> +  v2df temp;
> +  temp = arg1[0] * arg2[0];
> +  accumulator += temp[0] + temp[1];
> +  temp = arg1[1] * arg2[1];
> +  accumulator += temp[0] + temp[1];
> +  temp = arg1[2] * arg2[2];
> +  accumulator += temp[0] + temp[1];
> +  temp = arg1[3] * arg2[3];
> +  accumulator += temp[0] + temp[1];
> +  return accumulator;
> +}
> +/* { dg-final { scan-tree-dump-times "BIT_FIELD_REF" 2 "reassoc1" { target { 
> powerpc*-*-* } } } } */
> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c 
> b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
> new file mode 100644
> index 000..61ed0bf5
> --- /dev/null
> +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
> @@ -0,0 +1,33 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target vect_float } */
> +/* { dg-require-effective-target powerpc_altivec_ok { target { powerpc*-*-* 
> } } } */
> +/* { dg-options "-O2 -ffast-math" } */
> +/* { dg-options "-O2 -ffast-math -maltivec -fdump-tree-reassoc1" { target { 
> powerpc*-*-* } } } */
> +
> +/* To test reassoc can undistribute vector bit_field_ref on multiplication.
> +
> +   v1, v2, v3, v4 of type vector float.
> +
> +   reassoc transforms
> +
> + accumulator *= v1[0] * v1[1] * v1[2] * v1[3] *
> +v2[0] * v2[1] * v2[2] * v2[3] *
> +v3[0] * v3[1] * v3[2] * v3[3] *
> +v4[0] * v4[1] * v4[2] * v4[3] ;
> +
> +   into:
> +
> + T = v1 * v2 * v3 * v4;
> + accumulator *= T[0] * T[1] * T[2] * T[3];
> +
> +   Fewer bit_field_refs, only four for 128 or more bits vector.  */
> +
> +typedef float v4si __attribute__((vector_size(16)));
> +float

[PING] [PATCH V3] PR88497 - Extend reassoc for vector bit_field_ref

2019-04-03 Thread Kewen.Lin 
Hi,

Gentle ping for this patch:
https://gcc.gnu.org/ml/gcc-patches/2019-03/msg00966.html

Thanks!

on 2019/3/19 上午11:14, Kewen.Lin wrote:
> Hi,
> 
> Please refer to below link for previous threads.
> https://gcc.gnu.org/ml/gcc-patches/2019-03/msg00348.html
> 
> Comparing to patch v2, I've moved up the vector operation target 
> check upward together with vector type target check.  Besides, I
> ran bootstrap and regtest on powerpc64-linux-gnu (BE), updated 
> testcases' requirements and options for robustness.
> 
> Is it OK for GCC10?
> 
> 
> gcc/ChangeLog
> 
> 2019-03-20  Kewen Lin  
> 
>   PR target/88497
>   * tree-ssa-reassoc.c (reassociate_bb): Swap the positions of 
>   GIMPLE_BINARY_RHS check and gimple_visited_p check, call new 
>   function undistribute_bitref_for_vector.
>   (undistribute_bitref_for_vector): New function.
>   (cleanup_vinfo_map): Likewise.
>   (unsigned_cmp): Likewise.
> 
> gcc/testsuite/ChangeLog
> 
> 2019-03-20  Kewen Lin  
> 
>   * gcc.dg/tree-ssa/pr88497-1.c: New test.
>   * gcc.dg/tree-ssa/pr88497-2.c: Likewise.
>   * gcc.dg/tree-ssa/pr88497-3.c: Likewise.
>   * gcc.dg/tree-ssa/pr88497-4.c: Likewise.
>   * gcc.dg/tree-ssa/pr88497-5.c: Likewise.
>

[PATCH V3] PR88497 - Extend reassoc for vector bit_field_ref

2019-03-19 Thread Kewen.Lin 
Hi,

Please refer to below link for previous threads.
https://gcc.gnu.org/ml/gcc-patches/2019-03/msg00348.html

Comparing to patch v2, I've moved up the vector operation target 
check upward together with vector type target check.  Besides, I
ran bootstrap and regtest on powerpc64-linux-gnu (BE), updated 
testcases' requirements and options for robustness.

Is it OK for GCC10?


gcc/ChangeLog

2019-03-20  Kewen Lin  

PR target/88497
* tree-ssa-reassoc.c (reassociate_bb): Swap the positions of 
GIMPLE_BINARY_RHS check and gimple_visited_p check, call new 
function undistribute_bitref_for_vector.
(undistribute_bitref_for_vector): New function.
(cleanup_vinfo_map): Likewise.
(unsigned_cmp): Likewise.

gcc/testsuite/ChangeLog

2019-03-20  Kewen Lin  

* gcc.dg/tree-ssa/pr88497-1.c: New test.
* gcc.dg/tree-ssa/pr88497-2.c: Likewise.
* gcc.dg/tree-ssa/pr88497-3.c: Likewise.
* gcc.dg/tree-ssa/pr88497-4.c: Likewise.
* gcc.dg/tree-ssa/pr88497-5.c: Likewise.

---
 gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c |  44 +
 gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c |  33 
 gcc/testsuite/gcc.dg/tree-ssa/pr88497-3.c |  33 
 gcc/testsuite/gcc.dg/tree-ssa/pr88497-4.c |  33 
 gcc/testsuite/gcc.dg/tree-ssa/pr88497-5.c |  33 
 gcc/tree-ssa-reassoc.c| 306 +-
 6 files changed, 477 insertions(+), 5 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-3.c
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-4.c
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-5.c

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
new file mode 100644
index 000..99c9af8
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c
@@ -0,0 +1,44 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target vect_double } */
+/* { dg-require-effective-target powerpc_vsx_ok { target { powerpc*-*-* } } } 
*/
+/* { dg-options "-O2 -ffast-math" } */
+/* { dg-options "-O2 -ffast-math -mvsx -fdump-tree-reassoc1" { target { 
powerpc*-*-* } } } */
+
+/* To test reassoc can undistribute vector bit_field_ref summation.
+
+   arg1 and arg2 are two arrays whose elements of type vector double.
+   Assuming:
+ A0 = arg1[0], A1 = arg1[1], A2 = arg1[2], A3 = arg1[3],
+ B0 = arg2[0], B1 = arg2[1], B2 = arg2[2], B3 = arg2[3],
+
+   Then:
+ V0 = A0 * B0, V1 = A1 * B1, V2 = A2 * B2, V3 = A3 * B3,
+
+   reassoc transforms
+
+ accumulator += V0[0] + V0[1] + V1[0] + V1[1] + V2[0] + V2[1]
+ + V3[0] + V3[1];
+
+   into:
+
+ T = V0 + V1 + V2 + V3
+ accumulator += T[0] + T[1];
+
+   Fewer bit_field_refs, only two for 128 or more bits vector.  */
+
+typedef double v2df __attribute__ ((vector_size (16)));
+double
+test (double accumulator, v2df arg1[], v2df arg2[])
+{
+  v2df temp;
+  temp = arg1[0] * arg2[0];
+  accumulator += temp[0] + temp[1];
+  temp = arg1[1] * arg2[1];
+  accumulator += temp[0] + temp[1];
+  temp = arg1[2] * arg2[2];
+  accumulator += temp[0] + temp[1];
+  temp = arg1[3] * arg2[3];
+  accumulator += temp[0] + temp[1];
+  return accumulator;
+}
+/* { dg-final { scan-tree-dump-times "BIT_FIELD_REF" 2 "reassoc1" { target { 
powerpc*-*-* } } } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c 
b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
new file mode 100644
index 000..61ed0bf5
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target vect_float } */
+/* { dg-require-effective-target powerpc_altivec_ok { target { powerpc*-*-* } 
} } */
+/* { dg-options "-O2 -ffast-math" } */
+/* { dg-options "-O2 -ffast-math -maltivec -fdump-tree-reassoc1" { target { 
powerpc*-*-* } } } */
+
+/* To test reassoc can undistribute vector bit_field_ref on multiplication.
+
+   v1, v2, v3, v4 of type vector float.
+
+   reassoc transforms
+
+ accumulator *= v1[0] * v1[1] * v1[2] * v1[3] *
+v2[0] * v2[1] * v2[2] * v2[3] *
+v3[0] * v3[1] * v3[2] * v3[3] *
+v4[0] * v4[1] * v4[2] * v4[3] ;
+
+   into:
+
+ T = v1 * v2 * v3 * v4;
+ accumulator *= T[0] * T[1] * T[2] * T[3];
+
+   Fewer bit_field_refs, only four for 128 or more bits vector.  */
+
+typedef float v4si __attribute__((vector_size(16)));
+float test(float accumulator, v4si v1, v4si v2, v4si v3, v4si v4) {
+  accumulator *= v1[0] * v1[1] * v1[2] * v1[3];
+  accumulator *= v2[0] * v2[1] * v2[2] * v2[3];
+  accumulator *= v3[0] * v3[1] * v3[2] * v3[3];
+  accumulator *= v4[0] * v4[1] * v4[2] * v4[3];
+  return accumulator;
+}
+/* { dg-final { scan-tree-dump-times "BIT_FIELD_REF" 4 "reassoc1" { target { 
powerpc*-*-* } } } } */
diff --git