This patch adds non-vector related insn reservations and updates/creates
new insn reservations so all non-vector typed instructions have a reservation.
gcc/ChangeLog:
* config/riscv/generic-ooo.md (generic_ooo_sfb_alu): Add reservation
(generic_ooo_branch): ditto
* config/riscv/generic.md (generic_sfb_alu): ditto
(generic_fmul_half): ditto
* config/riscv/riscv.md: Remove cbo, pushpop, and rdfrm types
* config/riscv/sifive-7.md (sifive_7_hfma): Add reservation
(sifive_7_popcount): ditto
* config/riscv/sifive-p400.md (sifive_p400_clmul): ditto
* config/riscv/sifive-p600.md (sifive_p600_clmul): ditto
* config/riscv/vector.md: change rdfrm to fmove
* config/riscv/zc.md: change pushpop to load/store
Signed-off-by: Edwin Lu
---
V2:
- Add insn reservations for HF fmul
- Remove/adjust insn types
V3:
- No changes
V4:
- Update sifive-p400 and sifive-p600 series
---
gcc/config/riscv/generic-ooo.md | 15 +-
gcc/config/riscv/generic.md | 20 +--
gcc/config/riscv/riscv.md | 16 +++---
gcc/config/riscv/sifive-7.md| 17 +-
gcc/config/riscv/sifive-p400.md | 10 +++-
gcc/config/riscv/sifive-p600.md | 10 +++-
gcc/config/riscv/vector.md | 2 +-
gcc/config/riscv/zc.md | 96 -
8 files changed, 117 insertions(+), 69 deletions(-)
diff --git a/gcc/config/riscv/generic-ooo.md b/gcc/config/riscv/generic-ooo.md
index a22f8a3e079..83cd06234b3 100644
--- a/gcc/config/riscv/generic-ooo.md
+++ b/gcc/config/riscv/generic-ooo.md
@@ -115,9 +115,20 @@ (define_insn_reservation "generic_ooo_vec_loadstore_seg" 10
(define_insn_reservation "generic_ooo_alu" 1
(and (eq_attr "tune" "generic_ooo")
(eq_attr "type" "unknown,const,arith,shift,slt,multi,auipc,nop,logical,\
- move,bitmanip,min,max,minu,maxu,clz,ctz"))
+ move,bitmanip,rotate,min,max,minu,maxu,clz,ctz,atomic,\
+ condmove,mvpair,zicond"))
"generic_ooo_issue,generic_ooo_ixu_alu")
+(define_insn_reservation "generic_ooo_sfb_alu" 2
+ (and (eq_attr "tune" "generic_ooo")
+ (eq_attr "type" "sfb_alu"))
+ "generic_ooo_issue,generic_ooo_ixu_alu")
+
+;; Branch instructions
+(define_insn_reservation "generic_ooo_branch" 1
+ (and (eq_attr "tune" "generic_ooo")
+ (eq_attr "type" "branch,jump,call,jalr,ret,trap"))
+ "generic_ooo_issue,generic_ooo_ixu_alu")
;; Float move, convert and compare.
(define_insn_reservation "generic_ooo_float_move" 3
@@ -184,7 +195,7 @@ (define_insn_reservation "generic_ooo_popcount" 2
(define_insn_reservation "generic_ooo_vec_alu" 3
(and (eq_attr "tune" "generic_ooo")
(eq_attr "type"
"vialu,viwalu,vext,vicalu,vshift,vnshift,viminmax,vicmp,\
- vimov,vsalu,vaalu,vsshift,vnclip,vmov,vfmov"))
+ vimov,vsalu,vaalu,vsshift,vnclip,vmov,vfmov,vector"))
"generic_ooo_vxu_issue,generic_ooo_vxu_alu")
;; Vector float comparison, conversion etc.
diff --git a/gcc/config/riscv/generic.md b/gcc/config/riscv/generic.md
index 3f0eaa2ea08..4f6e63bff57 100644
--- a/gcc/config/riscv/generic.md
+++ b/gcc/config/riscv/generic.md
@@ -27,7 +27,9 @@ (define_cpu_unit "fdivsqrt" "pipe0")
(define_insn_reservation "generic_alu" 1
(and (eq_attr "tune" "generic")
- (eq_attr "type"
"unknown,const,arith,shift,slt,multi,auipc,nop,logical,move,bitmanip,min,max,minu,maxu,clz,ctz,cpop"))
+ (eq_attr "type" "unknown,const,arith,shift,slt,multi,auipc,nop,logical,\
+ move,bitmanip,min,max,minu,maxu,clz,ctz,rotate,atomic,\
+ condmove,crypto,mvpair,zicond"))
"alu")
(define_insn_reservation "generic_load" 3
@@ -47,12 +49,17 @@ (define_insn_reservation "generic_xfer" 3
(define_insn_reservation "generic_branch" 1
(and (eq_attr "tune" "generic")
- (eq_attr "type" "branch,jump,call,jalr"))
+ (eq_attr "type" "branch,jump,call,jalr,ret,trap"))
+ "alu")
+
+(define_insn_reservation "generic_sfb_alu" 2
+ (and (eq_attr "tune" "generic")
+ (eq_attr "type" "sfb_alu"))
"alu")
(define_insn_reservation "generic_imul" 10
(and (eq_attr "tune" "generic")
- (eq_attr "type" "imul,clmul"))
+ (eq_attr "type" "imul,clmul,cpop"))
"imuldiv*10")
(define_insn_reservation "generic_idivsi" 34
@@ -67,6 +74,12 @@ (define_insn_reservation "generic_idivdi" 66
(eq_attr "mode" "DI")))
"imuldiv*66")
+(define_insn_reservation "generic_fmul_half" 5
+ (and (eq_attr "tune" "generic")
+ (and (eq_attr "type" "fadd,fmul,fmadd")
+ (eq_attr "mode" "HF")))
+ "alu")
+
(define_insn_reservation "generic_fmul_single" 5
(and (eq_attr "tune" "generic")
(and (eq_attr "type" "fadd,fmul,fmadd")
@@ -88,3 +101,4 @@ (define_insn_reservation "generic_fsqrt" 25
(and (eq_attr "tune" "generic")
(eq_attr "type" "fsqrt"))
"fdivsqrt*25")
+
diff --git a/gcc/config/riscv/riscv.md b/g