RE: [PATCH v1] RISC-V: Support RVV VFNCVT.X.F.W rounding mode intrinsic API
Committed, thanks Kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Thursday, August 17, 2023 3:30 PM
To: Li, Pan2
Cc: juzhe.zh...@rivai.ai
Subject: Re: [PATCH v1] RISC-V: Support RVV VFNCVT.X.F.W rounding mode
intrinsic API
Yeah, I missed that, LGTM :P
On Thu, Aug 17, 2023 at 2:28 PM Li, Pan2 wrote:
>
> Hi Kito,
>
> In case you missed this one, which is the precondition of the rest rounding
> mode API patches for committing.
> Thank in advance, and we are close to complete all the rounding mode API, 😉.
>
> Pan
>
> -Original Message-
> From: Li, Pan2
> Sent: Wednesday, August 16, 2023 8:54 PM
> To: gcc-patches@gcc.gnu.org
> Cc: juzhe.zh...@rivai.ai; Li, Pan2 ; Wang, Yanzhang
> ; kito.ch...@gmail.com
> Subject: [PATCH v1] RISC-V: Support RVV VFNCVT.X.F.W rounding mode intrinsic
> API
>
> From: Pan Li
>
> This patch would like to support the rounding mode API for the
> VFNCVT.X.F.W as the below samples.
>
> * __riscv_vfncvt_x_f_w_i16mf2_rm
> * __riscv_vfncvt_x_f_w_i16mf2_rm_m
>
> Signed-off-by: Pan Li
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-vector-builtins-bases.cc
> (class vfncvt_x): Add frm_op_type template arg.
> (BASE): New declaration.
> * config/riscv/riscv-vector-builtins-bases.h: Ditto.
> * config/riscv/riscv-vector-builtins-functions.def
> (vfncvt_x_frm): New intrinsic function def.
> * config/riscv/riscv-vector-builtins-shapes.cc
> (struct narrow_alu_frm_def): New shape function for frm.
> (SHAPE): New declaration.
> * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/base/float-point-ncvt-x.c: New test.
> ---
> .../riscv/riscv-vector-builtins-bases.cc | 9 -
> .../riscv/riscv-vector-builtins-bases.h | 1 +
> .../riscv/riscv-vector-builtins-functions.def | 2 +
> .../riscv/riscv-vector-builtins-shapes.cc | 39 +++
> .../riscv/riscv-vector-builtins-shapes.h | 1 +
> .../riscv/rvv/base/float-point-ncvt-x.c | 29 ++
> 6 files changed, 80 insertions(+), 1 deletion(-)
> create mode 100644
> gcc/testsuite/gcc.target/riscv/rvv/base/float-point-ncvt-x.c
>
> diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc
> b/gcc/config/riscv/riscv-vector-builtins-bases.cc
> index 050ecbe780c..2f40eeaeda5 100644
> --- a/gcc/config/riscv/riscv-vector-builtins-bases.cc
> +++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc
> @@ -1759,10 +1759,15 @@ public:
> };
>
> /* Implements vfncvt.x. */
> -template
> +template
> class vfncvt_x : public function_base
> {
> public:
> + bool has_rounding_mode_operand_p () const override
> + {
> +return FRM_OP == HAS_FRM;
> + }
> +
>rtx expand (function_expander &e) const override
>{
> return e.use_exact_insn (
> @@ -2502,6 +2507,7 @@ static CONSTEXPR const vfwcvt_rtz_x
> vfwcvt_rtz_x_obj;
> static CONSTEXPR const vfwcvt_rtz_x vfwcvt_rtz_xu_obj;
> static CONSTEXPR const vfwcvt_f vfwcvt_f_obj;
> static CONSTEXPR const vfncvt_x vfncvt_x_obj;
> +static CONSTEXPR const vfncvt_x vfncvt_x_frm_obj;
> static CONSTEXPR const vfncvt_x vfncvt_xu_obj;
> static CONSTEXPR const vfncvt_rtz_x vfncvt_rtz_x_obj;
> static CONSTEXPR const vfncvt_rtz_x vfncvt_rtz_xu_obj;
> @@ -2756,6 +2762,7 @@ BASE (vfwcvt_rtz_x)
> BASE (vfwcvt_rtz_xu)
> BASE (vfwcvt_f)
> BASE (vfncvt_x)
> +BASE (vfncvt_x_frm)
> BASE (vfncvt_xu)
> BASE (vfncvt_rtz_x)
> BASE (vfncvt_rtz_xu)
> diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.h
> b/gcc/config/riscv/riscv-vector-builtins-bases.h
> index 6565740c597..edff0de2715 100644
> --- a/gcc/config/riscv/riscv-vector-builtins-bases.h
> +++ b/gcc/config/riscv/riscv-vector-builtins-bases.h
> @@ -220,6 +220,7 @@ extern const function_base *const vfwcvt_rtz_x;
> extern const function_base *const vfwcvt_rtz_xu;
> extern const function_base *const vfwcvt_f;
> extern const function_base *const vfncvt_x;
> +extern const function_base *const vfncvt_x_frm;
> extern const function_base *const vfncvt_xu;
> extern const function_base *const vfncvt_rtz_x;
> extern const function_base *const vfncvt_rtz_xu;
> diff --git a/gcc/config/riscv/riscv-vector-builtins-functions.def
> b/gcc/config/riscv/riscv-vector-builtins-functions.def
> index 22c039c8cbb..5e37bae318a 100644
> --- a/gcc/config/riscv/riscv-vector-builtins-functions.def
> +++ b/gcc/config/riscv/riscv-vector-builtins-functions.def
> @@ -472,6 +472,8 @@ DEF_RVV_FUNCTION (vfncvt_f, narrow_alu, full_preds,
> u_to_nf_xu_w_ops)
> DEF_RVV_FUNCTION (vfncvt_f, narrow_alu, full_preds, f_to_nf_f_
[PATCH v1] RISC-V: Support RVV VFNCVT.X.F.W rounding mode intrinsic API
From: Pan Li
This patch would like to support the rounding mode API for the
VFNCVT.X.F.W as the below samples.
* __riscv_vfncvt_x_f_w_i16mf2_rm
* __riscv_vfncvt_x_f_w_i16mf2_rm_m
Signed-off-by: Pan Li
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc
(class vfncvt_x): Add frm_op_type template arg.
(BASE): New declaration.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfncvt_x_frm): New intrinsic function def.
* config/riscv/riscv-vector-builtins-shapes.cc
(struct narrow_alu_frm_def): New shape function for frm.
(SHAPE): New declaration.
* config/riscv/riscv-vector-builtins-shapes.h: Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/float-point-ncvt-x.c: New test.
---
.../riscv/riscv-vector-builtins-bases.cc | 9 -
.../riscv/riscv-vector-builtins-bases.h | 1 +
.../riscv/riscv-vector-builtins-functions.def | 2 +
.../riscv/riscv-vector-builtins-shapes.cc | 39 +++
.../riscv/riscv-vector-builtins-shapes.h | 1 +
.../riscv/rvv/base/float-point-ncvt-x.c | 29 ++
6 files changed, 80 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/float-point-ncvt-x.c
diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc
b/gcc/config/riscv/riscv-vector-builtins-bases.cc
index 050ecbe780c..2f40eeaeda5 100644
--- a/gcc/config/riscv/riscv-vector-builtins-bases.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc
@@ -1759,10 +1759,15 @@ public:
};
/* Implements vfncvt.x. */
-template
+template
class vfncvt_x : public function_base
{
public:
+ bool has_rounding_mode_operand_p () const override
+ {
+return FRM_OP == HAS_FRM;
+ }
+
rtx expand (function_expander &e) const override
{
return e.use_exact_insn (
@@ -2502,6 +2507,7 @@ static CONSTEXPR const vfwcvt_rtz_x vfwcvt_rtz_x_obj;
static CONSTEXPR const vfwcvt_rtz_x vfwcvt_rtz_xu_obj;
static CONSTEXPR const vfwcvt_f vfwcvt_f_obj;
static CONSTEXPR const vfncvt_x vfncvt_x_obj;
+static CONSTEXPR const vfncvt_x vfncvt_x_frm_obj;
static CONSTEXPR const vfncvt_x vfncvt_xu_obj;
static CONSTEXPR const vfncvt_rtz_x vfncvt_rtz_x_obj;
static CONSTEXPR const vfncvt_rtz_x vfncvt_rtz_xu_obj;
@@ -2756,6 +2762,7 @@ BASE (vfwcvt_rtz_x)
BASE (vfwcvt_rtz_xu)
BASE (vfwcvt_f)
BASE (vfncvt_x)
+BASE (vfncvt_x_frm)
BASE (vfncvt_xu)
BASE (vfncvt_rtz_x)
BASE (vfncvt_rtz_xu)
diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.h
b/gcc/config/riscv/riscv-vector-builtins-bases.h
index 6565740c597..edff0de2715 100644
--- a/gcc/config/riscv/riscv-vector-builtins-bases.h
+++ b/gcc/config/riscv/riscv-vector-builtins-bases.h
@@ -220,6 +220,7 @@ extern const function_base *const vfwcvt_rtz_x;
extern const function_base *const vfwcvt_rtz_xu;
extern const function_base *const vfwcvt_f;
extern const function_base *const vfncvt_x;
+extern const function_base *const vfncvt_x_frm;
extern const function_base *const vfncvt_xu;
extern const function_base *const vfncvt_rtz_x;
extern const function_base *const vfncvt_rtz_xu;
diff --git a/gcc/config/riscv/riscv-vector-builtins-functions.def
b/gcc/config/riscv/riscv-vector-builtins-functions.def
index 22c039c8cbb..5e37bae318a 100644
--- a/gcc/config/riscv/riscv-vector-builtins-functions.def
+++ b/gcc/config/riscv/riscv-vector-builtins-functions.def
@@ -472,6 +472,8 @@ DEF_RVV_FUNCTION (vfncvt_f, narrow_alu, full_preds,
u_to_nf_xu_w_ops)
DEF_RVV_FUNCTION (vfncvt_f, narrow_alu, full_preds, f_to_nf_f_w_ops)
DEF_RVV_FUNCTION (vfncvt_rod_f, narrow_alu, full_preds, f_to_nf_f_w_ops)
+DEF_RVV_FUNCTION (vfncvt_x_frm, narrow_alu_frm, full_preds, f_to_ni_f_w_ops)
+
/* 14. Vector Reduction Operations. */
// 14.1. Vector Single-Width Integer Reduction Instructions
diff --git a/gcc/config/riscv/riscv-vector-builtins-shapes.cc
b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
index 1d14fa21e81..80329113af3 100644
--- a/gcc/config/riscv/riscv-vector-builtins-shapes.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
@@ -333,6 +333,44 @@ struct widen_alu_frm_def : public build_frm_base
}
};
+/* narrow_alu_frm_def class. */
+struct narrow_alu_frm_def : public build_frm_base
+{
+ char *get_name (function_builder &b, const function_instance &instance,
+ bool overloaded_p) const override
+ {
+char base_name[BASE_NAME_MAX_LEN] = {};
+
+normalize_base_name (base_name, instance.base_name, sizeof (base_name));
+
+b.append_base_name (base_name);
+
+if (!overloaded_p)
+ {
+ /* vop --> vop_. */
+ b.append_name (operand_suffixes[instance.op_info->op]);
+ /* vop_ --> vop__. */
+ vector_type_index ret_type_idx
+ = instance.op_info->ret.get_function_type_index (instance.type.index);
+ b.append_name (type_suffixes[ret_type_idx].vector);
+ }
+
+/* According to rvv-i
