Re: [PATCH v2,rs6000] Add built-in function support for Power9 string operations

2016-10-18 Thread David Edelsohn
This patch broke bootstrap on AIX.

In altivec_init_builtins(), the loop to initialize predicates is
encountering mode1 == SImode.

Thanks, David


Re: [PATCH v2,rs6000] Add built-in function support for Power9 string operations

2016-10-14 Thread Segher Boessenkool
On Thu, Oct 13, 2016 at 09:45:22AM -0600, Kelvin Nilsen wrote:
> 3. Replace magic number 74 with CR6_REGNO in vsx.md (2 occurrences)
>and vector.md (3 occurrences).

Some remain, see below.

> +moves bytes 16 - @code{len} to 15 of the corresponding vector.  For the

> +the element to be extracted is found at position @code{(15 - index)}.

Which of these is what we want, "@code{123 - x}" or "123 - @code{x}"?
(I think the former).  And parens or not?  Whichever way, making it more
consistent will make it easier to read.

> +;; This expansion handles the V4SF and V2DF modes in the Power9
> +;; implementation of the vec_all_ne and vec_any_eq built-in
> +;; functions.
> +(define_expand "vector_ne__p"
> +  [(parallel
> +[(set (reg:CC 74)

CR6_REGNO

You can use 
to uncover these problems.

>  (define_expand "vector_gt__p"
>[(parallel
>  [(set (reg:CC 74)

Your patch is against an old source tree?  Trunk has CR6_REGNO here.

> +(define_insn "*vector_nez__p"
> +  [(set (reg:CC 74)

CR6_REGNO

> +;; Load VSX Vector with Length
> +(define_expand "lxvl"
> +  [(set (match_dup 3)
> +(match_operand:DI 2 "register_operand" "r"))
> +   (set (match_operand:V16QI 0 "vsx_register_operand" "=wa")
> + (unspec:V16QI
> +  [(match_operand:DI 1 "gpc_reg_operand" "b")
> +   (match_dup 3)]
> +  UNSPEC_LXVL))]

Constraints are useless on a define_expand.

> +(define_expand "stxvl"

Here too.


Okay for trunk with those things fixed.  Thank you!


Segher