This series adds types to the remaining untyped instructions. Related Discussion: https://inbox.sourceware.org/gcc-patches/12fb5088-3f28-0a69-de1e-f387371a5...@gmail.com/
Also enables assert which checks to make sure every instruction has a type All patches were tested with rv32/rv64 linux/newlib multilib Additional extensions tested: gcv gc_zba_zbb_zbc_zbs Edwin Lu (5): RISC-V: Update Types for Vector Instructions RISC-V: Add Types for Un-Typed zc Instructions RISC-V: Add Types to Un-Typed Zicond Instructions RISC-V: Add Types to Un-Typed Zicond Instructions RISC-V: Remove Assert Protecting Types gcc/config/riscv/autovec-opt.md | 72 ++++++++++++++-------- gcc/config/riscv/autovec.md | 52 ++++++++++------ gcc/config/riscv/riscv.cc | 2 - gcc/config/riscv/riscv.md | 10 +++- gcc/config/riscv/zc.md | 102 ++++++++++++++++---------------- gcc/config/riscv/zicond.md | 8 +-- 6 files changed, 147 insertions(+), 99 deletions(-) -- 2.42.0
