subject:"\[PATCH v4 4\/9\] MIPS\: Add bitwise instructions for mips16e2"

Re: [PATCH v4 4/9] MIPS: Add bitwise instructions for mips16e2

2023-07-07 Thread Jan-Benedict Glaw

On Fri, 2023-07-07 16:38:51 +0800, 梅杰  wrote:
> 在 2023/7/7 07:06, Jan-Benedict Glaw 写道:
> > On Mon, 2023-06-19 16:29:53 +0800, Jie Mei  
> > wrote:
> > > There are shortened bitwise instructions in the mips16e2 ASE,
> > > for instance, ANDI, ORI/XORI, EXT, INS etc. .
[...]
> > Starting with this patch, I see some new warning:
> > 
> > [all 2023-07-06 23:04:01] g++ -c   -g -O2   -DIN_GCC 
> > -DCROSS_DIRECTORY_STRUCTURE   -fno-exceptions -fno-rtti 
> > -fasynchronous-unwind-tables -W -Wall -Wno-narrowing -Wwrite-strings 
> > -Wcast-qual -Wmissing-format-attribute -Wconditionally-supported 
> > -Woverloaded-virtual -pedantic -Wno-long-long -Wno-variadic-macros 
> > -Wno-overlength-strings -fno-common  -DHAVE_CONFIG_H  -DGENERATOR_FILE -I. 
> > -Ibuild -I../../gcc/gcc -I../../gcc/gcc/build -I../../gcc/gcc/../include  
> > -I../../gcc/gcc/../libcpp/include  \
> > [all 2023-07-06 23:04:01]  -o build/gencondmd.o build/gencondmd.cc
> > [all 2023-07-06 23:04:02] ../../gcc/gcc/config/mips/mips-msa.md:435:26: 
> > warning: 'and' of mutually exclusive equal-tests is always 0
> > [all 2023-07-06 23:04:02]   435 |   DONE;
> > [all 2023-07-06 23:04:02] ../../gcc/gcc/config/mips/mips-msa.md:435:26: 
> > warning: 'and' of mutually exclusive equal-tests is always 0
> > [all 2023-07-06 23:04:03] ../../gcc/gcc/config/mips/mips.md:822:1: warning: 
> > 'and' of mutually exclusive equal-tests is always 0
> > [all 2023-07-06 23:04:03]   822 | ;; conditional-move-type condition is 
> > needed.
> > [all 2023-07-06 23:04:03]   | ^
> > [all 2023-07-06 23:04:03] g++   -g -O2   -DIN_GCC 
> > -DCROSS_DIRECTORY_STRUCTURE   -fno-exceptions -fno-rtti 
> > -fasynchronous-unwind-tables -W -Wall -Wno-narrowing -Wwrite-strings 
> > -Wcast-qual -Wmissing-format-attribute -Wconditionally-supported 
> > -Woverloaded-virtual -pedantic -Wno-long-long -Wno-variadic-macros 
> > -Wno-overlength-strings -fno-common  -DHAVE_CONFIG_H  -DGENERATOR_FILE 
> > -static-libstdc++ -static-libgcc  -o build/gencondmd \
> > [all 2023-07-06 23:04:03] build/gencondmd.o build/errors.o 
> > ../build-x86_64-pc-linux-gnu/libiberty/libiberty.a
> > [all 2023-07-06 23:04:03] build/gencondmd > tmp-cond.md
> > 
> > 
> > (Full build log available as eg. 
> > http://toolchain.lug-owl.de/laminar/jobs/gcc-mips-linux/76)
> 
> The warning you mentioned above seems gone if I change the condition 
> `ISA_HAS_MIPS16E2` to `TARGET_MIPS16 && ISA_HAS_MIPS16E2` in mips.md.
> 
> But it's weird because `ISA_HAS_MIPS16E2` actually contains `TARGET_MIPS16`.
> 
> diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
> index b9eb541cf4a..77165778067 100644
> --- a/gcc/config/mips/mips.md
> +++ b/gcc/config/mips/mips.md
> @@ -3436,7 +3436,7 @@
>[(set (match_operand:GPR 0 "register_operand" "=d,d")
> (ior:GPR (match_operand:GPR 1 "register_operand" "%0,0")
>  (match_operand:GPR 2 "uns_arith_operand" "d,K")))]
> -  "ISA_HAS_MIPS16E2"
> +  "TARGET_MIPS16 && ISA_HAS_MIPS16E2"
>"@
> or\t%0,%2
> ori\t%0,%x2"

That's odd. Have you looked at preprocessed output? Maybe some
parentheses aren't as expected? Looks like an opportunity to deep-dive
into the unexpected. OTOH what's with the mips-msa.md warnings? The
pattern actually want !TARGET_MIPS16. (But I haven't really looked
into the dependencies.)

MfG, JBG

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Re: [PATCH v4 4/9] MIPS: Add bitwise instructions for mips16e2

2023-07-07 Thread 梅杰

Hi,

在 2023/7/7 07:06, Jan-Benedict Glaw 写道:
> Hi!
> 
> On Mon, 2023-06-19 16:29:53 +0800, Jie Mei  wrote:
>> There are shortened bitwise instructions in the mips16e2 ASE,
>> for instance, ANDI, ORI/XORI, EXT, INS etc. .
>>
>> This patch adds these instrutions with corresponding tests.
> 
> [...]
> 
> Starting with this patch, I see some new warning:
> 
> [all 2023-07-06 23:04:01] g++ -c   -g -O2   -DIN_GCC 
> -DCROSS_DIRECTORY_STRUCTURE   -fno-exceptions -fno-rtti 
> -fasynchronous-unwind-tables -W -Wall -Wno-narrowing -Wwrite-strings 
> -Wcast-qual -Wmissing-format-attribute -Wconditionally-supported 
> -Woverloaded-virtual -pedantic -Wno-long-long -Wno-variadic-macros 
> -Wno-overlength-strings -fno-common  -DHAVE_CONFIG_H  -DGENERATOR_FILE -I. 
> -Ibuild -I../../gcc/gcc -I../../gcc/gcc/build -I../../gcc/gcc/../include  
> -I../../gcc/gcc/../libcpp/include  \
> [all 2023-07-06 23:04:01]  -o build/gencondmd.o build/gencondmd.cc
> [all 2023-07-06 23:04:02] ../../gcc/gcc/config/mips/mips-msa.md:435:26: 
> warning: 'and' of mutually exclusive equal-tests is always 0
> [all 2023-07-06 23:04:02]   435 |   DONE;
> [all 2023-07-06 23:04:02] ../../gcc/gcc/config/mips/mips-msa.md:435:26: 
> warning: 'and' of mutually exclusive equal-tests is always 0
> [all 2023-07-06 23:04:03] ../../gcc/gcc/config/mips/mips.md:822:1: warning: 
> 'and' of mutually exclusive equal-tests is always 0
> [all 2023-07-06 23:04:03]   822 | ;; conditional-move-type condition is 
> needed.
> [all 2023-07-06 23:04:03]   | ^
> [all 2023-07-06 23:04:03] g++   -g -O2   -DIN_GCC -DCROSS_DIRECTORY_STRUCTURE 
>   -fno-exceptions -fno-rtti -fasynchronous-unwind-tables -W -Wall 
> -Wno-narrowing -Wwrite-strings -Wcast-qual -Wmissing-format-attribute 
> -Wconditionally-supported -Woverloaded-virtual -pedantic -Wno-long-long 
> -Wno-variadic-macros -Wno-overlength-strings -fno-common  -DHAVE_CONFIG_H  
> -DGENERATOR_FILE -static-libstdc++ -static-libgcc  -o build/gencondmd \
> [all 2023-07-06 23:04:03] build/gencondmd.o build/errors.o 
> ../build-x86_64-pc-linux-gnu/libiberty/libiberty.a
> [all 2023-07-06 23:04:03] build/gencondmd > tmp-cond.md
> 
> 
> (Full build log available as eg. 
> http://toolchain.lug-owl.de/laminar/jobs/gcc-mips-linux/76)
> 
> Thanks, JBG
> 

The warning you mentioned above seems gone if I change the condition 
`ISA_HAS_MIPS16E2` to `TARGET_MIPS16 && ISA_HAS_MIPS16E2` in mips.md.

But it's weird because `ISA_HAS_MIPS16E2` actually contains `TARGET_MIPS16`.

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index b9eb541cf4a..77165778067 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -3436,7 +3436,7 @@
   [(set (match_operand:GPR 0 "register_operand" "=d,d")
(ior:GPR (match_operand:GPR 1 "register_operand" "%0,0")
 (match_operand:GPR 2 "uns_arith_operand" "d,K")))]
-  "ISA_HAS_MIPS16E2"
+  "TARGET_MIPS16 && ISA_HAS_MIPS16E2"
   "@
or\t%0,%2
ori\t%0,%x2"


Thanks,
Jie.

Re: [PATCH v4 4/9] MIPS: Add bitwise instructions for mips16e2

2023-07-06 Thread Jan-Benedict Glaw

Hi!

On Mon, 2023-06-19 16:29:53 +0800, Jie Mei  wrote:
> There are shortened bitwise instructions in the mips16e2 ASE,
> for instance, ANDI, ORI/XORI, EXT, INS etc. .
> 
> This patch adds these instrutions with corresponding tests.

[...]

Starting with this patch, I see some new warning:

[all 2023-07-06 23:04:01] g++ -c   -g -O2   -DIN_GCC 
-DCROSS_DIRECTORY_STRUCTURE   -fno-exceptions -fno-rtti 
-fasynchronous-unwind-tables -W -Wall -Wno-narrowing -Wwrite-strings 
-Wcast-qual -Wmissing-format-attribute -Wconditionally-supported 
-Woverloaded-virtual -pedantic -Wno-long-long -Wno-variadic-macros 
-Wno-overlength-strings -fno-common  -DHAVE_CONFIG_H  -DGENERATOR_FILE -I. 
-Ibuild -I../../gcc/gcc -I../../gcc/gcc/build -I../../gcc/gcc/../include  
-I../../gcc/gcc/../libcpp/include  \
[all 2023-07-06 23:04:01]  -o build/gencondmd.o build/gencondmd.cc
[all 2023-07-06 23:04:02] ../../gcc/gcc/config/mips/mips-msa.md:435:26: 
warning: 'and' of mutually exclusive equal-tests is always 0
[all 2023-07-06 23:04:02]   435 |   DONE;
[all 2023-07-06 23:04:02] ../../gcc/gcc/config/mips/mips-msa.md:435:26: 
warning: 'and' of mutually exclusive equal-tests is always 0
[all 2023-07-06 23:04:03] ../../gcc/gcc/config/mips/mips.md:822:1: warning: 
'and' of mutually exclusive equal-tests is always 0
[all 2023-07-06 23:04:03]   822 | ;; conditional-move-type condition is needed.
[all 2023-07-06 23:04:03]   | ^
[all 2023-07-06 23:04:03] g++   -g -O2   -DIN_GCC -DCROSS_DIRECTORY_STRUCTURE   
-fno-exceptions -fno-rtti -fasynchronous-unwind-tables -W -Wall -Wno-narrowing 
-Wwrite-strings -Wcast-qual -Wmissing-format-attribute 
-Wconditionally-supported -Woverloaded-virtual -pedantic -Wno-long-long 
-Wno-variadic-macros -Wno-overlength-strings -fno-common  -DHAVE_CONFIG_H  
-DGENERATOR_FILE -static-libstdc++ -static-libgcc  -o build/gencondmd \
[all 2023-07-06 23:04:03] build/gencondmd.o build/errors.o 
../build-x86_64-pc-linux-gnu/libiberty/libiberty.a
[all 2023-07-06 23:04:03] build/gencondmd > tmp-cond.md


(Full build log available as eg. 
http://toolchain.lug-owl.de/laminar/jobs/gcc-mips-linux/76)

Thanks, JBG

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[PATCH v4 4/9] MIPS: Add bitwise instructions for mips16e2

2023-06-19 Thread Jie Mei

There are shortened bitwise instructions in the mips16e2 ASE,
for instance, ANDI, ORI/XORI, EXT, INS etc. .

This patch adds these instrutions with corresponding tests.

gcc/ChangeLog:

* config/mips/constraints.md(Yz): New constraints for mips16e2.
* config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
(mips_bit_clear_info): Same as above.
* config/mips/mips.cc(mips_bit_clear_info): New function for
generating instructions.
(mips_bit_clear_p): Same as above.
* config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
* config/mips/mips.md(extended_mips16): Generates EXT and INS 
instructions.
(*and3): Generates INS instruction.
(*and3_mips16): Generates EXT, INS and ANDI instructions.
(ior3): Add logics for ORI instruction.
(*ior3_mips16_asmacro): Generates ORI instrucion.
(*ior3_mips16): Add logics for XORI instruction.
(*xor3_mips16): Generates XORI instrucion.
(*extzv): Add logics for EXT instruction.
(*insv): Add logics for INS instruction.
* config/mips/predicates.md(bit_clear_operand): New predicate for
generating bitwise instructions.
(and_reg_operand): Add logics for generating bitwise instructions.

gcc/testsuite/ChangeLog:

* gcc.target/mips/mips16e2.c: New tests for mips16e2.
---
 gcc/config/mips/constraints.md   |   4 +
 gcc/config/mips/mips-protos.h|   4 +
 gcc/config/mips/mips.cc  |  67 ++-
 gcc/config/mips/mips.h   |   3 +-
 gcc/config/mips/mips.md  |  91 
 gcc/config/mips/predicates.md|  13 ++-
 gcc/testsuite/gcc.target/mips/mips16e2.c | 102 +++
 7 files changed, 263 insertions(+), 21 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/mips/mips16e2.c

diff --git a/gcc/config/mips/constraints.md b/gcc/config/mips/constraints.md
index 49d1a43c613..22d4d84f074 100644
--- a/gcc/config/mips/constraints.md
+++ b/gcc/config/mips/constraints.md
@@ -264,6 +264,10 @@
   (and (match_code "const_vector")
(match_test "op == CONST0_RTX (mode)")))
 
+(define_constraint "Yz"
+  "@internal"
+  (match_operand 0 "bit_clear_operand"))
+
 (define_constraint "YA"
   "@internal
An unsigned 6-bit constant."
diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h
index 20483469105..2791b9f220a 100644
--- a/gcc/config/mips/mips-protos.h
+++ b/gcc/config/mips/mips-protos.h
@@ -388,4 +388,8 @@ extern void mips_register_frame_header_opt (void);
 extern void mips_expand_vec_cond_expr (machine_mode, machine_mode, rtx *);
 extern void mips_expand_vec_cmp_expr (rtx *);
 
+extern bool mips_bit_clear_p (enum machine_mode, unsigned HOST_WIDE_INT);
+extern void mips_bit_clear_info (enum machine_mode, unsigned HOST_WIDE_INT,
+ int *, int *);
+
 #endif /* ! GCC_MIPS_PROTOS_H */
diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc
index be470bbb50d..33a1bada831 100644
--- a/gcc/config/mips/mips.cc
+++ b/gcc/config/mips/mips.cc
@@ -3895,6 +3895,10 @@ mips16_constant_cost (int code, HOST_WIDE_INT x)
return 0;
   return -1;
 
+case ZERO_EXTRACT:
+  /* The bit position and size are immediate operands.  */
+  return ISA_HAS_EXT_INS ? COSTS_N_INSNS (1) : -1;
+
 default:
   return -1;
 }
@@ -22753,7 +22757,68 @@ mips_asm_file_end (void)
   if (NEED_INDICATE_EXEC_STACK)
 file_end_indicate_exec_stack ();
 }
-
+
+void
+mips_bit_clear_info (enum machine_mode mode, unsigned HOST_WIDE_INT m,
+ int *start_pos, int *size)
+{
+  unsigned int shift = 0;
+  unsigned int change_count = 0;
+  unsigned int prev_val = 1;
+  unsigned int curr_val = 0;
+  unsigned int end_pos = GET_MODE_SIZE (mode) * BITS_PER_UNIT;
+
+  for (shift = 0 ; shift < (GET_MODE_SIZE (mode) * BITS_PER_UNIT) ; shift++)
+{
+  curr_val = (unsigned int)((m & (unsigned int)(1 << shift)) >> shift);
+  if (curr_val != prev_val)
+   {
+ change_count++;
+ switch (change_count)
+   {
+ case 1:
+   *start_pos = shift;
+   break;
+ case 2:
+   end_pos = shift;
+   break;
+ default:
+   gcc_unreachable ();
+   }
+   }
+  prev_val = curr_val;
+   }
+  *size = (end_pos - *start_pos);
+}
+
+bool
+mips_bit_clear_p (enum machine_mode mode, unsigned HOST_WIDE_INT m)
+{
+  unsigned int shift = 0;
+  unsigned int change_count = 0;
+  unsigned int prev_val = 1;
+  unsigned int curr_val = 0;
+
+  if (mode != SImode && mode != VOIDmode)
+return false;
+
+  if (!ISA_HAS_EXT_INS)
+return false;
+
+  for (shift = 0 ; shift < (UNITS_PER_WORD * BITS_PER_UNIT) ; shift++)
+{
+  curr_val = (unsigned int)((m & (unsigned int)(1 << shift)) >> shift);
+  if (curr_val != prev_val)
+

Re: [PATCH v4 4/9] MIPS: Add bitwise instructions for mips16e2

Re: [PATCH v4 4/9] MIPS: Add bitwise instructions for mips16e2

Re: [PATCH v4 4/9] MIPS: Add bitwise instructions for mips16e2

[PATCH v4 4/9] MIPS: Add bitwise instructions for mips16e2

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