Re: [PATCH v5] RISC-V: Rewrite some instructions using ASM targethook
ok.
juzhe.zh...@rivai.ai
From: Jun Sha (Joshua)
Date: 2024-01-12 11:24
To: gcc-patches
CC: jim.wilson.gcc; palmer; andrew; philipp.tomsich; jeffreyalaw;
christoph.muellner; juzhe.zhong; Jun Sha (Joshua); Jin Ma; Xianmiao Qu
Subject: [PATCH v5] RISC-V: Rewrite some instructions using ASM targethook
There are some xtheadvector instructions that differ from RVV1.0
apart from simply adding "th." prefix. For example, RVV1.0
load/store instructions will have SEW while xtheadvector not;
RVV1.0 will have "o" for indexed-ordered store instructions while
xtheadvecotr not; xtheadvector and RVV1.0 have different
vnsrl/vnsra/vfncvt suffix (vv/vx/vi vs wv/wx/wi).
To address this issue without duplicating patterns, we use ASM
targethook to rewrite the whole string of the instructions. We
identify different instructions from the corresponding attribute.
gcc/ChangeLog:
* config/riscv/thead.cc
(th_asm_output_opcode): Rewrite some instructions.
Co-authored-by: Jin Ma
Co-authored-by: Xianmiao Qu
Co-authored-by: Christoph Müllner
---
gcc/config/riscv/thead.cc | 215 +-
1 file changed, 213 insertions(+), 2 deletions(-)
diff --git a/gcc/config/riscv/thead.cc b/gcc/config/riscv/thead.cc
index dc3aed3904d..fb088ebff02 100644
--- a/gcc/config/riscv/thead.cc
+++ b/gcc/config/riscv/thead.cc
@@ -27,6 +27,7 @@
#include "backend.h"
#include "tree.h"
#include "rtl.h"
+#include "insn-attr.h"
#include "explow.h"
#include "memmodel.h"
#include "emit-rtl.h"
@@ -890,8 +891,218 @@ th_asm_output_opcode (FILE *asm_out_file, const char *p)
{
/* We need to add th. prefix to all the xtheadvector
instructions here.*/
- if (current_output_insn != NULL && p[0] == 'v')
-fputs ("th.", asm_out_file);
+ if (current_output_insn != NULL)
+{
+ if (get_attr_type (current_output_insn) == TYPE_VLDE ||
+ get_attr_type (current_output_insn) == TYPE_VSTE ||
+ get_attr_type (current_output_insn) == TYPE_VLDFF)
+ {
+ if (strstr (p, "e8") || strstr (p, "e16") ||
+ strstr (p, "e32") || strstr (p, "e64"))
+ {
+ get_attr_type (current_output_insn) == TYPE_VSTE
+ ? fputs ("th.vse", asm_out_file)
+ : fputs ("th.vle", asm_out_file);
+ if (strstr (p, "e8"))
+ return p+4;
+ else
+ return p+5;
+ }
+ }
+
+ if (get_attr_type (current_output_insn) == TYPE_VLDS ||
+ get_attr_type (current_output_insn) == TYPE_VSTS)
+ {
+ if (strstr (p, "vle8") || strstr (p, "vse8") ||
+ strstr (p, "vle16") || strstr (p, "vse16") ||
+ strstr (p, "vle32") || strstr (p, "vse32") ||
+ strstr (p, "vle64") || strstr (p, "vse64"))
+ {
+ get_attr_type (current_output_insn) == TYPE_VSTS
+ ? fputs ("th.vse", asm_out_file)
+ : fputs ("th.vle", asm_out_file);
+ if (strstr (p, "e8"))
+ return p+4;
+ else
+ return p+5;
+ }
+ else if (strstr (p, "vlse8") || strstr (p, "vsse8") ||
+strstr (p, "vlse16") || strstr (p, "vsse16") ||
+strstr (p, "vlse32") || strstr (p, "vsse32") ||
+strstr (p, "vlse64") || strstr (p, "vsse64"))
+ {
+ get_attr_type (current_output_insn) == TYPE_VSTS
+ ? fputs ("th.vsse", asm_out_file)
+ : fputs ("th.vlse", asm_out_file);
+ if (strstr (p, "e8"))
+ return p+5;
+ else
+ return p+6;
+ }
+ }
+
+ if (get_attr_type (current_output_insn) == TYPE_VLDUX ||
+ get_attr_type (current_output_insn) == TYPE_VLDOX)
+ {
+ if (strstr (p, "ei"))
+ {
+ fputs ("th.vlxe", asm_out_file);
+ if (strstr (p, "ei8"))
+ return p+7;
+ else
+ return p+8;
+ }
+ }
+
+ if (get_attr_type (current_output_insn) == TYPE_VSTUX ||
+ get_attr_type (current_output_insn) == TYPE_VSTOX)
+ {
+ if (strstr (p, "ei"))
+ {
+ get_attr_type (current_output_insn) == TYPE_VSTUX
+ ? fputs ("th.vsuxe", asm_out_file)
+ : fputs ("th.vsxe", asm_out_file);
+ if (strstr (p, "ei8"))
+ return p+7;
+ else
+ return p+8;
+ }
+ }
+
+ if (get_attr_type (current_output_insn) == TYPE_VLSEGDE ||
+ get_attr_type (current_output_insn) == TYPE_VSSEGTE ||
+ get_attr_type (current_output_insn) == TYPE_VLSEGDFF)
+ {
+ get_attr_type (current_output_insn) == TYPE_VSSEGTE
+ ? fputs ("th.vsseg", asm_out_file)
+ : fputs ("th.vlseg", asm_out_file);
+ asm_fprintf (asm_out_file, "%c", p[5]);
+ fputs ("e", asm_out_file);
+ if (strstr (p, "e8"))
+ return p+8;
+ else
+ return p+9;
+ }
+
+ if (get_attr_type (current_output_insn) == TYPE_VLSEG
[PATCH v5] RISC-V: Rewrite some instructions using ASM targethook
There are some xtheadvector instructions that differ from RVV1.0
apart from simply adding "th." prefix. For example, RVV1.0
load/store instructions will have SEW while xtheadvector not;
RVV1.0 will have "o" for indexed-ordered store instructions while
xtheadvecotr not; xtheadvector and RVV1.0 have different
vnsrl/vnsra/vfncvt suffix (vv/vx/vi vs wv/wx/wi).
To address this issue without duplicating patterns, we use ASM
targethook to rewrite the whole string of the instructions. We
identify different instructions from the corresponding attribute.
gcc/ChangeLog:
* config/riscv/thead.cc
(th_asm_output_opcode): Rewrite some instructions.
Co-authored-by: Jin Ma
Co-authored-by: Xianmiao Qu
Co-authored-by: Christoph Müllner
---
gcc/config/riscv/thead.cc | 215 +-
1 file changed, 213 insertions(+), 2 deletions(-)
diff --git a/gcc/config/riscv/thead.cc b/gcc/config/riscv/thead.cc
index dc3aed3904d..fb088ebff02 100644
--- a/gcc/config/riscv/thead.cc
+++ b/gcc/config/riscv/thead.cc
@@ -27,6 +27,7 @@
#include "backend.h"
#include "tree.h"
#include "rtl.h"
+#include "insn-attr.h"
#include "explow.h"
#include "memmodel.h"
#include "emit-rtl.h"
@@ -890,8 +891,218 @@ th_asm_output_opcode (FILE *asm_out_file, const char *p)
{
/* We need to add th. prefix to all the xtheadvector
instructions here.*/
- if (current_output_insn != NULL && p[0] == 'v')
-fputs ("th.", asm_out_file);
+ if (current_output_insn != NULL)
+{
+ if (get_attr_type (current_output_insn) == TYPE_VLDE ||
+ get_attr_type (current_output_insn) == TYPE_VSTE ||
+ get_attr_type (current_output_insn) == TYPE_VLDFF)
+ {
+ if (strstr (p, "e8") || strstr (p, "e16") ||
+ strstr (p, "e32") || strstr (p, "e64"))
+ {
+ get_attr_type (current_output_insn) == TYPE_VSTE
+ ? fputs ("th.vse", asm_out_file)
+ : fputs ("th.vle", asm_out_file);
+ if (strstr (p, "e8"))
+ return p+4;
+ else
+ return p+5;
+ }
+ }
+
+ if (get_attr_type (current_output_insn) == TYPE_VLDS ||
+ get_attr_type (current_output_insn) == TYPE_VSTS)
+ {
+ if (strstr (p, "vle8") || strstr (p, "vse8") ||
+ strstr (p, "vle16") || strstr (p, "vse16") ||
+ strstr (p, "vle32") || strstr (p, "vse32") ||
+ strstr (p, "vle64") || strstr (p, "vse64"))
+ {
+ get_attr_type (current_output_insn) == TYPE_VSTS
+ ? fputs ("th.vse", asm_out_file)
+ : fputs ("th.vle", asm_out_file);
+ if (strstr (p, "e8"))
+ return p+4;
+ else
+ return p+5;
+ }
+ else if (strstr (p, "vlse8") || strstr (p, "vsse8") ||
+ strstr (p, "vlse16") || strstr (p, "vsse16") ||
+ strstr (p, "vlse32") || strstr (p, "vsse32") ||
+ strstr (p, "vlse64") || strstr (p, "vsse64"))
+ {
+ get_attr_type (current_output_insn) == TYPE_VSTS
+ ? fputs ("th.vsse", asm_out_file)
+ : fputs ("th.vlse", asm_out_file);
+ if (strstr (p, "e8"))
+ return p+5;
+ else
+ return p+6;
+ }
+ }
+
+ if (get_attr_type (current_output_insn) == TYPE_VLDUX ||
+ get_attr_type (current_output_insn) == TYPE_VLDOX)
+ {
+ if (strstr (p, "ei"))
+ {
+ fputs ("th.vlxe", asm_out_file);
+ if (strstr (p, "ei8"))
+ return p+7;
+ else
+ return p+8;
+ }
+ }
+
+ if (get_attr_type (current_output_insn) == TYPE_VSTUX ||
+ get_attr_type (current_output_insn) == TYPE_VSTOX)
+ {
+ if (strstr (p, "ei"))
+ {
+ get_attr_type (current_output_insn) == TYPE_VSTUX
+ ? fputs ("th.vsuxe", asm_out_file)
+ : fputs ("th.vsxe", asm_out_file);
+ if (strstr (p, "ei8"))
+ return p+7;
+ else
+ return p+8;
+ }
+ }
+
+ if (get_attr_type (current_output_insn) == TYPE_VLSEGDE ||
+ get_attr_type (current_output_insn) == TYPE_VSSEGTE ||
+ get_attr_type (current_output_insn) == TYPE_VLSEGDFF)
+ {
+ get_attr_type (current_output_insn) == TYPE_VSSEGTE
+ ? fputs ("th.vsseg", asm_out_file)
+ : fputs ("th.vlseg", asm_out_file);
+ asm_fprintf (asm_out_file, "%c", p[5]);
+ fputs ("e", asm_out_file);
+ if (strstr (p, "e8"))
+ return p+8;
+ else
+ return p+9;
+ }
+
+ if (get_attr_type
