Re: [PATCH v5 1/1] gcc: config: microblaze: fix cpu version check

2023-10-30 Thread Michael Eager 

On 10/29/23 23:13, Neal Frager wrote:

The MICROBLAZE_VERSION_COMPARE was incorrectly using strcasecmp
instead of strverscmp to check the mcpu version against feature
options.  By simply changing the define to use strverscmp,
the new version 10.0 is treated correctly as a higher version
than previous versions.

Signed-off-by: Neal Frager 
---
V1->V2:
  - No need to create a new microblaze specific version check
routine as strverscmp is the correct solution.
V2->V3:
  - Changed mcpu define for microblaze isa testsuite examples.
V3->V4:
  - Added ChangeLog
V4->V5:
  - Added testsuite ChangeLog
---
  gcc/ChangeLog  | 4 
  gcc/config/microblaze/microblaze.cc| 2 +-
  gcc/testsuite/ChangeLog| 4 
  gcc/testsuite/gcc.target/microblaze/isa/bshift.c   | 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/div.c  | 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c| 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c| 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c| 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c| 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/fcvt.c | 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/float.c| 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/fsqrt.c| 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/mul-bshift-pcmp.c  | 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/mul-bshift.c   | 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/mul.c  | 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/mulh-bshift-pcmp.c | 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/mulh.c | 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c   | 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/nofloat.c  | 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/pcmp.c | 2 +-
  gcc/testsuite/gcc.target/microblaze/isa/vanilla.c  | 2 +-
  gcc/testsuite/gcc.target/microblaze/microblaze.exp | 2 +-
  22 files changed, 28 insertions(+), 20 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4964796c6a6..7f63f39d4cd 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2023-10-30  Neal Frager  
+
+   * config/microblaze/microblaze.cc: Fix mcpu version check.
+
  2023-10-29  Martin Uecker  
  
  	PR tree-optimization/109334

diff --git a/gcc/config/microblaze/microblaze.cc 
b/gcc/config/microblaze/microblaze.cc
index c9f6c4198cf..60ad55120d2 100644
--- a/gcc/config/microblaze/microblaze.cc
+++ b/gcc/config/microblaze/microblaze.cc
@@ -56,7 +56,7 @@
  /* This file should be included last.  */
  #include "target-def.h"
  
-#define MICROBLAZE_VERSION_COMPARE(VA,VB) strcasecmp (VA, VB)

+#define MICROBLAZE_VERSION_COMPARE(VA,VB) strverscmp (VA, VB)
  
  /* Classifies an address.
  
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog

index 5c18129b4ac..1d7abcf2584 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2023-10-30  Neal Frager  
+
+   * gcc.target/microblaze: Bump tests to mcpu=v10.0.


Please look at gcc/testsuite/ChangeLog and follow the standard
practice:  List each file modified or added.

For example:

2023-10-23  Pan Li  

* gcc.target/riscv/rvv/base/binop_vv_constraint-1.c: Remove the
vsetvl asm check from func body.
* gcc.target/riscv/rvv/base/binop_vx_constraint-1.c: Ditto.
* gcc.target/riscv/rvv/base/binop_vx_constraint-10.c: Ditto.
* gcc.target/riscv/rvv/base/binop_vx_constraint-11.c: Ditto.
* gcc.target/riscv/rvv/base/binop_vx_constraint-12.c: Ditto.




+
  2023-10-29  Iain Buclaw  
  
  	PR d/110712

diff --git a/gcc/testsuite/gcc.target/microblaze/isa/bshift.c 
b/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
index 64cf1e2e59e..664586bff9f 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mxl-barrel-shift" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mxl-barrel-shift" } */
  
  volatile int m1, m2, m3;

  volatile unsigned int u1, u2, u3;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/div.c 
b/gcc/testsuite/gcc.target/microblaze/isa/div.c
index 25ee42ce5c8..783e7c0f684 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/div.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/div.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mno-xl-soft-div" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mno-xl-soft-div" } */
  
  volatile int m1, m2, m3;

  volatile long l1, l2;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c 
b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
index 4041a241391..b6202e168d6 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a

[PATCH v5 1/1] gcc: config: microblaze: fix cpu version check

2023-10-30 Thread Neal Frager 
The MICROBLAZE_VERSION_COMPARE was incorrectly using strcasecmp
instead of strverscmp to check the mcpu version against feature
options.  By simply changing the define to use strverscmp,
the new version 10.0 is treated correctly as a higher version
than previous versions.

Signed-off-by: Neal Frager 
---
V1->V2:
 - No need to create a new microblaze specific version check
   routine as strverscmp is the correct solution.
V2->V3:
 - Changed mcpu define for microblaze isa testsuite examples.
V3->V4:
 - Added ChangeLog
V4->V5:
 - Added testsuite ChangeLog
---
 gcc/ChangeLog  | 4 
 gcc/config/microblaze/microblaze.cc| 2 +-
 gcc/testsuite/ChangeLog| 4 
 gcc/testsuite/gcc.target/microblaze/isa/bshift.c   | 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/div.c  | 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c| 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c| 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c| 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c| 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/fcvt.c | 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/float.c| 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/fsqrt.c| 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/mul-bshift-pcmp.c  | 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/mul-bshift.c   | 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/mul.c  | 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/mulh-bshift-pcmp.c | 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/mulh.c | 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c   | 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/nofloat.c  | 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/pcmp.c | 2 +-
 gcc/testsuite/gcc.target/microblaze/isa/vanilla.c  | 2 +-
 gcc/testsuite/gcc.target/microblaze/microblaze.exp | 2 +-
 22 files changed, 28 insertions(+), 20 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4964796c6a6..7f63f39d4cd 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2023-10-30  Neal Frager  
+
+   * config/microblaze/microblaze.cc: Fix mcpu version check.
+
 2023-10-29  Martin Uecker  
 
PR tree-optimization/109334
diff --git a/gcc/config/microblaze/microblaze.cc 
b/gcc/config/microblaze/microblaze.cc
index c9f6c4198cf..60ad55120d2 100644
--- a/gcc/config/microblaze/microblaze.cc
+++ b/gcc/config/microblaze/microblaze.cc
@@ -56,7 +56,7 @@
 /* This file should be included last.  */
 #include "target-def.h"
 
-#define MICROBLAZE_VERSION_COMPARE(VA,VB) strcasecmp (VA, VB)
+#define MICROBLAZE_VERSION_COMPARE(VA,VB) strverscmp (VA, VB)
 
 /* Classifies an address.
 
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5c18129b4ac..1d7abcf2584 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2023-10-30  Neal Frager  
+
+   * gcc.target/microblaze: Bump tests to mcpu=v10.0.
+
 2023-10-29  Iain Buclaw  
 
PR d/110712
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/bshift.c 
b/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
index 64cf1e2e59e..664586bff9f 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mxl-barrel-shift" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mxl-barrel-shift" } */
 
 volatile int m1, m2, m3;
 volatile unsigned int u1, u2, u3;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/div.c 
b/gcc/testsuite/gcc.target/microblaze/isa/div.c
index 25ee42ce5c8..783e7c0f684 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/div.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/div.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mno-xl-soft-div" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mno-xl-soft-div" } */
 
 volatile int m1, m2, m3;
 volatile long l1, l2;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c 
b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
index 4041a241391..b6202e168d6 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mhard-float" } */
 
 volatile float f1, f2, f3;
 
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c 
b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
index 3902b839db9..4386c6e6cc3 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mhard-float" } */
 
 volatile float f1, f2, f3;
 
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c