Re: [PATCH v8 12/12] LoongArch Port: Add doc.
xucheng...@loongson.cn writes:
> From: chenglulu
>
> 2022-03-04 Chenghua Xu
> Lulu Cheng
>
> * contrib/config-list.mk: Add LoongArch triplet.
> * gcc/doc/install.texi: Add LoongArch options section.
> * gcc/doc/invoke.texi: Add LoongArch options section.
> * gcc/doc/md.texi: Add LoongArch options section.
> ---
> contrib/config-list.mk | 5 +-
> gcc/doc/install.texi | 47 +-
> gcc/doc/invoke.texi| 202 +
> gcc/doc/md.texi| 55 +++
> 4 files changed, 303 insertions(+), 6 deletions(-)
>
> diff --git a/contrib/config-list.mk b/contrib/config-list.mk
> index 3e1d1321861..ba6f12e4693 100644
> --- a/contrib/config-list.mk
> +++ b/contrib/config-list.mk
> @@ -57,7 +57,10 @@ LIST = aarch64-elf aarch64-linux-gnu aarch64-rtems \
>i686-wrs-vxworksae \
>i686-cygwinOPT-enable-threads=yes i686-mingw32crt ia64-elf \
>ia64-freebsd6 ia64-linux ia64-hpux ia64-hp-vms iq2000-elf lm32-elf \
> - lm32-rtems lm32-uclinux m32c-rtems m32c-elf m32r-elf m32rle-elf \
> + lm32-rtems lm32-uclinux \
> + loongarch64-linux-gnu loongarch64-linux-gnuf64 \
> + loongarch64-linux-gnuf32 loongarch64-linux-gnusf \
If I've understood correctly, loongarch64-linux-gnu defaults to
the same ABI as loongarch64-linux-gnuf64, is that right? If so,
it's probably worth dropping one of them from this list to reduce
duplication. In other words, it feels like there should just be
3 entries here rather than 4.
> […]
> @@ -1254,6 +1255,14 @@ profile. The union of these options is considered
> when specifying both
> @code{-mfloat-abi=hard}
> @end multitable
>
> +@item loongarch*-*-*
> +@var{list} is a comma-separated list of the following ABI identifiers:
> +@code{lp64d[/base]} @code{lp64f[/base]} @code{lp64d[/base]}, where the
> +@code{/base} suffix may be omitted, to enable their respective run-time
> +libraries. If @var{list} is empty, @code{default}
> +or @option{--with-multilib-list} is not specified, then the default ABI
Maybe clearer as:
If @var{list} is empty or @code{default}, or if
@option{--with-multilib-list} is not specified, […]
> +as specified by @option{--with-abi} or implied by @option{--target} is
> selected.
> +
> @item riscv*-*-*
> @var{list} is a single ABI name. The target architecture must be either
> @code{rv32gc} or @code{rv64gc}. This will build a single multilib for the
> […]
> @@ -995,6 +995,16 @@ Objective-C and Objective-C++ Dialects}.
> @gccoptlist{-mbarrel-shift-enabled -mdivide-enabled -mmultiply-enabled @gol
> -msign-extend-enabled -muser-enabled}
>
> +@emph{LoongArch Options}
> +@gccoptlist{-march=@var{cpu-type} -mtune=@var{cpu-type}
> -mabi=@var{base-abi-type} @gol
> +-mfpu=@var{fpu-type} -msoft-float -msingle-float -mdouble-float @gol
> +-mbranch-cost=@var{n} -mcheck-zero-division -mno-check-zero-division @gol
> +-mcond-move-int -mno-cond-move-int @gol
> +-mcond-move-float -mno-cond-move-float @gol
> +-memcpy -mno-memcpy -mstrict-align -mno-strict-align @gol
> +-mmax-inline-memcpy-size=@var{n} @gol
> +-mlra -mcmodel=@var{code-model}}
Following on from earlier comments, please remove -mlra :-)
(Or more specifically, -mno-lra.)
> +
> @emph{M32R/D Options}
> @gccoptlist{-m32r2 -m32rx -m32r @gol
> -mdebug @gol
> @@ -18863,6 +18873,7 @@ platform.
> * HPPA Options::
> * IA-64 Options::
> * LM32 Options::
> +* LoongArch Options::
> * M32C Options::
> * M32R/D Options::
> * M680x0 Options::
> @@ -24378,6 +24389,197 @@ Enable user-defined instructions.
>
> @end table
>
> +@node LoongArch Options
> +@subsection LoongArch Options
> +@cindex LoongArch Options
> +
> +These command-line options are defined for LoongArch targets:
> +
> +@table @gcctabopt
> +@item -march=@var{cpu-type}
> +@opindex -march
> +Generate instructions for the machine type @var{cpu-type}. In contrast to
> +@option{-mtune=@var{cpu-type}}, which merely tunes the generated code
> +for the specified @var{cpu-type}, @option{-march=@var{cpu-type}} allows GCC
> +to generate code that may not run at all on processors other than the one
> +indicated. Specifying @option{-march=@var{cpu-type}} implies
> +@option{-mtune=@var{cpu-type}}, except where noted otherwise.
> +
> +The choices for @var{cpu-type} are:
> +
> +@table @samp
> +@item native
> +This selects the CPU to generate code for at compilation time by determining
> +the processor type of the compiling machine. Using @option{-march=native}
> +enables all instruction subsets supported by the local machine (hence
> +the result might not run on different machines). Using
> @option{-mtune=native}
> +produces code optimized for the local machine under the constraints
> +of the selected instruction set.
> +@item loongarch64
> +A generic CPU with 64-bit extensions.
> +@item la464
> +LoongArch LA464 CPU with LBT, LSX, LASX, LVZ.
> +@end table
> +
> +
> +@item -mtune=@var{cpu-type}
> +@opindex mtune
> +Optimize the output for the given
[PATCH v8 12/12] LoongArch Port: Add doc.
From: chenglulu
2022-03-04 Chenghua Xu
Lulu Cheng
* contrib/config-list.mk: Add LoongArch triplet.
* gcc/doc/install.texi: Add LoongArch options section.
* gcc/doc/invoke.texi: Add LoongArch options section.
* gcc/doc/md.texi: Add LoongArch options section.
---
contrib/config-list.mk | 5 +-
gcc/doc/install.texi | 47 +-
gcc/doc/invoke.texi| 202 +
gcc/doc/md.texi| 55 +++
4 files changed, 303 insertions(+), 6 deletions(-)
diff --git a/contrib/config-list.mk b/contrib/config-list.mk
index 3e1d1321861..ba6f12e4693 100644
--- a/contrib/config-list.mk
+++ b/contrib/config-list.mk
@@ -57,7 +57,10 @@ LIST = aarch64-elf aarch64-linux-gnu aarch64-rtems \
i686-wrs-vxworksae \
i686-cygwinOPT-enable-threads=yes i686-mingw32crt ia64-elf \
ia64-freebsd6 ia64-linux ia64-hpux ia64-hp-vms iq2000-elf lm32-elf \
- lm32-rtems lm32-uclinux m32c-rtems m32c-elf m32r-elf m32rle-elf \
+ lm32-rtems lm32-uclinux \
+ loongarch64-linux-gnu loongarch64-linux-gnuf64 \
+ loongarch64-linux-gnuf32 loongarch64-linux-gnusf \
+ m32c-rtems m32c-elf m32r-elf m32rle-elf \
m68k-elf m68k-netbsdelf \
m68k-uclinux m68k-linux m68k-rtems \
mcore-elf microblaze-linux microblaze-elf \
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 7258f9def6c..5fb55b1d064 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -747,9 +747,9 @@ Here are the possible CPU types:
@quotation
aarch64, aarch64_be, alpha, alpha64, amdgcn, arc, arceb, arm, armeb, avr, bfin,
bpf, cr16, cris, csky, epiphany, fido, fr30, frv, ft32, h8300, hppa, hppa2.0,
-hppa64, i486, i686, ia64, iq2000, lm32, m32c, m32r, m32rle, m68k, mcore,
-microblaze, microblazeel, mips, mips64, mips64el, mips64octeon, mips64orion,
-mips64vr, mipsel, mipsisa32, mipsisa32r2, mipsisa64, mipsisa64r2,
+hppa64, i486, i686, ia64, iq2000, lm32, loongarch64, m32c, m32r, m32rle, m68k,
+mcore, microblaze, microblazeel, mips, mips64, mips64el, mips64octeon,
+mips64orion, mips64vr, mipsel, mipsisa32, mipsisa32r2, mipsisa64, mipsisa64r2,
mipsisa64r2el, mipsisa64sb1, mipsisa64sr71k, mipstx39, mmix, mn10300, moxie,
msp430, nds32be, nds32le, nios2, nvptx, or1k, pdp11, powerpc, powerpc64,
powerpc64le, powerpcle, pru, riscv32, riscv32be, riscv64, riscv64be, rl78, rx,
@@ -1166,8 +1166,9 @@ sysv, aix.
@itemx --without-multilib-list
Specify what multilibs to build. @var{list} is a comma separated list of
values, possibly consisting of a single value. Currently only implemented
-for aarch64*-*-*, arm*-*-*, riscv*-*-*, sh*-*-* and x86-64-*-linux*. The
-accepted values and meaning for each target is given below.
+for aarch64*-*-*, arm*-*-*, loongarch64-*-*, riscv*-*-*, sh*-*-* and
+x86-64-*-linux*. The accepted values and meaning for each target is given
+below.
@table @code
@item aarch64*-*-*
@@ -1254,6 +1255,14 @@ profile. The union of these options is considered when
specifying both
@code{-mfloat-abi=hard}
@end multitable
+@item loongarch*-*-*
+@var{list} is a comma-separated list of the following ABI identifiers:
+@code{lp64d[/base]} @code{lp64f[/base]} @code{lp64d[/base]}, where the
+@code{/base} suffix may be omitted, to enable their respective run-time
+libraries. If @var{list} is empty, @code{default}
+or @option{--with-multilib-list} is not specified, then the default ABI
+as specified by @option{--with-abi} or implied by @option{--target} is
selected.
+
@item riscv*-*-*
@var{list} is a single ABI name. The target architecture must be either
@code{rv32gc} or @code{rv64gc}. This will build a single multilib for the
@@ -4439,6 +4448,34 @@ This configuration is intended for embedded systems.
Lattice Mico32 processor.
This configuration is intended for embedded systems running uClinux.
+@html
+
+@end html
+@anchor{loongarch}
+@heading LoongArch
+LoongArch processor.
+The following LoongArch targets are available:
+@table @code
+@item loongarch64-linux-gnu*
+LoongArch processor running GNU/Linux. This target triplet may be coupled
+with a small set of possible suffixes to identify their default ABI type:
+@table @code
+@item f64
+Uses @code{lp64d/base} ABI by default.
+@item f32
+Uses @code{lp64f/base} ABI by default.
+@item sf
+Uses @code{lp64s/base} ABI by default.
+@end table
+
+@item loongarch64-linux-gnu
+Same as @code{loongarch64-linux-gnuf64}, but may be used with
+@option{--with-abi=*} to configure the default ABI type.
+@end table
+
+More information about LoongArch can be found at
+@uref{https://github.com/loongson/LoongArch-Documentation}.
+
@html
@end html
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 248ed534aee..d884b30b96e 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -995,6 +995,16 @@ Objective-C and Objective-C++ Dialects}.
@gccoptlist{-mbarrel-shift-enabled -mdivide-enabled -mmultiply-enabled @gol
-msign-extend-enabled -muser-enabled}
+@emph{LoongArch Options}
