Re: [PING][PATCH][AARCH64]Fix PR63424 by adding sumaxminv2di3 pattern

2014-11-19 Thread Renlin Li

On 10/11/14 16:55, Renlin Li wrote:

On 06/11/14 15:00, Renlin Li wrote:

Hi all,

Dose anybody have time to review this?

Kind regards,
Renlin Li

On 31/10/14 14:51, Renlin Li wrote:

Hi all,

This is a patch which will fix PR63424.

It implements signed/unsigned max/min pattern for V2DI mode in terms 
of vcondv2div2di pattern.


In this particular case, VEC_COND_EXPR (V2DImode) is generated as 
aarch64 target supports it (vcondmodemode for VALL). The 
VEC_COND_EXPR will further folded into MIN_EXPR/MAX_EXPR in dom pass 
unconditionally. Later in expand pass, the compiler tries to expand 
min_expr using standard RTL operation. It fails, because aarch64 
target don't have minv2di3 pattern implemented. It then tries to 
generate conditional move and comparebranch sequence, all fails. At 
last it falls into libfunc call, no luck either. An ICE to complain 
about this.


aarch64-none-elf toolchain has been tested on the model, no 
regressions.


Is it Okay for trunk?

gcc/ChangeLog:

2014-10-31  Renlin Li  renlin...@arm.com
PR target/63424
* config/aarch64/aarch64-simd.md (sumaxminv2di3): New.

gcc/testsuite/ChangeLog:

2014-10-31  Renlin Li  renlin...@arm.com
PR target/63424
* gcc.target/aarch64/pr63424.c: New.



Hi,

Dose anybody have time to review this?

Thank you so much!

Regards,
Renlin Li


Ping again.

Regards,
Renlin Li



Re: [PING][PATCH][AARCH64]Fix PR63424 by adding sumaxminv2di3 pattern

2014-11-10 Thread Renlin Li

On 06/11/14 15:00, Renlin Li wrote:

Hi all,

Dose anybody have time to review this?

Kind regards,
Renlin Li

On 31/10/14 14:51, Renlin Li wrote:

Hi all,

This is a patch which will fix PR63424.

It implements signed/unsigned max/min pattern for V2DI mode in terms 
of vcondv2div2di pattern.


In this particular case, VEC_COND_EXPR (V2DImode) is generated as 
aarch64 target supports it (vcondmodemode for VALL). The 
VEC_COND_EXPR will further folded into MIN_EXPR/MAX_EXPR in dom pass 
unconditionally. Later in expand pass, the compiler tries to expand 
min_expr using standard RTL operation. It fails, because aarch64 
target don't have minv2di3 pattern implemented. It then tries to 
generate conditional move and comparebranch sequence, all fails. At 
last it falls into libfunc call, no luck either. An ICE to complain 
about this.


aarch64-none-elf toolchain has been tested on the model, no regressions.

Is it Okay for trunk?

gcc/ChangeLog:

2014-10-31  Renlin Li  renlin...@arm.com
PR target/63424
* config/aarch64/aarch64-simd.md (sumaxminv2di3): New.

gcc/testsuite/ChangeLog:

2014-10-31  Renlin Li  renlin...@arm.com
PR target/63424
* gcc.target/aarch64/pr63424.c: New.



Hi,

Dose anybody have time to review this?

Thank you so much!

Regards,
Renlin Li



[PING][PATCH][AARCH64]Fix PR63424 by adding sumaxminv2di3 pattern

2014-11-06 Thread Renlin Li

Hi all,

Dose anybody have time to review this?

Kind regards,
Renlin Li

On 31/10/14 14:51, Renlin Li wrote:

Hi all,

This is a patch which will fix PR63424.

It implements signed/unsigned max/min pattern for V2DI mode in terms 
of vcondv2div2di pattern.


In this particular case, VEC_COND_EXPR (V2DImode) is generated as 
aarch64 target supports it (vcondmodemode for VALL). The 
VEC_COND_EXPR will further folded into MIN_EXPR/MAX_EXPR in dom pass 
unconditionally. Later in expand pass, the compiler tries to expand 
min_expr using standard RTL operation. It fails, because aarch64 
target don't have minv2di3 pattern implemented. It then tries to 
generate conditional move and comparebranch sequence, all fails. At 
last it falls into libfunc call, no luck either. An ICE to complain 
about this.


aarch64-none-elf toolchain has been tested on the model, no regressions.

Is it Okay for trunk?

gcc/ChangeLog:

2014-10-31  Renlin Li  renlin...@arm.com
PR target/63424
* config/aarch64/aarch64-simd.md (sumaxminv2di3): New.

gcc/testsuite/ChangeLog:

2014-10-31  Renlin Li  renlin...@arm.com
PR target/63424
* gcc.target/aarch64/pr63424.c: New.