Re: [PING] [PATCH] [AArch64, NEON] Add vfms_n_f32, vfmsq_n_f32 and vfmsq_n_f64 specified by the ACLE

2015-01-21 Thread Yangfei (Felix) 
 On 21/01/15 09:22, Yangfei (Felix) wrote:
  This is a ping for:
  https://gcc.gnu.org/ml/gcc-patches/2014-12/msg01008.html
  I updated the testcase adding test for vfmsq_n_f64 intrinsic.
  Test OK for both aarch64-linux-gnu and aarch64_be-linux-gnu-gcc.
  OK for the trunk?  Thanks.
 
 
  Index: gcc/ChangeLog
 
 =
 ==
  --- gcc/ChangeLog   (revision 219845)
  +++ gcc/ChangeLog   (working copy)
  @@ -1,3 +1,8 @@
  +2015-01-21  Felix Yang  felix.y...@huawei.com
  +
  +   * config/aarch64/arm_neon.h (vfms_n_f32, vfmsq_n_f32, vfmsq_n_f64):
 New
  +   intrinsics.
  +
 
 Hi Felix,
 
 Thanks for the the patch. It LGTM apart from one point - you seem to have
 missed out vfms_n_f64?
 
 Thanks,
 Tejas.
 

Hello Tejas,

You are right, the vfms_n_f64 is missing here.  And I find that vfma_n_f64 
is not there too. 
I would like to compose up another patch to add them.  So is this patch OK 
for the trunk? 
Thanks.

Re: [PING] [PATCH] [AArch64, NEON] Add vfms_n_f32, vfmsq_n_f32 and vfmsq_n_f64 specified by the ACLE

2015-01-21 Thread Tejas Belagod 

On 21/01/15 09:22, Yangfei (Felix) wrote:

This is a ping for: https://gcc.gnu.org/ml/gcc-patches/2014-12/msg01008.html
I updated the testcase adding test for vfmsq_n_f64 intrinsic.
Test OK for both aarch64-linux-gnu and aarch64_be-linux-gnu-gcc.
OK for the trunk?  Thanks.


Index: gcc/ChangeLog
===
--- gcc/ChangeLog   (revision 219845)
+++ gcc/ChangeLog   (working copy)
@@ -1,3 +1,8 @@
+2015-01-21  Felix Yang  felix.y...@huawei.com
+
+   * config/aarch64/arm_neon.h (vfms_n_f32, vfmsq_n_f32, vfmsq_n_f64): New
+   intrinsics.
+


Hi Felix,

Thanks for the the patch. It LGTM apart from one point - you seem to 
have missed out vfms_n_f64?


Thanks,
Tejas.


  2015-01-19  Jiong Wang  jiong.w...@arm.com
Andrew Pinski  apin...@cavium.com

Index: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfms_n.c
===
--- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfms_n.c
(revision 0)
+++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfms_n.c
(revision 0)
@@ -0,0 +1,74 @@
+#include arm_neon.h
+#include arm-neon-ref.h
+#include compute-ref-data.h
+
+#if defined(__aarch64__)  defined(__ARM_FEATURE_FMA)
+/* Expected results.  */
+VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x4438ca3d, 0x44390a3d };
+VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x44869eb8, 0x4486beb8, 0x4486deb8, 
0x4486feb8 };
+VECT_VAR_DECL(expected,hfloat,64,2) [] = { 0x408906e1532b8520, 
0x40890ee1532b8520 };
+
+#define VECT_VAR_ASSIGN(S,Q,T1,W) S##Q##_##T1##W
+#define ASSIGN(S, Q, T, W, V) T##W##_t S##Q##_##T##W = V
+#define TEST_MSG VFMS_N/VFMSQ_N
+
+void exec_vfms_n (void)
+{
+  /* Basic test: v4=vfms_n(v1,v2), then store the result.  */
+#define TEST_VFMS_N(Q, T1, T2, W, N)   \
+  VECT_VAR(vector_res, T1, W, N) = \
+vfms##Q##_n_##T2##W(VECT_VAR(vector1, T1, W, N),   \
+   VECT_VAR(vector2, T1, W, N),\
+   VECT_VAR_ASSIGN(scalar, Q, T1, W)); \
+  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
+
+#define CHECK_VFMS_N_RESULTS(test_name,comment)
\
+  {\
+CHECK_FP(test_name, float, 32, 2, PRIx32, expected, comment);  \
+CHECK_FP(test_name, float, 32, 4, PRIx32, expected, comment);  \
+CHECK_FP(test_name, float, 64, 2, PRIx64, expected, comment);  \
+  }
+
+#define DECL_VFMS_N_VAR(VAR)   \
+  DECL_VARIABLE(VAR, float, 32, 2);\
+  DECL_VARIABLE(VAR, float, 32, 4);\
+  DECL_VARIABLE(VAR, float, 64, 2);
+
+  DECL_VFMS_N_VAR(vector1);
+  DECL_VFMS_N_VAR(vector2);
+  DECL_VFMS_N_VAR(vector3);
+  DECL_VFMS_N_VAR(vector_res);
+
+  clean_results ();
+
+  /* Initialize input vector1 from buffer.  */
+  VLOAD(vector1, buffer, , float, f, 32, 2);
+  VLOAD(vector1, buffer, q, float, f, 32, 4);
+  VLOAD(vector1, buffer, q, float, f, 64, 2);
+
+  /* Choose init value arbitrarily.  */
+  VDUP(vector2, , float, f, 32, 2, -9.3f);
+  VDUP(vector2, q, float, f, 32, 4, -29.7f);
+  VDUP(vector2, q, float, f, 64, 2, -15.8f);
+
+  /* Choose init value arbitrarily.  */
+  ASSIGN(scalar, , float, 32, 81.2f);
+  ASSIGN(scalar, q, float, 32, 36.8f);
+  ASSIGN(scalar, q, float, 64, 51.7f);
+
+  /* Execute the tests.  */
+  TEST_VFMS_N(, float, f, 32, 2);
+  TEST_VFMS_N(q, float, f, 32, 4);
+  TEST_VFMS_N(q, float, f, 64, 2);
+
+  CHECK_VFMS_N_RESULTS (TEST_MSG, );
+}
+#endif
+
+int main (void)
+{
+#if defined(__aarch64__)  defined(__ARM_FEATURE_FMA)
+  exec_vfms_n ();
+#endif
+  return 0;
+}
Index: gcc/testsuite/ChangeLog
===
--- gcc/testsuite/ChangeLog (revision 219845)
+++ gcc/testsuite/ChangeLog (working copy)
@@ -1,3 +1,7 @@
+2015-01-21  Felix Yang  felix.y...@huawei.com
+
+   * gcc.target/aarch64/advsimd-intrinsics/vfms_n.c: New test.
+
  2015-01-19  Felix Yang  felix.y...@huawei.com
Haijian Zhang  z.zhanghaij...@huawei.com

Index: gcc/config/aarch64/arm_neon.h
===
--- gcc/config/aarch64/arm_neon.h   (revision 219845)
+++ gcc/config/aarch64/arm_neon.h   (working copy)
@@ -14774,7 +14774,24 @@ vfmsq_f64 (float64x2_t __a, float64x2_t __b, float
return __builtin_aarch64_fmav2df (-__b, __c, __a);
  }

+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vfms_n_f32 (float32x2_t __a, float32x2_t __b, float32_t __c)
+{
+  return __builtin_aarch64_fmav2sf (-__b, vdup_n_f32 (__c), __a);
+}

+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vfmsq_n_f32 (float32x4_t __a, float32x4_t __b, float32_t __c)
+{
+  return __builtin_aarch64_fmav4sf

[PING] [PATCH] [AArch64, NEON] Add vfms_n_f32, vfmsq_n_f32 and vfmsq_n_f64 specified by the ACLE

2015-01-21 Thread Yangfei (Felix) 
This is a ping for: https://gcc.gnu.org/ml/gcc-patches/2014-12/msg01008.html
I updated the testcase adding test for vfmsq_n_f64 intrinsic.
Test OK for both aarch64-linux-gnu and aarch64_be-linux-gnu-gcc.
OK for the trunk?  Thanks.


Index: gcc/ChangeLog
===
--- gcc/ChangeLog   (revision 219845)
+++ gcc/ChangeLog   (working copy)
@@ -1,3 +1,8 @@
+2015-01-21  Felix Yang  felix.y...@huawei.com
+
+   * config/aarch64/arm_neon.h (vfms_n_f32, vfmsq_n_f32, vfmsq_n_f64): New
+   intrinsics.
+
 2015-01-19  Jiong Wang  jiong.w...@arm.com
Andrew Pinski  apin...@cavium.com
 
Index: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfms_n.c
===
--- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfms_n.c
(revision 0)
+++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfms_n.c
(revision 0)
@@ -0,0 +1,74 @@
+#include arm_neon.h
+#include arm-neon-ref.h
+#include compute-ref-data.h
+
+#if defined(__aarch64__)  defined(__ARM_FEATURE_FMA)
+/* Expected results.  */
+VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x4438ca3d, 0x44390a3d };
+VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x44869eb8, 0x4486beb8, 0x4486deb8, 
0x4486feb8 };
+VECT_VAR_DECL(expected,hfloat,64,2) [] = { 0x408906e1532b8520, 
0x40890ee1532b8520 };
+
+#define VECT_VAR_ASSIGN(S,Q,T1,W) S##Q##_##T1##W
+#define ASSIGN(S, Q, T, W, V) T##W##_t S##Q##_##T##W = V
+#define TEST_MSG VFMS_N/VFMSQ_N
+
+void exec_vfms_n (void)
+{
+  /* Basic test: v4=vfms_n(v1,v2), then store the result.  */
+#define TEST_VFMS_N(Q, T1, T2, W, N)   \
+  VECT_VAR(vector_res, T1, W, N) = \
+vfms##Q##_n_##T2##W(VECT_VAR(vector1, T1, W, N),   \
+   VECT_VAR(vector2, T1, W, N),\
+   VECT_VAR_ASSIGN(scalar, Q, T1, W)); \
+  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
+
+#define CHECK_VFMS_N_RESULTS(test_name,comment)
\
+  {\
+CHECK_FP(test_name, float, 32, 2, PRIx32, expected, comment);  \
+CHECK_FP(test_name, float, 32, 4, PRIx32, expected, comment);  \
+CHECK_FP(test_name, float, 64, 2, PRIx64, expected, comment);  \
+  }
+
+#define DECL_VFMS_N_VAR(VAR)   \
+  DECL_VARIABLE(VAR, float, 32, 2);\
+  DECL_VARIABLE(VAR, float, 32, 4);\
+  DECL_VARIABLE(VAR, float, 64, 2);
+
+  DECL_VFMS_N_VAR(vector1);
+  DECL_VFMS_N_VAR(vector2);
+  DECL_VFMS_N_VAR(vector3);
+  DECL_VFMS_N_VAR(vector_res);
+
+  clean_results ();
+
+  /* Initialize input vector1 from buffer.  */
+  VLOAD(vector1, buffer, , float, f, 32, 2);
+  VLOAD(vector1, buffer, q, float, f, 32, 4);
+  VLOAD(vector1, buffer, q, float, f, 64, 2);
+
+  /* Choose init value arbitrarily.  */
+  VDUP(vector2, , float, f, 32, 2, -9.3f);
+  VDUP(vector2, q, float, f, 32, 4, -29.7f);
+  VDUP(vector2, q, float, f, 64, 2, -15.8f);
+  
+  /* Choose init value arbitrarily.  */
+  ASSIGN(scalar, , float, 32, 81.2f);
+  ASSIGN(scalar, q, float, 32, 36.8f);
+  ASSIGN(scalar, q, float, 64, 51.7f);
+
+  /* Execute the tests.  */
+  TEST_VFMS_N(, float, f, 32, 2);
+  TEST_VFMS_N(q, float, f, 32, 4);
+  TEST_VFMS_N(q, float, f, 64, 2);
+
+  CHECK_VFMS_N_RESULTS (TEST_MSG, );
+}
+#endif
+
+int main (void)
+{
+#if defined(__aarch64__)  defined(__ARM_FEATURE_FMA)
+  exec_vfms_n ();
+#endif
+  return 0;
+}
Index: gcc/testsuite/ChangeLog
===
--- gcc/testsuite/ChangeLog (revision 219845)
+++ gcc/testsuite/ChangeLog (working copy)
@@ -1,3 +1,7 @@
+2015-01-21  Felix Yang  felix.y...@huawei.com
+
+   * gcc.target/aarch64/advsimd-intrinsics/vfms_n.c: New test.
+
 2015-01-19  Felix Yang  felix.y...@huawei.com
Haijian Zhang  z.zhanghaij...@huawei.com
 
Index: gcc/config/aarch64/arm_neon.h
===
--- gcc/config/aarch64/arm_neon.h   (revision 219845)
+++ gcc/config/aarch64/arm_neon.h   (working copy)
@@ -14774,7 +14774,24 @@ vfmsq_f64 (float64x2_t __a, float64x2_t __b, float
   return __builtin_aarch64_fmav2df (-__b, __c, __a);
 }
 
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vfms_n_f32 (float32x2_t __a, float32x2_t __b, float32_t __c)
+{
+  return __builtin_aarch64_fmav2sf (-__b, vdup_n_f32 (__c), __a);
+}
 
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vfmsq_n_f32 (float32x4_t __a, float32x4_t __b, float32_t __c)
+{
+  return __builtin_aarch64_fmav4sf (-__b, vdupq_n_f32 (__c), __a);
+}
+
+__extension__ static __inline float64x2_t __attribute__ ((__always_inline__))
+vfmsq_n_f64 (float64x2_t __a, float64x2_t __b,