Re: [PINGv3][PATCH] Fix for PR 61561
Thank you. $ svn commit Sendinggcc/ChangeLog Sendinggcc/config/arm/thumb1.md Sendinggcc/config/arm/thumb2.md Transmitting file data ... Committed revision 213695. P.S. Minor nit was reg. tested. On 08/06/2014 06:44 PM, Richard Earnshaw wrote: On 06/08/14 15:14, Ramana Radhakrishnan wrote: This is OK thanks. Ramana Hmm, minor nit. (define_insn *thumb1_movhi_insn [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,*r,*h,l) - (match_operand:HI 1 general_operand l,m,l,*h,*r,I))] + (match_operand:HI 1 general_operand lk,m,l,*h,*r,I))] This would be better expressed as: [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,l*r,*h,l) (match_operand:HI 1 general_operand l,m,l,k*h,*r,I))] that is, to use the 4th alternative. That's because the use of SP in these operations does not clobber the flags. Similarly for the movqi pattern. R.
Re: [PINGv3][PATCH] Fix for PR 61561
On Thu, Aug 7, 2014 at 8:36 AM, Marat Zakirov m.zaki...@samsung.com wrote: Thank you. $ svn commit Sendinggcc/ChangeLog Sendinggcc/config/arm/thumb1.md Sendinggcc/config/arm/thumb2.md Transmitting file data ... Committed revision 213695. P.S. Minor nit was reg. tested. Another minor nit - please send the patch you committed to be archived on the mailing list. regards Ramana On 08/06/2014 06:44 PM, Richard Earnshaw wrote: On 06/08/14 15:14, Ramana Radhakrishnan wrote: This is OK thanks. Ramana Hmm, minor nit. (define_insn *thumb1_movhi_insn [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,*r,*h,l) - (match_operand:HI 1 general_operand l,m,l,*h,*r,I))] + (match_operand:HI 1 general_operand lk,m,l,*h,*r,I))] This would be better expressed as: [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,l*r,*h,l) (match_operand:HI 1 general_operand l,m,l,k*h,*r,I))] that is, to use the 4th alternative. That's because the use of SP in these operations does not clobber the flags. Similarly for the movqi pattern. R.
Re: [PINGv3][PATCH] Fix for PR 61561
--Marat On 08/07/2014 12:00 PM, Ramana Radhakrishnan wrote: On Thu, Aug 7, 2014 at 8:36 AM, Marat Zakirov m.zaki...@samsung.com wrote: Thank you. $ svn commit Sendinggcc/ChangeLog Sendinggcc/config/arm/thumb1.md Sendinggcc/config/arm/thumb2.md Transmitting file data ... Committed revision 213695. P.S. Minor nit was reg. tested. Another minor nit - please send the patch you committed to be archived on the mailing list. regards Ramana On 08/06/2014 06:44 PM, Richard Earnshaw wrote: On 06/08/14 15:14, Ramana Radhakrishnan wrote: This is OK thanks. Ramana Hmm, minor nit. (define_insn *thumb1_movhi_insn [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,*r,*h,l) - (match_operand:HI 1 general_operand l,m,l,*h,*r,I))] + (match_operand:HI 1 general_operand lk,m,l,*h,*r,I))] This would be better expressed as: [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,l*r,*h,l) (match_operand:HI 1 general_operand l,m,l,k*h,*r,I))] that is, to use the 4th alternative. That's because the use of SP in these operations does not clobber the flags. Similarly for the movqi pattern. R. gcc/ChangeLog: 2014-08-07 Marat Zakirov m.zaki...@samsung.com * config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer. (*thumb1_movqi_insn): Likewise. * config/arm/thumb2.md (*thumb2_movhi_insn): Likewise. diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md index cd1adf4..fed741e 100644 --- a/gcc/config/arm/thumb1.md +++ b/gcc/config/arm/thumb1.md @@ -707,8 +707,8 @@ ) (define_insn *thumb1_movhi_insn - [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,*r,*h,l) - (match_operand:HI 1 general_operand l,m,l,*h,*r,I))] + [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,l*r,*h,l) + (match_operand:HI 1 general_operand l,m,l,k*h,*r,I))] TARGET_THUMB1 ( register_operand (operands[0], HImode) || register_operand (operands[1], HImode)) @@ -762,7 +762,7 @@ (define_insn *thumb1_movqi_insn [(set (match_operand:QI 0 nonimmediate_operand =l,l,m,*r,*h,l) - (match_operand:QI 1 general_operand l, m,l,*h,*r,I))] + (match_operand:QI 1 general_operand lk, m,l,*h,*r,I))] TARGET_THUMB1 ( register_operand (operands[0], QImode) || register_operand (operands[1], QImode)) diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md index 029a679..983b59d 100644 --- a/gcc/config/arm/thumb2.md +++ b/gcc/config/arm/thumb2.md @@ -318,7 +318,7 @@ ;; of the messiness associated with the ARM patterns. (define_insn *thumb2_movhi_insn [(set (match_operand:HI 0 nonimmediate_operand =r,r,l,r,m,r) - (match_operand:HI 1 general_operand r,I,Py,n,r,m))] + (match_operand:HI 1 general_operand rk,I,Py,n,r,m))] TARGET_THUMB2 (register_operand (operands[0], HImode) || register_operand (operands[1], HImode))
Re: [PINGv3][PATCH] Fix for PR 61561
On 08/06/2014 06:44 PM, Richard Earnshaw wrote: Similarly for the movqi pattern. You haven't updated the thumb1 QImode pattern in the same way. R. On 07/08/14 09:10, Marat Zakirov wrote: --Marat On 08/07/2014 12:00 PM, Ramana Radhakrishnan wrote: On Thu, Aug 7, 2014 at 8:36 AM, Marat Zakirov m.zaki...@samsung.com wrote: Thank you. $ svn commit Sendinggcc/ChangeLog Sendinggcc/config/arm/thumb1.md Sendinggcc/config/arm/thumb2.md Transmitting file data ... Committed revision 213695. P.S. Minor nit was reg. tested. Another minor nit - please send the patch you committed to be archived on the mailing list. regards Ramana On 08/06/2014 06:44 PM, Richard Earnshaw wrote: On 06/08/14 15:14, Ramana Radhakrishnan wrote: This is OK thanks. Ramana Hmm, minor nit. (define_insn *thumb1_movhi_insn [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,*r,*h,l) - (match_operand:HI 1 general_operand l,m,l,*h,*r,I))] + (match_operand:HI 1 general_operand lk,m,l,*h,*r,I))] This would be better expressed as: [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,l*r,*h,l) (match_operand:HI 1 general_operand l,m,l,k*h,*r,I))] that is, to use the 4th alternative. That's because the use of SP in these operations does not clobber the flags. Similarly for the movqi pattern. R. thumb2.diff gcc/ChangeLog: 2014-08-07 Marat Zakirov m.zaki...@samsung.com * config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer. (*thumb1_movqi_insn): Likewise. * config/arm/thumb2.md (*thumb2_movhi_insn): Likewise. diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md index cd1adf4..fed741e 100644 --- a/gcc/config/arm/thumb1.md +++ b/gcc/config/arm/thumb1.md @@ -707,8 +707,8 @@ ) (define_insn *thumb1_movhi_insn - [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,*r,*h,l) - (match_operand:HI 1 general_operand l,m,l,*h,*r,I))] + [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,l*r,*h,l) + (match_operand:HI 1 general_operand l,m,l,k*h,*r,I))] TARGET_THUMB1 ( register_operand (operands[0], HImode) || register_operand (operands[1], HImode)) @@ -762,7 +762,7 @@ (define_insn *thumb1_movqi_insn [(set (match_operand:QI 0 nonimmediate_operand =l,l,m,*r,*h,l) - (match_operand:QI 1 general_operand l, m,l,*h,*r,I))] + (match_operand:QI 1 general_operand lk, m,l,*h,*r,I))] TARGET_THUMB1 ( register_operand (operands[0], QImode) || register_operand (operands[1], QImode)) diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md index 029a679..983b59d 100644 --- a/gcc/config/arm/thumb2.md +++ b/gcc/config/arm/thumb2.md @@ -318,7 +318,7 @@ ;; of the messiness associated with the ARM patterns. (define_insn *thumb2_movhi_insn [(set (match_operand:HI 0 nonimmediate_operand =r,r,l,r,m,r) - (match_operand:HI 1 general_operand r,I,Py,n,r,m))] + (match_operand:HI 1 general_operand rk,I,Py,n,r,m))] TARGET_THUMB2 (register_operand (operands[0], HImode) || register_operand (operands[1], HImode))
Re: [PINGv3][PATCH] Fix for PR 61561
Sendinggcc/ChangeLog Sendinggcc/config/arm/thumb1.md Transmitting file data .. Committed revision 213710. P.S. Sorry for inconvenience. On 08/07/2014 01:02 PM, Marat Zakirov wrote: Sorry ;( Will testfix it. On 08/07/2014 12:50 PM, Richard Earnshaw wrote: On 08/06/2014 06:44 PM, Richard Earnshaw wrote: Similarly for the movqi pattern. You haven't updated the thumb1 QImode pattern in the same way. R. On 07/08/14 09:10, Marat Zakirov wrote: --Marat On 08/07/2014 12:00 PM, Ramana Radhakrishnan wrote: On Thu, Aug 7, 2014 at 8:36 AM, Marat Zakirov m.zaki...@samsung.com wrote: Thank you. $ svn commit Sendinggcc/ChangeLog Sendinggcc/config/arm/thumb1.md Sending gcc/config/arm/thumb2.md./gcc/config/arm/thumb1.md Transmitting file data ... Committed revision 213695. P.S. Minor nit was reg. tested. Another minor nit - please send the patch you committed to be archived on the mailing list. regards Ramana On 08/06/2014 06:44 PM, Richard Earnshaw wrote: On 06/08/14 15:14, Ramana Radhakrishnan wrote: This is OK thanks. Ramana Hmm, minor nit. (define_insn *thumb1_movhi_insn [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,*r,*h,l) - (match_operand:HI 1 general_operand l,m,l,*h,*r,I))] + (match_operand:HI 1 general_operand lk,m,l,*h,*r,I))] This would be better expressed as: [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,l*r,*h,l) (match_operand:HI 1 general_operand l,m,l,k*h,*r,I))] that is, to use the 4th alternative. That's because the use of SP in these operations does not clobber the flags. Similarly for the movqi pattern. R. thumb2.diff gcc/ChangeLog: 2014-08-07 Marat Zakirov m.zaki...@samsung.com * config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer. (*thumb1_movqi_insn): Likewise. * config/arm/thumb2.md (*thumb2_movhi_insn): Likewise. diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md index cd1adf4..fed741e 100644 --- a/gcc/config/arm/thumb1.md +++ b/gcc/config/arm/thumb1.md @@ -707,8 +707,8 @@ ) (define_insn *thumb1_movhi_insn - [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,*r,*h,l) -(match_operand:HI 1 general_operand l,m,l,*h,*r,I))] + [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,l*r,*h,l) +(match_operand:HI 1 general_operand l,m,l,k*h,*r,I))] TARGET_THUMB1 ( register_operand (operands[0], HImode) || register_operand (operands[1], HImode)) @@ -762,7 +762,7 @@ (define_insn *thumb1_movqi_insn [(set (match_operand:QI 0 nonimmediate_operand =l,l,m,*r,*h,l) -(match_operand:QI 1 general_operand l, m,l,*h,*r,I))] +(match_operand:QI 1 general_operand lk, m,l,*h,*r,I))] TARGET_THUMB1 ( register_operand (operands[0], QImode) || register_operand (operands[1], QImode)) diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md index 029a679..983b59d 100644 --- a/gcc/config/arm/thumb2.md +++ b/gcc/config/arm/thumb2.md @@ -318,7 +318,7 @@ ;; of the messiness associated with the ARM patterns. (define_insn *thumb2_movhi_insn [(set (match_operand:HI 0 nonimmediate_operand =r,r,l,r,m,r) -(match_operand:HI 1 general_operand r,I,Py,n,r,m))] +(match_operand:HI 1 general_operand rk,I,Py,n,r,m))] TARGET_THUMB2 (register_operand (operands[0], HImode) || register_operand (operands[1], HImode)) gcc/ChangeLog: 2014-08-07 Marat Zakirov m.zaki...@samsung.com * config/arm/thumb1.md (*thumb1_movqi_insn): Copy of thumb1_movhi_insn. --- gcc/config/arm/thumb1.md (revision 213695) +++ gcc/config/arm/thumb1.md (working copy) @@ -761,8 +761,8 @@ ) (define_insn *thumb1_movqi_insn - [(set (match_operand:QI 0 nonimmediate_operand =l,l,m,*r,*h,l) - (match_operand:QI 1 general_operand lk, m,l,*h,*r,I))] + [(set (match_operand:QI 0 nonimmediate_operand =l,l,m,l*r,*h,l) + (match_operand:QI 1 general_operand l,m,l,k*h,*r,I))] TARGET_THUMB1 ( register_operand (operands[0], QImode) || register_operand (operands[1], QImode))
[PINGv3][PATCH] Fix for PR 61561
On 07/30/2014 04:56 PM, Marat Zakirov wrote: On 07/23/2014 05:33 PM, Marat Zakirov wrote: Hi all! This is a friendly reminder message. On 07/17/2014 03:22 PM, Marat Zakirov wrote: On 07/16/2014 01:32 PM, Kyrill Tkachov wrote: On 16/07/14 10:22, Marat Zakirov wrote: Christophe, Please look at a new patch. Draft tests are OK. I'll ask your commit approval when full regression (ARM/thumb1/thumb2) tests are done. Hi Marat, I was about to propose the thumb2.md hunk myself, but I'll defer to the arm maintainers to comment on the other parts. Also, in the ChangeLog it is helpful to specify which patterns are being affected, so in your case it would be something like: * config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer. (*thumb1_movqi_insn): Likewise. * config/arm/thumb2.md (*thumb2_movhi_insn): Ditto. Kyrill Christophe, Kirill, finally I've finished regression testing. Please check if my patch is OK for trunk. The following configures were used: configure --build=x86_64-pc-linux-gnu --host=x86_64-pc-linux-gnu --target=arm-linux-gnueabi --with-interwork --enable-long-long --enable-languages=c,c++,fortran --enable-shared --with-gnu-as --with-gnu-ld --with-arch=$ARCH --with-mode=$MODE Thumb-1 $ARCH=armv4t $MODE=thumb Thumb-2 $ARCH=armv7 $MODE=thumb ARM $ARCH=armv7-a $MODE=arm No regressions detected, test pr61561.c passed in all cases. Thank you all. --Marat gcc/ChangeLog: 2014-07-16 Marat Zakirov m.zaki...@samsung.com * config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer. (*thumb1_movqi_insn): Likewise. * config/arm/thumb2.md (*thumb2_movhi_insn): Likewise. diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md index c044fd5..47b5cbd 100644 --- a/gcc/config/arm/thumb1.md +++ b/gcc/config/arm/thumb1.md @@ -708,7 +708,7 @@ (define_insn *thumb1_movhi_insn [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,*r,*h,l) - (match_operand:HI 1 general_operand l,m,l,*h,*r,I))] + (match_operand:HI 1 general_operand lk,m,l,*h,*r,I))] TARGET_THUMB1 ( register_operand (operands[0], HImode) || register_operand (operands[1], HImode)) @@ -762,7 +762,7 @@ (define_insn *thumb1_movqi_insn [(set (match_operand:QI 0 nonimmediate_operand =l,l,m,*r,*h,l) - (match_operand:QI 1 general_operand l, m,l,*h,*r,I))] + (match_operand:QI 1 general_operand lk, m,l,*h,*r,I))] TARGET_THUMB1 ( register_operand (operands[0], QImode) || register_operand (operands[1], QImode)) diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md index 6ea0810..7228069 100644 --- a/gcc/config/arm/thumb2.md +++ b/gcc/config/arm/thumb2.md @@ -318,7 +318,7 @@ ;; of the messiness associated with the ARM patterns. (define_insn *thumb2_movhi_insn [(set (match_operand:HI 0 nonimmediate_operand =r,r,l,r,m,r) - (match_operand:HI 1 general_operand r,I,Py,n,r,m))] + (match_operand:HI 1 general_operand rk,I,Py,n,r,m))] TARGET_THUMB2 (register_operand (operands[0], HImode) || register_operand (operands[1], HImode))
Re: [PINGv3][PATCH] Fix for PR 61561
This is OK thanks. Ramana
Re: [PINGv3][PATCH] Fix for PR 61561
On 06/08/14 15:14, Ramana Radhakrishnan wrote: This is OK thanks. Ramana Hmm, minor nit. (define_insn *thumb1_movhi_insn [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,*r,*h,l) - (match_operand:HI 1 general_operand l,m,l,*h,*r,I))] + (match_operand:HI 1 general_operand lk,m,l,*h,*r,I))] This would be better expressed as: [(set (match_operand:HI 0 nonimmediate_operand =l,l,m,l*r,*h,l) (match_operand:HI 1 general_operand l,m,l,k*h,*r,I))] that is, to use the 4th alternative. That's because the use of SP in these operations does not clobber the flags. Similarly for the movqi pattern. R.
