Re: [patch] [wwwdocs]+[invoke.texi] Update GCN for gfx90a (was: Re: [committed] amdgcn: Add gfx90a support)
On 25/05/2022 12:16, Tobias Burnus wrote: On 25.05.22 11:18, Andrew Stubbs wrote: On 24/05/2022 17:44, Tobias Burnus wrote: On 24.05.22 17:31, Andrew Stubbs wrote: amdgcn: Add gfx90a support I've deliberately avoided the MI100 and MI200 names because they're really not that simple. MI100 is gfx908, but MI150 is gfx906 and MI125 is gfx900. (The last two were misread – they should be MI50 and MI25.) The MI100 and MI200 names show up in the documents: * '"AMD Instinct MI100" Instruction Set Architecture / Reference Guide' https://developer.amd.com/wp-content/resources/CDNA1_Shader_ISA_14December2020.pdf * '"AMD Instinct MI200" Instruction Set Architecture / Reference Guide' https://developer.amd.com/wp-content/resources/CDNA2_Shader_ISA_4February2022.pdf And to update the gcc-13/changes.html. I can only see one option? In one patch, I had two to choose from, in the revised follow-up patch, which was compile (nothing to choose from). Updated diffs attached. — OK? OK, sorry for the confusion. [...] GCN now requires llvm-mc of LLVM 13.0.1 or higher [..] I'm going to update the Wiki page today. I'm not sure where else it is currently documented. I think that's the only place. It's done now. Andrew
Re: [patch] [wwwdocs]+[invoke.texi] Update GCN for gfx90a (was: Re: [committed] amdgcn: Add gfx90a support)
On 25.05.22 11:18, Andrew Stubbs wrote:
On 24/05/2022 17:44, Tobias Burnus wrote:
On 24.05.22 17:31, Andrew Stubbs wrote:
amdgcn: Add gfx90a support
I've deliberately avoided the MI100 and MI200 names because they're
really not that simple. MI100 is gfx908, but MI150 is gfx906 and MI125
is gfx900.
(The last two were misread – they should be MI50 and MI25.)
The MI100 and MI200 names show up in the documents:
* '"AMD Instinct MI100" Instruction Set Architecture / Reference Guide'
https://developer.amd.com/wp-content/resources/CDNA1_Shader_ISA_14December2020.pdf
* '"AMD Instinct MI200" Instruction Set Architecture / Reference Guide'
https://developer.amd.com/wp-content/resources/CDNA2_Shader_ISA_4February2022.pdf
And to update the gcc-13/changes.html.
I can only see one option?
In one patch, I had two to choose from, in the revised follow-up patch,
which was compile (nothing to choose from).
Updated diffs attached. — OK?
[...] GCN now requires llvm-mc of LLVM 13.0.1 or higher [..]
I'm going to update the Wiki page today. I'm not sure where else it is
currently documented.
I think that's the only place.
Tobias
-
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GCN: Add gfx908/gfx90a to -march/-mtune in invoke.texi
gcc/
* doc/invoke.texi (AMD GCN Options): Add gfx908/gfx90a.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 12f834ff01d..71098d86313 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -19737,7 +19737,6 @@ Set architecture type or tuning for @var{gpu}. Supported values for @var{gpu}
are
@table @samp
-@opindex fiji
@item fiji
Compile for GCN3 Fiji devices (gfx803).
@@ -19747,6 +19746,12 @@ Compile for GCN5 Vega 10 devices (gfx900).
@item gfx906
Compile for GCN5 Vega 20 devices (gfx906).
+@item gfx908
+Compile for CDNA1 Instinct MI100 series devices (gfx908).
+
+@item gfx90a
+Compile for CDNA2 Instinct MI200 series devices (gfx90a).
+
@end table
@item -msram-ecc=on
gcc-13/changes.html: Add gfx90a to GCN
diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html
index cc0e15eb..c2610412 100644
--- a/htdocs/gcc-13/changes.html
+++ b/htdocs/gcc-13/changes.html
@@ -99,6 +99,13 @@ a work-in-progress.
+AMD Radeon (GCN)
+
+ Support for the Instinct MI200 series devices (https://gcc.gnu.org/onlinedocs/gcc/AMD-GCN-Options.html;>
+ gfx90a) has been added.
+
+
Re: [patch] [wwwdocs]+[invoke.texi] Update GCN for gfx90a (was: Re: [committed] amdgcn: Add gfx90a support)
On 24/05/2022 17:44, Tobias Burnus wrote: On 24.05.22 17:31, Andrew Stubbs wrote: amdgcn: Add gfx90a support Attached is an attempt to update invoke.texi I've deliberately avoided the MI100 and MI200 names because they're really not that simple. MI100 is gfx908, but MI150 is gfx906 and MI125 is gfx900. I'm not sure what's going on with the MI200 series, now or in the future. And to update the gcc-13/changes.html. Regarding the latter, I have to versions – the first is more readable, the latter makes more clear where to use it, but reads much worse. – Pick one or suggest a better one. I can only see one option? PS: I was thinking of mentioning that GCN now requires llvm-mc of LLVM 13.0.1 or higher (during build + installed as assembler) but I then thought that changes.html is not the best place and there is an error during build, stating what is needed. I'm going to update the Wiki page today. I'm not sure where else it is currently documented. Andrew
Re: [patch] [wwwdocs]+[invoke.texi] Update GCN for gfx90a (was: Re: [committed] amdgcn: Add gfx90a support)
On 24.05.22 18:44, Tobias Burnus wrote: On 24.05.22 17:31, Andrew Stubbs wrote: amdgcn: Add gfx90a support Attached is an attempt to update invoke.texi And to update the gcc-13/changes.html. Regarding the latter, I have to versions – the first is more readable, the latter makes more clear where to use it, but reads much worse. – Pick one or suggest a better one. [wwwdocs, only]: Actually, regarding the gcc-13/changes, I am wondering whether the best choice is to use the first wording but link to the -march= page. That's what the new variant now does – see attachment. (The linked-to page is: https://gcc.gnu.org/onlinedocs/gcc/AMD-GCN-Options.html and gfx906/gfx90a is added by the patch in the previous email in this thread.) Tobias - Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634 München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: Thomas Heurung, Frank Thürauf; Sitz der Gesellschaft: München; Registergericht München, HRB 106955 gcc-13/changes.html: Add gfx90a to GCN diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html index 6c5b2a37..183a4bba 100644 --- a/htdocs/gcc-13/changes.html +++ b/htdocs/gcc-13/changes.html @@ -95,6 +95,13 @@ a work-in-progress. +AMD Radeon (GCN) + + Support for the Instinct MI200 series (https://gcc.gnu.org/onlinedocs/gcc/AMD-GCN-Options.html;> + gfx90a) has been added. + +
[patch] [wwwdocs]+[invoke.texi] Update GCN for gfx90a (was: Re: [committed] amdgcn: Add gfx90a support)
On 24.05.22 17:31, Andrew Stubbs wrote:
amdgcn: Add gfx90a support
Attached is an attempt to update invoke.texi
And to update the gcc-13/changes.html. Regarding the latter, I have to
versions – the first is more readable, the latter makes more clear where
to use it, but reads much worse. – Pick one or suggest a better one.
OK for the two patches?
Tobias
PS: I was thinking of mentioning that GCN now requires llvm-mc of LLVM
13.0.1 or higher (during build + installed as assembler) but I then
thought that changes.html is not the best place and there is an error
during build, stating what is needed.
-
Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634
München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: Thomas
Heurung, Frank Thürauf; Sitz der Gesellschaft: München; Registergericht
München, HRB 106955
GCN: Add gfx908/gfx90a to -march/-mtune in invoke.texi
gcc/
* doc/invoke.texi (AMD GCN Options): Add gfx908/gfx90a.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index a2f85f0a4ea..521e4b65d3d 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -19740,7 +19740,6 @@ Set architecture type or tuning for @var{gpu}. Supported values for @var{gpu}
are
@table @samp
-@opindex fiji
@item fiji
Compile for GCN3 Fiji devices (gfx803).
@@ -19750,6 +19749,12 @@ Compile for GCN5 Vega 10 devices (gfx900).
@item gfx906
Compile for GCN5 Vega 20 devices (gfx906).
+@item gfx908
+Compile for CDNA1 Instinct MI100 devices (gfx908).
+
+@item gfx90a
+Compile for CDNA2 Instinct MI200 series devices (gfx90a).
+
@end table
@item -msram-ecc=on
gcc-13/changes.html: Add gfx90a to GCN
diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html
index 6c5b2a37..745aa65c 100644
--- a/htdocs/gcc-13/changes.html
+++ b/htdocs/gcc-13/changes.html
@@ -95,6 +95,14 @@ a work-in-progress.
+AMD Radeon (GCN)
+
+ Support for the Instinct MI200 series (gfx90a) has been
+ added.
+ The -march= and -mtune= flags now support
+ gfx90a for the Instinct MI200 series (gfx90a).
+
+
[committed] amdgcn: Add gfx90a support
I've committed this patch to add support for gfx90a AMD GPU devices.
The patch updates all the places that have architecture/ISA specific
code, tidies up the ISA naming and handling in the backend, and adds a
new multilib.
This is just lightly tested at this point, but there are no known issues
and it shouldn't break anything for other architectures.
Andrewamdgcn: Add gfx90a support
This adds architecture options and multilibs for the AMD GFX90a GPUs.
It also tidies up some of the ISA selection code, and corrects a few small
mistake in the gfx908 naming.
gcc/ChangeLog:
* config.gcc (amdgcn): Accept --with-arch=gfx908 and gfx90a.
* config/gcn/gcn-opts.h (enum gcn_isa): New.
(TARGET_GCN3): Use enum gcn_isa.
(TARGET_GCN3_PLUS): Likewise.
(TARGET_GCN5): Likewise.
(TARGET_GCN5_PLUS): Likewise.
(TARGET_CDNA1): New.
(TARGET_CDNA1_PLUS): New.
(TARGET_CDNA2): New.
(TARGET_CDNA2_PLUS): New.
(TARGET_M0_LDS_LIMIT): New.
(TARGET_PACKED_WORK_ITEMS): New.
* config/gcn/gcn.cc (gcn_isa): Change to enum gcn_isa.
(gcn_option_override): Recognise CDNA ISA variants.
(gcn_omp_device_kind_arch_isa): Support gfx90a.
(gcn_expand_prologue): Make m0 init optional.
Add support for packed work items.
(output_file_start): Support gfx90a.
(gcn_hsa_declare_function_name): Support gfx90a metadata.
* config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS):Add __CDNA1__ and
__CDNA2__.
* config/gcn/gcn.md (mulsi3_highpart): Use TARGET_GCN5_PLUS.
(mulsi3_highpart_imm): Likewise.
(mulsidi3): Likewise.
(mulsidi3_imm): Likewise.
* config/gcn/gcn.opt (gpu_type): Add gfx90a.
* config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX90a): New.
(main): Support gfx90a.
* config/gcn/t-gcn-hsa: Add gfx90a multilib.
* config/gcn/t-omp-device: Add gfx90a isa.
libgomp/ChangeLog:
* plugin/plugin-gcn.c (EF_AMDGPU_MACH): Add
EF_AMDGPU_MACH_AMDGCN_GFX90a.
(gcn_gfx90a_s): New.
(isa_hsa_name): Support gfx90a.
(isa_code): Likewise.
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 600ac357366..cdbefb5b4f5 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -4522,7 +4522,7 @@ case "${target}" in
for which in arch tune; do
eval "val=\$with_$which"
case ${val} in
- "" | fiji | gfx900 | gfx906 )
+ "" | fiji | gfx900 | gfx906 | gfx908 | gfx90a)
# OK
;;
*)
diff --git a/gcc/config/gcn/gcn-opts.h b/gcc/config/gcn/gcn-opts.h
index c0805241bc5..b62dfb45f59 100644
--- a/gcc/config/gcn/gcn-opts.h
+++ b/gcc/config/gcn/gcn-opts.h
@@ -23,16 +23,30 @@ enum processor_type
PROCESSOR_FIJI,// gfx803
PROCESSOR_VEGA10, // gfx900
PROCESSOR_VEGA20, // gfx906
- PROCESSOR_GFX908 // as yet unnamed
+ PROCESSOR_GFX908,
+ PROCESSOR_GFX90a
};
/* Set in gcn_option_override. */
-extern int gcn_isa;
-
-#define TARGET_GCN3 (gcn_isa == 3)
-#define TARGET_GCN3_PLUS (gcn_isa >= 3)
-#define TARGET_GCN5 (gcn_isa == 5)
-#define TARGET_GCN5_PLUS (gcn_isa >= 5)
+extern enum gcn_isa {
+ ISA_UNKNOWN,
+ ISA_GCN3,
+ ISA_GCN5,
+ ISA_CDNA1,
+ ISA_CDNA2
+} gcn_isa;
+
+#define TARGET_GCN3 (gcn_isa == ISA_GCN3)
+#define TARGET_GCN3_PLUS (gcn_isa >= ISA_GCN3)
+#define TARGET_GCN5 (gcn_isa == ISA_GCN5)
+#define TARGET_GCN5_PLUS (gcn_isa >= ISA_GCN5)
+#define TARGET_CDNA1 (gcn_isa == ISA_CDNA1)
+#define TARGET_CDNA1_PLUS (gcn_isa >= ISA_CDNA1)
+#define TARGET_CDNA2 (gcn_isa == ISA_CDNA2)
+#define TARGET_CDNA2_PLUS (gcn_isa >= ISA_CDNA2)
+
+#define TARGET_M0_LDS_LIMIT (TARGET_GCN3)
+#define TARGET_PACKED_WORK_ITEMS (TARGET_CDNA2_PLUS)
enum sram_ecc_type
{
diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc
index 39a7a966502..5e75a1b63aa 100644
--- a/gcc/config/gcn/gcn.cc
+++ b/gcc/config/gcn/gcn.cc
@@ -66,7 +66,7 @@ static bool ext_gcn_constants_init = 0;
/* Holds the ISA variant, derived from the command line parameters. */
-int gcn_isa = 3; /* Default to GCN3. */
+enum gcn_isa gcn_isa = ISA_GCN3; /* Default to GCN3. */
/* Reserve this much space for LDS (for propagating variables from
worker-single mode to worker-partitioned mode), per workgroup. Global
@@ -129,7 +129,13 @@ gcn_option_override (void)
if (!flag_pic)
flag_pic = flag_pie;
- gcn_isa = gcn_arch == PROCESSOR_FIJI ? 3 : 5;
+ gcn_isa = (gcn_arch == PROCESSOR_FIJI ? ISA_GCN3
+ : gcn_arch == PROCESSOR_VEGA10 ? ISA_GCN5
+ : gcn_arch == PROCESSOR_VEGA20 ? ISA_GCN5
+ : gcn_arch == PROCESSOR_GFX908 ? ISA_CDNA1
+ : gcn_arch == PROCESSOR_GFX90a ? ISA_CDNA2
+ : ISA_UNKNOWN);
+ gcc_assert (gcn_isa != ISA_UNKNOWN);
/* The default stack size needs to be small for offload kernels
