Re: [patch-2v3, rs6000] Guard fctid on PowerPC64 and PowerPC476 [PR112707]
Hi Haochen,
on 2023/12/8 09:58, HAO CHEN GUI wrote:
> Hi,
> The "fctid" is supported on 64-bit Power processors and PowerPC476. It
> need a guard to check it. The patch fixes the issue.
>
> Compared with last version,
> https://gcc.gnu.org/pipermail/gcc-patches/2023-December/639536.html
> the main change is to change the target requirement in pr88558*.c.
>
> Bootstrapped and tested on x86 and powerpc64-linux BE and LE with no
> regressions. Is this OK for trunk?
>
>
> ChangeLog
> rs6000: Guard fctid on PowerPC64 and PowerPC476.
>
> fctid is supported on 64-bit Power processors and powerpc 476. It should
Nit: s/is/is only/
> be guarded by this condition. The patch fixes the issue.
>
> gcc/
> PR target/112707
> * config/rs6000/rs6000.h (TARGET_FCTID): Define.
> * config/rs6000/rs6000.md (lrintdi2): Add guard TARGET_FCTID.
> * (lrounddi2): Replace TARGET_FPRND with TARGET_FCTID.
>
> gcc/testsuite/
> PR target/112707
> * gcc.target/powerpc/pr112707.h: New.
> * gcc.target/powerpc/pr112707-2.c: New.
> * gcc.target/powerpc/pr112707-3.c: New.
> * gcc.target/powerpc/pr88558-p7.c: Check fctid on ilp32 and
> has_arch_ppc64 as it's now guarded by powerpc64.
> * gcc.target/powerpc/pr88558-p8.c: Likewise.
> * gfortran.dg/nint_p7.f90: Add powerpc64 target requirement as
> lrounddi2 is now guarded by powerpc64.
>
> patch.diff
> diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
> index 22595f6ebd7..8c29ca68ccf 100644
> --- a/gcc/config/rs6000/rs6000.h
> +++ b/gcc/config/rs6000/rs6000.h
> @@ -467,6 +467,8 @@ extern int rs6000_vector_align[];
> #define TARGET_FCFIDUS TARGET_POPCNTD
> #define TARGET_FCTIDUZ TARGET_POPCNTD
> #define TARGET_FCTIWUZ TARGET_POPCNTD
> +/* Enable fctid on ppc64 and powerpc476. */
Nit: Changed to "Only powerpc64 and powerpc476 support fctid."
Ok for trunk with the nits fixed, thanks!
BR,
Kewen
> +#define TARGET_FCTID (TARGET_POWERPC64 || rs6000_cpu == PROCESSOR_PPC476)
> #define TARGET_CTZ TARGET_MODULO
> #define TARGET_EXTSWSLI (TARGET_MODULO && TARGET_POWERPC64)
> #define TARGET_MADDLDTARGET_MODULO
> diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
> index 2a1b5ecfaee..3be79d49dc0 100644
> --- a/gcc/config/rs6000/rs6000.md
> +++ b/gcc/config/rs6000/rs6000.md
> @@ -6718,7 +6718,7 @@ (define_insn "lrintdi2"
>[(set (match_operand:DI 0 "gpc_reg_operand" "=d")
> (unspec:DI [(match_operand:SFDF 1 "gpc_reg_operand" "")]
> UNSPEC_FCTID))]
> - "TARGET_HARD_FLOAT"
> + "TARGET_HARD_FLOAT && TARGET_FCTID"
>"fctid %0,%1"
>[(set_attr "type" "fp")])
>
> @@ -6784,7 +6784,7 @@ (define_expand "lrounddi2"
> (set (match_operand:DI 0 "gpc_reg_operand")
> (unspec:DI [(match_dup 2)]
> UNSPEC_FCTID))]
> - "TARGET_HARD_FLOAT && TARGET_VSX && TARGET_FPRND"
> + "TARGET_HARD_FLOAT && TARGET_VSX && TARGET_FCTID"
> {
>operands[2] = gen_reg_rtx (mode);
> })
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr112707-2.c
> b/gcc/testsuite/gcc.target/powerpc/pr112707-2.c
> new file mode 100644
> index 000..672e00691ea
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr112707-2.c
> @@ -0,0 +1,9 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -mdejagnu-cpu=7450 -fno-math-errno" } */
> +/* { dg-require-effective-target ilp32 } */
> +/* { dg-skip-if "" { has_arch_ppc64 } } */
> +/* { dg-final { scan-assembler-not {\mfctid\M} } } */
> +
> +/* powerpc 7450 doesn't support ppc64 (-m32 -mpowerpc64), so skips it. */
> +
> +#include "pr112707.h"
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr112707-3.c
> b/gcc/testsuite/gcc.target/powerpc/pr112707-3.c
> new file mode 100644
> index 000..924338fd390
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr112707-3.c
> @@ -0,0 +1,9 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -fno-math-errno -mdejagnu-cpu=476fp" } */
> +/* { dg-require-effective-target ilp32 } */
> +
> +/* powerpc 476fp has hard float enabled which is required by fctid */
> +
> +#include "pr112707.h"
> +
> +/* { dg-final { scan-assembler-times {\mfctid\M} 2 } } */
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr112707.h
> b/gcc/testsuite/gcc.target/powerpc/pr112707.h
> new file mode 100644
> index 000..e427dc6a72e
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr112707.h
> @@ -0,0 +1,10 @@
> +long long test1 (double a)
> +{
> + return __builtin_llrint (a);
> +}
> +
> +long long test2 (float a)
> +{
> + return __builtin_llrint (a);
> +}
> +
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c
> b/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c
> index 3932656c5fd..2fa0b997e52 100644
> --- a/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c
> +++ b/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c
> @@ -6,7 +6,7 @@
> #include "pr88558.h"
>
> /* { dg-final { scan-assembler-times {\mfctid\M} 4 { target lp64 } }
Re: [patch-2v3, rs6000] Guard fctid on PowerPC64 and PowerPC476 [PR112707]
Hi,
The "fctid" is supported on 64-bit Power processors and PowerPC476. It
need a guard to check it. The patch fixes the issue.
Compared with last version,
https://gcc.gnu.org/pipermail/gcc-patches/2023-December/639536.html
the main change is to change the target requirement in pr88558*.c.
Bootstrapped and tested on x86 and powerpc64-linux BE and LE with no
regressions. Is this OK for trunk?
ChangeLog
rs6000: Guard fctid on PowerPC64 and PowerPC476.
fctid is supported on 64-bit Power processors and powerpc 476. It should
be guarded by this condition. The patch fixes the issue.
gcc/
PR target/112707
* config/rs6000/rs6000.h (TARGET_FCTID): Define.
* config/rs6000/rs6000.md (lrintdi2): Add guard TARGET_FCTID.
* (lrounddi2): Replace TARGET_FPRND with TARGET_FCTID.
gcc/testsuite/
PR target/112707
* gcc.target/powerpc/pr112707.h: New.
* gcc.target/powerpc/pr112707-2.c: New.
* gcc.target/powerpc/pr112707-3.c: New.
* gcc.target/powerpc/pr88558-p7.c: Check fctid on ilp32 and
has_arch_ppc64 as it's now guarded by powerpc64.
* gcc.target/powerpc/pr88558-p8.c: Likewise.
* gfortran.dg/nint_p7.f90: Add powerpc64 target requirement as
lrounddi2 is now guarded by powerpc64.
patch.diff
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 22595f6ebd7..8c29ca68ccf 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -467,6 +467,8 @@ extern int rs6000_vector_align[];
#define TARGET_FCFIDUS TARGET_POPCNTD
#define TARGET_FCTIDUZ TARGET_POPCNTD
#define TARGET_FCTIWUZ TARGET_POPCNTD
+/* Enable fctid on ppc64 and powerpc476. */
+#define TARGET_FCTID (TARGET_POWERPC64 || rs6000_cpu == PROCESSOR_PPC476)
#define TARGET_CTZ TARGET_MODULO
#define TARGET_EXTSWSLI(TARGET_MODULO && TARGET_POWERPC64)
#define TARGET_MADDLD TARGET_MODULO
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 2a1b5ecfaee..3be79d49dc0 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -6718,7 +6718,7 @@ (define_insn "lrintdi2"
[(set (match_operand:DI 0 "gpc_reg_operand" "=d")
(unspec:DI [(match_operand:SFDF 1 "gpc_reg_operand" "")]
UNSPEC_FCTID))]
- "TARGET_HARD_FLOAT"
+ "TARGET_HARD_FLOAT && TARGET_FCTID"
"fctid %0,%1"
[(set_attr "type" "fp")])
@@ -6784,7 +6784,7 @@ (define_expand "lrounddi2"
(set (match_operand:DI 0 "gpc_reg_operand")
(unspec:DI [(match_dup 2)]
UNSPEC_FCTID))]
- "TARGET_HARD_FLOAT && TARGET_VSX && TARGET_FPRND"
+ "TARGET_HARD_FLOAT && TARGET_VSX && TARGET_FCTID"
{
operands[2] = gen_reg_rtx (mode);
})
diff --git a/gcc/testsuite/gcc.target/powerpc/pr112707-2.c
b/gcc/testsuite/gcc.target/powerpc/pr112707-2.c
new file mode 100644
index 000..672e00691ea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr112707-2.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mdejagnu-cpu=7450 -fno-math-errno" } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-skip-if "" { has_arch_ppc64 } } */
+/* { dg-final { scan-assembler-not {\mfctid\M} } } */
+
+/* powerpc 7450 doesn't support ppc64 (-m32 -mpowerpc64), so skips it. */
+
+#include "pr112707.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/pr112707-3.c
b/gcc/testsuite/gcc.target/powerpc/pr112707-3.c
new file mode 100644
index 000..924338fd390
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr112707-3.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fno-math-errno -mdejagnu-cpu=476fp" } */
+/* { dg-require-effective-target ilp32 } */
+
+/* powerpc 476fp has hard float enabled which is required by fctid */
+
+#include "pr112707.h"
+
+/* { dg-final { scan-assembler-times {\mfctid\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr112707.h
b/gcc/testsuite/gcc.target/powerpc/pr112707.h
new file mode 100644
index 000..e427dc6a72e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr112707.h
@@ -0,0 +1,10 @@
+long long test1 (double a)
+{
+ return __builtin_llrint (a);
+}
+
+long long test2 (float a)
+{
+ return __builtin_llrint (a);
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c
b/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c
index 3932656c5fd..2fa0b997e52 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c
@@ -6,7 +6,7 @@
#include "pr88558.h"
/* { dg-final { scan-assembler-times {\mfctid\M} 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\mfctid\M} 2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfctid\M} 2 { target { ilp32 &&
has_arch_ppc64 } } } } */
/* { dg-final { scan-assembler-times {\mfctiw\M} 2 { target lp64 } } } */
/* { dg-final { scan-assembler-times {\mfctiw\M} 4 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {\mstfiwx\M} 2 { target lp64 } } } */
diff --git
