Re: [PATCH] Fix various x86 avx512{bitalg, vpopcntdq, vbmi2} issues (PR target/83488)
Hello Julia,
On 24 Jan 14:00, Koval, Julia wrote:
> Hi,
> Fixed it. Ok for trunk?
>
> gcc/
> * config/i386/avx512bitalgintrin.h (_mm512_bitshuffle_epi64_mask,
> _mm512_mask_bitshuffle_epi64_mask, _mm256_bitshuffle_epi64_mask,
> _mm256_mask_bitshuffle_epi64_mask, _mm_bitshuffle_epi64_mask,
> _mm_mask_bitshuffle_epi64_mask): Fix type.
> * config/i386/i386-builtin-types.def (UHI_FTYPE_V2DI_V2DI_UHI,
> USI_FTYPE_V4DI_V4DI_USI): Remove.
> * config/i386/i386-builtin.def (__builtin_ia32_vpshufbitqmb512_mask,
> __builtin_ia32_vpshufbitqmb256_mask,
> __builtin_ia32_vpshufbitqmb128_mask): Fix types.
> * config/i386/i386.c (ix86_expand_args_builtin): Remove old types.
> * config/i386/sse.md (VI1_AVX512VLBW): Change types.
>
> gcc/testsuite/
> * gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c: Add -mavx512f
> -mavx512bw.
> * gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c: Add -mavx512bw.
> * gcc.target/i386/i386.exp: Fix types.
Your patch is OK for trunk. I've checked it in.
--
Thanks, K
>
> Thanks,
> Julia
>
> > -Original Message-
> > From: Kirill Yukhin [mailto:kirill.yuk...@gmail.com]
> > Sent: Saturday, January 20, 2018 11:49 AM
> > To: Koval, Julia <julia.ko...@intel.com>
> > Cc: 'Jakub Jelinek' <ja...@redhat.com>; 'Uros Bizjak' <ubiz...@gmail.com>;
> > 'GCC Patches' <gcc-patches@gcc.gnu.org>
> > Subject: Re: [PATCH] Fix various x86 avx512{bitalg, vpopcntdq, vbmi2}
> > issues (PR
> > target/83488)
> >
> > Hello Julia,
> > On 12 Jan 08:55, Koval, Julia wrote:
> > > Changelog
> > >
> > > gcc/
> > > * config/i386/avx512bitalgintrin.h (_mm512_bitshuffle_epi64_mask,
> > > _mm512_mask_bitshuffle_epi64_mask,
> > _mm256_bitshuffle_epi64_mask,
> > > _mm256_mask_bitshuffle_epi64_mask, _mm_bitshuffle_epi64_mask,
> > > _mm_mask_bitshuffle_epi64_mask): Fix type.
> > > * config/i386/i386-builtin-types.def (UHI_FTYPE_V2DI_V2DI_UHI,
> > > USI_FTYPE_V4DI_V4DI_USI): Remove.
> > > * config/i386/i386-builtin.def (__builtin_ia32_vpshufbitqmb512_mask,
> > > __builtin_ia32_vpshufbitqmb256_mask,
> > > __builtin_ia32_vpshufbitqmb128_mask): Fix types.
> > > * config/i386/i386.c (ix86_expand_args_builtin): Remove old types.
> > > * config/i386/sse.md (VI48_AVX512VLBW): Change types.
> > >
> > > gcc/testsuite/
> > > * gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c: Add -mavx512f -
> > mavx512bw.
> > > * gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c: Add -mavx512bw.
> > > * gcc.target/i386/i386.exp: Fix types.
> >
> > (define_mode_iterator VI48_AVX512VLBW
> > - [(V8DI "TARGET_AVX512BW") (V4DI "TARGET_AVX512VL")
> > - (V2DI "TARGET_AVX512VL")])
> > + [(V64QI "TARGET_AVX512BW") (V32QI "TARGET_AVX512VL")
> > + (V16QI "TARGET_AVX512VL")])
> > I'd call this iterator VI1_AVX512VLBW.
> >
> > --
> > Thanks, K
>
RE: [PATCH] Fix various x86 avx512{bitalg, vpopcntdq, vbmi2} issues (PR target/83488)
Hi,
Fixed it. Ok for trunk?
gcc/
* config/i386/avx512bitalgintrin.h (_mm512_bitshuffle_epi64_mask,
_mm512_mask_bitshuffle_epi64_mask, _mm256_bitshuffle_epi64_mask,
_mm256_mask_bitshuffle_epi64_mask, _mm_bitshuffle_epi64_mask,
_mm_mask_bitshuffle_epi64_mask): Fix type.
* config/i386/i386-builtin-types.def (UHI_FTYPE_V2DI_V2DI_UHI,
USI_FTYPE_V4DI_V4DI_USI): Remove.
* config/i386/i386-builtin.def (__builtin_ia32_vpshufbitqmb512_mask,
__builtin_ia32_vpshufbitqmb256_mask,
__builtin_ia32_vpshufbitqmb128_mask): Fix types.
* config/i386/i386.c (ix86_expand_args_builtin): Remove old types.
* config/i386/sse.md (VI1_AVX512VLBW): Change types.
gcc/testsuite/
* gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c: Add -mavx512f
-mavx512bw.
* gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c: Add -mavx512bw.
* gcc.target/i386/i386.exp: Fix types.
Thanks,
Julia
> -Original Message-
> From: Kirill Yukhin [mailto:kirill.yuk...@gmail.com]
> Sent: Saturday, January 20, 2018 11:49 AM
> To: Koval, Julia <julia.ko...@intel.com>
> Cc: 'Jakub Jelinek' <ja...@redhat.com>; 'Uros Bizjak' <ubiz...@gmail.com>;
> 'GCC Patches' <gcc-patches@gcc.gnu.org>
> Subject: Re: [PATCH] Fix various x86 avx512{bitalg, vpopcntdq, vbmi2} issues
> (PR
> target/83488)
>
> Hello Julia,
> On 12 Jan 08:55, Koval, Julia wrote:
> > Changelog
> >
> > gcc/
> > * config/i386/avx512bitalgintrin.h (_mm512_bitshuffle_epi64_mask,
> > _mm512_mask_bitshuffle_epi64_mask,
> _mm256_bitshuffle_epi64_mask,
> > _mm256_mask_bitshuffle_epi64_mask, _mm_bitshuffle_epi64_mask,
> > _mm_mask_bitshuffle_epi64_mask): Fix type.
> > * config/i386/i386-builtin-types.def (UHI_FTYPE_V2DI_V2DI_UHI,
> > USI_FTYPE_V4DI_V4DI_USI): Remove.
> > * config/i386/i386-builtin.def (__builtin_ia32_vpshufbitqmb512_mask,
> > __builtin_ia32_vpshufbitqmb256_mask,
> > __builtin_ia32_vpshufbitqmb128_mask): Fix types.
> > * config/i386/i386.c (ix86_expand_args_builtin): Remove old types.
> > * config/i386/sse.md (VI48_AVX512VLBW): Change types.
> >
> > gcc/testsuite/
> > * gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c: Add -mavx512f -
> mavx512bw.
> > * gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c: Add -mavx512bw.
> > * gcc.target/i386/i386.exp: Fix types.
>
> (define_mode_iterator VI48_AVX512VLBW
> - [(V8DI "TARGET_AVX512BW") (V4DI "TARGET_AVX512VL")
> - (V2DI "TARGET_AVX512VL")])
> + [(V64QI "TARGET_AVX512BW") (V32QI "TARGET_AVX512VL")
> + (V16QI "TARGET_AVX512VL")])
> I'd call this iterator VI1_AVX512VLBW.
>
> --
> Thanks, K
0001-bitalg-fix.patch
Description: 0001-bitalg-fix.patch
Re: [PATCH] Fix various x86 avx512{bitalg,vpopcntdq,vbmi2} issues (PR target/83488)
Hello Julia, On 12 Jan 08:55, Koval, Julia wrote: > Changelog > > gcc/ > * config/i386/avx512bitalgintrin.h (_mm512_bitshuffle_epi64_mask, > _mm512_mask_bitshuffle_epi64_mask, _mm256_bitshuffle_epi64_mask, > _mm256_mask_bitshuffle_epi64_mask, _mm_bitshuffle_epi64_mask, > _mm_mask_bitshuffle_epi64_mask): Fix type. > * config/i386/i386-builtin-types.def (UHI_FTYPE_V2DI_V2DI_UHI, > USI_FTYPE_V4DI_V4DI_USI): Remove. > * config/i386/i386-builtin.def (__builtin_ia32_vpshufbitqmb512_mask, > __builtin_ia32_vpshufbitqmb256_mask, > __builtin_ia32_vpshufbitqmb128_mask): Fix types. > * config/i386/i386.c (ix86_expand_args_builtin): Remove old types. > * config/i386/sse.md (VI48_AVX512VLBW): Change types. > > gcc/testsuite/ > * gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c: Add -mavx512f > -mavx512bw. > * gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c: Add -mavx512bw. > * gcc.target/i386/i386.exp: Fix types. (define_mode_iterator VI48_AVX512VLBW - [(V8DI "TARGET_AVX512BW") (V4DI "TARGET_AVX512VL") - (V2DI "TARGET_AVX512VL")]) + [(V64QI "TARGET_AVX512BW") (V32QI "TARGET_AVX512VL") + (V16QI "TARGET_AVX512VL")]) I'd call this iterator VI1_AVX512VLBW. -- Thanks, K
RE: [PATCH] Fix various x86 avx512{bitalg,vpopcntdq,vbmi2} issues (PR target/83488)
Changelog
gcc/
* config/i386/avx512bitalgintrin.h (_mm512_bitshuffle_epi64_mask,
_mm512_mask_bitshuffle_epi64_mask, _mm256_bitshuffle_epi64_mask,
_mm256_mask_bitshuffle_epi64_mask, _mm_bitshuffle_epi64_mask,
_mm_mask_bitshuffle_epi64_mask): Fix type.
* config/i386/i386-builtin-types.def (UHI_FTYPE_V2DI_V2DI_UHI,
USI_FTYPE_V4DI_V4DI_USI): Remove.
* config/i386/i386-builtin.def (__builtin_ia32_vpshufbitqmb512_mask,
__builtin_ia32_vpshufbitqmb256_mask,
__builtin_ia32_vpshufbitqmb128_mask): Fix types.
* config/i386/i386.c (ix86_expand_args_builtin): Remove old types.
* config/i386/sse.md (VI48_AVX512VLBW): Change types.
gcc/testsuite/
* gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c: Add -mavx512f
-mavx512bw.
* gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c: Add -mavx512bw.
* gcc.target/i386/i386.exp: Fix types.
> -Original Message-
> From: Koval, Julia
> Sent: Wednesday, January 10, 2018 11:51 AM
> To: 'Jakub Jelinek' <ja...@redhat.com>; 'Kirill Yukhin'
> <kirill.yuk...@gmail.com>; 'Uros Bizjak' <ubiz...@gmail.com>
> Cc: 'GCC Patches' <gcc-patches@gcc.gnu.org>
> Subject: RE: [PATCH] Fix various x86 avx512{bitalg,vpopcntdq,vbmi2} issues (PR
> target/83488)
>
> Hi,
>
> What do you think about changing these types to UHI_FTYPE_V16QI_V16QI_UHI
> and so on?
> In docs it is (KL, VL) = (16,128), (32,256), (64, 512) - so looks like this
> is where the
> error was from the start.
> Here is the patch.
>
> Thanks,
> Julia
>
> > -Original Message-
> > From: Koval, Julia
> > Sent: Monday, December 25, 2017 1:01 PM
> > To: Jakub Jelinek <ja...@redhat.com>; Kirill Yukhin
> <kirill.yuk...@gmail.com>;
> > Uros Bizjak <ubiz...@gmail.com>
> > Cc: GCC Patches <gcc-patches@gcc.gnu.org>
> > Subject: RE: [PATCH] Fix various x86 avx512{bitalg,vpopcntdq,vbmi2} issues
> (PR
> > target/83488)
> >
> > Thank you very much for fixing those issues.
> >
> > Note, __builtin_ia32_vpshufbitqmb{128,256,512}_mask are implemented
> > > incorrectly, can somebody from Intel handle that? The inlines in the
> > > intrinsic header look correct, but the builtins aren't and what's even
> > > worse
> > > is that the define_insns are wrong too. According to the documentation
> > > and inline fn, the intrinsics have an __mmask{16,32,64} input mask and
> > > also __mmask{16,32,64} output mask. The builtins use
> > > UHI_FTYPE_V2DI_V2DI_UHI
> > > USI_FTYPE_V4DI_V4DI_USI
> > > UQI_FTYPE_V8DI_V8DI_UQI
> > > types (first two are correct, the last one is wrong, should have been
> > > UDI_FTYPE_V8DI_V8DI_UDI), and the define_insn has:
> > > (set (match_operand:QI 0 ("register_operand") ("=Yk"))
> > > (and:QI (unspec:QI [
> > > (match_operand:V2DI 1 ("register_operand") ("v"))
> > > (match_operand:V2DI 2 ("nonimmediate_operand")
> > > ("vm"))
> > > ] 214)
> > > (match_operand:QI 3 ("register_operand") ("Yk"
> > > (incorrect, should use :HI result and :HI mask input),
> > > (set (match_operand:QI 0 ("register_operand") ("=Yk"))
> > > (and:QI (unspec:QI [
> > > (match_operand:V4DI 1 ("register_operand") ("v"))
> > > (match_operand:V4DI 2 ("nonimmediate_operand")
> > > ("vm"))
> > > ] 214)
> > > (match_operand:QI 3 ("register_operand") ("Yk"
> > > (incorrect, should use :SI result and :SI mask input),
> > > (set (match_operand:QI 0 ("register_operand") ("=Yk"))
> > > (and:QI (unspec:QI [
> > > (match_operand:V8DI 1 ("register_operand") ("v"))
> > > (match_operand:V8DI 2 ("nonimmediate_operand")
> > > ("vm"))
> > > ] 214)
> > > (match_operand:QI 3 ("register_operand") ("Yk"
> > > (incorrect, should use :DI result and :DI mask input). Similarly the
> > > non-masked patterns, where just the result is incorrect, not the operand 3
> > > which doesn't exist). I'll file a PR to track this.
> >
> > I'll fix that.
> >
> > Thanks,
> &g
RE: [PATCH] Fix various x86 avx512{bitalg,vpopcntdq,vbmi2} issues (PR target/83488)
Hi,
What do you think about changing these types to UHI_FTYPE_V16QI_V16QI_UHI and
so on?
In docs it is (KL, VL) = (16,128), (32,256), (64, 512) - so looks like this is
where the error was from the start.
Here is the patch.
Thanks,
Julia
> -Original Message-
> From: Koval, Julia
> Sent: Monday, December 25, 2017 1:01 PM
> To: Jakub Jelinek <ja...@redhat.com>; Kirill Yukhin <kirill.yuk...@gmail.com>;
> Uros Bizjak <ubiz...@gmail.com>
> Cc: GCC Patches <gcc-patches@gcc.gnu.org>
> Subject: RE: [PATCH] Fix various x86 avx512{bitalg,vpopcntdq,vbmi2} issues (PR
> target/83488)
>
> Thank you very much for fixing those issues.
>
> Note, __builtin_ia32_vpshufbitqmb{128,256,512}_mask are implemented
> > incorrectly, can somebody from Intel handle that? The inlines in the
> > intrinsic header look correct, but the builtins aren't and what's even worse
> > is that the define_insns are wrong too. According to the documentation
> > and inline fn, the intrinsics have an __mmask{16,32,64} input mask and
> > also __mmask{16,32,64} output mask. The builtins use
> > UHI_FTYPE_V2DI_V2DI_UHI
> > USI_FTYPE_V4DI_V4DI_USI
> > UQI_FTYPE_V8DI_V8DI_UQI
> > types (first two are correct, the last one is wrong, should have been
> > UDI_FTYPE_V8DI_V8DI_UDI), and the define_insn has:
> > (set (match_operand:QI 0 ("register_operand") ("=Yk"))
> > (and:QI (unspec:QI [
> > (match_operand:V2DI 1 ("register_operand") ("v"))
> > (match_operand:V2DI 2 ("nonimmediate_operand")
> > ("vm"))
> > ] 214)
> > (match_operand:QI 3 ("register_operand") ("Yk"
> > (incorrect, should use :HI result and :HI mask input),
> > (set (match_operand:QI 0 ("register_operand") ("=Yk"))
> > (and:QI (unspec:QI [
> > (match_operand:V4DI 1 ("register_operand") ("v"))
> > (match_operand:V4DI 2 ("nonimmediate_operand")
> > ("vm"))
> > ] 214)
> > (match_operand:QI 3 ("register_operand") ("Yk"
> > (incorrect, should use :SI result and :SI mask input),
> > (set (match_operand:QI 0 ("register_operand") ("=Yk"))
> > (and:QI (unspec:QI [
> > (match_operand:V8DI 1 ("register_operand") ("v"))
> > (match_operand:V8DI 2 ("nonimmediate_operand")
> > ("vm"))
> > ] 214)
> > (match_operand:QI 3 ("register_operand") ("Yk"
> > (incorrect, should use :DI result and :DI mask input). Similarly the
> > non-masked patterns, where just the result is incorrect, not the operand 3
> > which doesn't exist). I'll file a PR to track this.
>
> I'll fix that.
>
> Thanks,
> Julia
>
> > -Original Message-
> > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> > ow...@gcc.gnu.org] On Behalf Of Jakub Jelinek
> > Sent: Friday, December 22, 2017 7:40 PM
> > To: Kirill Yukhin <kirill.yuk...@gmail.com>; Uros Bizjak <ubiz...@gmail.com>
> > Cc: Koval, Julia <julia.ko...@intel.com>; GCC Patches > patc...@gcc.gnu.org>
> > Subject: [PATCH] Fix various x86 avx512{bitalg,vpopcntdq,vbmi2} issues (PR
> > target/83488)
> >
> > On Fri, Dec 22, 2017 at 03:38:03PM +0300, Kirill Yukhin wrote:
> > > Hello, Julia,
> > > On 12 Nov 12:51, Koval, Julia wrote:
> > > > Hi, this patch enables AVX512BITALG and AVX512VPOPCNTDQ instructions
> > from
> > https://software.intel.com/sites/default/files/managed/c5/15/architecture-
> > instruction-set-extensions-programming-reference.pdf. Ok for trunk?
> > > OK for trunk. I've checked it in.
> >
> > Unfortunately, there are various issues in this patch as well as earlier
> > vbmi2 support.
> >
> > 1) as for various AVX512BITALG and AVX512VPOPCNTDQ builtins we need not
> > just
> > that ISA, but also AVX512VL or AVX512BW or both, these two ISAs need to be
> > moved over from ix86_isa_flags2 to ix86_isa_flags.
> > 2) while the PDF doesn't say that explicitly, for builtins that map to
> > hw insns that don't have AVX512BW listed as CPUID, if they use (or set)
> > 32-bit or 64-bit %k? mask register, we need AVX512BW for the builtin,
> > because otherwise we get ICEs when LRA is trying to load
RE: [PATCH] Fix various x86 avx512{bitalg,vpopcntdq,vbmi2} issues (PR target/83488)
Thank you very much for fixing those issues.
Note, __builtin_ia32_vpshufbitqmb{128,256,512}_mask are implemented
> incorrectly, can somebody from Intel handle that? The inlines in the
> intrinsic header look correct, but the builtins aren't and what's even worse
> is that the define_insns are wrong too. According to the documentation
> and inline fn, the intrinsics have an __mmask{16,32,64} input mask and
> also __mmask{16,32,64} output mask. The builtins use
> UHI_FTYPE_V2DI_V2DI_UHI
> USI_FTYPE_V4DI_V4DI_USI
> UQI_FTYPE_V8DI_V8DI_UQI
> types (first two are correct, the last one is wrong, should have been
> UDI_FTYPE_V8DI_V8DI_UDI), and the define_insn has:
> (set (match_operand:QI 0 ("register_operand") ("=Yk"))
> (and:QI (unspec:QI [
> (match_operand:V2DI 1 ("register_operand") ("v"))
> (match_operand:V2DI 2 ("nonimmediate_operand") ("vm"))
> ] 214)
> (match_operand:QI 3 ("register_operand") ("Yk"
> (incorrect, should use :HI result and :HI mask input),
> (set (match_operand:QI 0 ("register_operand") ("=Yk"))
> (and:QI (unspec:QI [
> (match_operand:V4DI 1 ("register_operand") ("v"))
> (match_operand:V4DI 2 ("nonimmediate_operand") ("vm"))
> ] 214)
> (match_operand:QI 3 ("register_operand") ("Yk"
> (incorrect, should use :SI result and :SI mask input),
> (set (match_operand:QI 0 ("register_operand") ("=Yk"))
> (and:QI (unspec:QI [
> (match_operand:V8DI 1 ("register_operand") ("v"))
> (match_operand:V8DI 2 ("nonimmediate_operand") ("vm"))
> ] 214)
> (match_operand:QI 3 ("register_operand") ("Yk"
> (incorrect, should use :DI result and :DI mask input). Similarly the
> non-masked patterns, where just the result is incorrect, not the operand 3
> which doesn't exist). I'll file a PR to track this.
I'll fix that.
Thanks,
Julia
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Jakub Jelinek
> Sent: Friday, December 22, 2017 7:40 PM
> To: Kirill Yukhin ; Uros Bizjak
> Cc: Koval, Julia ; GCC Patches patc...@gcc.gnu.org>
> Subject: [PATCH] Fix various x86 avx512{bitalg,vpopcntdq,vbmi2} issues (PR
> target/83488)
>
> On Fri, Dec 22, 2017 at 03:38:03PM +0300, Kirill Yukhin wrote:
> > Hello, Julia,
> > On 12 Nov 12:51, Koval, Julia wrote:
> > > Hi, this patch enables AVX512BITALG and AVX512VPOPCNTDQ instructions
> from
> https://software.intel.com/sites/default/files/managed/c5/15/architecture-
> instruction-set-extensions-programming-reference.pdf. Ok for trunk?
> > OK for trunk. I've checked it in.
>
> Unfortunately, there are various issues in this patch as well as earlier
> vbmi2 support.
>
> 1) as for various AVX512BITALG and AVX512VPOPCNTDQ builtins we need not
> just
> that ISA, but also AVX512VL or AVX512BW or both, these two ISAs need to be
> moved over from ix86_isa_flags2 to ix86_isa_flags.
> 2) while the PDF doesn't say that explicitly, for builtins that map to
> hw insns that don't have AVX512BW listed as CPUID, if they use (or set)
> 32-bit or 64-bit %k? mask register, we need AVX512BW for the builtin,
> because otherwise we get ICEs when LRA is trying to load (or store) the
> 32-bit or 64-bit %k? mask register. Most of the intrin*.h headers got the
> requirements right (but see below), but not i386-builtins.def, so using
> intrin headers was fine, but using builtins directly resulted in numerous
> ICEs.
> 3) some builtins where the define_insns were requiring AVX512VL didn't have
> that requirement on the builtins, so again, numerous ICEs when using the
> builtins directly.
> 4) for some builtins the intrin headers were uselessly requiring avx512bw
> even when it wasn't needed at all (either when they don't have any mask
> argument or when they have an 8-bit or 16-bit only mask).
> 5) the def_builtin/ix86_expand_builtin stuff didn't handle
> OPTION_MASK_ISA_something | OPTION_MASK_ISA_AVX512BW or
> OPTION_MASK_ISA_something | OPTION_MASK_ISA_AVX512VL |
> OPTION_MASK_ISA_AVX512BW
> right (while the VL is handled there as "require the other ISAs and VL",
> for BW we don't do that). There were some hacks for GFNI and VPCLMULQDQ,
> but incomplete and I think it is far better to treat BW and F like VL
> instead of those 2. Plus we can improve stuff in def_builtin by only doing
> this special handling if the whole mask isn't a single bit mask, then there
> is no reason for just not requiring the isa.
> 6) in i386-common.c I've noticed a major problem, for the new avx512
> extensions that live in flags2 rather than flags (after this patch it is
> just avx5124fmaps and avx512vnniw), doing say -mavx5124fmaps -mno-avx512f
> would properly
Re: [PATCH] Fix various x86 avx512{bitalg,vpopcntdq,vbmi2} issues (PR target/83488)
On Fri, Dec 22, 2017 at 07:40:11PM +0100, Jakub Jelinek wrote: > Starting bootstrap/regtest on x86_64-linux and i686-linux right now, ok for > trunk if it passes? Bootstrapped/regtested successfully on both. Jakub
