RE: [PATCH] RISC-V: Fix vector tuple intrinsic
Committed, thanks Kito and Juzhe. Pan -Original Message- From: Gcc-patches On Behalf Of Kito Cheng via Gcc-patches Sent: Wednesday, July 26, 2023 4:25 PM To: juzhe.zh...@rivai.ai Cc: Li Xu ; gcc-patches ; palmer Subject: Re: [PATCH] RISC-V: Fix vector tuple intrinsic OK, thanks On Wed, Jul 26, 2023 at 4:22 PM juzhe.zh...@rivai.ai wrote: > > LGTM from my side. > > It should be V3 though, never mind. > No need to send V3 again. > > Give kito a chance chime in for more comments. > > > juzhe.zh...@rivai.ai > > > From: Li Xu > Date: 2023-07-26 16:18 > To: gcc-patches > CC: kito.cheng; palmer; juzhe.zhong; Li Xu > Subject: [PATCH] RISC-V: Fix vector tuple intrinsic > Consider this following case: > void test_vsoxseg3ei32_v_i32mf2x3(int32_t *base, vuint32mf2_t bindex, > vint32mf2x3_t v_tuple, size_t vl) { > return __riscv_vsoxseg3ei32_v_i32mf2x3(base, bindex, v_tuple, vl); > } > > Compiler failed with: > test.c:19:1: internal compiler error: in vl_vtype_info, at > config/riscv/riscv-vsetvl.cc:1679 >19 | } > | ^ > 0x1439ec2 riscv_vector::vl_vtype_info::vl_vtype_info(riscv_vector::avl_info, > unsigned char, riscv_vector::vlmul_type, unsigned char, bool, bool) > ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:1679 > 0x143f788 get_vl_vtype_info > ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:807 > 0x143f788 riscv_vector::vector_insn_info::parse_insn(rtl_ssa::insn_info*) > ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:1843 > 0x1440371 riscv_vector::vector_infos_manager::vector_infos_manager() > ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:2350 > 0x14407ee pass_vsetvl::init() > ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:4581 > 0x14471cf pass_vsetvl::execute(function*) > ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:4716 > > gcc/ChangeLog: > > * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change > scalar type to float16, eliminate warning. > (vfloat16mf4x3_t): Ditto. > (vfloat16mf4x4_t): Ditto. > (vfloat16mf4x5_t): Ditto. > (vfloat16mf4x6_t): Ditto. > (vfloat16mf4x7_t): Ditto. > (vfloat16mf4x8_t): Ditto. > (vfloat16mf2x2_t): Ditto. > (vfloat16mf2x3_t): Ditto. > (vfloat16mf2x4_t): Ditto. > (vfloat16mf2x5_t): Ditto. > (vfloat16mf2x6_t): Ditto. > (vfloat16mf2x7_t): Ditto. > (vfloat16mf2x8_t): Ditto. > (vfloat16m1x2_t): Ditto. > (vfloat16m1x3_t): Ditto. > (vfloat16m1x4_t): Ditto. > (vfloat16m1x5_t): Ditto. > (vfloat16m1x6_t): Ditto. > (vfloat16m1x7_t): Ditto. > (vfloat16m1x8_t): Ditto. > (vfloat16m2x2_t): Ditto. > (vfloat16m2x3_t): Ditto. > (vfloat16m2x4_t): Ditto. > (vfloat16m4x2_t): Ditto. > * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T. > * config/riscv/vector.md: add tuple mode in attr sew. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/rvv/base/tuple-intrinsic.c: New test. > --- > gcc/config/riscv/riscv-vector-builtins.def| 50 +-- > gcc/config/riscv/vector-iterators.md | 1 + > gcc/config/riscv/vector.md| 1 + > .../riscv/rvv/base/tuple-intrinsic.c | 23 + > 4 files changed, 50 insertions(+), 25 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/tuple-intrinsic.c > > diff --git a/gcc/config/riscv/riscv-vector-builtins.def > b/gcc/config/riscv/riscv-vector-builtins.def > index 0e49480703b..6661629aad8 100644 > --- a/gcc/config/riscv/riscv-vector-builtins.def > +++ b/gcc/config/riscv/riscv-vector-builtins.def > @@ -441,47 +441,47 @@ DEF_RVV_TYPE (vuint64m8_t, 16, __rvv_uint64m8_t, > uint64, RVVM8DI, _u64m8, _u64, > DEF_RVV_TYPE (vfloat16mf4_t, 18, __rvv_float16mf4_t, float16, RVVMF4HF, > _f16mf4, > _f16, _e16mf4) > /* Define tuple types for SEW = 16, LMUL = MF4. */ > -DEF_RVV_TUPLE_TYPE (vfloat16mf4x2_t, 20, __rvv_float16mf4x2_t, > vfloat16mf4_t, float, 2, _f16mf4x2) > -DEF_RVV_TUPLE_TYPE (vfloat16mf4x3_t, 20, __rvv_float16mf4x3_t, > vfloat16mf4_t, float, 3, _f16mf4x3) > -DEF_RVV_TUPLE_TYPE (vfloat16mf4x4_t, 20, __rvv_float16mf4x4_t, > vfloat16mf4_t, float, 4, _f16mf4x4) > -DEF_RVV_TUPLE_TYPE (vfloat16mf4x5_t, 20, __rvv_float16mf4x5_t, > vfloat16mf4_t, float, 5, _f16mf4x5) > -DEF_RVV_TUPLE_TYPE (vfloat16mf4x6_t, 20, __rvv_float16mf4x6_t, > vfloat16mf4_t, float, 6, _f16mf4x6) > -DEF_RVV_TUPLE_TYPE (vfloat16mf4x7_t, 20, __rvv_float16mf4x7_t, > vfloat16mf4_t, float, 7, _f16mf4x7) > -DEF_RVV_TUPLE
Re: [PATCH] RISC-V: Fix vector tuple intrinsic
OK, thanks On Wed, Jul 26, 2023 at 4:22 PM juzhe.zh...@rivai.ai wrote: > > LGTM from my side. > > It should be V3 though, never mind. > No need to send V3 again. > > Give kito a chance chime in for more comments. > > > juzhe.zh...@rivai.ai > > > From: Li Xu > Date: 2023-07-26 16:18 > To: gcc-patches > CC: kito.cheng; palmer; juzhe.zhong; Li Xu > Subject: [PATCH] RISC-V: Fix vector tuple intrinsic > Consider this following case: > void test_vsoxseg3ei32_v_i32mf2x3(int32_t *base, vuint32mf2_t bindex, > vint32mf2x3_t v_tuple, size_t vl) { > return __riscv_vsoxseg3ei32_v_i32mf2x3(base, bindex, v_tuple, vl); > } > > Compiler failed with: > test.c:19:1: internal compiler error: in vl_vtype_info, at > config/riscv/riscv-vsetvl.cc:1679 >19 | } > | ^ > 0x1439ec2 riscv_vector::vl_vtype_info::vl_vtype_info(riscv_vector::avl_info, > unsigned char, riscv_vector::vlmul_type, unsigned char, bool, bool) > ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:1679 > 0x143f788 get_vl_vtype_info > ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:807 > 0x143f788 riscv_vector::vector_insn_info::parse_insn(rtl_ssa::insn_info*) > ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:1843 > 0x1440371 riscv_vector::vector_infos_manager::vector_infos_manager() > ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:2350 > 0x14407ee pass_vsetvl::init() > ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:4581 > 0x14471cf pass_vsetvl::execute(function*) > ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:4716 > > gcc/ChangeLog: > > * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change > scalar type to float16, eliminate warning. > (vfloat16mf4x3_t): Ditto. > (vfloat16mf4x4_t): Ditto. > (vfloat16mf4x5_t): Ditto. > (vfloat16mf4x6_t): Ditto. > (vfloat16mf4x7_t): Ditto. > (vfloat16mf4x8_t): Ditto. > (vfloat16mf2x2_t): Ditto. > (vfloat16mf2x3_t): Ditto. > (vfloat16mf2x4_t): Ditto. > (vfloat16mf2x5_t): Ditto. > (vfloat16mf2x6_t): Ditto. > (vfloat16mf2x7_t): Ditto. > (vfloat16mf2x8_t): Ditto. > (vfloat16m1x2_t): Ditto. > (vfloat16m1x3_t): Ditto. > (vfloat16m1x4_t): Ditto. > (vfloat16m1x5_t): Ditto. > (vfloat16m1x6_t): Ditto. > (vfloat16m1x7_t): Ditto. > (vfloat16m1x8_t): Ditto. > (vfloat16m2x2_t): Ditto. > (vfloat16m2x3_t): Ditto. > (vfloat16m2x4_t): Ditto. > (vfloat16m4x2_t): Ditto. > * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T. > * config/riscv/vector.md: add tuple mode in attr sew. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/rvv/base/tuple-intrinsic.c: New test. > --- > gcc/config/riscv/riscv-vector-builtins.def| 50 +-- > gcc/config/riscv/vector-iterators.md | 1 + > gcc/config/riscv/vector.md| 1 + > .../riscv/rvv/base/tuple-intrinsic.c | 23 + > 4 files changed, 50 insertions(+), 25 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/tuple-intrinsic.c > > diff --git a/gcc/config/riscv/riscv-vector-builtins.def > b/gcc/config/riscv/riscv-vector-builtins.def > index 0e49480703b..6661629aad8 100644 > --- a/gcc/config/riscv/riscv-vector-builtins.def > +++ b/gcc/config/riscv/riscv-vector-builtins.def > @@ -441,47 +441,47 @@ DEF_RVV_TYPE (vuint64m8_t, 16, __rvv_uint64m8_t, > uint64, RVVM8DI, _u64m8, _u64, > DEF_RVV_TYPE (vfloat16mf4_t, 18, __rvv_float16mf4_t, float16, RVVMF4HF, > _f16mf4, > _f16, _e16mf4) > /* Define tuple types for SEW = 16, LMUL = MF4. */ > -DEF_RVV_TUPLE_TYPE (vfloat16mf4x2_t, 20, __rvv_float16mf4x2_t, > vfloat16mf4_t, float, 2, _f16mf4x2) > -DEF_RVV_TUPLE_TYPE (vfloat16mf4x3_t, 20, __rvv_float16mf4x3_t, > vfloat16mf4_t, float, 3, _f16mf4x3) > -DEF_RVV_TUPLE_TYPE (vfloat16mf4x4_t, 20, __rvv_float16mf4x4_t, > vfloat16mf4_t, float, 4, _f16mf4x4) > -DEF_RVV_TUPLE_TYPE (vfloat16mf4x5_t, 20, __rvv_float16mf4x5_t, > vfloat16mf4_t, float, 5, _f16mf4x5) > -DEF_RVV_TUPLE_TYPE (vfloat16mf4x6_t, 20, __rvv_float16mf4x6_t, > vfloat16mf4_t, float, 6, _f16mf4x6) > -DEF_RVV_TUPLE_TYPE (vfloat16mf4x7_t, 20, __rvv_float16mf4x7_t, > vfloat16mf4_t, float, 7, _f16mf4x7) > -DEF_RVV_TUPLE_TYPE (vfloat16mf4x8_t, 20, __rvv_float16mf4x8_t, > vfloat16mf4_t, float, 8, _f16mf4x8) > +DEF_RVV_TUPLE_TYPE (vfloat16mf4x2_t, 20, __rvv_float16mf4x2_t, > vfloat16mf4_t, float16, 2, _f16mf4x2) > +DEF_RVV_TUPLE_TYPE (vfloat16mf4x3_t, 20, __rvv_float16mf4x3_t, > vfloat16mf4_t, float16, 3, _f16mf4x3) > +DEF_RVV_TUPLE_TYPE (vfloat16mf4x4_t, 20, __rvv_float16mf4x4_t, > vfloat16mf4_t, float16, 4, _f16mf4x4) > +DEF_RVV_TUPLE_TYPE (vfloat16mf4x5_t, 20, __rvv_float16mf4x5_t, > vfloat16mf4_t, float16, 5, _f16mf4x5) > +DEF_RVV_TUPLE_TYPE (vfloat16mf4x6_t, 20, __rvv_float16mf4x6_t, > vfloat16mf4_t, float16, 6,
Re: [PATCH] RISC-V: Fix vector tuple intrinsic
LGTM from my side. It should be V3 though, never mind. No need to send V3 again. Give kito a chance chime in for more comments. juzhe.zh...@rivai.ai From: Li Xu Date: 2023-07-26 16:18 To: gcc-patches CC: kito.cheng; palmer; juzhe.zhong; Li Xu Subject: [PATCH] RISC-V: Fix vector tuple intrinsic Consider this following case: void test_vsoxseg3ei32_v_i32mf2x3(int32_t *base, vuint32mf2_t bindex, vint32mf2x3_t v_tuple, size_t vl) { return __riscv_vsoxseg3ei32_v_i32mf2x3(base, bindex, v_tuple, vl); } Compiler failed with: test.c:19:1: internal compiler error: in vl_vtype_info, at config/riscv/riscv-vsetvl.cc:1679 19 | } | ^ 0x1439ec2 riscv_vector::vl_vtype_info::vl_vtype_info(riscv_vector::avl_info, unsigned char, riscv_vector::vlmul_type, unsigned char, bool, bool) ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:1679 0x143f788 get_vl_vtype_info ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:807 0x143f788 riscv_vector::vector_insn_info::parse_insn(rtl_ssa::insn_info*) ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:1843 0x1440371 riscv_vector::vector_infos_manager::vector_infos_manager() ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:2350 0x14407ee pass_vsetvl::init() ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:4581 0x14471cf pass_vsetvl::execute(function*) ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:4716 gcc/ChangeLog: * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change scalar type to float16, eliminate warning. (vfloat16mf4x3_t): Ditto. (vfloat16mf4x4_t): Ditto. (vfloat16mf4x5_t): Ditto. (vfloat16mf4x6_t): Ditto. (vfloat16mf4x7_t): Ditto. (vfloat16mf4x8_t): Ditto. (vfloat16mf2x2_t): Ditto. (vfloat16mf2x3_t): Ditto. (vfloat16mf2x4_t): Ditto. (vfloat16mf2x5_t): Ditto. (vfloat16mf2x6_t): Ditto. (vfloat16mf2x7_t): Ditto. (vfloat16mf2x8_t): Ditto. (vfloat16m1x2_t): Ditto. (vfloat16m1x3_t): Ditto. (vfloat16m1x4_t): Ditto. (vfloat16m1x5_t): Ditto. (vfloat16m1x6_t): Ditto. (vfloat16m1x7_t): Ditto. (vfloat16m1x8_t): Ditto. (vfloat16m2x2_t): Ditto. (vfloat16m2x3_t): Ditto. (vfloat16m2x4_t): Ditto. (vfloat16m4x2_t): Ditto. * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T. * config/riscv/vector.md: add tuple mode in attr sew. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/tuple-intrinsic.c: New test. --- gcc/config/riscv/riscv-vector-builtins.def| 50 +-- gcc/config/riscv/vector-iterators.md | 1 + gcc/config/riscv/vector.md| 1 + .../riscv/rvv/base/tuple-intrinsic.c | 23 + 4 files changed, 50 insertions(+), 25 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/tuple-intrinsic.c diff --git a/gcc/config/riscv/riscv-vector-builtins.def b/gcc/config/riscv/riscv-vector-builtins.def index 0e49480703b..6661629aad8 100644 --- a/gcc/config/riscv/riscv-vector-builtins.def +++ b/gcc/config/riscv/riscv-vector-builtins.def @@ -441,47 +441,47 @@ DEF_RVV_TYPE (vuint64m8_t, 16, __rvv_uint64m8_t, uint64, RVVM8DI, _u64m8, _u64, DEF_RVV_TYPE (vfloat16mf4_t, 18, __rvv_float16mf4_t, float16, RVVMF4HF, _f16mf4, _f16, _e16mf4) /* Define tuple types for SEW = 16, LMUL = MF4. */ -DEF_RVV_TUPLE_TYPE (vfloat16mf4x2_t, 20, __rvv_float16mf4x2_t, vfloat16mf4_t, float, 2, _f16mf4x2) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x3_t, 20, __rvv_float16mf4x3_t, vfloat16mf4_t, float, 3, _f16mf4x3) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x4_t, 20, __rvv_float16mf4x4_t, vfloat16mf4_t, float, 4, _f16mf4x4) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x5_t, 20, __rvv_float16mf4x5_t, vfloat16mf4_t, float, 5, _f16mf4x5) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x6_t, 20, __rvv_float16mf4x6_t, vfloat16mf4_t, float, 6, _f16mf4x6) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x7_t, 20, __rvv_float16mf4x7_t, vfloat16mf4_t, float, 7, _f16mf4x7) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x8_t, 20, __rvv_float16mf4x8_t, vfloat16mf4_t, float, 8, _f16mf4x8) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x2_t, 20, __rvv_float16mf4x2_t, vfloat16mf4_t, float16, 2, _f16mf4x2) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x3_t, 20, __rvv_float16mf4x3_t, vfloat16mf4_t, float16, 3, _f16mf4x3) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x4_t, 20, __rvv_float16mf4x4_t, vfloat16mf4_t, float16, 4, _f16mf4x4) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x5_t, 20, __rvv_float16mf4x5_t, vfloat16mf4_t, float16, 5, _f16mf4x5) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x6_t, 20, __rvv_float16mf4x6_t, vfloat16mf4_t, float16, 6, _f16mf4x6) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x7_t, 20, __rvv_float16mf4x7_t, vfloat16mf4_t, float16, 7, _f16mf4x7) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x8_t, 20, __rvv_float16mf4x8_t, vfloat16mf4_t, float16, 8, _f16mf4x8) /* LMUL = 1/2. */ DEF_RVV_TYPE (vfloat16mf2_t, 18, __rvv_float16mf2_t, float16, RVVMF2HF, _f16mf2,
RE: [PATCH] RISC-V: Fix vector tuple intrinsic
Thanks a lot. I just fw one email about the write-after-approval steps. Pan -Original Message- From: Gcc-patches On Behalf Of juzhe.zh...@rivai.ai Sent: Wednesday, July 26, 2023 12:22 PM To: Li Xu ; gcc-patches Cc: kito.cheng ; palmer ; Li Xu Subject: Re: [PATCH] RISC-V: Fix vector tuple intrinsic Thanks a lot for testing and fixing RVV API。 Could you add a simple float16 tuple api test ? I known the API is so big that we can't add all api tests into testsuite but adding a simple case will be nice. By the way, do you have write access? juzhe.zh...@rivai.ai From: Li Xu Date: 2023-07-26 12:04 To: gcc-patches CC: kito.cheng; palmer; juzhe.zhong; Li Xu Subject: [PATCH] RISC-V: Fix vector tuple intrinsic Consider this following case: void test_vsoxseg3ei32_v_i32mf2x3(int32_t *base, vuint32mf2_t bindex, vint32mf2x3_t v_tuple, size_t vl) { return __riscv_vsoxseg3ei32_v_i32mf2x3(base, bindex, v_tuple, vl); } Compiler failed with: test.c:19:1: internal compiler error: in vl_vtype_info, at config/riscv/riscv-vsetvl.cc:1679 19 | } | ^ 0x1439ec2 riscv_vector::vl_vtype_info::vl_vtype_info(riscv_vector::avl_info, unsigned char, riscv_vector::vlmul_type, unsigned char, bool, bool) ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:1679 0x143f788 get_vl_vtype_info ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:807 0x143f788 riscv_vector::vector_insn_info::parse_insn(rtl_ssa::insn_info*) ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:1843 0x1440371 riscv_vector::vector_infos_manager::vector_infos_manager() ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:2350 0x14407ee pass_vsetvl::init() ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:4581 0x14471cf pass_vsetvl::execute(function*) ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:4716 gcc/ChangeLog: * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change scalar type to float16, eliminate warning. (vfloat16mf4x3_t): Ditto. (vfloat16mf4x4_t): Ditto. (vfloat16mf4x5_t): Ditto. (vfloat16mf4x6_t): Ditto. (vfloat16mf4x7_t): Ditto. (vfloat16mf4x8_t): Ditto. (vfloat16mf2x2_t): Ditto. (vfloat16mf2x3_t): Ditto. (vfloat16mf2x4_t): Ditto. (vfloat16mf2x5_t): Ditto. (vfloat16mf2x6_t): Ditto. (vfloat16mf2x7_t): Ditto. (vfloat16mf2x8_t): Ditto. (vfloat16m1x2_t): Ditto. (vfloat16m1x3_t): Ditto. (vfloat16m1x4_t): Ditto. (vfloat16m1x5_t): Ditto. (vfloat16m1x6_t): Ditto. (vfloat16m1x7_t): Ditto. (vfloat16m1x8_t): Ditto. (vfloat16m2x2_t): Ditto. (vfloat16m2x3_t): Ditto. (vfloat16m2x4_t): Ditto. (vfloat16m4x2_t): Ditto. * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T. * config/riscv/vector.md: add tuple mode in attr sew. --- gcc/config/riscv/riscv-vector-builtins.def | 50 +++--- gcc/config/riscv/vector-iterators.md | 1 + gcc/config/riscv/vector.md | 1 + 3 files changed, 27 insertions(+), 25 deletions(-) diff --git a/gcc/config/riscv/riscv-vector-builtins.def b/gcc/config/riscv/riscv-vector-builtins.def index 0e49480703b..6661629aad8 100644 --- a/gcc/config/riscv/riscv-vector-builtins.def +++ b/gcc/config/riscv/riscv-vector-builtins.def @@ -441,47 +441,47 @@ DEF_RVV_TYPE (vuint64m8_t, 16, __rvv_uint64m8_t, uint64, RVVM8DI, _u64m8, _u64, DEF_RVV_TYPE (vfloat16mf4_t, 18, __rvv_float16mf4_t, float16, RVVMF4HF, _f16mf4, _f16, _e16mf4) /* Define tuple types for SEW = 16, LMUL = MF4. */ -DEF_RVV_TUPLE_TYPE (vfloat16mf4x2_t, 20, __rvv_float16mf4x2_t, vfloat16mf4_t, float, 2, _f16mf4x2) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x3_t, 20, __rvv_float16mf4x3_t, vfloat16mf4_t, float, 3, _f16mf4x3) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x4_t, 20, __rvv_float16mf4x4_t, vfloat16mf4_t, float, 4, _f16mf4x4) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x5_t, 20, __rvv_float16mf4x5_t, vfloat16mf4_t, float, 5, _f16mf4x5) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x6_t, 20, __rvv_float16mf4x6_t, vfloat16mf4_t, float, 6, _f16mf4x6) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x7_t, 20, __rvv_float16mf4x7_t, vfloat16mf4_t, float, 7, _f16mf4x7) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x8_t, 20, __rvv_float16mf4x8_t, vfloat16mf4_t, float, 8, _f16mf4x8) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x2_t, 20, __rvv_float16mf4x2_t, vfloat16mf4_t, float16, 2, _f16mf4x2) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x3_t, 20, __rvv_float16mf4x3_t, vfloat16mf4_t, float16, 3, _f16mf4x3) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x4_t, 20, __rvv_float16mf4x4_t, vfloat16mf4_t, float16, 4, _f16mf4x4) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x5_t, 20, __rvv_float16mf4x5_t, vfloat16mf4_t, float16, 5, _f16mf4x5) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x6_t, 20, __rvv_float16mf4x6_t, vfloat16mf4_t, float16, 6, _f16mf4x6) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x7_t, 20, __rvv_float16mf4x7_t, vfloat16mf4_t, float16, 7, _f16mf4x7
Re: [PATCH] RISC-V: Fix vector tuple intrinsic
Thanks a lot for testing and fixing RVV API。 Could you add a simple float16 tuple api test ? I known the API is so big that we can't add all api tests into testsuite but adding a simple case will be nice. By the way, do you have write access? juzhe.zh...@rivai.ai From: Li Xu Date: 2023-07-26 12:04 To: gcc-patches CC: kito.cheng; palmer; juzhe.zhong; Li Xu Subject: [PATCH] RISC-V: Fix vector tuple intrinsic Consider this following case: void test_vsoxseg3ei32_v_i32mf2x3(int32_t *base, vuint32mf2_t bindex, vint32mf2x3_t v_tuple, size_t vl) { return __riscv_vsoxseg3ei32_v_i32mf2x3(base, bindex, v_tuple, vl); } Compiler failed with: test.c:19:1: internal compiler error: in vl_vtype_info, at config/riscv/riscv-vsetvl.cc:1679 19 | } | ^ 0x1439ec2 riscv_vector::vl_vtype_info::vl_vtype_info(riscv_vector::avl_info, unsigned char, riscv_vector::vlmul_type, unsigned char, bool, bool) ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:1679 0x143f788 get_vl_vtype_info ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:807 0x143f788 riscv_vector::vector_insn_info::parse_insn(rtl_ssa::insn_info*) ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:1843 0x1440371 riscv_vector::vector_infos_manager::vector_infos_manager() ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:2350 0x14407ee pass_vsetvl::init() ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:4581 0x14471cf pass_vsetvl::execute(function*) ../.././riscv-gcc/gcc/config/riscv/riscv-vsetvl.cc:4716 gcc/ChangeLog: * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change scalar type to float16, eliminate warning. (vfloat16mf4x3_t): Ditto. (vfloat16mf4x4_t): Ditto. (vfloat16mf4x5_t): Ditto. (vfloat16mf4x6_t): Ditto. (vfloat16mf4x7_t): Ditto. (vfloat16mf4x8_t): Ditto. (vfloat16mf2x2_t): Ditto. (vfloat16mf2x3_t): Ditto. (vfloat16mf2x4_t): Ditto. (vfloat16mf2x5_t): Ditto. (vfloat16mf2x6_t): Ditto. (vfloat16mf2x7_t): Ditto. (vfloat16mf2x8_t): Ditto. (vfloat16m1x2_t): Ditto. (vfloat16m1x3_t): Ditto. (vfloat16m1x4_t): Ditto. (vfloat16m1x5_t): Ditto. (vfloat16m1x6_t): Ditto. (vfloat16m1x7_t): Ditto. (vfloat16m1x8_t): Ditto. (vfloat16m2x2_t): Ditto. (vfloat16m2x3_t): Ditto. (vfloat16m2x4_t): Ditto. (vfloat16m4x2_t): Ditto. * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T. * config/riscv/vector.md: add tuple mode in attr sew. --- gcc/config/riscv/riscv-vector-builtins.def | 50 +++--- gcc/config/riscv/vector-iterators.md | 1 + gcc/config/riscv/vector.md | 1 + 3 files changed, 27 insertions(+), 25 deletions(-) diff --git a/gcc/config/riscv/riscv-vector-builtins.def b/gcc/config/riscv/riscv-vector-builtins.def index 0e49480703b..6661629aad8 100644 --- a/gcc/config/riscv/riscv-vector-builtins.def +++ b/gcc/config/riscv/riscv-vector-builtins.def @@ -441,47 +441,47 @@ DEF_RVV_TYPE (vuint64m8_t, 16, __rvv_uint64m8_t, uint64, RVVM8DI, _u64m8, _u64, DEF_RVV_TYPE (vfloat16mf4_t, 18, __rvv_float16mf4_t, float16, RVVMF4HF, _f16mf4, _f16, _e16mf4) /* Define tuple types for SEW = 16, LMUL = MF4. */ -DEF_RVV_TUPLE_TYPE (vfloat16mf4x2_t, 20, __rvv_float16mf4x2_t, vfloat16mf4_t, float, 2, _f16mf4x2) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x3_t, 20, __rvv_float16mf4x3_t, vfloat16mf4_t, float, 3, _f16mf4x3) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x4_t, 20, __rvv_float16mf4x4_t, vfloat16mf4_t, float, 4, _f16mf4x4) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x5_t, 20, __rvv_float16mf4x5_t, vfloat16mf4_t, float, 5, _f16mf4x5) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x6_t, 20, __rvv_float16mf4x6_t, vfloat16mf4_t, float, 6, _f16mf4x6) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x7_t, 20, __rvv_float16mf4x7_t, vfloat16mf4_t, float, 7, _f16mf4x7) -DEF_RVV_TUPLE_TYPE (vfloat16mf4x8_t, 20, __rvv_float16mf4x8_t, vfloat16mf4_t, float, 8, _f16mf4x8) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x2_t, 20, __rvv_float16mf4x2_t, vfloat16mf4_t, float16, 2, _f16mf4x2) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x3_t, 20, __rvv_float16mf4x3_t, vfloat16mf4_t, float16, 3, _f16mf4x3) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x4_t, 20, __rvv_float16mf4x4_t, vfloat16mf4_t, float16, 4, _f16mf4x4) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x5_t, 20, __rvv_float16mf4x5_t, vfloat16mf4_t, float16, 5, _f16mf4x5) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x6_t, 20, __rvv_float16mf4x6_t, vfloat16mf4_t, float16, 6, _f16mf4x6) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x7_t, 20, __rvv_float16mf4x7_t, vfloat16mf4_t, float16, 7, _f16mf4x7) +DEF_RVV_TUPLE_TYPE (vfloat16mf4x8_t, 20, __rvv_float16mf4x8_t, vfloat16mf4_t, float16, 8, _f16mf4x8) /* LMUL = 1/2. */ DEF_RVV_TYPE (vfloat16mf2_t, 18, __rvv_float16mf2_t, float16, RVVMF2HF, _f16mf2, _f16, _e16mf2) /* Define tuple types for SEW = 16, LMUL = MF2. */ -DEF_RVV_TUPLE_TYPE (vfloat16mf2x2_t, 20,