Re: [PATCH] Change HONOR_REG_ALLOC_ORDER to a marco for C expression
2014-05-02 14:41 GMT+08:00 Kito Cheng : > Hi Jeff: > >> I fixed up some minor whitespace issues and committed your patch. > > Thanks for your help :) Hi, I noticed the commit date in ChangeLog was incorrect for the patch. Fixed it as obvious. Committed into Rev.210138. Index: gcc/ChangeLog === --- gcc/ChangeLog (revision 210137) +++ gcc/ChangeLog (revision 210138) @@ -1092,7 +1092,7 @@ * doc/invoke.texi: Describe -fsanitize=float-divide-by-zero. -2014-02-26 Kito Cheng +2014-05-02 Kito Cheng * defaults.h (HONOR_REG_ALLOC_ORDER): Change HONOR_REG_ALLOC_ORDER to a C expression marco. Best regards, jasonwucj
Re: [PATCH] Change HONOR_REG_ALLOC_ORDER to a marco for C expression
Hi Jeff: > I fixed up some minor whitespace issues and committed your patch. Thanks for your help :)
Re: [PATCH] Change HONOR_REG_ALLOC_ORDER to a marco for C expression
On 04/16/14 06:14, Kito Cheng wrote: Hi Vladimir: thanks your replay and approve, however I don't have commit right yet, can you help to commit it? thanks! I fixed up some minor whitespace issues and committed your patch. Jeff
Re: [PATCH] Change HONOR_REG_ALLOC_ORDER to a marco for C expression
Hi Vladimir: thanks your replay and approve, however I don't have commit right yet, can you help to commit it? thanks! On Wed, Apr 16, 2014 at 8:10 PM, Vladimir Makarov wrote: > On 2014-04-15, 9:26 AM, Kito Cheng wrote: >> >> Hi Vladimir: >> >>> Although this patch is safe. I guess it could wait for stage 1 as right >>> now >>> we don't need this functionality. >>> >>> The patch is ok for the stage1 which is probably about a month away. >> >> >> ping >> >> is this patch ok now? >> > > > Yes, I approved it already a mount ago. > > Thanks, Kito. > >
Re: [PATCH] Change HONOR_REG_ALLOC_ORDER to a marco for C expression
On 2014-04-15, 9:26 AM, Kito Cheng wrote: Hi Vladimir: Although this patch is safe. I guess it could wait for stage 1 as right now we don't need this functionality. The patch is ok for the stage1 which is probably about a month away. ping is this patch ok now? Yes, I approved it already a mount ago. Thanks, Kito.
Re: [PATCH] Change HONOR_REG_ALLOC_ORDER to a marco for C expression
Hi Vladimir: > Although this patch is safe. I guess it could wait for stage 1 as right now > we don't need this functionality. > > The patch is ok for the stage1 which is probably about a month away. ping is this patch ok now? thanks:) > Thanks for the patch.
Re: [PATCH] Change HONOR_REG_ALLOC_ORDER to a marco for C expression
> Although this patch is safe. I guess it could wait for stage 1 as right now
> we don't need this functionality.
>
> The patch is ok for the stage1 which is probably about a month away.
>
> Thanks for the patch.
Got it, thanks for your review :)
>
>
>> On Thu, Feb 27, 2014 at 12:32 PM, Kito Cheng wrote:
>>>
>>> Hi all:
>>>
>>> Sorry for repeat patch content in last mail, here is the clean version
>>> for this patch.
>>>
>>> diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
>>> index 7ca47a7..1638332 100644
>>> --- a/gcc/config/arm/arm.h
>>> +++ b/gcc/config/arm/arm.h
>>> @@ -1152,7 +1152,7 @@ extern int arm_regs_in_sequence[];
>>>
>>> /* Tell IRA to use the order we define rather than messing it up with
>>> its
>>> own cost calculations. */
>>> -#define HONOR_REG_ALLOC_ORDER
>>> +#define HONOR_REG_ALLOC_ORDER 1
>>>
>>> /* Interrupt functions can only use registers that have already been
>>> saved by the prologue, even if they would normally be
>>> diff --git a/gcc/config/nds32/nds32.h b/gcc/config/nds32/nds32.h
>>> index 38847e5..8f966ec 100644
>>> --- a/gcc/config/nds32/nds32.h
>>> +++ b/gcc/config/nds32/nds32.h
>>> @@ -553,7 +553,7 @@ enum nds32_builtins
>>>
>>> /* Tell IRA to use the order we define rather than messing it up with
>>> its
>>> own cost calculations. */
>>> -#define HONOR_REG_ALLOC_ORDER
>>> +#define HONOR_REG_ALLOC_ORDER 1
>>>
>>> /* The number of consecutive hard regs needed starting at
>>> reg "regno" for holding a value of mode "mode". */
>>> diff --git a/gcc/defaults.h b/gcc/defaults.h
>>> index f94ae17..1c48759 100644
>>> --- a/gcc/defaults.h
>>> +++ b/gcc/defaults.h
>>> @@ -1085,6 +1085,10 @@ see the files COPYING3 and COPYING.RUNTIME
>>> respectively. If not, see
>>> #define LOCAL_REGNO(REGNO) 0
>>> #endif
>>>
>>> +#ifndef HONOR_REG_ALLOC_ORDER
>>> +#define HONOR_REG_ALLOC_ORDER 0
>>> +#endif
>>> +
>>> /* EXIT_IGNORE_STACK should be nonzero if, when returning from a
>>> function,
>>> the stack pointer does not matter. The value is tested only in
>>> functions that have frame pointers. */
>>> diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
>>> index f204936..c0de478 100644
>>> --- a/gcc/doc/tm.texi
>>> +++ b/gcc/doc/tm.texi
>>> @@ -2044,8 +2044,8 @@ Normally, IRA tries to estimate the costs for
>>> saving a register in the
>>> prologue and restoring it in the epilogue. This discourages it from
>>> using call-saved registers. If a machine wants to ensure that IRA
>>> allocates registers in the order given by REG_ALLOC_ORDER even if some
>>> -call-saved registers appear earlier than call-used ones, this macro
>>> -should be defined.
>>> +call-saved registers appear earlier than call-used ones, then define
>>> this
>>> + macro as a C expression to nonzero. Default is 0.
>>> @end defmac
>>>
>>> @defmac IRA_HARD_REGNO_ADD_COST_MULTIPLIER (@var{regno})
>>> diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
>>> index 50f412c..d7ae6a7 100644
>>> --- a/gcc/doc/tm.texi.in
>>> +++ b/gcc/doc/tm.texi.in
>>> @@ -1849,8 +1849,8 @@ Normally, IRA tries to estimate the costs for
>>> saving a register in the
>>> prologue and restoring it in the epilogue. This discourages it from
>>> using call-saved registers. If a machine wants to ensure that IRA
>>> allocates registers in the order given by REG_ALLOC_ORDER even if some
>>> -call-saved registers appear earlier than call-used ones, this macro
>>> -should be defined.
>>> +call-saved registers appear earlier than call-used ones, then define
>>> this
>>> + macro as a C expression to nonzero. Default is 0.
>>> @end defmac
>>>
>>> @defmac IRA_HARD_REGNO_ADD_COST_MULTIPLIER (@var{regno})
>>> diff --git a/gcc/ira-color.c b/gcc/ira-color.c
>>> index c20aaf7..773c86e 100644
>>> --- a/gcc/ira-color.c
>>> +++ b/gcc/ira-color.c
>>> @@ -1599,7 +1599,6 @@ check_hard_reg_p (ira_allocno_t a, int hard_regno,
>>> }
>>> return j == nregs;
>>> }
>>> -#ifndef HONOR_REG_ALLOC_ORDER
>>>
>>> /* Return number of registers needed to be saved and restored at
>>> function prologue/epilogue if we allocate HARD_REGNO to hold value
>>> @@ -1618,7 +1617,6 @@ calculate_saved_nregs (int hard_regno, enum
>>> machine_mode mode)
>>> nregs++;
>>> return nregs;
>>> }
>>> -#endif
>>>
>>> /* Choose a hard register for allocno A. If RETRY_P is TRUE, it means
>>> that the function called from function
>>> @@ -1653,11 +1651,9 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
>>> enum reg_class aclass;
>>> enum machine_mode mode;
>>> static int costs[FIRST_PSEUDO_REGISTER],
>>> full_costs[FIRST_PSEUDO_REGISTER];
>>> -#ifndef HONOR_REG_ALLOC_ORDER
>>> int saved_nregs;
>>> enum reg_class rclass;
>>> int add_cost;
>>> -#endif
>>> #ifdef STACK_REGS
>>> bool no_stack_reg_p;
>>> #endif
>>> @@ -1823,19 +1819,21 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
>>>continue;
>>> cost = costs[i];
>>> full_cost = full_costs[i]
Re: [PATCH] Change HONOR_REG_ALLOC_ORDER to a marco for C expression
On 3/4/2014, 9:59 AM, Kito Cheng wrote:
Ping.
Although this patch is safe. I guess it could wait for stage 1 as right
now we don't need this functionality.
The patch is ok for the stage1 which is probably about a month away.
Thanks for the patch.
On Thu, Feb 27, 2014 at 12:32 PM, Kito Cheng wrote:
Hi all:
Sorry for repeat patch content in last mail, here is the clean version
for this patch.
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 7ca47a7..1638332 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1152,7 +1152,7 @@ extern int arm_regs_in_sequence[];
/* Tell IRA to use the order we define rather than messing it up with its
own cost calculations. */
-#define HONOR_REG_ALLOC_ORDER
+#define HONOR_REG_ALLOC_ORDER 1
/* Interrupt functions can only use registers that have already been
saved by the prologue, even if they would normally be
diff --git a/gcc/config/nds32/nds32.h b/gcc/config/nds32/nds32.h
index 38847e5..8f966ec 100644
--- a/gcc/config/nds32/nds32.h
+++ b/gcc/config/nds32/nds32.h
@@ -553,7 +553,7 @@ enum nds32_builtins
/* Tell IRA to use the order we define rather than messing it up with its
own cost calculations. */
-#define HONOR_REG_ALLOC_ORDER
+#define HONOR_REG_ALLOC_ORDER 1
/* The number of consecutive hard regs needed starting at
reg "regno" for holding a value of mode "mode". */
diff --git a/gcc/defaults.h b/gcc/defaults.h
index f94ae17..1c48759 100644
--- a/gcc/defaults.h
+++ b/gcc/defaults.h
@@ -1085,6 +1085,10 @@ see the files COPYING3 and COPYING.RUNTIME
respectively. If not, see
#define LOCAL_REGNO(REGNO) 0
#endif
+#ifndef HONOR_REG_ALLOC_ORDER
+#define HONOR_REG_ALLOC_ORDER 0
+#endif
+
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
the stack pointer does not matter. The value is tested only in
functions that have frame pointers. */
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index f204936..c0de478 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -2044,8 +2044,8 @@ Normally, IRA tries to estimate the costs for
saving a register in the
prologue and restoring it in the epilogue. This discourages it from
using call-saved registers. If a machine wants to ensure that IRA
allocates registers in the order given by REG_ALLOC_ORDER even if some
-call-saved registers appear earlier than call-used ones, this macro
-should be defined.
+call-saved registers appear earlier than call-used ones, then define this
+ macro as a C expression to nonzero. Default is 0.
@end defmac
@defmac IRA_HARD_REGNO_ADD_COST_MULTIPLIER (@var{regno})
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 50f412c..d7ae6a7 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -1849,8 +1849,8 @@ Normally, IRA tries to estimate the costs for
saving a register in the
prologue and restoring it in the epilogue. This discourages it from
using call-saved registers. If a machine wants to ensure that IRA
allocates registers in the order given by REG_ALLOC_ORDER even if some
-call-saved registers appear earlier than call-used ones, this macro
-should be defined.
+call-saved registers appear earlier than call-used ones, then define this
+ macro as a C expression to nonzero. Default is 0.
@end defmac
@defmac IRA_HARD_REGNO_ADD_COST_MULTIPLIER (@var{regno})
diff --git a/gcc/ira-color.c b/gcc/ira-color.c
index c20aaf7..773c86e 100644
--- a/gcc/ira-color.c
+++ b/gcc/ira-color.c
@@ -1599,7 +1599,6 @@ check_hard_reg_p (ira_allocno_t a, int hard_regno,
}
return j == nregs;
}
-#ifndef HONOR_REG_ALLOC_ORDER
/* Return number of registers needed to be saved and restored at
function prologue/epilogue if we allocate HARD_REGNO to hold value
@@ -1618,7 +1617,6 @@ calculate_saved_nregs (int hard_regno, enum
machine_mode mode)
nregs++;
return nregs;
}
-#endif
/* Choose a hard register for allocno A. If RETRY_P is TRUE, it means
that the function called from function
@@ -1653,11 +1651,9 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
enum reg_class aclass;
enum machine_mode mode;
static int costs[FIRST_PSEUDO_REGISTER], full_costs[FIRST_PSEUDO_REGISTER];
-#ifndef HONOR_REG_ALLOC_ORDER
int saved_nregs;
enum reg_class rclass;
int add_cost;
-#endif
#ifdef STACK_REGS
bool no_stack_reg_p;
#endif
@@ -1823,19 +1819,21 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
continue;
cost = costs[i];
full_cost = full_costs[i];
-#ifndef HONOR_REG_ALLOC_ORDER
- if ((saved_nregs = calculate_saved_nregs (hard_regno, mode)) != 0)
- /* We need to save/restore the hard register in
- epilogue/prologue. Therefore we increase the cost. */
- {
- rclass = REGNO_REG_CLASS (hard_regno);
- add_cost = ((ira_memory_move_cost[mode][rclass][0]
- + ira_memory_move_cost[mode][rclass][1])
- * saved_nregs / hard_regno_nregs[hard_regno][mode] - 1);
- cost += add_cost;
- full_cost += add_cost;
Re: [PATCH] Change HONOR_REG_ALLOC_ORDER to a marco for C expression
Ping.
On Thu, Feb 27, 2014 at 12:32 PM, Kito Cheng wrote:
> Hi all:
>
> Sorry for repeat patch content in last mail, here is the clean version
> for this patch.
>
> diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
> index 7ca47a7..1638332 100644
> --- a/gcc/config/arm/arm.h
> +++ b/gcc/config/arm/arm.h
> @@ -1152,7 +1152,7 @@ extern int arm_regs_in_sequence[];
>
> /* Tell IRA to use the order we define rather than messing it up with its
> own cost calculations. */
> -#define HONOR_REG_ALLOC_ORDER
> +#define HONOR_REG_ALLOC_ORDER 1
>
> /* Interrupt functions can only use registers that have already been
> saved by the prologue, even if they would normally be
> diff --git a/gcc/config/nds32/nds32.h b/gcc/config/nds32/nds32.h
> index 38847e5..8f966ec 100644
> --- a/gcc/config/nds32/nds32.h
> +++ b/gcc/config/nds32/nds32.h
> @@ -553,7 +553,7 @@ enum nds32_builtins
>
> /* Tell IRA to use the order we define rather than messing it up with its
> own cost calculations. */
> -#define HONOR_REG_ALLOC_ORDER
> +#define HONOR_REG_ALLOC_ORDER 1
>
> /* The number of consecutive hard regs needed starting at
> reg "regno" for holding a value of mode "mode". */
> diff --git a/gcc/defaults.h b/gcc/defaults.h
> index f94ae17..1c48759 100644
> --- a/gcc/defaults.h
> +++ b/gcc/defaults.h
> @@ -1085,6 +1085,10 @@ see the files COPYING3 and COPYING.RUNTIME
> respectively. If not, see
> #define LOCAL_REGNO(REGNO) 0
> #endif
>
> +#ifndef HONOR_REG_ALLOC_ORDER
> +#define HONOR_REG_ALLOC_ORDER 0
> +#endif
> +
> /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
> the stack pointer does not matter. The value is tested only in
> functions that have frame pointers. */
> diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
> index f204936..c0de478 100644
> --- a/gcc/doc/tm.texi
> +++ b/gcc/doc/tm.texi
> @@ -2044,8 +2044,8 @@ Normally, IRA tries to estimate the costs for
> saving a register in the
> prologue and restoring it in the epilogue. This discourages it from
> using call-saved registers. If a machine wants to ensure that IRA
> allocates registers in the order given by REG_ALLOC_ORDER even if some
> -call-saved registers appear earlier than call-used ones, this macro
> -should be defined.
> +call-saved registers appear earlier than call-used ones, then define this
> + macro as a C expression to nonzero. Default is 0.
> @end defmac
>
> @defmac IRA_HARD_REGNO_ADD_COST_MULTIPLIER (@var{regno})
> diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
> index 50f412c..d7ae6a7 100644
> --- a/gcc/doc/tm.texi.in
> +++ b/gcc/doc/tm.texi.in
> @@ -1849,8 +1849,8 @@ Normally, IRA tries to estimate the costs for
> saving a register in the
> prologue and restoring it in the epilogue. This discourages it from
> using call-saved registers. If a machine wants to ensure that IRA
> allocates registers in the order given by REG_ALLOC_ORDER even if some
> -call-saved registers appear earlier than call-used ones, this macro
> -should be defined.
> +call-saved registers appear earlier than call-used ones, then define this
> + macro as a C expression to nonzero. Default is 0.
> @end defmac
>
> @defmac IRA_HARD_REGNO_ADD_COST_MULTIPLIER (@var{regno})
> diff --git a/gcc/ira-color.c b/gcc/ira-color.c
> index c20aaf7..773c86e 100644
> --- a/gcc/ira-color.c
> +++ b/gcc/ira-color.c
> @@ -1599,7 +1599,6 @@ check_hard_reg_p (ira_allocno_t a, int hard_regno,
> }
>return j == nregs;
> }
> -#ifndef HONOR_REG_ALLOC_ORDER
>
> /* Return number of registers needed to be saved and restored at
> function prologue/epilogue if we allocate HARD_REGNO to hold value
> @@ -1618,7 +1617,6 @@ calculate_saved_nregs (int hard_regno, enum
> machine_mode mode)
>nregs++;
>return nregs;
> }
> -#endif
>
> /* Choose a hard register for allocno A. If RETRY_P is TRUE, it means
> that the function called from function
> @@ -1653,11 +1651,9 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
>enum reg_class aclass;
>enum machine_mode mode;
>static int costs[FIRST_PSEUDO_REGISTER], full_costs[FIRST_PSEUDO_REGISTER];
> -#ifndef HONOR_REG_ALLOC_ORDER
>int saved_nregs;
>enum reg_class rclass;
>int add_cost;
> -#endif
> #ifdef STACK_REGS
>bool no_stack_reg_p;
> #endif
> @@ -1823,19 +1819,21 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
> continue;
>cost = costs[i];
>full_cost = full_costs[i];
> -#ifndef HONOR_REG_ALLOC_ORDER
> - if ((saved_nregs = calculate_saved_nregs (hard_regno, mode)) != 0)
> - /* We need to save/restore the hard register in
> - epilogue/prologue. Therefore we increase the cost. */
> - {
> - rclass = REGNO_REG_CLASS (hard_regno);
> - add_cost = ((ira_memory_move_cost[mode][rclass][0]
> - + ira_memory_move_cost[mode][rclass][1])
> - * saved_nregs / hard_regno_nregs[hard_regno][mode] - 1);
> - cost += add_cost;
> - full_cost += add_cost;
> - }
> -#endif
> +
> + if (!HONOR_REG_ALLOC_ORDER)
Re: [PATCH] Change HONOR_REG_ALLOC_ORDER to a marco for C expression
Hi all:
Sorry for repeat patch content in last mail, here is the clean version
for this patch.
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 7ca47a7..1638332 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1152,7 +1152,7 @@ extern int arm_regs_in_sequence[];
/* Tell IRA to use the order we define rather than messing it up with its
own cost calculations. */
-#define HONOR_REG_ALLOC_ORDER
+#define HONOR_REG_ALLOC_ORDER 1
/* Interrupt functions can only use registers that have already been
saved by the prologue, even if they would normally be
diff --git a/gcc/config/nds32/nds32.h b/gcc/config/nds32/nds32.h
index 38847e5..8f966ec 100644
--- a/gcc/config/nds32/nds32.h
+++ b/gcc/config/nds32/nds32.h
@@ -553,7 +553,7 @@ enum nds32_builtins
/* Tell IRA to use the order we define rather than messing it up with its
own cost calculations. */
-#define HONOR_REG_ALLOC_ORDER
+#define HONOR_REG_ALLOC_ORDER 1
/* The number of consecutive hard regs needed starting at
reg "regno" for holding a value of mode "mode". */
diff --git a/gcc/defaults.h b/gcc/defaults.h
index f94ae17..1c48759 100644
--- a/gcc/defaults.h
+++ b/gcc/defaults.h
@@ -1085,6 +1085,10 @@ see the files COPYING3 and COPYING.RUNTIME
respectively. If not, see
#define LOCAL_REGNO(REGNO) 0
#endif
+#ifndef HONOR_REG_ALLOC_ORDER
+#define HONOR_REG_ALLOC_ORDER 0
+#endif
+
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
the stack pointer does not matter. The value is tested only in
functions that have frame pointers. */
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index f204936..c0de478 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -2044,8 +2044,8 @@ Normally, IRA tries to estimate the costs for
saving a register in the
prologue and restoring it in the epilogue. This discourages it from
using call-saved registers. If a machine wants to ensure that IRA
allocates registers in the order given by REG_ALLOC_ORDER even if some
-call-saved registers appear earlier than call-used ones, this macro
-should be defined.
+call-saved registers appear earlier than call-used ones, then define this
+ macro as a C expression to nonzero. Default is 0.
@end defmac
@defmac IRA_HARD_REGNO_ADD_COST_MULTIPLIER (@var{regno})
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 50f412c..d7ae6a7 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -1849,8 +1849,8 @@ Normally, IRA tries to estimate the costs for
saving a register in the
prologue and restoring it in the epilogue. This discourages it from
using call-saved registers. If a machine wants to ensure that IRA
allocates registers in the order given by REG_ALLOC_ORDER even if some
-call-saved registers appear earlier than call-used ones, this macro
-should be defined.
+call-saved registers appear earlier than call-used ones, then define this
+ macro as a C expression to nonzero. Default is 0.
@end defmac
@defmac IRA_HARD_REGNO_ADD_COST_MULTIPLIER (@var{regno})
diff --git a/gcc/ira-color.c b/gcc/ira-color.c
index c20aaf7..773c86e 100644
--- a/gcc/ira-color.c
+++ b/gcc/ira-color.c
@@ -1599,7 +1599,6 @@ check_hard_reg_p (ira_allocno_t a, int hard_regno,
}
return j == nregs;
}
-#ifndef HONOR_REG_ALLOC_ORDER
/* Return number of registers needed to be saved and restored at
function prologue/epilogue if we allocate HARD_REGNO to hold value
@@ -1618,7 +1617,6 @@ calculate_saved_nregs (int hard_regno, enum
machine_mode mode)
nregs++;
return nregs;
}
-#endif
/* Choose a hard register for allocno A. If RETRY_P is TRUE, it means
that the function called from function
@@ -1653,11 +1651,9 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
enum reg_class aclass;
enum machine_mode mode;
static int costs[FIRST_PSEUDO_REGISTER], full_costs[FIRST_PSEUDO_REGISTER];
-#ifndef HONOR_REG_ALLOC_ORDER
int saved_nregs;
enum reg_class rclass;
int add_cost;
-#endif
#ifdef STACK_REGS
bool no_stack_reg_p;
#endif
@@ -1823,19 +1819,21 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
continue;
cost = costs[i];
full_cost = full_costs[i];
-#ifndef HONOR_REG_ALLOC_ORDER
- if ((saved_nregs = calculate_saved_nregs (hard_regno, mode)) != 0)
- /* We need to save/restore the hard register in
- epilogue/prologue. Therefore we increase the cost. */
- {
- rclass = REGNO_REG_CLASS (hard_regno);
- add_cost = ((ira_memory_move_cost[mode][rclass][0]
- + ira_memory_move_cost[mode][rclass][1])
- * saved_nregs / hard_regno_nregs[hard_regno][mode] - 1);
- cost += add_cost;
- full_cost += add_cost;
- }
-#endif
+
+ if (!HONOR_REG_ALLOC_ORDER) {
+ if ((saved_nregs = calculate_saved_nregs (hard_regno, mode)) != 0)
+ /* We need to save/restore the hard register in
+ epilogue/prologue. Therefore we increase the cost. */
+ {
+rclass = REGNO_REG_CLASS (hard_regno);
+add_cost = ((ira_memory_move_cost[mode][rclass][0]
+ + ira_memory_move_c
