On Fri, Oct 07, 2011 at 02:13:40PM -0700, Richard Henderson wrote:
+(define_insn *avx2_pblendw
+ [(set (match_operand:V16HI 0 register_operand =x)
+ (vec_merge:V16HI
+ (match_operand:V16HI 2 nonimmediate_operand xm)
+ (match_operand:V16HI 1 register_operand x)
+ (match_operand:SI 3 avx2_pblendw_operand n)))]
+ TARGET_SSE4_1
TARGET_AVX2 instead?
+{
+ operands[3] = GEN_INT (INTVAL (operands[3]) 0xff);
+ return vpblendw\t{%3, %2, %1, %0|%0, %1, %2, %3};
+}
+ [(set_attr type ssemov)
+ (set_attr prefix_extra 1)
+ (set_attr length_immediate 1)
+ (set_attr prefix vex)
+ (set_attr mode OI)])
(define_insn avx2_pblenddmode
[(set (match_operand:VI4_AVX2 0 register_operand =x)
Jakub