[gem5-dev] Change in gem5/gem5[master]: mem-cache: Refactor the cache recvTimingReq function
Hello Daniel Carvalho, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/10424 to look at the new patch set (#2). Change subject: mem-cache: Refactor the cache recvTimingReq function .. mem-cache: Refactor the cache recvTimingReq function The recvTimingReq function in the cache handles timing requests. Over time, recvTimingReq has grown in complexity and code size. This change factors out some of its functionality in two separate functions. The new functions handle timing requests that hit and timing requests that miss separately. Change-Id: I09902d648d7272f0f9ec2851fa6376f7305ba418 --- M src/mem/cache/cache.cc M src/mem/cache/cache.hh 2 files changed, 223 insertions(+), 192 deletions(-) -- To view, visit https://gem5-review.googlesource.com/10424 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I09902d648d7272f0f9ec2851fa6376f7305ba418 Gerrit-Change-Number: 10424 Gerrit-PatchSet: 2 Gerrit-Owner: Nikos NikolerisGerrit-Reviewer: Daniel Carvalho Gerrit-Reviewer: Nikos Nikoleris Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: mem-cache: Refactor the cache recvTimingResp function
Nikos Nikoleris has uploaded a new patch set (#2). ( https://gem5-review.googlesource.com/10423 ) Change subject: mem-cache: Refactor the cache recvTimingResp function .. mem-cache: Refactor the cache recvTimingResp function The recvTimingResp function in the cache handles timing responses. Over time, recvTimingResp has grown in complexity and code size. This change factors out some of its functionality to a separate function. The new function iterates through the in-service targets and handles them accordingly. Change-Id: I0ef28288640f6be1b30452b0664d32432e692ea6 --- M src/mem/cache/cache.cc M src/mem/cache/cache.hh 2 files changed, 115 insertions(+), 91 deletions(-) -- To view, visit https://gem5-review.googlesource.com/10423 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I0ef28288640f6be1b30452b0664d32432e692ea6 Gerrit-Change-Number: 10423 Gerrit-PatchSet: 2 Gerrit-Owner: Nikos NikolerisGerrit-Reviewer: Nikos Nikoleris Gerrit-CC: Daniel Carvalho Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: mem-cache: Move reference count stats update to blk invalidation
Hello Daniel Carvalho, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/10428 to look at the new patch set (#2). Change subject: mem-cache: Move reference count stats update to blk invalidation .. mem-cache: Move reference count stats update to blk invalidation The tags in the cache keep track of the number of references to the blocks as well as the average number of references between an inssertion and the next invalidation. Previously the stats where updated only on block insertion and invalidations were ignored. This changes moves the update of the counters to the block invalidation function. Change-Id: Ie7672c13813ec278a65232694024d2e5e17c4612 --- M src/mem/cache/tags/base.cc M src/mem/cache/tags/base.hh 2 files changed, 8 insertions(+), 11 deletions(-) -- To view, visit https://gem5-review.googlesource.com/10428 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ie7672c13813ec278a65232694024d2e5e17c4612 Gerrit-Change-Number: 10428 Gerrit-PatchSet: 2 Gerrit-Owner: Nikos NikolerisGerrit-Reviewer: Daniel Carvalho Gerrit-Reviewer: Nikos Nikoleris Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: mem-cache: Fix include directives in the cache related classes
Hello Daniel Carvalho, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/10433 to look at the new patch set (#2). Change subject: mem-cache: Fix include directives in the cache related classes .. mem-cache: Fix include directives in the cache related classes Change-Id: I111b0f662897c43974aadb08da1ed85c7542585c --- M src/mem/cache/blk.hh M src/mem/cache/mshr.cc M src/mem/cache/mshr.hh M src/mem/cache/mshr_queue.cc M src/mem/cache/mshr_queue.hh M src/mem/cache/prefetch/base.cc M src/mem/cache/prefetch/base.hh M src/mem/cache/prefetch/queued.cc M src/mem/cache/prefetch/queued.hh M src/mem/cache/prefetch/stride.cc M src/mem/cache/prefetch/stride.hh M src/mem/cache/prefetch/tagged.cc M src/mem/cache/prefetch/tagged.hh M src/mem/cache/queue.hh M src/mem/cache/queue_entry.hh M src/mem/cache/replacement_policies/brrip_rp.cc M src/mem/cache/replacement_policies/fifo_rp.cc M src/mem/cache/replacement_policies/fifo_rp.hh M src/mem/cache/replacement_policies/lfu_rp.cc M src/mem/cache/replacement_policies/lfu_rp.hh M src/mem/cache/replacement_policies/lru_rp.cc M src/mem/cache/replacement_policies/lru_rp.hh M src/mem/cache/replacement_policies/mru_rp.cc M src/mem/cache/replacement_policies/mru_rp.hh M src/mem/cache/replacement_policies/random_rp.cc M src/mem/cache/replacement_policies/random_rp.hh M src/mem/cache/replacement_policies/second_chance_rp.cc M src/mem/cache/replacement_policies/second_chance_rp.hh M src/mem/cache/tags/base.cc M src/mem/cache/tags/base.hh M src/mem/cache/tags/base_set_assoc.cc M src/mem/cache/tags/base_set_assoc.hh M src/mem/cache/tags/cacheset.hh M src/mem/cache/tags/fa_lru.cc M src/mem/cache/tags/fa_lru.hh M src/mem/cache/write_queue.cc M src/mem/cache/write_queue.hh M src/mem/cache/write_queue_entry.cc M src/mem/cache/write_queue_entry.hh 39 files changed, 138 insertions(+), 28 deletions(-) -- To view, visit https://gem5-review.googlesource.com/10433 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I111b0f662897c43974aadb08da1ed85c7542585c Gerrit-Change-Number: 10433 Gerrit-PatchSet: 2 Gerrit-Owner: Nikos NikolerisGerrit-Reviewer: Daniel Carvalho Gerrit-Reviewer: Nikos Nikoleris Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: mem-cache: Determine if an MSHR has requests from another cache
Hello Daniel Carvalho, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/10422 to look at the new patch set (#2). Change subject: mem-cache: Determine if an MSHR has requests from another cache .. mem-cache: Determine if an MSHR has requests from another cache To decide whether we allocate upon receiving a response we need to determine if any of the currently serviced requests (non-deferred targets) is comming from another cache. This change adds support for tracking this information in the MSHR. Change-Id: If1db93c12b6af5813b91b9d6b6e5e196d327f038 --- M src/mem/cache/cache.cc M src/mem/cache/mshr.cc M src/mem/cache/mshr.hh 3 files changed, 30 insertions(+), 11 deletions(-) -- To view, visit https://gem5-review.googlesource.com/10422 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: If1db93c12b6af5813b91b9d6b6e5e196d327f038 Gerrit-Change-Number: 10422 Gerrit-PatchSet: 2 Gerrit-Owner: Nikos NikolerisGerrit-Reviewer: Daniel Carvalho Gerrit-Reviewer: Nikos Nikoleris Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: mem-cache: Adopt a more sensible cache class hierarchy
Nikos Nikoleris has uploaded a new patch set (#2). ( https://gem5-review.googlesource.com/10431 ) Change subject: mem-cache: Adopt a more sensible cache class hierarchy .. mem-cache: Adopt a more sensible cache class hierarchy This patch changes what goes into the BaseCache and what goes into the Cache, to make it easier to add a NoncoherentCache with as much re-use as possible. A number of redundant members and definitions are also removed in the process. This is a modified version of a changeset put together by Andreas HanssonChange-Id: Ie9dd73c4ec07732e778e7416b712dad8b4bd5d4b --- M src/mem/cache/Cache.py M src/mem/cache/base.cc M src/mem/cache/base.hh M src/mem/cache/cache.cc M src/mem/cache/cache.hh M src/mem/cache/mshr.cc M src/mem/cache/mshr.hh M src/mem/cache/queue_entry.hh M src/mem/cache/write_queue_entry.cc M src/mem/cache/write_queue_entry.hh 10 files changed, 2,286 insertions(+), 2,131 deletions(-) -- To view, visit https://gem5-review.googlesource.com/10431 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ie9dd73c4ec07732e778e7416b712dad8b4bd5d4b Gerrit-Change-Number: 10431 Gerrit-PatchSet: 2 Gerrit-Owner: Nikos Nikoleris Gerrit-Reviewer: Nikos Nikoleris Gerrit-CC: Daniel Carvalho Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: mem-cache: Move replacements stat to the base cache class
Hello Daniel Carvalho, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/10426 to look at the new patch set (#2). Change subject: mem-cache: Move replacements stat to the base cache class .. mem-cache: Move replacements stat to the base cache class Change-Id: I25dbcfcddfe1c422a76eb1af3f726c1360d8d110 --- M src/mem/cache/base.cc M src/mem/cache/base.hh M src/mem/cache/cache.cc M src/mem/cache/tags/base.cc M src/mem/cache/tags/base.hh 5 files changed, 8 insertions(+), 11 deletions(-) -- To view, visit https://gem5-review.googlesource.com/10426 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I25dbcfcddfe1c422a76eb1af3f726c1360d8d110 Gerrit-Change-Number: 10426 Gerrit-PatchSet: 2 Gerrit-Owner: Nikos NikolerisGerrit-Reviewer: Daniel Carvalho Gerrit-Reviewer: Nikos Nikoleris Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: mem-cache: Delegate block invalidation to block allocation
Hello Daniel Carvalho, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/10429 to look at the new patch set (#2). Change subject: mem-cache: Delegate block invalidation to block allocation .. mem-cache: Delegate block invalidation to block allocation For a block replacement we first select a victim block, we invalidate it and then populate it with the new information. Prior to this change BaseTags::insertBlock() did the invalidation and filled in the block with the new information. Now that the replacements stat is moved to the BaseCache, insertBlock does not need to perform the invalidation and as a result we can unify the block eviction code in BaseCache. Change-Id: I5bdf00b2dab2752ed2137ab7201ed1dc451333b3 --- M src/mem/cache/cache.cc M src/mem/cache/tags/base.cc 2 files changed, 3 insertions(+), 4 deletions(-) -- To view, visit https://gem5-review.googlesource.com/10429 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I5bdf00b2dab2752ed2137ab7201ed1dc451333b3 Gerrit-Change-Number: 10429 Gerrit-PatchSet: 2 Gerrit-Owner: Nikos NikolerisGerrit-Reviewer: Daniel Carvalho Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: mem-cache: Refactor the recvAtomic function
Hello Daniel Carvalho, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/10425 to look at the new patch set (#2). Change subject: mem-cache: Refactor the recvAtomic function .. mem-cache: Refactor the recvAtomic function The recvAtomic function in the cache handles atomic requests. Over time, recvAtomic has grown in complexity and code size. This change factors out some of its functionality in a separate functiona. The new functions handles atomic requests that miss. Change-Id: If77d2de1e3e802e1da37f889f68910e700c59209 --- M src/mem/cache/cache.cc M src/mem/cache/cache.hh 2 files changed, 108 insertions(+), 76 deletions(-) -- To view, visit https://gem5-review.googlesource.com/10425 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: If77d2de1e3e802e1da37f889f68910e700c59209 Gerrit-Change-Number: 10425 Gerrit-PatchSet: 2 Gerrit-Owner: Nikos NikolerisGerrit-Reviewer: Daniel Carvalho Gerrit-Reviewer: Nikos Nikoleris Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] DRAM changes
Hi all, The following dram_ctrl changes already got the +2. https://gem5-review.googlesource.com/c/public/gem5/+/10102 https://gem5-review.googlesource.com/c/public/gem5/+/10103/1 We will wait until Wednesday to see if there's anybody else who wants to review them, and then we are going to submit them if no-one has anything to say about them. Thanks Giacomo IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Cron <m5test@zizzer> /z/m5/regression/do-regression quick
* build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/minor-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-atomic: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing: FAILED!*** diff[config.ini]: SKIPPED * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/o3-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing-ruby: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64f/o3-timing: FAILED! *** diff[simout]: SKIPPED* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing: CHANGED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing: CHANGED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/minor-timing: CHANGED! * build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt: CHANGED! * build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-simple: CHANGED! * build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-two-level: CHANGED! * build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual: CHANGED! *** gem5: OK*** diff[system.terminal]: SKIPPED* build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing: CHANGED! *** stat_diff: FAILURE: Statistics mismatch* build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic: CHANGED! * build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual: CHANGED! * build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-two-level: CHANGED! * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby: CHANGED! * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing: CHANGED! * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing: CHANGED! * build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-simple: CHANGED! * build/NULL_MOESI_hammer/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_hammer: CHANGED! * build/NULL_MESI_Two_Level/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MESI_Two_Level: CHANGED! * build/NULL_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_CMP_directory: CHANGED! * build/NULL_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_CMP_token: CHANGED! * build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing: CHANGED! *** diff[simout]: SKIPPED* build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing: CHANGED! * build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing: CHANGED! * build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing: CHANGED! * build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-simple: CHANGED! * build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-two-level: CHANGED! * build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp: CHANGED! * build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp: CHANGED! * build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp: CHANGED! * build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-timing: CHANGED! * build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing: CHANGED! * build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-simple: CHANGED! * build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-two-level: CHANGED! * build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby: CHANGED! * build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing: CHANGED! * build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic: CHANGED!* build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing: CHANGED! * build/X86/tests/opt/quick/se/10.mcf/x86/linux/simple-atomic: CHANGED! *** diff[smred.out]: SKIPPED* build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-atomic: CHANGED! * build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-timing: CHANGED! * build/ARM/tests/opt/quick/se/00.hello/arm/linux/minor-timing: CHANGED! * build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing: CHANGED! * build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic: CHANGED!--- quick/se/00.hello/arm/linux/simple-timing --- *** diff[simout]: SKIPPED* build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker: CHANGED! * build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-timing: CHANGED! * build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-two-level: CHANGED!*** diff[simerr]: SKIPPED *