[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Implement MHARTID CSR

2019-05-03 Thread Alec Roelke (Gerrit) 
Alec Roelke has submitted this change and it was merged. (  
https://gem5-review.googlesource.com/c/public/gem5/+/16988 )


Change subject: arch-riscv: Implement MHARTID CSR
..

arch-riscv: Implement MHARTID CSR

This patch implements the MHARTID CSR by intercepting attempts to access
it, similar to the way accesses to the performance counters are
intercepted, to return the thread's context ID.

Change-Id: Ie14a31036fbe0e49fb3347ac0c3c508d9427a10d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/16988
Reviewed-by: Alec Roelke 
Reviewed-by: Jason Lowe-Power 
Maintainer: Alec Roelke 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/arch/riscv/isa.cc
1 file changed, 2 insertions(+), 0 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  Alec Roelke: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/riscv/isa.cc b/src/arch/riscv/isa.cc
index 4e36d55..cc86752 100644
--- a/src/arch/riscv/isa.cc
+++ b/src/arch/riscv/isa.cc
@@ -112,6 +112,8 @@
 ISA::readMiscReg(int misc_reg, ThreadContext *tc)
 {
 switch (misc_reg) {
+  case MISCREG_HARTID:
+return tc->contextId();
   case MISCREG_CYCLE:
 if (hpmCounterEnabled(MISCREG_CYCLE)) {
 DPRINTF(RiscvMisc, "Cycle counter at: %llu.\n",

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Gerrit-Branch: master
Gerrit-Change-Id: Ie14a31036fbe0e49fb3347ac0c3c508d9427a10d
Gerrit-Change-Number: 16988
Gerrit-PatchSet: 4
Gerrit-Owner: Alec Roelke 
Gerrit-Reviewer: Alec Roelke 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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Re: [gem5-dev] include order style checker bug

2019-05-03 Thread Gambord, Ryan 
I can confirm it's been doing this for a while now on my end. Lots of
existing files in gem5 fail the style checker when I modify them, so it
seems to be at least somewhat recent, or people were overriding the style
checker in the past.

Ryan Gambord

On Thu, May 2, 2019, 22:58 Gabe Black  wrote:

> Here's another potentially related bug. There was an extra space between
> the final header and the using at the top of a .cc, and the style fixer
> decided to move the include of the corresponding .hh from the top where it
> belonged down into the list of includes in alphabetic order. It still
> complained about the headers after, but when told to fix it it made no
> changes. It seems the fixer doesn't always recognize when the
> .hh corresponding to a .cc needs to be at the top.
>
> Gabe
>
> On Thu, May 2, 2019 at 10:50 PM Gabe Black  wrote:
>
> > Hey folks. I just ran into a bug in the style checker/fixer, and since I
> > wanted to make sure I kept track of those so they can be fixed I thought
> I
> > would describe it here for the record. I have a cc file which had a
> single
> > system include (#include ) and the include for its .hh file
> > (#include "base/loader/loader.hh"), but they were in the wrong order,
> > system and then .hh. The style checker correctly complained about the
> order
> > and offered to fix it, but when I said yes it didn't actually change
> > anything or print any messages. FYI in case somebody wants to
> investigate.
> >
> > Gabe
> >
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Support for page crossing prefetches

2019-05-03 Thread Javier Bueno Hedo (Gerrit) 
Hello Andreas Sandberg, kokoro, Daniel Carvalho, Giacomo Travaglini, Jason  
Lowe-Power, Nikos Nikoleris,


I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/c/public/gem5/+/14620

to look at the new patch set (#16).

Change subject: mem-cache: Support for page crossing prefetches
..

mem-cache: Support for page crossing prefetches

Prefetchers can now issue hardware prefetch requests that go beyond
the boundaries of the system page. Page crossing references will need
to look up the TLBs to be able to compute the physical address to be
prefetched.

Change-Id: Ib56374097e3b7dc87414139d210ea9272f96b06b
---
M src/arch/arm/tlb.cc
M src/mem/cache/prefetch/Prefetcher.py
M src/mem/cache/prefetch/base.cc
M src/mem/cache/prefetch/base.hh
M src/mem/cache/prefetch/queued.cc
M src/mem/cache/prefetch/queued.hh
6 files changed, 392 insertions(+), 113 deletions(-)


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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Ib56374097e3b7dc87414139d210ea9272f96b06b
Gerrit-Change-Number: 14620
Gerrit-PatchSet: 16
Gerrit-Owner: Javier Bueno Hedo 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Javier Bueno Hedo 
Gerrit-Reviewer: Nikos Nikoleris 
Gerrit-Reviewer: kokoro 
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Support for page crossing prefetches

2019-05-03 Thread Javier Bueno Hedo (Gerrit) 
Hello Andreas Sandberg, kokoro, Daniel Carvalho, Giacomo Travaglini, Jason  
Lowe-Power, Nikos Nikoleris,


I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/c/public/gem5/+/14620

to look at the new patch set (#15).

Change subject: mem-cache: Support for page crossing prefetches
..

mem-cache: Support for page crossing prefetches

Prefetchers can now issue hardware prefetch requests that go beyond
the boundaries of the system page. Page crossing references will need
to look up the TLBs to be able to compute the physical address to be
prefetched.

Change-Id: Ib56374097e3b7dc87414139d210ea9272f96b06b
---
M src/arch/arm/tlb.cc
M src/mem/cache/prefetch/Prefetcher.py
M src/mem/cache/prefetch/base.cc
M src/mem/cache/prefetch/base.hh
M src/mem/cache/prefetch/queued.cc
M src/mem/cache/prefetch/queued.hh
6 files changed, 394 insertions(+), 112 deletions(-)


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Gerrit-Change-Id: Ib56374097e3b7dc87414139d210ea9272f96b06b
Gerrit-Change-Number: 14620
Gerrit-PatchSet: 15
Gerrit-Owner: Javier Bueno Hedo 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Javier Bueno Hedo 
Gerrit-Reviewer: Nikos Nikoleris 
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[gem5-dev] Change in gem5/gem5[master]: sim-se: fix a few bugs/warns from GCC 6

2019-05-03 Thread Brandon Potter (Gerrit) 
Brandon Potter has submitted this change and it was merged. (  
https://gem5-review.googlesource.com/c/public/gem5/+/12126 )


Change subject: sim-se: fix a few bugs/warns from GCC 6
..

sim-se: fix a few bugs/warns from GCC 6

Change-Id: Ib2ad860324fd234b23262d141be3e82628ff61f0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/12126
Tested-by: kokoro 
Reviewed-by: Brandon Potter 
Maintainer: Brandon Potter 
---
M src/sim/syscall_emul.cc
1 file changed, 3 insertions(+), 6 deletions(-)

Approvals:
  Brandon Potter: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/sim/syscall_emul.cc b/src/sim/syscall_emul.cc
index bfec1f5..98fbe96 100644
--- a/src/sim/syscall_emul.cc
+++ b/src/sim/syscall_emul.cc
@@ -848,12 +848,6 @@
 pipeImpl(SyscallDesc *desc, int callnum, Process *p, ThreadContext *tc,
  bool pseudoPipe)
 {
-Addr tgt_addr = 0;
-if (!pseudoPipe) {
-int index = 0;
-tgt_addr = p->getSyscallArg(tc, index);
-}
-
 int sim_fds[2], tgt_fds[2];

 int pipe_retval = pipe(sim_fds);
@@ -883,6 +877,9 @@
 return tgt_fds[0];
 }

+int index = 0;
+Addr tgt_addr = p->getSyscallArg(tc, index);
+
 /**
  * Copy the target file descriptors into buffer space and then copy
  * the buffer space back into the target address space.

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Gerrit-Change-Number: 12126
Gerrit-PatchSet: 24
Gerrit-Owner: Brandon Potter 
Gerrit-Reviewer: Alexandru Duțu 
Gerrit-Reviewer: Brandon Potter 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: John Alsop 
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Handle data expansion

2019-05-03 Thread Daniel Carvalho (Gerrit) 

Hello kokoro, Daniel Carvalho, Jason Lowe-Power, Nikos Nikoleris,

I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/c/public/gem5/+/12087

to look at the new patch set (#15).

Change subject: mem-cache: Handle data expansion
..

mem-cache: Handle data expansion

When a block in compressed form is overwriten, it may change
its size. If the new compressed size is bigger, and the total
size becomes bigger than the block size, one or more blocks
will have to be evicted. This is called data expansion, or
fat writes.

This change assumes that a first level cache cannot have a
compressor, since otherwise data expansion should have been
handled for atomic operations and writes. As such, data
expansions should only be seen on writebacks. As writebacks
are forwarded to the next level when failed, there should
be no data expansions when servicing misses either.

This patch adds the functionality to handle data expansions
by evicting the co-allocated blocks to make room for an
expanded block.

Change-Id: I0bd77bf6446bfae336889940b2f75d6f0c87e533
Signed-off-by: Daniel R. Carvalho 
---
M src/mem/cache/base.cc
M src/mem/cache/base.hh
M src/mem/cache/tags/compressed_tags.cc
M src/mem/cache/tags/compressed_tags.hh
M src/mem/cache/tags/super_blk.cc
M src/mem/cache/tags/super_blk.hh
6 files changed, 244 insertions(+), 41 deletions(-)


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Gerrit-Change-Number: 12087
Gerrit-PatchSet: 15
Gerrit-Owner: Daniel Carvalho 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Nikos Nikoleris 
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Remove writebacks packet list

2019-05-03 Thread Daniel Carvalho (Gerrit) 

Hello kokoro, Jason Lowe-Power, Nikos Nikoleris,

I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/c/public/gem5/+/18209

to look at the new patch set (#4).

Change subject: mem-cache: Remove writebacks packet list
..

mem-cache: Remove writebacks packet list

Previously all atomic writebacks concerned a single block,
therefore, when a block was evicted, no other block would be
pending eviction. With sector tags (and compression),
however, a single replacement can generate many evictions.

This can cause problems, since a writeback that evicts a block
may evict blocks in the lower cache. If one of these conflict
with one of the blocks pending eviction in the higher level, the
snoop must inform it to the lower level. Since atomic mode does
not have a writebuffer, this kind of conflict wouldn't be noticed.

Therefore, instead of evicting multiple blocks at once, we
do it one by one.

Change-Id: I2fc2f9eb0f26248ddf91adbe987d158f5a2e592b
Signed-off-by: Daniel R. Carvalho 
---
M src/mem/cache/base.cc
M src/mem/cache/base.hh
M src/mem/cache/cache.cc
M src/mem/cache/cache.hh
M src/mem/cache/noncoherent_cache.cc
M src/mem/cache/noncoherent_cache.hh
6 files changed, 143 insertions(+), 192 deletions(-)


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Gerrit-Change-Number: 18209
Gerrit-PatchSet: 4
Gerrit-Owner: Daniel Carvalho 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Nikos Nikoleris 
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Re: [gem5-dev] Continuous integration is live!

2019-05-03 Thread Jason Lowe-Power 
Thanks for the info, Rahul!

Is there any way to specify a different compiler (e.g., clang) when
building on kokoro?

Thanks,
Jason

On Fri, May 3, 2019 at 9:12 AM Rahul Thakur  wrote:

> Hi Giacomo, Jason,
>
> Sorry for late reply.
> Re: tool chain - scons and python are available in the test environment
> AFAIK.
> Re: test throughput - How long does kokoro take to finish current
> presubmit test?
>
> If you have much longer tests to run at periodic frequency, say once in a
> few days, on HEAD, kokoro also has a periodic continuous build mode. Such
> test will send out email report, serving as a pulse check for ToT.
> Presubmit jobs will not be influenced. I can look in to periodic builds if
> it fits for gem5 long regression use case.
>
> RT
>
> On Fri, May 3, 2019 at 6:17 AM Giacomo Travaglini <
> giacomo.travagl...@arm.com> wrote:
>
>> Hi Jason,
>>
>> I have seen patches being under review for a long time, and IMHO adding
>> an extra 10-30 mins is not the real bottleneck.
>> I'd rather wait a little bit more but being sure I am not breaking
>> anything...
>>
>> about ruby protocols, let me say that we (in arm) are relatively happy
>> with the current setup:
>>
>> 1) Quick regressions are run on a commit base (your presubmit.sh). This
>> means it won't take a lot of time/computation
>> 2) Long regressions (ruby protocols are tested here) are run every night
>> on a batch of MERGED commits.
>> Which means at a certain point we just checkout origin/HEAD and we run
>> long regressions.
>>
>> This is the setup I would actually recommend: a sanity suite (quick)
>> being run on a commit base, and more serious tests
>> (long) being run periodically. If you are scared about overloading the
>> framework, you can always scale down our ambition
>> and run long regressions every two nights.
>> Running less frequently is better than not running at all 
>>
>> Please let me know what you think about this; other devs are welcome to
>> comment as well,
>>
>> Giacomo
>>
>>
>> --
>> *From:* Jason Lowe-Power 
>> *Sent:* 02 May 2019 22:59
>> *To:* Giacomo Travaglini; Rahul Thakur
>> *Cc:* gem5 Developer List
>> *Subject:* Re: [gem5-dev] Continuous integration is live!
>>
>> Hi Giacomo,
>>
>> In tests/main.py we call scons and use the current environment defaults
>> to build gem5. I don't know if the kokoro infrastructure supports other
>> compilers. This might be something that Rahul can address.
>>
>> I'm also not sure if we can find a way to run more compilations in
>> parallel on Kokoro. I'm happy to refactor the test scripts to do this.
>> However, as it is, we are currently compiling at least 4 binaries mostly
>> sequentially, which is making the testing take a significant amount of
>> time. If we add more compilers (and more Ruby protocols), this is going to
>> begin to get out of hand. It would also be good to compile .fast, .opt, and
>> .debug, but I believe we're only compiling .opt right now.
>>
>> Cheers,
>> Jason
>>
>> On Thu, May 2, 2019 at 5:53 AM Giacomo Travaglini <
>> giacomo.travagl...@arm.com> wrote:
>>
>> Hi Jason,
>>
>> I understand; Another thing I would like to ask:
>>
>> Which script is building gem5 in jenkins? Ideally it would be nice to
>> build with BOTH gcc and clang (so that we avoid
>> periodic "fix clang build" patches. I would also make the version
>> configurable/visible from the script so that
>> we can track changes in compiler support and people can compare failures
>> in case they managed to build
>> seamlessly on their local workspace
>>
>> Giacomo
>> --
>> *From:* Jason Lowe-Power 
>> *Sent:* 26 April 2019 17:49
>> *To:* Giacomo Travaglini
>> *Cc:* gem5 Developer List
>> *Subject:* Re: [gem5-dev] Continuous integration is live!
>>
>> Hi Giacomo,
>>
>> You *do* have permission :). Anyone can modify
>> tests/jenkins/presubmit.cfg and presubmit.sh. In fact, if you look at the
>> history of the presubmit.sh, it *was* running the old tests. See
>> https://gem5-review.googlesource.com/c/testing/jenkins-gem5-prod/+/18028,
>> for instance.
>>
>> The problem is that we can't distribute most of the binaries (e.g., SPEC
>> binaries). We could probably upload them to a private location on the
>> Google Cloud and have jenkins consume them that way, but I believe that
>> will be more work than it's worth.
>>
>> I personally believe that putting effort into porting tests is more worth
>> everyone's time than trying to get the old tests to run, but that's just
>> my opinion. I'm happy to merge changes to run the old tests. I personally
>> believe we should only merge tests into the verification tester which
>> everyone can run locally, but I'm open to proprietary tests, especially in
>> the short term if we have a plan to make them not proprietary.
>>
>> Cheers,
>> Jason
>>
>> On Fri, Apr 26, 2019 at 9:36 AM Giacomo Travaglini <
>> giacomo.travagl...@arm.com> wrote:
>>
>> Hi Jason,
>>
>> It's really amazing that we have a testing framework in

[gem5-dev] Change in gem5/gem5[master]: sim-se: fix a few bugs/warns from GCC 6

2019-05-03 Thread Brandon Potter (Gerrit) 

Hello Alexandru Duțu, John Alsop, Jason Lowe-Power,

I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/c/public/gem5/+/12126

to look at the new patch set (#22).

Change subject: sim-se: fix a few bugs/warns from GCC 6
..

sim-se: fix a few bugs/warns from GCC 6

Change-Id: Ib2ad860324fd234b23262d141be3e82628ff61f0
---
M src/sim/syscall_emul.cc
1 file changed, 3 insertions(+), 6 deletions(-)


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Gerrit-Change-Id: Ib2ad860324fd234b23262d141be3e82628ff61f0
Gerrit-Change-Number: 12126
Gerrit-PatchSet: 22
Gerrit-Owner: Brandon Potter 
Gerrit-Reviewer: Alexandru Duțu 
Gerrit-Reviewer: Brandon Potter 
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Re: [gem5-dev] Continuous integration is live!

2019-05-03 Thread Rahul Thakur 
Hi Giacomo, Jason,

Sorry for late reply.
Re: tool chain - scons and python are available in the test environment
AFAIK.
Re: test throughput - How long does kokoro take to finish current presubmit
test?

If you have much longer tests to run at periodic frequency, say once in a
few days, on HEAD, kokoro also has a periodic continuous build mode. Such
test will send out email report, serving as a pulse check for ToT.
Presubmit jobs will not be influenced. I can look in to periodic builds if
it fits for gem5 long regression use case.

RT

On Fri, May 3, 2019 at 6:17 AM Giacomo Travaglini <
giacomo.travagl...@arm.com> wrote:

> Hi Jason,
>
> I have seen patches being under review for a long time, and IMHO adding an
> extra 10-30 mins is not the real bottleneck.
> I'd rather wait a little bit more but being sure I am not breaking
> anything...
>
> about ruby protocols, let me say that we (in arm) are relatively happy
> with the current setup:
>
> 1) Quick regressions are run on a commit base (your presubmit.sh). This
> means it won't take a lot of time/computation
> 2) Long regressions (ruby protocols are tested here) are run every night
> on a batch of MERGED commits.
> Which means at a certain point we just checkout origin/HEAD and we run
> long regressions.
>
> This is the setup I would actually recommend: a sanity suite (quick) being
> run on a commit base, and more serious tests
> (long) being run periodically. If you are scared about overloading the
> framework, you can always scale down our ambition
> and run long regressions every two nights.
> Running less frequently is better than not running at all 
>
> Please let me know what you think about this; other devs are welcome to
> comment as well,
>
> Giacomo
>
>
> --
> *From:* Jason Lowe-Power 
> *Sent:* 02 May 2019 22:59
> *To:* Giacomo Travaglini; Rahul Thakur
> *Cc:* gem5 Developer List
> *Subject:* Re: [gem5-dev] Continuous integration is live!
>
> Hi Giacomo,
>
> In tests/main.py we call scons and use the current environment defaults to
> build gem5. I don't know if the kokoro infrastructure supports other
> compilers. This might be something that Rahul can address.
>
> I'm also not sure if we can find a way to run more compilations in
> parallel on Kokoro. I'm happy to refactor the test scripts to do this.
> However, as it is, we are currently compiling at least 4 binaries mostly
> sequentially, which is making the testing take a significant amount of
> time. If we add more compilers (and more Ruby protocols), this is going to
> begin to get out of hand. It would also be good to compile .fast, .opt, and
> .debug, but I believe we're only compiling .opt right now.
>
> Cheers,
> Jason
>
> On Thu, May 2, 2019 at 5:53 AM Giacomo Travaglini <
> giacomo.travagl...@arm.com> wrote:
>
> Hi Jason,
>
> I understand; Another thing I would like to ask:
>
> Which script is building gem5 in jenkins? Ideally it would be nice to
> build with BOTH gcc and clang (so that we avoid
> periodic "fix clang build" patches. I would also make the version
> configurable/visible from the script so that
> we can track changes in compiler support and people can compare failures
> in case they managed to build
> seamlessly on their local workspace
>
> Giacomo
> --
> *From:* Jason Lowe-Power 
> *Sent:* 26 April 2019 17:49
> *To:* Giacomo Travaglini
> *Cc:* gem5 Developer List
> *Subject:* Re: [gem5-dev] Continuous integration is live!
>
> Hi Giacomo,
>
> You *do* have permission :). Anyone can modify tests/jenkins/presubmit.cfg
> and presubmit.sh. In fact, if you look at the history of the presubmit.sh,
> it *was* running the old tests. See
> https://gem5-review.googlesource.com/c/testing/jenkins-gem5-prod/+/18028,
> for instance.
>
> The problem is that we can't distribute most of the binaries (e.g., SPEC
> binaries). We could probably upload them to a private location on the
> Google Cloud and have jenkins consume them that way, but I believe that
> will be more work than it's worth.
>
> I personally believe that putting effort into porting tests is more worth
> everyone's time than trying to get the old tests to run, but that's just
> my opinion. I'm happy to merge changes to run the old tests. I personally
> believe we should only merge tests into the verification tester which
> everyone can run locally, but I'm open to proprietary tests, especially in
> the short term if we have a plan to make them not proprietary.
>
> Cheers,
> Jason
>
> On Fri, Apr 26, 2019 at 9:36 AM Giacomo Travaglini <
> giacomo.travagl...@arm.com> wrote:
>
> Hi Jason,
>
> It's really amazing that we have a testing framework in place, thanks for
> your effort!
> At the moment as far as I can tell we are only running tests registered
> within the new
> testing library.
>
> I was wondering if we could temporarily enable the system to run legacy
> quick regressions as well,
> while waiting for porting those to the new library. I guess it is
>

[gem5-dev] Change in gem5/gem5[master]: mem-cache: Support for page crossing prefetches

2019-05-03 Thread Javier Bueno Hedo (Gerrit) 
Hello Andreas Sandberg, kokoro, Daniel Carvalho, Giacomo Travaglini, Jason  
Lowe-Power, Nikos Nikoleris,


I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/c/public/gem5/+/14620

to look at the new patch set (#14).

Change subject: mem-cache: Support for page crossing prefetches
..

mem-cache: Support for page crossing prefetches

Prefetchers can now issue hardware prefetch requests that go beyond
the boundaries of the system page. Page crossing references will need
to look up the TLBs to be able to compute the physical address to be
prefetched.

Change-Id: Ib56374097e3b7dc87414139d210ea9272f96b06b
---
M src/arch/arm/tlb.cc
M src/mem/cache/prefetch/Prefetcher.py
M src/mem/cache/prefetch/base.cc
M src/mem/cache/prefetch/base.hh
M src/mem/cache/prefetch/queued.cc
M src/mem/cache/prefetch/queued.hh
6 files changed, 404 insertions(+), 110 deletions(-)


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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Ib56374097e3b7dc87414139d210ea9272f96b06b
Gerrit-Change-Number: 14620
Gerrit-PatchSet: 14
Gerrit-Owner: Javier Bueno Hedo 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Javier Bueno Hedo 
Gerrit-Reviewer: Nikos Nikoleris 
Gerrit-Reviewer: kokoro 
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[gem5-dev] Change in gem5/gem5[master]: sim-se: add eventfd system call

2019-05-03 Thread Brandon Potter (Gerrit) 
Brandon Potter has submitted this change and it was merged. (  
https://gem5-review.googlesource.com/c/public/gem5/+/12125 )


Change subject: sim-se: add eventfd system call
..

sim-se: add eventfd system call

Change-Id: I7aeb4fe808d0c8f2fb8041e3662d330d8458f09c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/12125
Tested-by: kokoro 
Reviewed-by: Ciro Santilli 
Maintainer: Brandon Potter 
---
M src/arch/x86/linux/process.cc
M src/sim/fd_entry.hh
M src/sim/syscall_emul.cc
M src/sim/syscall_emul.hh
4 files changed, 64 insertions(+), 33 deletions(-)

Approvals:
  Ciro Santilli: Looks good to me, approved
  Brandon Potter: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/x86/linux/process.cc b/src/arch/x86/linux/process.cc
index 9e8997a..f19dce3 100644
--- a/src/arch/x86/linux/process.cc
+++ b/src/arch/x86/linux/process.cc
@@ -510,13 +510,13 @@
 /* 281 */ SyscallDesc("epoll_pwait", unimplementedFunc),
 /* 282 */ SyscallDesc("signalfd", unimplementedFunc),
 /* 283 */ SyscallDesc("timerfd_create", unimplementedFunc),
-/* 284 */ SyscallDesc("eventfd", unimplementedFunc),
+/* 284 */ SyscallDesc("eventfd", eventfdFunc),
 /* 285 */ SyscallDesc("fallocate", fallocateFunc),
 /* 286 */ SyscallDesc("timerfd_settime", unimplementedFunc),
 /* 287 */ SyscallDesc("timerfd_gettime", unimplementedFunc),
 /* 288 */ SyscallDesc("accept4", unimplementedFunc),
 /* 289 */ SyscallDesc("signalfd4", unimplementedFunc),
-/* 290 */ SyscallDesc("eventfd2", unimplementedFunc),
+/* 290 */ SyscallDesc("eventfd2", eventfdFunc),
 /* 291 */ SyscallDesc("epoll_create1", unimplementedFunc),
 /* 292 */ SyscallDesc("dup3", unimplementedFunc),
 /* 293 */ SyscallDesc("pipe2", unimplementedFunc),
@@ -882,7 +882,7 @@
 /* 320 */ SyscallDesc("utimensat", unimplementedFunc),
 /* 321 */ SyscallDesc("signalfd", unimplementedFunc),
 /* 322 */ SyscallDesc("timerfd", unimplementedFunc),
-/* 323 */ SyscallDesc("eventfd", unimplementedFunc)
+/* 323 */ SyscallDesc("eventfd", eventfdFunc)
 };

 I386LinuxProcess::I386LinuxProcess(ProcessParams * params, ObjectFile  
*objFile)

diff --git a/src/sim/fd_entry.hh b/src/sim/fd_entry.hh
index 15e174a..94c874a 100644
--- a/src/sim/fd_entry.hh
+++ b/src/sim/fd_entry.hh
@@ -80,6 +80,16 @@
 : FDEntry(close_on_exec), _flags(flags), _simFD(sim_fd)
 { }

+HBFDEntry(HBFDEntry const& reg, bool close_on_exec = false)
+: FDEntry(close_on_exec), _flags(reg._flags), _simFD(reg._simFD)
+{ }
+
+std::shared_ptr
+clone() const override
+{
+return std::make_shared(*this);
+}
+
 int getFlags() const { return _flags; }
 int getSimFD() const { return _simFD; }

diff --git a/src/sim/syscall_emul.cc b/src/sim/syscall_emul.cc
index a9490fa..bfec1f5 100644
--- a/src/sim/syscall_emul.cc
+++ b/src/sim/syscall_emul.cc
@@ -57,6 +57,12 @@
 using namespace std;
 using namespace TheISA;

+void
+warnUnsupportedOS(std::string syscall_name)
+{
+warn("Cannot invoke %s on host operating system.", syscall_name);
+}
+
 SyscallReturn
 unimplementedFunc(SyscallDesc *desc, int callnum, Process *process,
   ThreadContext *tc)
@@ -1036,9 +1042,7 @@
 SyscallReturn
 fallocateFunc(SyscallDesc *desc, int callnum, Process *p, ThreadContext  
*tc)

 {
-#if NO_FALLOCATE
-warn("Host OS cannot support calls to fallocate. Ignoring syscall");
-#else
+#if __linux__
 int index = 0;
 int tgt_fd = p->getSyscallArg(tc, index);
 int mode = p->getSyscallArg(tc, index);
@@ -1053,8 +1057,11 @@
 int result = fallocate(sim_fd, mode, offset, len);
 if (result < 0)
 return -errno;
-#endif
 return 0;
+#else
+warnUnsupportedOS("fallocate");
+return -1;
+#endif
 }

 SyscallReturn
diff --git a/src/sim/syscall_emul.hh b/src/sim/syscall_emul.hh
index 7996027..91db9ae 100644
--- a/src/sim/syscall_emul.hh
+++ b/src/sim/syscall_emul.hh
@@ -53,26 +53,18 @@
 #define NO_STAT64 0
 #endif

-#if (defined(__APPLE__) || defined(__OpenBSD__) ||  \
- defined(__FreeBSD__) || defined(__NetBSD__))
-#define NO_STATFS 1
-#else
-#define NO_STATFS 0
-#endif
-
-#if (defined(__APPLE__) || defined(__OpenBSD__) ||  \
- defined(__FreeBSD__) || defined(__NetBSD__))
-#define NO_FALLOCATE 1
-#else
-#define NO_FALLOCATE 0
-#endif
-
 ///
 /// @file syscall_emul.hh
 ///
 /// This file defines objects used to emulate syscalls from the target
 /// application on the host machine.

+#ifdef __linux__
+#include 
+#include 
+
+#endif
+
 #ifdef __CYGWIN32__
 #include 

@@ -84,14 +76,6 @@
 #include 
 #include 
 #include 
-
-#if (NO_STATFS == 0)
-#include 
-
-#else
-#include 
-
-#endif
 #include 
 #include 
 #include 
@@ -133,6 +117,7 @@
 //
 //

+void warnUnsupportedOS(std::string syscall_name);

 /// Handler for unimplemented

[gem5-dev] Change in gem5/gem5[master]: mem-cache: Mark block as dirty after a SWPrefetchEXResp

2019-05-03 Thread Nikos Nikoleris (Gerrit) 
Nikos Nikoleris has submitted this change and it was merged. (  
https://gem5-review.googlesource.com/c/public/gem5/+/17729 )


Change subject: mem-cache: Mark block as dirty after a SWPrefetchEXResp
..

mem-cache: Mark block as dirty after a SWPrefetchEXResp

This is a workaround for a bug introduced from the change:
59e3585a8 arch-arm: We add PRFM PST instruction for arm
which can cause deadlocks in the memory system.

The design of the classic memory system in gem5 makes the folloing two
assumptions:
* A cache that fetches a block with an intention to modify it, becomes
  the point of ordering and therefore commits to respond to any snoop
  requests [1].
* A cache that fetches an exclusive copy of the block, does so with
  the intention to modify it [2]. Immediately after it receives the
  block, it will write to it and mark it as dirty. As the point of
  ordering, it responds to any outstanding snoops.

The current implementation of prefetch exclusive request breaks the
second assumption. A cache can fetch an exclusive block without an
immediate intention to modify it. If the block is not modified, it
will not be marked as dirty. However, the cache has committed to
respond to outstanding snoops, and if the block is clean it
won't. This can result in deadlocks where a snoop gets stuck waiting
for responses.

One solution (implemented by this patch) is to unconditionally mark
the block dirty when filling due to a prefetch exclusive request.
This makes the PrefetchExReq behave like a WriteReq. However, as it
may mark as dirty a clean block, it creates the requirement for an
uncessary WritebackDirty in the future. In practice, this shouldn't be
a big problem unless the application is unnecessarily using prefetch
exclusive instructions.

Other solutions, would require deeper changes to the design of the
memory system to handle this properly.

[1]: When a cache commits to respond, it "informs" the xbar/PoC (point
of coherence) and the other caches of its intention to respond. As a
result the request will not be send to the main memory.
[2]: In fact the assumption is that in the needsWritable MSHR there is
at least one WriteReq before any snoops from other caches.

Change-Id: I378d3c0dadf25fc52e430b67102347b44d2f18ea
Signed-off-by: Nikos Nikoleris 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17729
Reviewed-by: Daniel Carvalho 
Tested-by: kokoro 
---
M src/mem/cache/base.cc
1 file changed, 26 insertions(+), 1 deletion(-)

Approvals:
  Daniel Carvalho: Looks good to me, approved
  Nikos Nikoleris: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index f087618..f31fbaf 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012-2013, 2018 ARM Limited
+ * Copyright (c) 2012-2013, 2018-2019 ARM Limited
  * All rights reserved.
  *
  * The license below extends only to copyright in the software and shall
@@ -1263,6 +1263,31 @@

 chatty_assert(!isReadOnly, "Should never see dirty snoop  
response "

   "in read-only cache %s\n", name());
+
+} else if (pkt->cmd.isSWPrefetch() && pkt->needsWritable()) {
+// All other copies of the block were invalidated and we
+// have an exclusive copy.
+
+// The coherence protocol assumes that if we fetched an
+// exclusive copy of the block, we have the intention to
+// modify it. Therefore the MSHR for the PrefetchExReq has
+// been the point of ordering and this cache has commited
+// to respond to snoops for the block.
+//
+// In most cases this is true anyway - a PrefetchExReq
+// will be followed by a WriteReq. However, if that
+// doesn't happen, the block is not marked as dirty and
+// the cache doesn't respond to snoops that has committed
+// to do so.
+//
+// To avoid deadlocks in cases where there is a snoop
+// between the PrefetchExReq and the expected WriteReq, we
+// proactively mark the block as Dirty.
+
+blk->status |= BlkDirty;
+
+panic_if(!isReadOnly, "Prefetch exclusive requests from  
read-only "

+ "cache %s\n", name());
 }
 }


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Gerrit-Project: public/gem5
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Gerrit-Change-Id: I378d3c0dadf25fc52e430b67102347b44d2f18ea
Gerrit-Change-Number: 17729
Gerrit-PatchSet: 3
Gerrit-Owner: Nikos Nikoleris 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Nikos Nikoleris 
Gerrit-Reviewer: kokoro 
Gerrit-CC: Jason Lowe-Power 
Gerrit-MessageType: merged

Re: [gem5-dev] Continuous integration is live!

2019-05-03 Thread Giacomo Travaglini 
Hi Jason,

I have seen patches being under review for a long time, and IMHO adding an 
extra 10-30 mins is not the real bottleneck.
I'd rather wait a little bit more but being sure I am not breaking anything...

about ruby protocols, let me say that we (in arm) are relatively happy with the 
current setup:

1) Quick regressions are run on a commit base (your presubmit.sh). This means 
it won't take a lot of time/computation
2) Long regressions (ruby protocols are tested here) are run every night on a 
batch of MERGED commits.
Which means at a certain point we just checkout origin/HEAD and we run long 
regressions.

This is the setup I would actually recommend: a sanity suite (quick) being run 
on a commit base, and more serious tests
(long) being run periodically. If you are scared about overloading the 
framework, you can always scale down our ambition
and run long regressions every two nights.
Running less frequently is better than not running at all 

Please let me know what you think about this; other devs are welcome to comment 
as well,

Giacomo



From: Jason Lowe-Power 
Sent: 02 May 2019 22:59
To: Giacomo Travaglini; Rahul Thakur
Cc: gem5 Developer List
Subject: Re: [gem5-dev] Continuous integration is live!

Hi Giacomo,

In tests/main.py we call scons and use the current environment defaults to 
build gem5. I don't know if the kokoro infrastructure supports other compilers. 
This might be something that Rahul can address.

I'm also not sure if we can find a way to run more compilations in parallel on 
Kokoro. I'm happy to refactor the test scripts to do this. However, as it is, 
we are currently compiling at least 4 binaries mostly sequentially, which is 
making the testing take a significant amount of time. If we add more compilers 
(and more Ruby protocols), this is going to begin to get out of hand. It would 
also be good to compile .fast, .opt, and .debug, but I believe we're only 
compiling .opt right now.

Cheers,
Jason

On Thu, May 2, 2019 at 5:53 AM Giacomo Travaglini 
mailto:giacomo.travagl...@arm.com>> wrote:
Hi Jason,

I understand; Another thing I would like to ask:

Which script is building gem5 in jenkins? Ideally it would be nice to build 
with BOTH gcc and clang (so that we avoid
periodic "fix clang build" patches. I would also make the version 
configurable/visible from the script so that
we can track changes in compiler support and people can compare failures in 
case they managed to build
seamlessly on their local workspace

Giacomo

From: Jason Lowe-Power mailto:ja...@lowepower.com>>
Sent: 26 April 2019 17:49
To: Giacomo Travaglini
Cc: gem5 Developer List
Subject: Re: [gem5-dev] Continuous integration is live!

Hi Giacomo,

You *do* have permission :). Anyone can modify tests/jenkins/presubmit.cfg and 
presubmit.sh. In fact, if you look at the history of the presubmit.sh, it *was* 
running the old tests. See 
https://gem5-review.googlesource.com/c/testing/jenkins-gem5-prod/+/18028, for 
instance.

The problem is that we can't distribute most of the binaries (e.g., SPEC 
binaries). We could probably upload them to a private location on the Google 
Cloud and have jenkins consume them that way, but I believe that will be more 
work than it's worth.

I personally believe that putting effort into porting tests is more worth 
everyone's time than trying to get the old tests to run, but that's just my 
opinion. I'm happy to merge changes to run the old tests. I personally believe 
we should only merge tests into the verification tester which everyone can run 
locally, but I'm open to proprietary tests, especially in the short term if we 
have a plan to make them not proprietary.

Cheers,
Jason

On Fri, Apr 26, 2019 at 9:36 AM Giacomo Travaglini 
mailto:giacomo.travagl...@arm.com>> wrote:
Hi Jason,

It's really amazing that we have a testing framework in place, thanks for your 
effort!
At the moment as far as I can tell we are only running tests registered within 
the new
testing library.

I was wondering if we could temporarily enable the system to run legacy quick 
regressions as well,
while waiting for porting those to the new library. I guess it is something 
that shouldn't require a lot of work

(just calling .util/regress I guess)

I am saying this since a patch recently merged broke some syscall emulation 
tests and I think it would
be beneficial for us to run the entire test suite straightaway while porting 
tests manually.
I could even handle it myself if I had permission to configure the system.

Let me know your thoughts,

Giacomo


From: gem5-dev mailto:gem5-dev-boun...@gem5.org>> on 
behalf of Jason Lowe-Power mailto:ja...@lowepower.com>>
Sent: 16 April 2019 16:30
To: gem5 Developer List; Rahul Thakur
Subject: [gem5-dev] Continuous integration is live!

Hi all,

We now have initial support for continuous integration testing! We should
all thank Google for donating the CPU time

[gem5-dev] Change in gem5/gem5[master]: base: Add argument to Coroutine class to not run on creation

2019-05-03 Thread Giacomo Travaglini (Gerrit) 

Hello kokoro, Gabe Black, Anthony Gutierrez,

I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/c/public/gem5/+/18588

to look at the new patch set (#2).

Change subject: base: Add argument to Coroutine class to not run on creation
..

base: Add argument to Coroutine class to not run on creation

In some cases, the point where you create a Coroutine is not the same as
where you want to start running it (and want it to switch back to). This
leads to the unnecessary overhead of switching in and out of the
Coroutine. This change adds an optional boolean argument to the
constructor for the Coroutine class to allow for overriding the default
behavior of running the Coroutine upon creation, which in specific cases
can be used to avoid the unnecessary overhead and improve simulator
performance.

Change-Id: I044698f85e81ee4144208aee30d133bcb462d35d
---
M src/base/coroutine.hh
M src/base/coroutine.test.cc
2 files changed, 29 insertions(+), 3 deletions(-)


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Gerrit-Change-Number: 18588
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Anthony Gutierrez 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Giacomo Travaglini 
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[gem5-dev] Change in gem5/gem5[master]: base: Provide a getter for Fiber::started boolean variable

2019-05-03 Thread Giacomo Travaglini (Gerrit) 
Giacomo Travaglini has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/18648



Change subject: base: Provide a getter for Fiber::started boolean variable
..

base: Provide a getter for Fiber::started boolean variable

This can be used to check if the fiber has started its execution.

Change-Id: Ie9222b8076756363c9f82c1333c76a352bcaf817
Signed-off-by: Giacomo Travaglini 
---
M src/base/fiber.cc
M src/base/fiber.hh
2 files changed, 8 insertions(+), 4 deletions(-)



diff --git a/src/base/fiber.cc b/src/base/fiber.cc
index 177459a..f4496b1 100644
--- a/src/base/fiber.cc
+++ b/src/base/fiber.cc
@@ -88,7 +88,7 @@

 Fiber::Fiber(Fiber *link, size_t stack_size) :
 link(link), stack(nullptr), stackSize(stack_size), guardPage(nullptr),
-guardPageSize(sysconf(_SC_PAGE_SIZE)), started(false), _finished(false)
+guardPageSize(sysconf(_SC_PAGE_SIZE)), _started(false),  
_finished(false)

 {
 if (stack_size) {
 guardPage = mmap(nullptr, guardPageSize + stack_size,
@@ -170,7 +170,7 @@
 if (_currentFiber == this)
 return;

-if (!started)
+if (!_started)
 createContext();

 // Switch out of the current Fiber's context and this one's in.
diff --git a/src/base/fiber.hh b/src/base/fiber.hh
index 4d95e03..ed95050 100644
--- a/src/base/fiber.hh
+++ b/src/base/fiber.hh
@@ -82,6 +82,10 @@
 ///
 bool finished() const { return _finished; };

+/// Returns whether the "main" function of this fiber has started.
+///
+bool started() const { return _started; };
+
 /// Get a pointer to the current running Fiber.
 ///
 static Fiber *currentFiber();
@@ -96,7 +100,7 @@
 /// mark itself as finished and switch to its link fiber.
 virtual void main() = 0;

-void setStarted() { started = true; }
+void setStarted() { _started = true; }

   private:
 static void entryTrampoline();
@@ -114,7 +118,7 @@
 unsigned valgrindStackId;
 #endif

-bool started;
+bool _started;
 bool _finished;
 void createContext();
 };

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[gem5-dev] Change in gem5/gem5[master]: arch-riscv, isa: Fix for compressed jump (c_j) imm

2019-05-03 Thread Avishay Tvila (Gerrit) 
Avishay Tvila has submitted this change and it was merged. (  
https://gem5-review.googlesource.com/c/public/gem5/+/17808 )


Change subject: arch-riscv,isa: Fix for compressed jump (c_j) imm
..

arch-riscv,isa: Fix for compressed jump (c_j) imm

c_j(al) has a special format, called CJ.
The jump offset format is instbits[12:2] --> offset[11|4|9:8|10|6|7|3:1|5]
Currently in decoder.isa, c_j format is JOp, the imm and branchTarget are  
incorrect
In the execute section (decoder.isa:228), the imm fields is ignored and the  
offset is calculated correctlly.

As a result, we get decoder flush for each c_j instance
I've added CJOp format in compressed.isa, and use it in execute section.
In addition, c_j is mappped to jal zero, cj_imm, and actually is neither  
indirect control nor a function call

I fixed the flags accordently.
I'll fix all IsRet, IsCall and IsIndirectControl flags for rest of  
(c_)jal(r) in my next commit.
I ran coremark -O0 before my fix and I got 37.7% branch miss-rate, after  
the fix the branch miss-rate is <13%


Change-Id: I608d5894a78a1ebefe36f21e21aaea68b42bccfc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17808
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Alec Roelke 
---
M src/arch/riscv/isa/bitfields.isa
M src/arch/riscv/isa/decoder.isa
M src/arch/riscv/isa/formats/compressed.isa
3 files changed, 34 insertions(+), 13 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  Alec Roelke: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/riscv/isa/bitfields.isa  
b/src/arch/riscv/isa/bitfields.isa

index 903fce3..20f1fc0 100644
--- a/src/arch/riscv/isa/bitfields.isa
+++ b/src/arch/riscv/isa/bitfields.isa
@@ -104,6 +104,14 @@
 def bitfield FC2 <6:2>;
 def bitfield FP2 <4:2>;
 def bitfield CJUMPIMM <12:2>;
+def bitfield CJUMPIMM3TO1 <5:3>;
+def bitfield CJUMPIMM4TO4 <11:11>;
+def bitfield CJUMPIMM5TO5 <2:2>;
+def bitfield CJUMPIMM6TO6 <7:7>;
+def bitfield CJUMPIMM7TO7 <6:6>;
+def bitfield CJUMPIMM9TO8 <10:9>;
+def bitfield CJUMPIMM10TO10 <8:8>;
+def bitfield CJUMPIMMSIGN <12:12>;
 def bitfield CIMM8 <12:5>;
 def bitfield CIMM6 <12:7>;
 def bitfield CIMM5 <6:2>;
diff --git a/src/arch/riscv/isa/decoder.isa b/src/arch/riscv/isa/decoder.isa
index 8de4829..8fcfba6 100644
--- a/src/arch/riscv/isa/decoder.isa
+++ b/src/arch/riscv/isa/decoder.isa
@@ -224,18 +224,9 @@
 }
 }
 }
-0x5: JOp::c_j({{
-int64_t offset = CJUMPIMM<3:1> << 1 |
- CJUMPIMM<9:9> << 4 |
- CJUMPIMM<0:0> << 5 |
- CJUMPIMM<5:5> << 6 |
- CJUMPIMM<4:4> << 7 |
- CJUMPIMM<8:7> << 8 |
- CJUMPIMM<6:6> << 10;
-if (CJUMPIMM<10:10> > 0)
-offset |= ~((int64_t)0x7FF);
-NPC = PC + offset;
-}}, IsIndirectControl, IsUncondControl, IsCall);
+0x5: CJOp::c_j({{
+NPC = PC + imm;
+}}, IsDirectControl, IsUncondControl);
 format CBOp {
 0x6: c_beqz({{
 if (Rp1 == 0)
diff --git a/src/arch/riscv/isa/formats/compressed.isa  
b/src/arch/riscv/isa/formats/compressed.isa

index 3ebc1c6..b520d53 100644
--- a/src/arch/riscv/isa/formats/compressed.isa
+++ b/src/arch/riscv/isa/formats/compressed.isa
@@ -47,6 +47,28 @@
 exec_output = ImmExecute.subst(iop)
 }};

+def format CJOp(code, *opt_flags) {{
+regs = ['_destRegIdx[0]', '_srcRegIdx[0]']
+imm_code = """
+   imm = CJUMPIMM3TO1 << 1 |
+ CJUMPIMM4TO4 << 4 |
+ CJUMPIMM5TO5 << 5 |
+ CJUMPIMM6TO6 << 6 |
+ CJUMPIMM7TO7 << 7 |
+ CJUMPIMM9TO8 << 8 |
+ CJUMPIMM10TO10 << 10;
+if (CJUMPIMMSIGN)
+imm |= ~((int64_t)0x7FF);
+"""
+iop = InstObjParams(name, Name, 'ImmOp',
+{'code': code, 'imm_code': imm_code,
+ 'regs': ','.join(regs)}, opt_flags)
+header_output = BranchDeclare.subst(iop)
+decoder_output = ImmConstructor.subst(iop)
+decode_block = BasicDecode.subst(iop)
+exec_output = BranchExecute.subst(iop)
+}};
+
 def format CBOp(code, *opt_flags) {{
 imm_code = """
 imm = CIMM5<2:1> << 1 |
@@ -78,4 +100,4 @@
 (header_output, decoder_output, decode_block, exec_output) = \
 LoadStoreBase(name, Name, sdisp_code, ea_code, memacc_code,  
mem_flags,

 inst_flags, 'Store', exec_template_base='Store')
-}};
\ No newline at end of file
+}};

--
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[gem5-dev] Change in gem5/gem5[master]: dev: StreamID generation in DMA device

2019-05-03 Thread Giacomo Travaglini (Gerrit) 
Giacomo Travaglini has submitted this change and it was merged. (  
https://gem5-review.googlesource.com/c/public/gem5/+/16749 )


Change subject: dev: StreamID generation in DMA device
..

dev: StreamID generation in DMA device

This patch is adding a StreamID tag to any DMA Packet. StreamIDs are
tags which are used by IOMMUs to distinguish between different
devices/functions.

For PCI devices for example, the RID (Pci Bus number, Pci Device
number, Pci Function number) could be stored in the Packet streamID
field.

For the DmaDevice base class, a simple pair of (Sub)StreamIDs has been
provided.  This is basically attaching a fixed (decided at python config
time) streamID per device.  If a derived device wants to implement a
more elaborate packet tagger (for example if it wants to have more than
one streamID), it needs to pass a different StreamID and SubstreamID to
the DmaPort interface (like dmaAction).

Change-Id: Ia17cf00437f7d3eb79211c1374134b174f90de59
Signed-off-by: Giacomo Travaglini 
Reviewed-by: Andreas Sandberg 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/16749
Reviewed-by: Daniel Carvalho 
Maintainer: Andreas Sandberg 
Tested-by: kokoro 
---
M src/dev/Device.py
M src/dev/dma_device.cc
M src/dev/dma_device.hh
3 files changed, 58 insertions(+), 13 deletions(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
  Daniel Carvalho: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/dev/Device.py b/src/dev/Device.py
index cb99010..0023f97 100644
--- a/src/dev/Device.py
+++ b/src/dev/Device.py
@@ -84,6 +84,13 @@
 abstract = True
 dma = MasterPort("DMA port")

+sid = Param.Unsigned(0,
+"Stream identifier used by an IOMMU to distinguish amongst "
+"several devices attached to it")
+ssid = Param.Unsigned(0,
+"Substream identifier used by an IOMMU to distinguish amongst "
+"several devices attached to it")
+

 class IsaFake(BasicPioDevice):
 type = 'IsaFake'
diff --git a/src/dev/dma_device.cc b/src/dev/dma_device.cc
index 327c924..1f8f0be 100644
--- a/src/dev/dma_device.cc
+++ b/src/dev/dma_device.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012, 2015, 2017 ARM Limited
+ * Copyright (c) 2012, 2015, 2017, 2019 ARM Limited
  * All rights reserved.
  *
  * The license below extends only to copyright in the software and shall
@@ -54,11 +54,14 @@
 #include "sim/clocked_object.hh"
 #include "sim/system.hh"

-DmaPort::DmaPort(ClockedObject *dev, System *s)
+DmaPort::DmaPort(ClockedObject *dev, System *s,
+ uint32_t sid, uint32_t ssid)
 : MasterPort(dev->name() + ".dma", dev),
   device(dev), sys(s), masterId(s->getMasterId(dev)),
   sendEvent([this]{ sendDma(); }, dev->name()),
-  pendingCount(0), inRetry(false)
+  pendingCount(0), inRetry(false),
+  defaultSid(sid),
+  defaultSSid(ssid)
 { }

 void
@@ -117,7 +120,7 @@
 }

 DmaDevice::DmaDevice(const Params *p)
-: PioDevice(p), dmaPort(this, sys)
+: PioDevice(p), dmaPort(this, sys, p->sid, p->ssid)
 { }

 void
@@ -148,7 +151,8 @@

 RequestPtr
 DmaPort::dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
-   uint8_t *data, Tick delay, Request::Flags flag)
+   uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay,
+   Request::Flags flag)
 {
 // one DMA request sender state for every action, that is then
 // split into many requests and packets based on the block size,
@@ -169,6 +173,9 @@
 req = std::make_shared(
 gen.addr(), gen.size(), flag, masterId);

+req->setStreamId(sid);
+req->setSubStreamId(ssid);
+
 req->taskId(ContextSwitchTaskId::DMA);
 PacketPtr pkt = new Packet(req, cmd);

@@ -191,6 +198,14 @@
 return req;
 }

+RequestPtr
+DmaPort::dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
+   uint8_t *data, Tick delay, Request::Flags flag)
+{
+return dmaAction(cmd, addr, size, event, data,
+ defaultSid, defaultSSid, delay, flag);
+}
+
 void
 DmaPort::queueDma(PacketPtr pkt)
 {
@@ -272,10 +287,6 @@
 return PioDevice::getPort(if_name, idx);
 }

-
-
-
-
 DmaReadFifo::DmaReadFifo(DmaPort &_port, size_t size,
  unsigned max_req_size,
  unsigned max_pending,
diff --git a/src/dev/dma_device.hh b/src/dev/dma_device.hh
index 4ea0626..8c2b6e2 100644
--- a/src/dev/dma_device.hh
+++ b/src/dev/dma_device.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012-2013, 2015, 2017 ARM Limited
+ * Copyright (c) 2012-2013, 2015, 2017, 2019 ARM Limited
  * All rights reserved.
  *
  * The license below extends only to copyright in the software and shall
@@ -134,6 +134,12 @@
  * send whatever it is that it's sending. */
 bool inRetry;

+/** Default streamId */
+const uint32_t defaultSid;
+
+

[gem5-dev] Cron /z/m5/regression/do-regression quick

2019-05-03 Thread Cron Daemon 
* 
build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic: 
FAILED!
* 
build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual:
 FAILED!
* 
build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing: 
FAILED!
* 
build/ALPHA/tests/opt/quick/fs/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic:
 FAILED!
* 
build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual:
 FAILED!
* build/NULL/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby: FAILED!
* 
build/NULL_MOESI_hammer/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_hammer:
 FAILED!
* 
build/NULL_MESI_Two_Level/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MESI_Two_Level:
 FAILED!
* 
build/NULL_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_CMP_directory:
 FAILED!
* 
build/NULL_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_CMP_token:
 FAILED!
* 
build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/minor-timing: 
FAILED!
* build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/o3-timing: 
FAILED!
* 
build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-atomic: 
FAILED!
* 
build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing: 
FAILED!
* 
build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing-ruby:
 FAILED!
* build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64f/o3-timing: 
FAILED!
* build/HSAIL_X86/tests/opt/quick/se/04.gpu/x86/linux/gpu-ruby-GPU_RfO: 
FAILED!
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/minor-timing: CHANGED!
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing: CHANGED!
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing: 
CHANGED!
* build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt: 
CHANGED!
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby: 
CHANGED!
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-atomic: 
CHANGED!
* 
build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-simple:
 CHANGED!
* 
build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-two-level:
 CHANGED!
* build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-atomic: CHANGED!
* build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing: CHANGED!
* build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing: CHANGED!
* build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby: 
CHANGED!
* 
build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-simple:
 CHANGED!
* 
build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-two-level:
 CHANGED!
* build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl: CHANGED!
* build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem: CHANGED!
* build/NULL/tests/opt/quick/se/80.dram-closepage/null/none/dram-lowp: 
CHANGED!
* build/NULL/tests/opt/quick/se/80.dram-openpage/null/none/dram-lowp: 
CHANGED!
* build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing: CHANGED!
* build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic: 
CHANGED!
* build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic: 
CHANGED!
* build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing: 
CHANGED!
* build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby: 
CHANGED!
* build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing: CHANGED!
* build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing: 
CHANGED!
* build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic: 
CHANGED!
* 
build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-simple:
 CHANGED!
* 
build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-two-level:
 CHANGED!
* build/SPARC/tests/opt/quick/se/10.mcf/sparc/linux/simple-atomic: CHANGED!
* 
build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp:
 CHANGED!
* 
build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp:
 CHANGED!
* 
build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp:
 CHANGED!
* build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-atomic: 
CHANGED!
* build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-timing: 
CHANGED!
* build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-atomic: 
CHANGED!
* build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing: 
CHANGED!
* build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing: CHANGED!
* build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic: CHANGED!
*

[gem5-dev] Change in gem5/gem5[master]: mips: Add an object file loader for linux.

2019-05-03 Thread Gabe Black (Gerrit) 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/18586



Change subject: mips: Add an object file loader for linux.
..

mips: Add an object file loader for linux.

Change-Id: Icae6430a210076117cf2ceadce52d6efbe58a5f3
---
M src/arch/mips/linux/process.cc
1 file changed, 31 insertions(+), 0 deletions(-)



diff --git a/src/arch/mips/linux/process.cc b/src/arch/mips/linux/process.cc
index b1c09a5..51c1101 100644
--- a/src/arch/mips/linux/process.cc
+++ b/src/arch/mips/linux/process.cc
@@ -34,6 +34,7 @@

 #include "arch/mips/isa_traits.hh"
 #include "arch/mips/linux/linux.hh"
+#include "base/loader/loader.hh"
 #include "base/trace.hh"
 #include "cpu/thread_context.hh"
 #include "debug/SyscallVerbose.hh"
@@ -47,6 +48,36 @@
 using namespace std;
 using namespace MipsISA;

+namespace
+{
+
+class MipsLinuxObjectFileLoader : public ObjectFileLoader
+{
+  public:
+Process *
+load(ProcessParams *params, ObjectFile *obj_file) override
+{
+if (obj_file->getArch() != ObjectFile::Mips)
+return nullptr;
+
+auto opsys = obj_file->getOpSys();
+
+if (opsys == ObjectFile::UnknownOpSys) {
+warn("Unknown operating system; assuming Linux.");
+opsys = ObjectFile::Linux;
+}
+
+if (opsys != ObjectFile::Linux)
+return nullptr;
+
+return new MipsLinuxProcess(params, obj_file);
+}
+};
+
+MipsLinuxObjectFileLoader loader;
+
+} // anonymous namespace
+
 /// Target uname() handler.
 static SyscallReturn
 unameFunc(SyscallDesc *desc, int callnum, Process *process,

--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Icae6430a210076117cf2ceadce52d6efbe58a5f3
Gerrit-Change-Number: 18586
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[master]: sparc: Add an object file loader for linux and solaris.

2019-05-03 Thread Gabe Black (Gerrit) 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/18629



Change subject: sparc: Add an object file loader for linux and solaris.
..

sparc: Add an object file loader for linux and solaris.

Change-Id: I76bcbc06714f7d538f03a8311994a868de3640f1
---
M src/arch/sparc/linux/process.cc
M src/arch/sparc/solaris/process.cc
2 files changed, 62 insertions(+), 0 deletions(-)



diff --git a/src/arch/sparc/linux/process.cc  
b/src/arch/sparc/linux/process.cc

index d12f130..788ee0a 100644
--- a/src/arch/sparc/linux/process.cc
+++ b/src/arch/sparc/linux/process.cc
@@ -34,6 +34,7 @@

 #include "arch/sparc/isa_traits.hh"
 #include "arch/sparc/registers.hh"
+#include "base/loader/loader.hh"
 #include "base/trace.hh"
 #include "cpu/thread_context.hh"
 #include "kern/linux/linux.hh"
@@ -44,6 +45,40 @@
 using namespace std;
 using namespace SparcISA;

+namespace
+{
+
+class SparcLinuxObjectFileLoader : public ObjectFileLoader
+{
+  public:
+Process *
+load(ProcessParams *params, ObjectFile *obj_file) override
+{
+auto arch = obj_file->getArch();
+auto opsys = obj_file->getOpSys();
+
+if (arch != ObjectFile::SPARC64 && arch != ObjectFile::SPARC32)
+return nullptr;
+
+if (opsys == ObjectFile::UnknownOpSys) {
+warn("Unknown operating system; assuming Linux.");
+opsys = ObjectFile::Linux;
+}
+
+if (opsys != ObjectFile::Linux)
+return nullptr;
+
+if (arch == ObjectFile::SPARC64)
+return new Sparc64LinuxProcess(params, obj_file);
+else
+return new Sparc32LinuxProcess(params, obj_file);
+}
+};
+
+SparcLinuxObjectFileLoader loader;
+
+} // anonymous namespace
+
 SyscallDesc*
 SparcLinuxProcess::getDesc(int callnum)
 {
diff --git a/src/arch/sparc/solaris/process.cc  
b/src/arch/sparc/solaris/process.cc

index bcdd088..0c163e1 100644
--- a/src/arch/sparc/solaris/process.cc
+++ b/src/arch/sparc/solaris/process.cc
@@ -32,6 +32,7 @@

 #include "arch/sparc/isa_traits.hh"
 #include "arch/sparc/registers.hh"
+#include "base/loader/loader.hh"
 #include "base/trace.hh"
 #include "cpu/thread_context.hh"
 #include "kern/solaris/solaris.hh"
@@ -42,6 +43,32 @@
 using namespace std;
 using namespace SparcISA;

+namespace
+{
+
+class SparcSolarisObjectFileLoader : public ObjectFileLoader
+{
+  public:
+Process *
+load(ProcessParams *params, ObjectFile *obj_file) override
+{
+auto arch = obj_file->getArch();
+auto opsys = obj_file->getOpSys();
+
+if (arch != ObjectFile::SPARC64 && arch != ObjectFile::SPARC32)
+return nullptr;
+
+if (opsys != ObjectFile::Solaris)
+return nullptr;
+
+return new SparcSolarisProcess(params, obj_file);
+}
+};
+
+SparcSolarisObjectFileLoader loader;
+
+} // anonymous namespace
+

 /// Target uname() handler.
 static SyscallReturn

--
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Gerrit-Branch: master
Gerrit-Change-Id: I76bcbc06714f7d538f03a8311994a868de3640f1
Gerrit-Change-Number: 18629
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
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[gem5-dev] Change in gem5/gem5[master]: sim: Make the Process create function use the object loader mechanism.

2019-05-03 Thread Gabe Black (Gerrit) 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/18631



Change subject: sim: Make the Process create function use the object loader  
mechanism.

..

sim: Make the Process create function use the object loader mechanism.

This gets rid of the big mass of #if-s around headers and around the
code which creates an object file.

As a nice side bonus, this also means that in addition to supporting
multiple OS/arch combinations simultaneously, the object file loader
could support multiple ISAs simultaneously as well, since each could
load and set up its object file loaders indepedently and without the
base process classes knowledge/involvement.

Change-Id: I0a19ad06e30e9062a96d27f00b66756eb3a595ba
---
M src/sim/process.cc
1 file changed, 4 insertions(+), 172 deletions(-)



diff --git a/src/sim/process.cc b/src/sim/process.cc
index d400b5d..1236c94 100644
--- a/src/sim/process.cc
+++ b/src/sim/process.cc
@@ -57,6 +57,7 @@
 #include 

 #include "base/intmath.hh"
+#include "base/loader/loader.hh"
 #include "base/loader/object_file.hh"
 #include "base/loader/symtab.hh"
 #include "base/statistics.hh"
@@ -72,34 +73,6 @@
 #include "sim/syscall_desc.hh"
 #include "sim/system.hh"

-#if THE_ISA == ALPHA_ISA
-#include "arch/alpha/linux/process.hh"
-
-#elif THE_ISA == SPARC_ISA
-#include "arch/sparc/linux/process.hh"
-#include "arch/sparc/solaris/process.hh"
-
-#elif THE_ISA == MIPS_ISA
-#include "arch/mips/linux/process.hh"
-
-#elif THE_ISA == ARM_ISA
-#include "arch/arm/freebsd/process.hh"
-#include "arch/arm/linux/process.hh"
-
-#elif THE_ISA == X86_ISA
-#include "arch/x86/linux/process.hh"
-
-#elif THE_ISA == POWER_ISA
-#include "arch/power/linux/process.hh"
-
-#elif THE_ISA == RISCV_ISA
-#include "arch/riscv/linux/process.hh"
-
-#else
-#error "THE_ISA not set"
-#endif
-
-
 using namespace std;
 using namespace TheISA;

@@ -573,151 +546,10 @@
 }

 ObjectFile *obj_file = createObjectFile(executable);
-if (obj_file == nullptr) {
-fatal("Can't load object file %s", executable);
-}
+fatal_if(!obj_file, "Can't load object file %s", executable);

-#if THE_ISA == ALPHA_ISA
-if (obj_file->getArch() != ObjectFile::Alpha)
-fatal("Object file architecture does not match compiled ISA  
(Alpha).");

+process = tryObjectFileLoaders(this, obj_file);
+fatal_if(!process, "Unknown error creating process object.");

-switch (obj_file->getOpSys()) {
-  case ObjectFile::UnknownOpSys:
-warn("Unknown operating system; assuming Linux.");
-// fall through
-  case ObjectFile::Linux:
-process = new AlphaLinuxProcess(this, obj_file);
-break;
-
-  default:
-fatal("Unknown/unsupported operating system.");
-}
-#elif THE_ISA == SPARC_ISA
-if (obj_file->getArch() != ObjectFile::SPARC64 &&
-obj_file->getArch() != ObjectFile::SPARC32)
-fatal("Object file architecture does not match compiled ISA  
(SPARC).");

-switch (obj_file->getOpSys()) {
-  case ObjectFile::UnknownOpSys:
-warn("Unknown operating system; assuming Linux.");
-// fall through
-  case ObjectFile::Linux:
-if (obj_file->getArch() == ObjectFile::SPARC64) {
-process = new Sparc64LinuxProcess(this, obj_file);
-} else {
-process = new Sparc32LinuxProcess(this, obj_file);
-}
-break;
-
-  case ObjectFile::Solaris:
-process = new SparcSolarisProcess(this, obj_file);
-break;
-
-  default:
-fatal("Unknown/unsupported operating system.");
-}
-#elif THE_ISA == X86_ISA
-if (obj_file->getArch() != ObjectFile::X86_64 &&
-obj_file->getArch() != ObjectFile::I386)
-fatal("Object file architecture does not match compiled ISA  
(x86).");

-switch (obj_file->getOpSys()) {
-  case ObjectFile::UnknownOpSys:
-warn("Unknown operating system; assuming Linux.");
-// fall through
-  case ObjectFile::Linux:
-if (obj_file->getArch() == ObjectFile::X86_64) {
-process = new X86_64LinuxProcess(this, obj_file);
-} else {
-process = new I386LinuxProcess(this, obj_file);
-}
-break;
-
-  default:
-fatal("Unknown/unsupported operating system.");
-}
-#elif THE_ISA == MIPS_ISA
-if (obj_file->getArch() != ObjectFile::Mips)
-fatal("Object file architecture does not match compiled ISA  
(MIPS).");

-switch (obj_file->getOpSys()) {
-  case ObjectFile::UnknownOpSys:
-warn("Unknown operating system; assuming Linux.");
-// fall through
-  case ObjectFile::Linux:
-process = new MipsLinuxProcess(this, obj_file);
-break;
-
-  default:
-fatal("Unknown/unsupported operating system.");
-}
-#elif THE_ISA == ARM_ISA
-ObjectFile::Arch arch = obj_file->getArch();
-if (arch !=

[gem5-dev] Change in gem5/gem5[master]: arm: Add an object file loader for linux and freebsd.

2019-05-03 Thread Gabe Black (Gerrit) 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/18585



Change subject: arm: Add an object file loader for linux and freebsd.
..

arm: Add an object file loader for linux and freebsd.

Change-Id: Ie5fd187a4897aa608ffc12278b23d3ee8c0f323c
---
M src/arch/arm/freebsd/process.cc
M src/arch/arm/linux/process.cc
2 files changed, 74 insertions(+), 0 deletions(-)



diff --git a/src/arch/arm/freebsd/process.cc  
b/src/arch/arm/freebsd/process.cc

index e6aa740..bf765a8 100644
--- a/src/arch/arm/freebsd/process.cc
+++ b/src/arch/arm/freebsd/process.cc
@@ -41,6 +41,7 @@

 #include "arch/arm/freebsd/freebsd.hh"
 #include "arch/arm/isa_traits.hh"
+#include "base/loader/loader.hh"
 #include "base/trace.hh"
 #include "cpu/thread_context.hh"
 #include "kern/freebsd/freebsd.hh"
@@ -52,6 +53,37 @@
 using namespace std;
 using namespace ArmISA;

+namespace
+{
+
+class ArmFreebsdObjectFileLoader : public ObjectFileLoader
+{
+  public:
+Process *
+load(ProcessParams *params, ObjectFile *obj_file) override
+{
+auto arch = obj_file->getArch();
+auto opsys = obj_file->getOpSys();
+
+if (arch != ObjectFile::Arm && arch != ObjectFile::Thumb &&
+arch != ObjectFile::Arm64) {
+return nullptr;
+}
+
+if (opsys != ObjectFile::FreeBSD)
+return nullptr;
+
+if (arch == ObjectFile::Arm64)
+return new ArmFreebsdProcess64(params, obj_file, arch);
+else
+return new ArmFreebsdProcess32(params, obj_file, arch);
+}
+};
+
+ArmFreebsdObjectFileLoader loader;
+
+} // anonymous namespace
+
 static SyscallReturn
 issetugidFunc(SyscallDesc *desc, int callnum, Process *process,
   ThreadContext *tc)
diff --git a/src/arch/arm/linux/process.cc b/src/arch/arm/linux/process.cc
index 99f4b2c..0641b11 100644
--- a/src/arch/arm/linux/process.cc
+++ b/src/arch/arm/linux/process.cc
@@ -50,6 +50,7 @@

 #include "arch/arm/isa_traits.hh"
 #include "arch/arm/linux/linux.hh"
+#include "base/loader/loader.hh"
 #include "base/trace.hh"
 #include "cpu/thread_context.hh"
 #include "kern/linux/linux.hh"
@@ -61,6 +62,47 @@
 using namespace std;
 using namespace ArmISA;

+namespace
+{
+
+class ArmLinuxObjectFileLoader : public ObjectFileLoader
+{
+  public:
+Process *
+load(ProcessParams *params, ObjectFile *obj_file) override
+{
+auto arch = obj_file->getArch();
+auto opsys = obj_file->getOpSys();
+
+if (arch != ObjectFile::Arm && arch != ObjectFile::Thumb &&
+arch != ObjectFile::Arm64) {
+return nullptr;
+}
+
+if (opsys == ObjectFile::UnknownOpSys) {
+warn("Unknown operating system; assuming Linux.");
+opsys = ObjectFile::Linux;
+}
+
+if (opsys == ObjectFile::LinuxArmOABI) {
+fatal("gem5 does not support ARM OABI binaries. Please  
recompile "

+"with an EABI compiler.");
+}
+
+if (opsys != ObjectFile::Linux)
+return nullptr;
+
+if (arch == ObjectFile::Arm64)
+return new ArmLinuxProcess64(params, obj_file, arch);
+else
+return new ArmLinuxProcess32(params, obj_file, arch);
+}
+};
+
+ArmLinuxObjectFileLoader loader;
+
+} // anonymous namespace
+
 /// Target uname() handler.
 static SyscallReturn
 unameFunc32(SyscallDesc *desc, int callnum, Process *process,

--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Ie5fd187a4897aa608ffc12278b23d3ee8c0f323c
Gerrit-Change-Number: 18585
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[master]: base: Add a type for keeping track of object file loaders.

2019-05-03 Thread Gabe Black (Gerrit) 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/18583



Change subject: base: Add a type for keeping track of object file loaders.
..

base: Add a type for keeping track of object file loaders.

This avoids having a big pile of #if-s in sim/process.cc and allows
dynamically adding new types of object file loaders which might
recognize new arch/OS combinations.

Change-Id: Ie3b9c1aa2974d30a61afc4fcc529ffd6a74d43e0
---
M src/base/SConscript
A src/base/loader/loader.cc
A src/base/loader/loader.hh
3 files changed, 116 insertions(+), 0 deletions(-)



diff --git a/src/base/SConscript b/src/base/SConscript
index 29f87eb..114036f 100644
--- a/src/base/SConscript
+++ b/src/base/SConscript
@@ -77,6 +77,7 @@
 Source('loader/ecoff_object.cc')
 Source('loader/elf_object.cc')
 Source('loader/hex_file.cc')
+Source('loader/loader.cc')
 Source('loader/object_file.cc')
 Source('loader/raw_object.cc')
 Source('loader/symtab.cc')
diff --git a/src/base/loader/loader.cc b/src/base/loader/loader.cc
new file mode 100644
index 000..82c3377
--- /dev/null
+++ b/src/base/loader/loader.cc
@@ -0,0 +1,63 @@
+/*
+ * Copyright 2019 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "base/loader/loader.hh"
+
+#include 
+
+namespace
+{
+
+typedef std::vector LoaderList;
+
+LoaderList &
+object_file_loaders()
+{
+static LoaderList loaders;
+return loaders;
+}
+
+} // anonymous namespace
+
+ObjectFileLoader::ObjectFileLoader()
+{
+object_file_loaders().emplace_back(this);
+}
+
+Process *
+tryObjectFileLoaders(ProcessParams *params, ObjectFile *obj_file)
+{
+for (auto : object_file_loaders()) {
+Process *p = loader->load(params, obj_file);
+if (p)
+return p;
+}
+
+return nullptr;
+}
diff --git a/src/base/loader/loader.hh b/src/base/loader/loader.hh
new file mode 100644
index 000..6725017
--- /dev/null
+++ b/src/base/loader/loader.hh
@@ -0,0 +1,52 @@
+/*
+ * Copyright 2019 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY

[gem5-dev] Change in gem5/gem5[master]: power: Add an object file loader for linux.

2019-05-03 Thread Gabe Black (Gerrit) 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/18587



Change subject: power: Add an object file loader for linux.
..

power: Add an object file loader for linux.

Change-Id: I64ce81e98a6dc96754554d0fdcd7d16b8a2752d4
---
M src/arch/power/linux/process.cc
1 file changed, 31 insertions(+), 0 deletions(-)



diff --git a/src/arch/power/linux/process.cc  
b/src/arch/power/linux/process.cc

index 664b93b..08f9bad 100644
--- a/src/arch/power/linux/process.cc
+++ b/src/arch/power/linux/process.cc
@@ -36,6 +36,7 @@

 #include "arch/power/isa_traits.hh"
 #include "arch/power/linux/linux.hh"
+#include "base/loader/loader.hh"
 #include "base/trace.hh"
 #include "cpu/thread_context.hh"
 #include "kern/linux/linux.hh"
@@ -47,6 +48,36 @@
 using namespace std;
 using namespace PowerISA;

+namespace
+{
+
+class PowerLinuxObjectFileLoader : public ObjectFileLoader
+{
+  public:
+Process *
+load(ProcessParams *params, ObjectFile *obj_file) override
+{
+if (obj_file->getArch() != ObjectFile::Power)
+return nullptr;
+
+auto opsys = obj_file->getOpSys();
+
+if (opsys == ObjectFile::UnknownOpSys) {
+warn("Unknown operating system; assuming Linux.");
+opsys = ObjectFile::Linux;
+}
+
+if (opsys != ObjectFile::Linux)
+return nullptr;
+
+return new PowerLinuxProcess(params, obj_file);
+}
+};
+
+PowerLinuxObjectFileLoader loader;
+
+} // anonymous namespace
+
 /// Target uname() handler.
 static SyscallReturn
 unameFunc(SyscallDesc *desc, int callnum, Process *process,

--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I64ce81e98a6dc96754554d0fdcd7d16b8a2752d4
Gerrit-Change-Number: 18587
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
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[gem5-dev] Change in gem5/gem5[master]: alpha: Add an object file loader for linux.

2019-05-03 Thread Gabe Black (Gerrit) 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/18584



Change subject: alpha: Add an object file loader for linux.
..

alpha: Add an object file loader for linux.

Change-Id: I91c4019567bdf74b2517fda597121a6ad107cb86
---
M src/arch/alpha/linux/process.cc
1 file changed, 31 insertions(+), 0 deletions(-)



diff --git a/src/arch/alpha/linux/process.cc  
b/src/arch/alpha/linux/process.cc

index c1162ba..cf722de 100644
--- a/src/arch/alpha/linux/process.cc
+++ b/src/arch/alpha/linux/process.cc
@@ -33,6 +33,7 @@

 #include "arch/alpha/isa_traits.hh"
 #include "arch/alpha/linux/linux.hh"
+#include "base/loader/loader.hh"
 #include "base/trace.hh"
 #include "cpu/thread_context.hh"
 #include "debug/SyscallVerbose.hh"
@@ -44,6 +45,36 @@
 using namespace std;
 using namespace AlphaISA;

+namespace
+{
+
+class AlphaLinuxObjectFileLoader : public ObjectFileLoader
+{
+  public:
+Process *
+load(ProcessParams *params, ObjectFile *obj_file) override
+{
+if (obj_file->getArch() != ObjectFile::Alpha)
+return nullptr;
+
+auto opsys = obj_file->getOpSys();
+
+if (opsys == ObjectFile::UnknownOpSys) {
+warn("Unknown operating system; assuming Linux.");
+opsys = ObjectFile::Linux;
+}
+
+if (opsys != ObjectFile::Linux)
+return nullptr;
+
+return new AlphaLinuxProcess(params, obj_file);
+}
+};
+
+AlphaLinuxObjectFileLoader loader;
+
+} // anonymous namespace
+
 /// Target uname() handler.
 static SyscallReturn
 unameFunc(SyscallDesc *desc, int callnum, Process *process,

--
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[gem5-dev] Change in gem5/gem5[master]: x86: Add an object file loader for linux.

2019-05-03 Thread Gabe Black (Gerrit) 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/18630



Change subject: x86: Add an object file loader for linux.
..

x86: Add an object file loader for linux.

Change-Id: I283dd1f52fd020ad3c226eb00fc9216ee034c67f
---
M src/arch/x86/linux/process.cc
1 file changed, 35 insertions(+), 0 deletions(-)



diff --git a/src/arch/x86/linux/process.cc b/src/arch/x86/linux/process.cc
index 9e8997a..c1eff35 100644
--- a/src/arch/x86/linux/process.cc
+++ b/src/arch/x86/linux/process.cc
@@ -44,6 +44,7 @@
 #include "arch/x86/isa_traits.hh"
 #include "arch/x86/linux/linux.hh"
 #include "arch/x86/registers.hh"
+#include "base/loader/loader.hh"
 #include "base/trace.hh"
 #include "cpu/thread_context.hh"
 #include "kern/linux/linux.hh"
@@ -54,6 +55,40 @@
 using namespace std;
 using namespace X86ISA;

+namespace
+{
+
+class X86LinuxObjectFileLoader : public ObjectFileLoader
+{
+  public:
+Process *
+load(ProcessParams *params, ObjectFile *obj_file) override
+{
+auto arch = obj_file->getArch();
+auto opsys = obj_file->getOpSys();
+
+if (arch != ObjectFile::X86_64 && arch != ObjectFile::I386)
+return nullptr;
+
+if (opsys == ObjectFile::UnknownOpSys) {
+warn("Unknown operating system; assuming Linux.");
+opsys = ObjectFile::Linux;
+}
+
+if (opsys != ObjectFile::Linux)
+return nullptr;
+
+if (arch == ObjectFile::X86_64)
+return new X86_64LinuxProcess(params, obj_file);
+else
+return new I386LinuxProcess(params, obj_file);
+}
+};
+
+X86LinuxObjectFileLoader loader;
+
+} // anonymous namespace
+
 /// Target uname() handler.
 static SyscallReturn
 unameFunc(SyscallDesc *desc, int callnum, Process *process,

--
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Gerrit-Change-Id: I283dd1f52fd020ad3c226eb00fc9216ee034c67f
Gerrit-Change-Number: 18630
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