[gem5-dev] Change in gem5/gem5[develop]: cpu-kvm: convert kvm base to new style stats

2020-09-02 Thread Eden Avivi (Gerrit) via gem5-dev 
Eden Avivi has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33796 )


Change subject: cpu-kvm: convert kvm base to new style stats
..

cpu-kvm: convert kvm base to new style stats

Change-Id: Iab2e99720cf9ac58edfcbdcedc944264eb12b7e1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33796
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/cpu/kvm/base.cc
M src/cpu/kvm/base.hh
2 files changed, 40 insertions(+), 78 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/cpu/kvm/base.cc b/src/cpu/kvm/base.cc
index 0afab1e..5e3ffd7 100644
--- a/src/cpu/kvm/base.cc
+++ b/src/cpu/kvm/base.cc
@@ -75,7 +75,7 @@
 false, Event::CPU_Tick_Pri),
   activeInstPeriod(0),
   perfControlledByTimer(params->usePerfOverflow),
-  hostFactor(params->hostFactor),
+  hostFactor(params->hostFactor), stats(this),
   ctrInsts(0)
 {
 if (pageSize == -1)
@@ -258,62 +258,22 @@

 }

-void
-BaseKvmCPU::regStats()
+BaseKvmCPU::StatGroup::StatGroup(Stats::Group *parent)
+: Stats::Group(parent),
+ADD_STAT(committedInsts, "Number of instructions committed"),
+ADD_STAT(numVMExits, "total number of KVM exits"),
+ADD_STAT(numVMHalfEntries,
+ "number of KVM entries to finalize pending operations"),
+ADD_STAT(numExitSignal, "exits due to signal delivery"),
+ADD_STAT(numMMIO, "number of VM exits due to memory mapped IO"),
+ADD_STAT(numCoalescedMMIO,
+ "number of coalesced memory mapped IO requests"),
+ADD_STAT(numIO, "number of VM exits due to legacy IO"),
+ADD_STAT(numHalt,
+ "number of VM exits due to wait for interrupt instructions"),
+ADD_STAT(numInterrupts, "number of interrupts delivered"),
+ADD_STAT(numHypercalls, "number of hypercalls")
 {
-using namespace Stats;
-
-BaseCPU::regStats();
-
-numInsts
-.name(name() + ".committedInsts")
-.desc("Number of instructions committed")
-;
-
-numVMExits
-.name(name() + ".numVMExits")
-.desc("total number of KVM exits")
-;
-
-numVMHalfEntries
-.name(name() + ".numVMHalfEntries")
-.desc("number of KVM entries to finalize pending operations")
-;
-
-numExitSignal
-.name(name() + ".numExitSignal")
-.desc("exits due to signal delivery")
-;
-
-numMMIO
-.name(name() + ".numMMIO")
-.desc("number of VM exits due to memory mapped IO")
-;
-
-numCoalescedMMIO
-.name(name() + ".numCoalescedMMIO")
-.desc("number of coalesced memory mapped IO requests")
-;
-
-numIO
-.name(name() + ".numIO")
-.desc("number of VM exits due to legacy IO")
-;
-
-numHalt
-.name(name() + ".numHalt")
-.desc("number of VM exits due to wait for interrupt instructions")
-;
-
-numInterrupts
-.name(name() + ".numInterrupts")
-.desc("number of interrupts delivered")
-;
-
-numHypercalls
-.name(name() + ".numHypercalls")
-.desc("number of hypercalls")
-;
 }

 void
@@ -672,7 +632,7 @@
   if (_kvmRun->exit_reason !=  KVM_EXIT_INTR) {
   _status = RunningService;
   } else {
-  ++numExitSignal;
+  ++stats.numExitSignal;
   _status = Running;
   }

@@ -735,7 +695,7 @@
 // then immediately exits.
 DPRINTF(KvmRun, "KVM: Delivering IO without full guest entry\n");

-++numVMHalfEntries;
+++stats.numVMHalfEntries;

 // Send a KVM_KICK_SIGNAL to the vCPU thread (i.e., this
 // thread). The KVM control signal is masked while executing
@@ -803,7 +763,7 @@

 /* Update statistics */
 numCycles += simCyclesExecuted;;
-numInsts += instsExecuted;
+stats.committedInsts += instsExecuted;
 ctrInsts += instsExecuted;
 system->totalNumInsts += instsExecuted;

@@ -813,7 +773,7 @@
 instsExecuted, hostCyclesExecuted, ticksExecuted,  
simCyclesExecuted);

 }

-++numVMExits;
+++stats.numVMExits;

 return ticksExecuted + flushCoalescedMMIO();
 }
@@ -821,7 +781,7 @@
 void
 BaseKvmCPU::kvmNonMaskableInterrupt()
 {
-++numInterrupts;
+++stats.numInterrupts;
 if (ioctl(KVM_NMI) == -1)
 panic("KVM: Failed to deliver NMI to virtual CPU\n");
 }
@@ -829,7 +789,7 @@
 void
 BaseKvmCPU::kvmInterrupt(const struct kvm_interrupt )
 {
-++numInterrupts;
+++stats.numInterrupts;
 if (ioctl(KVM_INTERRUPT, (void *)) == -1)
 panic("KVM: Failed to deliver interrupt to virtual CPU\n");
 }
@@ -1000,20 +960,20 @@

   case KVM_EXIT_IO:
   {
-++numIO;
+++stats.numIO;
 Tick ticks = handleKvmExitIO();

[gem5-dev] Change in gem5/gem5[develop]: tests: Removed author info from insttest test.py

2020-09-02 Thread Bobby R. Bruce (Gerrit) via gem5-dev 
Bobby R. Bruce has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33976 )



Change subject: tests: Removed author info from insttest test.py
..

tests: Removed author info from insttest test.py

We no longer include author information directly in gem5 source.

Change-Id: I460d399f25ea955e7cf3bf5ed002246199ef4436
---
M tests/gem5/insttest_se/test.py
1 file changed, 0 insertions(+), 2 deletions(-)



diff --git a/tests/gem5/insttest_se/test.py b/tests/gem5/insttest_se/test.py
index 519b349..8f9fd58 100644
--- a/tests/gem5/insttest_se/test.py
+++ b/tests/gem5/insttest_se/test.py
@@ -23,8 +23,6 @@
 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Bobby R. Bruce

 '''
 Test file for the insttest binary running on the SPARC ISA

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33976
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I460d399f25ea955e7cf3bf5ed002246199ef4436
Gerrit-Change-Number: 33976
Gerrit-PatchSet: 1
Gerrit-Owner: Bobby R. Bruce 
Gerrit-MessageType: newchange
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Jenkins build is back to normal : Nightly #55

2020-09-02 Thread jenkins-no-reply--- via gem5-dev 
See 
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: cpu-o3: convert fetch to new style stats

2020-09-02 Thread Eden Avivi (Gerrit) via gem5-dev 
Eden Avivi has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33815 )


Change subject: cpu-o3: convert fetch to new style stats
..

cpu-o3: convert fetch to new style stats

Change-Id: Ib50a303570ac1dd45ff11a32a823f47a6c4c02cd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33815
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/cpu/o3/cpu.cc
M src/cpu/o3/fetch.hh
M src/cpu/o3/fetch_impl.hh
3 files changed, 173 insertions(+), 198 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index d0a387c..a525ea4 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -441,7 +441,6 @@
 .precision(6);
 totalIpc =  sum(committedInsts) / numCycles;

-this->fetch.regStats();
 this->decode.regStats();
 this->rename.regStats();
 this->iew.regStats();
diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh
index 77c6336..16f0c5e 100644
--- a/src/cpu/o3/fetch.hh
+++ b/src/cpu/o3/fetch.hh
@@ -222,8 +222,6 @@
 /** Returns the name of fetch. */
 std::string name() const;

-/** Registers statistics. */
-void regStats();

 /** Registers probes. */
 void regProbePoints();
@@ -330,7 +328,8 @@
  const DynInstPtr squashInst, ThreadID tid);

 /** Squashes a specific thread and resets the PC. Also tells the CPU to
- * remove any instructions between fetch and decode that should be  
sqaushed.

+ * remove any instructions between fetch and decode
+ *  that should be sqaushed.
  */
 void squashFromDecode(const TheISA::PCState ,
   const DynInstPtr squashInst,
@@ -546,57 +545,65 @@
 /** Event used to delay fault generation of translation faults */
 FinishTranslationEvent finishTranslationEvent;

-// @todo: Consider making these vectors and tracking on a per thread  
basis.

-/** Stat for total number of cycles stalled due to an icache miss. */
-Stats::Scalar icacheStallCycles;
-/** Stat for total number of fetched instructions. */
-Stats::Scalar fetchedInsts;
-/** Total number of fetched branches. */
-Stats::Scalar fetchedBranches;
-/** Stat for total number of predicted branches. */
-Stats::Scalar predictedBranches;
-/** Stat for total number of cycles spent fetching. */
-Stats::Scalar fetchCycles;
-/** Stat for total number of cycles spent squashing. */
-Stats::Scalar fetchSquashCycles;
-/** Stat for total number of cycles spent waiting for translation */
-Stats::Scalar fetchTlbCycles;
-/** Stat for total number of cycles spent blocked due to other stages  
in

- * the pipeline.
- */
-Stats::Scalar fetchIdleCycles;
-/** Total number of cycles spent blocked. */
-Stats::Scalar fetchBlockedCycles;
-/** Total number of cycles spent in any other state. */
-Stats::Scalar fetchMiscStallCycles;
-/** Total number of cycles spent in waiting for drains. */
-Stats::Scalar fetchPendingDrainCycles;
-/** Total number of stall cycles caused by no active threads to run. */
-Stats::Scalar fetchNoActiveThreadStallCycles;
-/** Total number of stall cycles caused by pending traps. */
-Stats::Scalar fetchPendingTrapStallCycles;
-/** Total number of stall cycles caused by pending quiesce  
instructions. */

-Stats::Scalar fetchPendingQuiesceStallCycles;
-/** Total number of stall cycles caused by I-cache wait retrys. */
-Stats::Scalar fetchIcacheWaitRetryStallCycles;
-/** Stat for total number of fetched cache lines. */
-Stats::Scalar fetchedCacheLines;
-/** Total number of outstanding icache accesses that were dropped
- * due to a squash.
- */
-Stats::Scalar fetchIcacheSquashes;
-/** Total number of outstanding tlb accesses that were dropped
- * due to a squash.
- */
-Stats::Scalar fetchTlbSquashes;
-/** Distribution of number of instructions fetched each cycle. */
-Stats::Distribution fetchNisnDist;
-/** Rate of how often fetch was idle. */
-Stats::Formula idleRate;
-/** Number of branch fetches per cycle. */
-Stats::Formula branchRate;
-/** Number of instruction fetched per cycle. */
-Stats::Formula fetchRate;
+  protected:
+struct FetchStatGroup : public Stats::Group
+{
+FetchStatGroup(O3CPU *cpu, DefaultFetch *fetch);
+// @todo: Consider making these
+// vectors and tracking on a per thread basis.
+/** Stat for total number of cycles stalled due to an icache miss.  
*/

+Stats::Scalar icacheStallCycles;
+/** Stat for total number of fetched instructions. */
+Stats::Scalar insts;
+/** Total number of fetched branches. */
+Stats::Scalar branches;
+/**

[gem5-dev] Change in gem5/gem5[develop]: ext: Link gem5 libelf to ext/libelf/libelf.a

2020-09-02 Thread Hoa Nguyen (Gerrit) via gem5-dev 
Hoa Nguyen has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33941 )


Change subject: ext: Link gem5 libelf to ext/libelf/libelf.a
..

ext: Link gem5 libelf to ext/libelf/libelf.a

Currently, gem5 might use system's libelf library instead of
the one compiled from ext/libelf.
This commit tells scons to use ext/libelf version.

JIRA: https://gem5.atlassian.net/browse/GEM5-756

Signed-off-by: Hoa Nguyen 
Change-Id: I8dc4555c32a956e9f5249288c71982fa6a3678f7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33941
Reviewed-by: Gabe Black 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
M ext/libelf/SConscript
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  Gabe Black: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/ext/libelf/SConscript b/ext/libelf/SConscript
index 45f809d..3bf5b30 100644
--- a/ext/libelf/SConscript
+++ b/ext/libelf/SConscript
@@ -134,6 +134,6 @@
 m4env.Library('elf', [m4env.SharedObject(f) for f in elf_files])

 main.Prepend(CPPPATH=Dir('.'))
-main.Append(LIBS=['elf'])
+main.Append(LIBS=[File('libelf.a')])
 main.Prepend(LIBPATH=[Dir('.')])


--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33941
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I8dc4555c32a956e9f5249288c71982fa6a3678f7
Gerrit-Change-Number: 33941
Gerrit-PatchSet: 2
Gerrit-Owner: Hoa Nguyen 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Hoa Nguyen 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: ext: Revert "base: Use system libelf instead of ext"

2020-09-02 Thread Hoa Nguyen (Gerrit) via gem5-dev 
Hoa Nguyen has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33940 )


Change subject: ext: Revert "base: Use system libelf instead of ext"
..

ext: Revert "base: Use system libelf instead of ext"

This reverts commit bbb32ca1ef8eb8249cdca72be6171b94f61bd62e,
which tells scons to use the system's libelf instead of
ext/libelf.

Signed-off-by: Hoa Nguyen 
Change-Id: I3bb3e62f2ef0fbc72983c221d5570edb4b35d157
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33940
Reviewed-by: Gabe Black 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
M SConstruct
A ext/libelf/SConscript
M src/base/loader/elf_object.cc
M src/base/loader/elf_object.hh
4 files changed, 143 insertions(+), 8 deletions(-)

Approvals:
  Gabe Black: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/SConstruct b/SConstruct
index 4e47bda..4ac134b 100755
--- a/SConstruct
+++ b/SConstruct
@@ -716,10 +716,6 @@
   'and/or zlib.h header file.\n'
   'Please install zlib and try again.')

-if not conf.CheckLibWithHeader('elf', 'gelf.h', 'C++',
-   'elf_version(EV_CURRENT);'):
-error('Did not find ELF access library libelf')
-
 # If we have the protobuf compiler, also make sure we have the
 # development libraries. If the check passes, libprotobuf will be
 # automatically added to the LIBS environment variable. After
diff --git a/ext/libelf/SConscript b/ext/libelf/SConscript
new file mode 100644
index 000..45f809d
--- /dev/null
+++ b/ext/libelf/SConscript
@@ -0,0 +1,139 @@
+# -*- mode:python -*-
+
+# Copyright (c) 2004-2005 The Regents of The University of Michigan
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Nathan Binkert
+
+from __future__ import print_function
+
+import os, subprocess
+
+Import('main')
+
+from m5.util import compareVersions
+
+elf_files = []
+def ElfFile(filename):
+elf_files.append(File(filename))
+
+ElfFile('elf_begin.c')
+ElfFile('elf_cntl.c')
+ElfFile('elf_data.c')
+ElfFile('elf_end.c')
+ElfFile('elf_errmsg.c')
+ElfFile('elf_errno.c')
+ElfFile('elf_fill.c')
+ElfFile('elf_flag.c')
+ElfFile('elf_getarhdr.c')
+ElfFile('elf_getarsym.c')
+ElfFile('elf_getbase.c')
+ElfFile('elf_getident.c')
+ElfFile('elf_hash.c')
+ElfFile('elf_kind.c')
+ElfFile('elf_memory.c')
+ElfFile('elf_next.c')
+ElfFile('elf_phnum.c')
+ElfFile('elf_rand.c')
+ElfFile('elf_rawfile.c')
+ElfFile('elf_scn.c')
+ElfFile('elf_shnum.c')
+ElfFile('elf_shstrndx.c')
+ElfFile('elf_strptr.c')
+ElfFile('elf_update.c')
+ElfFile('elf_version.c')
+ElfFile('gelf_checksum.c')
+ElfFile('gelf_dyn.c')
+ElfFile('gelf_ehdr.c')
+ElfFile('gelf_fsize.c')
+ElfFile('gelf_getclass.c')
+ElfFile('gelf_phdr.c')
+ElfFile('gelf_rel.c')
+ElfFile('gelf_rela.c')
+ElfFile('gelf_shdr.c')
+ElfFile('gelf_sym.c')
+ElfFile('gelf_symshndx.c')
+ElfFile('gelf_xlate.c')
+ElfFile('libelf.c')
+ElfFile('libelf_align.c')
+ElfFile('libelf_allocate.c')
+ElfFile('libelf_ar.c')
+ElfFile('libelf_checksum.c')
+ElfFile('libelf_data.c')
+ElfFile('libelf_ehdr.c')
+ElfFile('libelf_extended.c')
+ElfFile('libelf_phdr.c')
+ElfFile('libelf_shdr.c')
+ElfFile('libelf_xlate.c')
+
+ElfFile('libelf_convert.c')
+ElfFile('libelf_fsize.c')
+ElfFile('libelf_msize.c')
+
+m4env = main.Clone()
+if m4env['GCC']:
+m4env.Append(CCFLAGS=['-Wno-pointer-sign',
+  '-Wno-unused-but-set-variable',
+  '-Wno-implicit-function-declaration',

[gem5-dev] Change in gem5/gem5[develop]: ext: Revert "ext: remove libelf"

2020-09-02 Thread Hoa Nguyen (Gerrit) via gem5-dev 
Hoa Nguyen has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33939 )


Change subject: ext: Revert "ext: remove libelf"
..

ext: Revert "ext: remove libelf"

This reverts commit fa13042b5a1b4120bb7d96d15170bbd5d5068fad,
which removes ext/libelf.

Signed-off-by: Hoa Nguyen 
Change-Id: Id0ffb480fa5f5fe8faa4816d367b580ebe4c38d7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33939
Reviewed-by: Gabe Black 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
A ext/libelf/_libelf.h
A ext/libelf/elf32.h
A ext/libelf/elf64.h
A ext/libelf/elf_begin.c
A ext/libelf/elf_cntl.c
A ext/libelf/elf_common.h
A ext/libelf/elf_data.c
A ext/libelf/elf_end.c
A ext/libelf/elf_errmsg.c
A ext/libelf/elf_errno.c
A ext/libelf/elf_fill.c
A ext/libelf/elf_flag.c
A ext/libelf/elf_getarhdr.c
A ext/libelf/elf_getarsym.c
A ext/libelf/elf_getbase.c
A ext/libelf/elf_getident.c
A ext/libelf/elf_hash.c
A ext/libelf/elf_kind.c
A ext/libelf/elf_memory.c
A ext/libelf/elf_next.c
A ext/libelf/elf_phnum.c
A ext/libelf/elf_queue.h
A ext/libelf/elf_rand.c
A ext/libelf/elf_rawfile.c
A ext/libelf/elf_scn.c
A ext/libelf/elf_shnum.c
A ext/libelf/elf_shstrndx.c
A ext/libelf/elf_strptr.c
A ext/libelf/elf_types.m4
A ext/libelf/elf_update.c
A ext/libelf/elf_version.c
A ext/libelf/gelf.h
A ext/libelf/gelf_checksum.c
A ext/libelf/gelf_dyn.c
A ext/libelf/gelf_ehdr.c
A ext/libelf/gelf_fsize.c
A ext/libelf/gelf_getclass.c
A ext/libelf/gelf_phdr.c
A ext/libelf/gelf_rel.c
A ext/libelf/gelf_rela.c
A ext/libelf/gelf_shdr.c
A ext/libelf/gelf_sym.c
A ext/libelf/gelf_symshndx.c
A ext/libelf/gelf_xlate.c
A ext/libelf/libelf.c
A ext/libelf/libelf.h
A ext/libelf/libelf_align.c
A ext/libelf/libelf_allocate.c
A ext/libelf/libelf_ar.c
A ext/libelf/libelf_checksum.c
A ext/libelf/libelf_convert.m4
A ext/libelf/libelf_data.c
A ext/libelf/libelf_ehdr.c
A ext/libelf/libelf_extended.c
A ext/libelf/libelf_fsize.m4
A ext/libelf/libelf_msize.m4
A ext/libelf/libelf_phdr.c
A ext/libelf/libelf_shdr.c
A ext/libelf/libelf_xlate.c
59 files changed, 9,701 insertions(+), 0 deletions(-)

Approvals:
  Gabe Black: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33939
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id0ffb480fa5f5fe8faa4816d367b580ebe4c38d7
Gerrit-Change-Number: 33939
Gerrit-PatchSet: 2
Gerrit-Owner: Hoa Nguyen 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Hoa Nguyen 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: cpu-minor: convert fetch2 to new style stats

2020-09-02 Thread Eden Avivi (Gerrit) via gem5-dev 
Eden Avivi has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33975 )



Change subject: cpu-minor: convert fetch2 to new style stats
..

cpu-minor: convert fetch2 to new style stats

Change-Id: Idfe0f1f256c93209fe51140b9cab3b454153c597
---
M src/cpu/minor/fetch2.cc
M src/cpu/minor/fetch2.hh
M src/cpu/minor/pipeline.cc
3 files changed, 44 insertions(+), 49 deletions(-)



diff --git a/src/cpu/minor/fetch2.cc b/src/cpu/minor/fetch2.cc
index d090edd..226bec9 100644
--- a/src/cpu/minor/fetch2.cc
+++ b/src/cpu/minor/fetch2.cc
@@ -69,7 +69,7 @@
 processMoreThanOneInput(params.fetch2CycleInput),
 branchPredictor(*params.branchPred),
 fetchInfo(params.numThreads),
-threadPriority(0)
+threadPriority(0), stats(_, this)
 {
 if (outputWidth < 1)
 fatal("%s: decodeInputWidth must be >= 1 (%d)\n", name,  
outputWidth);

@@ -413,17 +413,17 @@

 // Collect some basic inst class stats
 if (decoded_inst->isLoad())
-loadInstructions++;
+stats.loadInstructions++;
 else if (decoded_inst->isStore())
-storeInstructions++;
+stats.storeInstructions++;
 else if (decoded_inst->isAtomic())
-amoInstructions++;
+stats.amoInstructions++;
 else if (decoded_inst->isVector())
-vecInstructions++;
+stats.vecInstructions++;
 else if (decoded_inst->isFloating())
-fpInstructions++;
+stats.fpInstructions++;
 else if (decoded_inst->isInteger())
-intInstructions++;
+stats.intInstructions++;

 DPRINTF(Fetch, "Instruction extracted from line %s"
 " lineWidth: %d output_index: %d inputIndex: %d"
@@ -602,40 +602,33 @@
(*predictionOut.inputWire).isBubble();
 }

-void
-Fetch2::regStats()
+Fetch2::Fetch2Stats::Fetch2Stats(MinorCPU *cpu, Fetch2 *fetch2)
+  : Stats::Group(cpu, "fetch2"),
+  ADD_STAT(intInstructions,
+   "Number of integer instructions successfully decoded"),
+  ADD_STAT(fpInstructions,
+   "Number of floating point instructions successfully decoded"),
+  ADD_STAT(vecInstructions,
+   "Number of SIMD instructions successfully decoded"),
+  ADD_STAT(loadInstructions,
+   "Number of memory load instructions successfully decoded"),
+  ADD_STAT(storeInstructions,
+   "Number of memory store instructions successfully decoded"),
+  ADD_STAT(amoInstructions,
+   "Number of memory atomic instructions successfully decoded")
 {
-using namespace Stats;
-
-intInstructions
-.name(name() + ".int_instructions")
-.desc("Number of integer instructions successfully decoded")
-.flags(total);
-
-fpInstructions
-.name(name() + ".fp_instructions")
-.desc("Number of floating point instructions successfully decoded")
-.flags(total);
-
-vecInstructions
-.name(name() + ".vec_instructions")
-.desc("Number of SIMD instructions successfully decoded")
-.flags(total);
-
-loadInstructions
-.name(name() + ".load_instructions")
-.desc("Number of memory load instructions successfully decoded")
-.flags(total);
-
-storeInstructions
-.name(name() + ".store_instructions")
-.desc("Number of memory store instructions successfully decoded")
-.flags(total);
-
-amoInstructions
-.name(name() + ".amo_instructions")
-.desc("Number of memory atomic instructions successfully decoded")
-.flags(total);
+intInstructions
+.flags(Stats::total);
+fpInstructions
+.flags(Stats::total);
+vecInstructions
+.flags(Stats::total);
+loadInstructions
+.flags(Stats::total);
+storeInstructions
+.flags(Stats::total);
+amoInstructions
+.flags(Stats::total);
 }

 void
diff --git a/src/cpu/minor/fetch2.hh b/src/cpu/minor/fetch2.hh
index d9726a9..c01a1fb 100644
--- a/src/cpu/minor/fetch2.hh
+++ b/src/cpu/minor/fetch2.hh
@@ -163,13 +163,17 @@
 std::vector fetchInfo;
 ThreadID threadPriority;

-/** Stats */
-Stats::Scalar intInstructions;
-Stats::Scalar fpInstructions;
-Stats::Scalar vecInstructions;
-Stats::Scalar loadInstructions;
-Stats::Scalar storeInstructions;
-Stats::Scalar amoInstructions;
+struct Fetch2Stats : public Stats::Group
+{
+Fetch2Stats(MinorCPU *cpu, Fetch2 *fetch2);
+/** Stats */
+Stats::Scalar intInstructions;
+Stats::Scalar fpInstructions;
+Stats::Scalar

[gem5-dev] Change in gem5/gem5[develop]: mem,ext: Integrating DRAMSim3 with gem5

2020-09-02 Thread Mahyar Samani (Gerrit) via gem5-dev 
Mahyar Samani has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/31757 )


Change subject: mem,ext: Integrating DRAMSim3 with gem5
..

mem,ext: Integrating DRAMSim3 with gem5

Adding DRAMSim3 source code to the gem5 source code, the original
code was taken from umd-memsys github at https://github.com/umd-memsys/

Change-Id: I32c982206f33b0acf2121f322d15baa064c412c4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31757
Reviewed-by: Ayaz Akram 
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
A ext/dramsim3/README
A ext/dramsim3/SConscript
A src/mem/DRAMsim3.py
M src/mem/SConscript
A src/mem/dramsim3.cc
A src/mem/dramsim3.hh
A src/mem/dramsim3_wrapper.cc
A src/mem/dramsim3_wrapper.hh
8 files changed, 1,069 insertions(+), 0 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  Ayaz Akram: Looks good to me, but someone else must approve
  kokoro: Regressions pass



diff --git a/ext/dramsim3/README b/ext/dramsim3/README
new file mode 100644
index 000..f3ee0a4
--- /dev/null
+++ b/ext/dramsim3/README
@@ -0,0 +1,14 @@
+Follow these steps to get DRAMSim3 as part of gem5
+
+1. Download DRAMSim3
+1.1 Go to ext/dramsim3 (this directory)
+1.2 Clone DRAMSim3: git clone g...@github.com:umd-memsys/DRAMSim3.git  
DRAMsim3

+1.3 cd DRAMSim3 && mkdir build
+1.4 cd build
+1.5 cmake ..
+1.6 make
+
+2. Compile gem5
+2.1 cd gem5
+2.2 Business as usual
+
diff --git a/ext/dramsim3/SConscript b/ext/dramsim3/SConscript
new file mode 100644
index 000..9e5a3a1
--- /dev/null
+++ b/ext/dramsim3/SConscript
@@ -0,0 +1,69 @@
+# -*- mode:python -*-
+
+# Copyright (c) 2013 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+import os
+
+Import('main')
+
+thermal = False
+
+# See if we got a cloned DRAMSim3 repo as a subdirectory and set the
+# HAVE_DRAMSIM flag accordingly
+if not os.path.exists(Dir('.').srcnode().abspath + '/DRAMsim3'):
+main['HAVE_DRAMSIM3'] = False
+Return()
+
+# We have got the folder, so add the library and build the wrappers
+main['HAVE_DRAMSIM3'] = True
+
+
+dramsim_path = os.path.join(Dir('#').abspath, 'ext/dramsim3/DRAMsim3/')
+
+if thermal:
+superlu_path = os.path.join(dramsim_path, 'ext/SuperLU_MT_3.1/lib')
+main.Prepend(CPPPATH=Dir('.'))
+main.Append(LIBS=['dramsim3', 'superlu_mt_OPENMP', 'm', 'f77blas',
+  'atlas', 'gomp'],
+LIBPATH=[dramsim_path, superlu_path])
+else:
+main.Prepend(CPPPATH=Dir('.'))
+# a littel hacky but can get a shared library working
+main.Append(LIBS=['dramsim3', 'gomp'],
+LIBPATH=[dramsim_path],  # compile-time lookup
+RPATH=[dramsim_path],  # runtime lookup
+CPPPATH=[dramsim_path+'/src/'])
diff --git a/src/mem/DRAMsim3.py

[gem5-dev] Change in gem5/gem5[develop]: mem,ext: Fixed DRAMSim2 Integration

2020-09-02 Thread Mahyar Samani (Gerrit) via gem5-dev 
Mahyar Samani has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33938 )


Change subject: mem,ext: Fixed DRAMSim2 Integration
..

mem,ext: Fixed DRAMSim2 Integration

Fixed the way callbacks were used due to changes in
src/sim/callback.hh. Removed author line in SConsript.

Change-Id: I2c2b8dbe13e4f58680806126cd9cf209748e788a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33938
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M ext/dramsim2/SConscript
M src/mem/dramsim2.cc
2 files changed, 1 insertion(+), 2 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/ext/dramsim2/SConscript b/ext/dramsim2/SConscript
index 869d220..b4355fa 100644
--- a/ext/dramsim2/SConscript
+++ b/ext/dramsim2/SConscript
@@ -35,7 +35,6 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
-# Authors: Andreas Hansson

 import os

diff --git a/src/mem/dramsim2.cc b/src/mem/dramsim2.cc
index aeafad0..2307df0 100644
--- a/src/mem/dramsim2.cc
+++ b/src/mem/dramsim2.cc
@@ -68,7 +68,7 @@

 // Register a callback to compensate for the destructor not
 // being called. The callback prints the DRAMSim2 stats.
-registerExitCallback([]() { wrapper->printStats(); });
+registerExitCallback([this]() { wrapper.printStats(); });
 }

 void

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33938
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I2c2b8dbe13e4f58680806126cd9cf209748e788a
Gerrit-Change-Number: 33938
Gerrit-PatchSet: 3
Gerrit-Owner: Mahyar Samani 
Gerrit-Reviewer: Ayaz Akram 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Mahyar Samani 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Re: Scons minimum version breaks GCN-gpu dockerfile build

2020-09-02 Thread Jason Lowe-Power via gem5-dev 
It's AMD's GPGPU runtime framework: https://rocmdocs.amd.com/en/latest/

>From what I can tell (it's been many years since I've worked deeply with
AMD GPGPUs) the user and kernel APIs change incredibly frequently. So,
rather than trying to keep up with a moving target, the current GCN
(graphics core next, which is actually not "next" anymore but a couple of
generations behind) support in gem5 is tied to a version of ROCm from ~3-5
years ago. This requires Ubuntu 16.04. Kyle did a great job setting up a
docker environment with everything that's needed (
https://gem5.googlesource.com/public/gem5/+/refs/heads/develop/util/dockerfiles/gcn-gpu/Dockerfile).
Annoyingly, since gem5 (currently) only supports SE mode for GPGPUs you
have to use the docker container to build benchmarks, build gem5 *and run*
gem5.

Matt, Brad, Tony, Kyle and others can probably answer any deeper questions.

Cheers,
jason

On Wed, Sep 2, 2020 at 1:46 AM Gabe Black  wrote:

> What's a ROCM?
>
> Gabe
>
> On Tue, Sep 1, 2020 at 11:43 AM Jason Lowe-Power via gem5-dev <
> gem5-dev@gem5.org> wrote:
>
>> Hi Dan,
>>
>> :facepalm: At least this is on develop and not the stable branch!
>>
>> I think we need to get input from Kyle on this since he developed that
>> docker image. TBH, I think pip isn't a bad solution given that 16.04 is
>> more than four years old and we're stuck with that to support the older
>> version of the ROCM stack.
>>
>> Creating a jira issue would be appreciated. Please tag Kyle in it, if you
>> do that.
>>
>> Cheers,
>> Jason
>>
>> On Tue, Sep 1, 2020 at 11:19 AM Daniel Gerzhoy via gem5-dev <
>> gem5-dev@gem5.org> wrote:
>>
>>> Hey all,
>>>
>>> Pulled latest updates and the minimum version requirement for scons
>>> breaks the GCN-gpu dockerfile.
>>>
>>> My fix involved installing the latest scons via pip (after installing
>>> pip) but there is probably a better way to do it (apt-get) but it looks
>>> like the Ubuntu16.04 base for the DockerFile automatically points to 2.4
>>> not 3.0 and I haven't figured out how to get it to install 3.0 instead yet.
>>>
>>> I can open up a Jira ticket as well if that's desirable. (Also if I
>>> should have just done that instead of sending this email please let me
>>> know, still learning protocol).
>>>
>>> Thanks,
>>>
>>> Dan
>>> ___
>>> gem5-dev mailing list -- gem5-dev@gem5.org
>>> To unsubscribe send an email to gem5-dev-le...@gem5.org
>>> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
>>
>> ___
>> gem5-dev mailing list -- gem5-dev@gem5.org
>> To unsubscribe send an email to gem5-dev-le...@gem5.org
>> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
>
>
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Re: Scons minimum version breaks GCN-gpu dockerfile build

2020-09-02 Thread Gabe Black via gem5-dev 
What's a ROCM?

Gabe

On Tue, Sep 1, 2020 at 11:43 AM Jason Lowe-Power via gem5-dev <
gem5-dev@gem5.org> wrote:

> Hi Dan,
>
> :facepalm: At least this is on develop and not the stable branch!
>
> I think we need to get input from Kyle on this since he developed that
> docker image. TBH, I think pip isn't a bad solution given that 16.04 is
> more than four years old and we're stuck with that to support the older
> version of the ROCM stack.
>
> Creating a jira issue would be appreciated. Please tag Kyle in it, if you
> do that.
>
> Cheers,
> Jason
>
> On Tue, Sep 1, 2020 at 11:19 AM Daniel Gerzhoy via gem5-dev <
> gem5-dev@gem5.org> wrote:
>
>> Hey all,
>>
>> Pulled latest updates and the minimum version requirement for scons
>> breaks the GCN-gpu dockerfile.
>>
>> My fix involved installing the latest scons via pip (after installing
>> pip) but there is probably a better way to do it (apt-get) but it looks
>> like the Ubuntu16.04 base for the DockerFile automatically points to 2.4
>> not 3.0 and I haven't figured out how to get it to install 3.0 instead yet.
>>
>> I can open up a Jira ticket as well if that's desirable. (Also if I
>> should have just done that instead of sending this email please let me
>> know, still learning protocol).
>>
>> Thanks,
>>
>> Dan
>> ___
>> gem5-dev mailing list -- gem5-dev@gem5.org
>> To unsubscribe send an email to gem5-dev-le...@gem5.org
>> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
>
> ___
> gem5-dev mailing list -- gem5-dev@gem5.org
> To unsubscribe send an email to gem5-dev-le...@gem5.org
> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: mem: Relax packet limit in packet queue

2020-09-02 Thread Giacomo Travaglini (Gerrit) via gem5-dev 
Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/30317 )


Change subject: mem: Relax packet limit in packet queue
..

mem: Relax packet limit in packet queue

JIRA: https://gem5.atlassian.net/browse/GEM5-587

Change-Id: I4ac24bf18a0aff08a5b33c48179b882b27ef910c
Signed-off-by: Giacomo Travaglini 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30317
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/mem/packet_queue.cc
1 file changed, 3 insertions(+), 3 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/mem/packet_queue.cc b/src/mem/packet_queue.cc
index dab133c..fe08d49 100644
--- a/src/mem/packet_queue.cc
+++ b/src/mem/packet_queue.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012,2015,2018 ARM Limited
+ * Copyright (c) 2012,2015,2018-2020 ARM Limited
  * All rights reserved.
  *
  * The license below extends only to copyright in the software and shall
@@ -115,8 +115,8 @@

 // add a very basic sanity check on the port to ensure the
 // invisible buffer is not growing beyond reasonable limits
-if (!_disableSanityCheck && transmitList.size() > 100) {
-panic("Packet queue %s has grown beyond 100 packets\n",
+if (!_disableSanityCheck && transmitList.size() > 128) {
+panic("Packet queue %s has grown beyond 128 packets\n",
   name());
 }


--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/30317
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I4ac24bf18a0aff08a5b33c48179b882b27ef910c
Gerrit-Change-Number: 30317
Gerrit-PatchSet: 6
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Bradford Beckmann 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Matthew Poremba 
Gerrit-Reviewer: Timothy Hayes 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: arch: Add uReset helper to UPCState

2020-09-02 Thread Giacomo Travaglini (Gerrit) via gem5-dev 
Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/30315 )


Change subject: arch: Add uReset helper to UPCState
..

arch: Add uReset helper to UPCState

This allows to reset without advancing the pc

https://gem5.atlassian.net/browse/GEM5-587

Change-Id: Ied566f4cd5efed5eb500447d3f14388482435475
Signed-off-by: Giacomo Travaglini 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30315
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Alexandru Duțu 
---
M src/arch/generic/types.hh
1 file changed, 20 insertions(+), 0 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  Alexandru Duțu: Looks good to me, but someone else must approve
  kokoro: Regressions pass



diff --git a/src/arch/generic/types.hh b/src/arch/generic/types.hh
index f981e18..76df835 100644
--- a/src/arch/generic/types.hh
+++ b/src/arch/generic/types.hh
@@ -1,4 +1,16 @@
 /*
+ * Copyright (c) 2020 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
  * Copyright (c) 2010 Gabe Black
  * All rights reserved.
  *
@@ -247,6 +259,14 @@
 _nupc = 1;
 }

+// Reset the macroop's upc without advancing the regular pc.
+void
+uReset()
+{
+_upc = 0;
+_nupc = 1;
+}
+
 bool
 operator == (const UPCState ) const
 {

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/30315
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ied566f4cd5efed5eb500447d3f14388482435475
Gerrit-Change-Number: 30315
Gerrit-PatchSet: 5
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Alexandru Duțu 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Timothy Hayes 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
___
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-dev] Change in gem5/gem5[develop]: arch, mem: Initial Hardware Transactional Memory implementation

2020-09-02 Thread Giacomo Travaglini (Gerrit) via gem5-dev 
Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/30314 )


Change subject: arch, mem: Initial Hardware Transactional Memory  
implementation

..

arch, mem: Initial Hardware Transactional Memory implementation

Gem5 Hardware Transactional Memory (HTM)

Here we provide a brief note describing HTM support in Gem5 at
a high level.

HTM is an architectural feature that enables speculative concurrency in
a shared-memory system; groups of instructions known as transactions are
executed as an atomic unit. The system allows that transactions be
executed concurrently but intervenes if a transaction's
atomicity/isolation is jeapordised and takes corrective action. In this
implementation, corrective active explicitely means rolling back a
thread's architectural state and reverting any memory updates to a point
just before the transaction began.

This HTM implementation relies on--
(1) A checkpointing mechanism for architectural register state.
(2) Buffering speculative memory updates.

This patch is focusing on the definition of the HTM checkpoint (1)

The checkpointing mechanism is architecture dependent. Each ISA
leveraging HTM support can define a class HTMCheckpoint inhereting from
the generic one (GenericISA::HTMCheckpoint).

Those will need to save/restore the architectural state by overriding
the virtual HTMCheckpoint::save (when starting a transaction) and
HTMCheckpoint::restore (when aborting a transaction).

Instances of this class live in O3's ThreadState and Atomic's
SimpleThread.  It is up to the ISA to populate this instance when
executing an instruction that begins a new transaction.

JIRA: https://gem5.atlassian.net/browse/GEM5-587

Change-Id: Icd8d1913d23652d78fe89e930ab1e302eb52363d
Signed-off-by: Giacomo Travaglini 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30314
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/arch/generic/SConscript
A src/arch/generic/htm.cc
A src/arch/generic/htm.hh
M src/mem/SConscript
A src/mem/htm.cc
A src/mem/htm.hh
6 files changed, 396 insertions(+), 2 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/generic/SConscript b/src/arch/generic/SConscript
index 0cba60a..22654cd 100644
--- a/src/arch/generic/SConscript
+++ b/src/arch/generic/SConscript
@@ -1,4 +1,4 @@
-# Copyright (c) 2016 ARM Limited
+# Copyright (c) 2016, 2020 ARM Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -38,6 +38,8 @@

 Import('*')

+Source('htm.cc')
+
 if env['TARGET_ISA'] == 'null':
 Return()

diff --git a/src/arch/generic/htm.cc b/src/arch/generic/htm.cc
new file mode 100644
index 000..238178d
--- /dev/null
+++ b/src/arch/generic/htm.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2020 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE)