[gem5-dev] Jenkins build is back to normal : Compiler-Checks #21

2020-09-03 Thread jenkins-no-reply--- via gem5-dev
See 

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[gem5-dev] Change in gem5/gem5[develop]: util: add dev-hsa commit message tag

2020-09-03 Thread Matt Sinclair (Gerrit) via gem5-dev
Matt Sinclair has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/34095 )



Change subject: util: add dev-hsa commit message tag
..

util: add dev-hsa commit message tag

The dev-hsa commit message tag was originally an option, but
appears to have been removed during the merge of the AMD GCN3
staging branch.  This commit adds it back.

Change-Id: Ie755b5ebe6ca1e5e92583b1588fd7aaeddcb5b00
---
M util/git-commit-msg.py
1 file changed, 4 insertions(+), 4 deletions(-)



diff --git a/util/git-commit-msg.py b/util/git-commit-msg.py
index d33b5b0..9cba896 100755
--- a/util/git-commit-msg.py
+++ b/util/git-commit-msg.py
@@ -91,10 +91,10 @@
 valid_tags = ["arch", "arch-arm", "arch-gcn3",
 "arch-mips", "arch-power", "arch-riscv", "arch-sparc", "arch-x86",
 "base", "configs", "cpu", "cpu-kvm", "cpu-minor", "cpu-o3",
-"cpu-simple", "dev", "dev-arm", "dev-virtio", "ext", "fastmodel",
-"gpu-compute", "learning-gem5", "mem", "mem-cache", "mem-garnet",
-"mem-ruby", "misc", "python", "scons", "sim", "sim-se", "sim-power",
-"stats", "system", "system-arm", "systemc", "tests",
+"cpu-simple", "dev", "dev-arm", "dev-hsa", "dev-virtio", "ext",
+"fastmodel", "gpu-compute", "learning-gem5", "mem", "mem-cache",
+"mem-garnet", "mem-ruby", "misc", "python", "scons", "sim", "sim-se",
+"sim-power", "stats", "system", "system-arm", "systemc", "tests",
 "util", "RFC", "WIP"]

 tags = ''.join(commit_header.split(':')[0].split()).split(',')

--
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Gerrit-Branch: develop
Gerrit-Change-Id: Ie755b5ebe6ca1e5e92583b1588fd7aaeddcb5b00
Gerrit-Change-Number: 34095
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Gerrit-Owner: Matt Sinclair 
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[gem5-dev] Change in gem5/gem5[develop]: util: Install scons 3.1 from pip in gcn-gpu dockerfile

2020-09-03 Thread Kyle Roarty (Gerrit) via gem5-dev
Kyle Roarty has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/34075 )


Change subject: util: Install scons 3.1 from pip in gcn-gpu dockerfile
..

util: Install scons 3.1 from pip in gcn-gpu dockerfile

A previous commit updated the minimum required version of scons to 3.0

The gcn Dockerfile previously installed scons from apt, which installed
scons 2.4, as the Dockerfile is based on Ubuntu 16

This patch installs scons through pip, which installs scons 3.1

Change-Id: I4f731b301f97e25c730df26afde20ae1cdfaa1b3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34075
Reviewed-by: Matt Sinclair 
Reviewed-by: Daniel Gerzhoy 
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Matthew Poremba 
Maintainer: Matt Sinclair 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M util/dockerfiles/gcn-gpu/Dockerfile
1 file changed, 4 insertions(+), 1 deletion(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  Matthew Poremba: Looks good to me, approved
  Matt Sinclair: Looks good to me, but someone else must approve; Looks  
good to me, approved

  Daniel Gerzhoy: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/util/dockerfiles/gcn-gpu/Dockerfile  
b/util/dockerfiles/gcn-gpu/Dockerfile

index 4c17b42..065dad6 100644
--- a/util/dockerfiles/gcn-gpu/Dockerfile
+++ b/util/dockerfiles/gcn-gpu/Dockerfile
@@ -13,7 +13,6 @@
 git \
 ca-certificates \
 m4 \
-scons \
 zlib1g \
 zlib1g-dev \
 libprotobuf-dev \
@@ -24,6 +23,7 @@
 python \
 python-yaml \
 python-six \
+python-pip \
 wget \
 libpci3 \
 libelf1 \
@@ -37,6 +37,9 @@
 libpng12-dev \
 libelf-dev

+RUN python -m pip install -U pip && \
+python -m pip install -U setuptools scons
+
 ARG gem5_dist=http://dist.gem5.org/dist/develop

 # Install ROCm 1.6 binaries

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I4f731b301f97e25c730df26afde20ae1cdfaa1b3
Gerrit-Change-Number: 34075
Gerrit-PatchSet: 2
Gerrit-Owner: Kyle Roarty 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Daniel Gerzhoy 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Kyle Roarty 
Gerrit-Reviewer: Matt Sinclair 
Gerrit-Reviewer: Matthew Poremba 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Re: Scons minimum version breaks GCN-gpu dockerfile build

2020-09-03 Thread Daniel Gerzhoy via gem5-dev
Awesome, thanks Kyle!

Dan

On Thu, Sep 3, 2020 at 3:09 PM Kyle Roarty  wrote:

> Uploaded a patch
> https://gem5-review.googlesource.com/c/public/gem5/+/34075. I was able to
> build GCN3_X86 from this dockerfile.
>
> Kyle
> --
> *From:* ja...@lowepower.com 
> *Sent:* Thursday, September 3, 2020 1:23 PM
> *To:* Poremba, Matthew ; Daniel Gerzhoy <
> daniel.gerz...@gmail.com>
> *Cc:* gem5 Developer List ; Gabe Black <
> gabebl...@google.com>; Kyle Roarty 
> *Subject:* Re: [gem5-dev] Re: Scons minimum version breaks GCN-gpu
> dockerfile build
>
> @Daniel Gerzhoy , could you let us know how you
> modified the dockerfile?
>
> @Kyle or @Dan, if you can make an update to the dockerfile and push it,
> we'd appreciate it.
>
> It's really too bad (and difficult for everyone) that we're stuck on such
> a specific version of ROCm :).
>
> Cheers,
> Jason
>
> On Thu, Sep 3, 2020 at 11:11 AM Poremba, Matthew 
> wrote:
>
> [AMD Public Use]
>
>
>
> Hi all,
>
>
>
>
>
> I would also be interested if anyone has found a solution to this.  I
> currently cannot test any of the patches I was hoping to finish this week
> due to this issue.  I am not very familiar with docker, and after about 30
> minutes of going through documentation wasn’t even sure how to install
> additional things after the build command. Eventually I ended up rebuilding
> the whole image again.  I’ve also tried adding scons with pip, which seems
> to install the correct “script” for scons, however the “engine” version is
> still pointing to the older copy that ships with 16.04 so that again didn’t
> work. The last thing I am going to try it figure out what is installing the
> system version of scons (apt?) and remove that completely in hopes that it
> only finds the pip version.
>
>
>
>
>
> -Matt
>
>
>
> *From:* Jason Lowe-Power via gem5-dev 
> *Sent:* Wednesday, September 2, 2020 8:03 AM
> *To:* Gabe Black 
> *Cc:* gem5 Developer List ; Kyle Roarty <
> kroa...@wisc.edu>; Jason Lowe-Power 
> *Subject:* [gem5-dev] Re: Scons minimum version breaks GCN-gpu dockerfile
> build
>
>
>
> [CAUTION: External Email]
>
> It's AMD's GPGPU runtime framework: https://rocmdocs.amd.com/en/latest/
> 
>
>
>
> From what I can tell (it's been many years since I've worked deeply with
> AMD GPGPUs) the user and kernel APIs change incredibly frequently. So,
> rather than trying to keep up with a moving target, the current GCN
> (graphics core next, which is actually not "next" anymore but a couple of
> generations behind) support in gem5 is tied to a version of ROCm from ~3-5
> years ago. This requires Ubuntu 16.04. Kyle did a great job setting up a
> docker environment with everything that's needed (
> https://gem5.googlesource.com/public/gem5/+/refs/heads/develop/util/dockerfiles/gcn-gpu/Dockerfile
> ).
> Annoyingly, since gem5 (currently) only supports SE mode for GPGPUs you
> have to use the docker container to build benchmarks, build gem5 *and run*
> gem5.
>
>
>
> Matt, Brad, Tony, Kyle and others can probably answer any deeper questions.
>
>
>
> Cheers,
>
> jason
>
>
>
> On Wed, Sep 2, 2020 at 1:46 AM Gabe Black  wrote:
>
> What's a ROCM?
>
>
>
> Gabe
>
>
>
> On Tue, Sep 1, 2020 at 11:43 AM Jason Lowe-Power via gem5-dev <
> gem5-dev@gem5.org> wrote:
>
> Hi Dan,
>
>
>
> :facepalm: At least this is on develop and not the stable branch!
>
>
>
> I think we need to get input from Kyle on this since he developed that
> docker image. TBH, I think pip isn't a bad solution given that 16.04 is
> more than four years old and we're stuck with that to support the older
> version of the ROCM stack.
>
>
>
> Creating a jira issue would be appreciated. Please tag Kyle in it, if you
> do that.
>
>
>
> Cheers,
>
> Jason
>
>
>
> On Tue, Sep 1, 2020 at 11:19 AM Daniel Gerzhoy via gem5-dev <
> gem5-dev@gem5.org> wrote:
>
> Hey all,
>
>
>
> Pulled latest updates and the minimum version requirement for scons breaks
> the GCN-gpu dockerfile.
>
>
>
> My fix involved installing the latest scons via pip (after installing pip)
> but there is probably a better way to do it (apt-get) but it looks like the
> Ubuntu16.04 base for the DockerFile automatically points to 2.4 not 3.0 and
> I haven't figured out how to get it to install 3.0 instead yet.
>
>
>
> I can open up a Jira ticket as well if that's desirable. (Also if I should
> have just 

[gem5-dev] Change in gem5/gem5[develop]: util: Install scons 3.1 from pip in gcn-gpu dockerfile

2020-09-03 Thread Kyle Roarty (Gerrit) via gem5-dev
Kyle Roarty has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/34075 )



Change subject: util: Install scons 3.1 from pip in gcn-gpu dockerfile
..

util: Install scons 3.1 from pip in gcn-gpu dockerfile

A previous commit updated the minimum required version of scons to 3.0

The gcn Dockerfile previously installed scons from apt, which installed
scons 2.4, as the Dockerfile is based on Ubuntu 16

This patch installs scons through pip, which installs scons 3.1

Change-Id: I4f731b301f97e25c730df26afde20ae1cdfaa1b3
---
M util/dockerfiles/gcn-gpu/Dockerfile
1 file changed, 4 insertions(+), 1 deletion(-)



diff --git a/util/dockerfiles/gcn-gpu/Dockerfile  
b/util/dockerfiles/gcn-gpu/Dockerfile

index 4c17b42..065dad6 100644
--- a/util/dockerfiles/gcn-gpu/Dockerfile
+++ b/util/dockerfiles/gcn-gpu/Dockerfile
@@ -13,7 +13,6 @@
 git \
 ca-certificates \
 m4 \
-scons \
 zlib1g \
 zlib1g-dev \
 libprotobuf-dev \
@@ -24,6 +23,7 @@
 python \
 python-yaml \
 python-six \
+python-pip \
 wget \
 libpci3 \
 libelf1 \
@@ -37,6 +37,9 @@
 libpng12-dev \
 libelf-dev

+RUN python -m pip install -U pip && \
+python -m pip install -U setuptools scons
+
 ARG gem5_dist=http://dist.gem5.org/dist/develop

 # Install ROCm 1.6 binaries

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I4f731b301f97e25c730df26afde20ae1cdfaa1b3
Gerrit-Change-Number: 34075
Gerrit-PatchSet: 1
Gerrit-Owner: Kyle Roarty 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: cpu: convert thread_state to new style stats

2020-09-03 Thread Eden Avivi (Gerrit) via gem5-dev
Eden Avivi has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33400 )


Change subject: cpu: convert thread_state to new style stats
..

cpu: convert thread_state to new style stats

Change-Id: Ib8cc8633ca5fced63918a7a6d10e15126f7c7459
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33400
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/cpu/minor/execute.cc
M src/cpu/o3/cpu.cc
M src/cpu/thread_state.cc
M src/cpu/thread_state.hh
4 files changed, 28 insertions(+), 12 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc
index 3c94531..45ca002 100644
--- a/src/cpu/minor/execute.cc
+++ b/src/cpu/minor/execute.cc
@@ -865,7 +865,7 @@
 if (!inst->staticInst->isMicroop() ||  
inst->staticInst->isLastMicroop())

 {
 thread->numInst++;
-thread->numInsts++;
+thread->threadStats.numInsts++;
 cpu.stats.numInsts++;
 cpu.system->totalNumInsts++;

@@ -873,7 +873,7 @@
 thread->comInstEventQueue.serviceEvents(thread->numInst);
 }
 thread->numOp++;
-thread->numOps++;
+thread->threadStats.numOps++;
 cpu.stats.numOps++;
 cpu.stats.committedInstType[inst->id.threadId]
[inst->staticInst->opClass()]++;
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index a525ea4..562a332 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -1512,7 +1512,7 @@
 // Keep an instruction count.
 if (!inst->isMicroop() || inst->isLastMicroop()) {
 thread[tid]->numInst++;
-thread[tid]->numInsts++;
+thread[tid]->threadStats.numInsts++;
 committedInsts[tid]++;
 system->totalNumInsts++;

@@ -1520,7 +1520,7 @@
 thread[tid]->comInstEventQueue.serviceEvents(thread[tid]->numInst);
 }
 thread[tid]->numOp++;
-thread[tid]->numOps++;
+thread[tid]->threadStats.numOps++;
 committedOps[tid]++;

 probeInstCommit(inst->staticInst, inst->instAddr());
diff --git a/src/cpu/thread_state.cc b/src/cpu/thread_state.cc
index f681abc..a142f57 100644
--- a/src/cpu/thread_state.cc
+++ b/src/cpu/thread_state.cc
@@ -39,7 +39,8 @@
 #include "sim/system.hh"

 ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process)
-: numInst(0), numOp(0), numLoad(0), startNumLoad(0),
+: numInst(0), numOp(0), threadStats(cpu, this),
+  numLoad(0), startNumLoad(0),
   _status(ThreadContext::Halted), baseCpu(cpu),
   _contextId(0), _threadId(_tid), lastActivate(0), lastSuspend(0),
   process(_process), physProxy(NULL), virtProxy(NULL),
@@ -116,3 +117,13 @@
 assert(virtProxy != NULL);
 return *virtProxy;
 }
+
+ThreadState::ThreadStateStats::ThreadStateStats(BaseCPU *cpu,
+ThreadState *thread)
+  : Stats::Group(cpu, csprintf("thread%i",  
thread->threadId()).c_str()),

+  ADD_STAT(numInsts, "Number of Instructions committed"),
+  ADD_STAT(numOps, "Number of Ops committed"),
+  ADD_STAT(numMemRefs, "Number of Memory References")
+{
+
+}
diff --git a/src/cpu/thread_state.hh b/src/cpu/thread_state.hh
index 1cc92a1..3ac473d 100644
--- a/src/cpu/thread_state.hh
+++ b/src/cpu/thread_state.hh
@@ -106,14 +106,19 @@

 /** Number of instructions committed. */
 Counter numInst;
-/** Stat for number instructions committed. */
-Stats::Scalar numInsts;
-/** Number of ops (including micro ops) committed. */
+ /** Number of ops (including micro ops) committed. */
 Counter numOp;
-/** Stat for number ops (including micro ops) committed. */
-Stats::Scalar numOps;
-/** Stat for number of memory references. */
-Stats::Scalar numMemRefs;
+// Defining the stat group
+struct ThreadStateStats : public Stats::Group
+{
+ThreadStateStats(BaseCPU *cpu, ThreadState *thread);
+/** Stat for number instructions committed. */
+Stats::Scalar numInsts;
+/** Stat for number ops (including micro ops) committed. */
+Stats::Scalar numOps;
+/** Stat for number of memory references. */
+Stats::Scalar numMemRefs;
+} threadStats;

 /** Number of simulated loads, used for tracking events based on
  * the number of loads committed.

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ib8cc8633ca5fced63918a7a6d10e15126f7c7459
Gerrit-Change-Number: 33400
Gerrit-PatchSet: 13
Gerrit-Owner: Eden Avivi 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Eden Avivi 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 

[gem5-dev] Re: Scons minimum version breaks GCN-gpu dockerfile build

2020-09-03 Thread Jason Lowe-Power via gem5-dev
@Daniel Gerzhoy , could you let us know how you
modified the dockerfile?

@Kyle or @Dan, if you can make an update to the dockerfile and push it,
we'd appreciate it.

It's really too bad (and difficult for everyone) that we're stuck on such a
specific version of ROCm :).

Cheers,
Jason

On Thu, Sep 3, 2020 at 11:11 AM Poremba, Matthew 
wrote:

> [AMD Public Use]
>
>
>
> Hi all,
>
>
>
>
>
> I would also be interested if anyone has found a solution to this.  I
> currently cannot test any of the patches I was hoping to finish this week
> due to this issue.  I am not very familiar with docker, and after about 30
> minutes of going through documentation wasn’t even sure how to install
> additional things after the build command. Eventually I ended up rebuilding
> the whole image again.  I’ve also tried adding scons with pip, which seems
> to install the correct “script” for scons, however the “engine” version is
> still pointing to the older copy that ships with 16.04 so that again didn’t
> work. The last thing I am going to try it figure out what is installing the
> system version of scons (apt?) and remove that completely in hopes that it
> only finds the pip version.
>
>
>
>
>
> -Matt
>
>
>
> *From:* Jason Lowe-Power via gem5-dev 
> *Sent:* Wednesday, September 2, 2020 8:03 AM
> *To:* Gabe Black 
> *Cc:* gem5 Developer List ; Kyle Roarty <
> kroa...@wisc.edu>; Jason Lowe-Power 
> *Subject:* [gem5-dev] Re: Scons minimum version breaks GCN-gpu dockerfile
> build
>
>
>
> [CAUTION: External Email]
>
> It's AMD's GPGPU runtime framework: https://rocmdocs.amd.com/en/latest/
> 
>
>
>
> From what I can tell (it's been many years since I've worked deeply with
> AMD GPGPUs) the user and kernel APIs change incredibly frequently. So,
> rather than trying to keep up with a moving target, the current GCN
> (graphics core next, which is actually not "next" anymore but a couple of
> generations behind) support in gem5 is tied to a version of ROCm from ~3-5
> years ago. This requires Ubuntu 16.04. Kyle did a great job setting up a
> docker environment with everything that's needed (
> https://gem5.googlesource.com/public/gem5/+/refs/heads/develop/util/dockerfiles/gcn-gpu/Dockerfile
> ).
> Annoyingly, since gem5 (currently) only supports SE mode for GPGPUs you
> have to use the docker container to build benchmarks, build gem5 *and run*
> gem5.
>
>
>
> Matt, Brad, Tony, Kyle and others can probably answer any deeper questions.
>
>
>
> Cheers,
>
> jason
>
>
>
> On Wed, Sep 2, 2020 at 1:46 AM Gabe Black  wrote:
>
> What's a ROCM?
>
>
>
> Gabe
>
>
>
> On Tue, Sep 1, 2020 at 11:43 AM Jason Lowe-Power via gem5-dev <
> gem5-dev@gem5.org> wrote:
>
> Hi Dan,
>
>
>
> :facepalm: At least this is on develop and not the stable branch!
>
>
>
> I think we need to get input from Kyle on this since he developed that
> docker image. TBH, I think pip isn't a bad solution given that 16.04 is
> more than four years old and we're stuck with that to support the older
> version of the ROCM stack.
>
>
>
> Creating a jira issue would be appreciated. Please tag Kyle in it, if you
> do that.
>
>
>
> Cheers,
>
> Jason
>
>
>
> On Tue, Sep 1, 2020 at 11:19 AM Daniel Gerzhoy via gem5-dev <
> gem5-dev@gem5.org> wrote:
>
> Hey all,
>
>
>
> Pulled latest updates and the minimum version requirement for scons breaks
> the GCN-gpu dockerfile.
>
>
>
> My fix involved installing the latest scons via pip (after installing pip)
> but there is probably a better way to do it (apt-get) but it looks like the
> Ubuntu16.04 base for the DockerFile automatically points to 2.4 not 3.0 and
> I haven't figured out how to get it to install 3.0 instead yet.
>
>
>
> I can open up a Jira ticket as well if that's desirable. (Also if I should
> have just done that instead of sending this email please let me know, still
> learning protocol).
>
>
>
> Thanks,
>
>
>
> Dan
>
> ___
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>
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[gem5-dev] Change in gem5/gem5[develop]: cpu: convert bpred_unit to new style stats

2020-09-03 Thread Emily Brickey (Gerrit) via gem5-dev
Emily Brickey has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33797 )


Change subject: cpu: convert bpred_unit to new style stats
..

cpu: convert bpred_unit to new style stats

Change-Id: Ife80b2df3cb900a73a4f0c1d6925d9ed2d625dd0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33797
Reviewed-by: Trivikram Reddy 
Reviewed-by: Jason Lowe-Power 
Tested-by: kokoro 
Maintainer: Jason Lowe-Power 
---
M src/cpu/pred/bpred_unit.cc
M src/cpu/pred/bpred_unit.hh
2 files changed, 57 insertions(+), 113 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  Trivikram Reddy: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/cpu/pred/bpred_unit.cc b/src/cpu/pred/bpred_unit.cc
index ec9c5f8..d0ed71d 100644
--- a/src/cpu/pred/bpred_unit.cc
+++ b/src/cpu/pred/bpred_unit.cc
@@ -60,84 +60,31 @@
   params->numThreads),
   RAS(numThreads),
   iPred(params->indirectBranchPred),
+  stats(this),
   instShiftAmt(params->instShiftAmt)
 {
 for (auto& r : RAS)
 r.init(params->RASSize);
 }

-void
-BPredUnit::regStats()
+BPredUnit::BPredUnitStats::BPredUnitStats(Stats::Group *parent)
+: Stats::Group(parent),
+  ADD_STAT(lookups, "Number of BP lookups"),
+  ADD_STAT(condPredicted, "Number of conditional branches predicted"),
+  ADD_STAT(condIncorrect, "Number of conditional branches incorrect"),
+  ADD_STAT(BTBLookups, "Number of BTB lookups"),
+  ADD_STAT(BTBHits, "Number of BTB hits"),
+  ADD_STAT(BTBHitPct, "BTB Hit Percentage",
+   (BTBHits / BTBLookups) * 100),
+  ADD_STAT(RASUsed, "Number of times the RAS was used to get a  
target."),

+  ADD_STAT(RASIncorrect, "Number of incorrect RAS predictions."),
+  ADD_STAT(indirectLookups, "Number of indirect predictor lookups."),
+  ADD_STAT(indirectHits, "Number of indirect target hits."),
+  ADD_STAT(indirectMisses, "Number of indirect misses."),
+  ADD_STAT(indirectMispredicted, "Number of mispredicted indirect"
+  " branches.")
 {
-SimObject::regStats();
-
-lookups
-.name(name() + ".lookups")
-.desc("Number of BP lookups")
-;
-
-condPredicted
-.name(name() + ".condPredicted")
-.desc("Number of conditional branches predicted")
-;
-
-condIncorrect
-.name(name() + ".condIncorrect")
-.desc("Number of conditional branches incorrect")
-;
-
-BTBLookups
-.name(name() + ".BTBLookups")
-.desc("Number of BTB lookups")
-;
-
-BTBHits
-.name(name() + ".BTBHits")
-.desc("Number of BTB hits")
-;
-
-BTBCorrect
-.name(name() + ".BTBCorrect")
-.desc("Number of correct BTB predictions (this stat may not "
-  "work properly.")
-;
-
-BTBHitPct
-.name(name() + ".BTBHitPct")
-.desc("BTB Hit Percentage")
-.precision(6);
-BTBHitPct = (BTBHits / BTBLookups) * 100;
-
-usedRAS
-.name(name() + ".usedRAS")
-.desc("Number of times the RAS was used to get a target.")
-;
-
-RASIncorrect
-.name(name() + ".RASInCorrect")
-.desc("Number of incorrect RAS predictions.")
-;
-
-indirectLookups
-.name(name() + ".indirectLookups")
-.desc("Number of indirect predictor lookups.")
-;
-
-indirectHits
-.name(name() + ".indirectHits")
-.desc("Number of indirect target hits.")
-;
-
-indirectMisses
-.name(name() + ".indirectMisses")
-.desc("Number of indirect misses.")
-;
-
-indirectMispredicted
-.name(name() + "indirectMispredicted")
-.desc("Number of mispredicted indirect branches.")
-;
-
+BTBHitPct.precision(6);
 }

 ProbePoints::PMUUPtr
@@ -177,7 +124,7 @@
 bool pred_taken = false;
 TheISA::PCState target = pc;

-++lookups;
+++stats.lookups;
 ppBranches->notify(1);

 void *bp_history = NULL;
@@ -191,7 +138,7 @@
 // Tell the BP there was an unconditional branch.
 uncondBranch(tid, pc.instAddr(), bp_history);
 } else {
-++condPredicted;
+++stats.condPredicted;
 pred_taken = lookup(tid, pc.instAddr(), bp_history);

 DPRINTF(Branch, "[tid:%i] [sn:%llu] "
@@ -214,7 +161,7 @@
 // Now lookup in the BTB or RAS.
 if (pred_taken) {
 if (inst->isReturn()) {
-++usedRAS;
+++stats.RASUsed;
 predict_record.wasReturn = true;
 // If it's a function return call, then look up the address
 // in the RAS.
@@ -248,10 +195,10 @@
 }

 if (inst->isDirectCtrl() || !iPred) {
-++BTBLookups;
+++stats.BTBLookups;
 // Check BTB on direct branches
 if 

[gem5-dev] Change in gem5/gem5[develop]: cpu: convert statistical_corrector to new style stats

2020-09-03 Thread Emily Brickey (Gerrit) via gem5-dev
Emily Brickey has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33936 )


Change subject: cpu: convert statistical_corrector to new style stats
..

cpu: convert statistical_corrector to new style stats

Change-Id: Id9e075fb45babeeafe65105679c8bf2135823d41
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33936
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/cpu/pred/statistical_corrector.cc
M src/cpu/pred/statistical_corrector.hh
2 files changed, 17 insertions(+), 18 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/cpu/pred/statistical_corrector.cc  
b/src/cpu/pred/statistical_corrector.cc

index 8ddae9b..3059595 100644
--- a/src/cpu/pred/statistical_corrector.cc
+++ b/src/cpu/pred/statistical_corrector.cc
@@ -65,7 +65,8 @@
 extraWeightsWidth(p->extraWeightsWidth),
 scCountersWidth(p->scCountersWidth),
 firstH(0),
-secondH(0)
+secondH(0),
+stats(this)
 {
 wb.resize(1 << logSizeUps, 4);

@@ -376,9 +377,9 @@
 StatisticalCorrector::updateStats(bool taken, BranchInfo *bi)
 {
 if (taken == bi->scPred) {
-scPredictorCorrect++;
+stats.correct++;
 } else {
-scPredictorWrong++;
+stats.wrong++;
 }
 }

@@ -396,16 +397,12 @@
 return 0;
 }

-void
-StatisticalCorrector::regStats()
+StatisticalCorrector::StatisticalCorrectorStats::StatisticalCorrectorStats(
+Stats::Group *parent)
+: Stats::Group(parent),
+  ADD_STAT(correct, "Number of time the SC predictor is the"
+  " provider and the prediction is correct"),
+  ADD_STAT(wrong, "Number of time the SC predictor is the"
+  " provider and the prediction is wrong")
 {
-scPredictorCorrect
-.name(name() + ".scPredictorCorrect")
-.desc("Number of time the SC predictor is the provider and "
-  "the prediction is correct");
-
-scPredictorWrong
-.name(name() + ".scPredictorWrong")
-.desc("Number of time the SC predictor is the provider and "
-  "the prediction is wrong");
 }
diff --git a/src/cpu/pred/statistical_corrector.hh  
b/src/cpu/pred/statistical_corrector.hh

index 2e8e502..b61f0d8 100644
--- a/src/cpu/pred/statistical_corrector.hh
+++ b/src/cpu/pred/statistical_corrector.hh
@@ -182,9 +182,12 @@
 int8_t firstH;
 int8_t secondH;

-// stats
-Stats::Scalar scPredictorCorrect;
-Stats::Scalar scPredictorWrong;
+struct StatisticalCorrectorStats : public Stats::Group {
+StatisticalCorrectorStats(Stats::Group *parent);
+Stats::Scalar correct;
+Stats::Scalar wrong;
+} stats;
+
   public:
 struct BranchInfo
 {
@@ -260,7 +263,6 @@
 int64_t phist) = 0;

 void init() override;
-void regStats() override;
 void updateStats(bool taken, BranchInfo *bi);

 virtual void condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken,

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id9e075fb45babeeafe65105679c8bf2135823d41
Gerrit-Change-Number: 33936
Gerrit-PatchSet: 3
Gerrit-Owner: Emily Brickey 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Emily Brickey 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: cpu: convert tage_base to new style stats

2020-09-03 Thread Emily Brickey (Gerrit) via gem5-dev
Emily Brickey has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33937 )


Change subject: cpu: convert tage_base to new style stats
..

cpu: convert tage_base to new style stats

Change-Id: If03102af545855125e87782c77ff5b43da8ac73b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33937
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/cpu/pred/tage_base.cc
M src/cpu/pred/tage_base.hh
2 files changed, 64 insertions(+), 88 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/cpu/pred/tage_base.cc b/src/cpu/pred/tage_base.cc
index 3d06dc4..681e2ce 100644
--- a/src/cpu/pred/tage_base.cc
+++ b/src/cpu/pred/tage_base.cc
@@ -63,7 +63,8 @@
  noSkip(p->noSkip),
  speculativeHistUpdate(p->speculativeHistUpdate),
  instShiftAmt(p->instShiftAmt),
- initialized(false)
+ initialized(false),
+ stats(this, nHistoryTables)
 {
 if (noSkip.empty()) {
 // Set all the table to enabled by default
@@ -82,6 +83,7 @@
 if (initialized) {
return;
 }
+
 // Current method for periodically resetting the u counter bits only
 // works for 1 or 2 bits
 // Also make sure that it is not 0
@@ -656,26 +658,28 @@
 if (taken == bi->tagePred) {
 // correct prediction
 switch (bi->provider) {
-  case BIMODAL_ONLY: tageBimodalProviderCorrect++; break;
-  case TAGE_LONGEST_MATCH: tageLongestMatchProviderCorrect++;  
break;

-  case BIMODAL_ALT_MATCH: bimodalAltMatchProviderCorrect++; break;
-  case TAGE_ALT_MATCH: tageAltMatchProviderCorrect++; break;
+  case BIMODAL_ONLY: stats.bimodalProviderCorrect++; break;
+  case TAGE_LONGEST_MATCH: stats.longestMatchProviderCorrect++;  
break;

+  case BIMODAL_ALT_MATCH:
+stats.bimodalAltMatchProviderCorrect++;
+break;
+  case TAGE_ALT_MATCH: stats.altMatchProviderCorrect++; break;
 }
 } else {
 // wrong prediction
 switch (bi->provider) {
-  case BIMODAL_ONLY: tageBimodalProviderWrong++; break;
+  case BIMODAL_ONLY: stats.bimodalProviderWrong++; break;
   case TAGE_LONGEST_MATCH:
-tageLongestMatchProviderWrong++;
+stats.longestMatchProviderWrong++;
 if (bi->altTaken == taken) {
-tageAltMatchProviderWouldHaveHit++;
+stats.altMatchProviderWouldHaveHit++;
 }
 break;
   case BIMODAL_ALT_MATCH:
-bimodalAltMatchProviderWrong++;
+stats.bimodalAltMatchProviderWrong++;
 break;
   case TAGE_ALT_MATCH:
-tageAltMatchProviderWrong++;
+stats.altMatchProviderWrong++;
 break;
 }

@@ -683,7 +687,7 @@
   case BIMODAL_ALT_MATCH:
   case TAGE_ALT_MATCH:
 if (bi->longestMatchPred == taken) {
-tageLongestMatchProviderWouldHaveHit++;
+stats.longestMatchProviderWouldHaveHit++;
 }
 }
 }
@@ -691,8 +695,8 @@
 switch (bi->provider) {
   case TAGE_LONGEST_MATCH:
   case TAGE_ALT_MATCH:
-tageLongestMatchProvider[bi->hitBank]++;
-tageAltMatchProvider[bi->altBank]++;
+stats.longestMatchProvider[bi->hitBank]++;
+stats.altMatchProvider[bi->altBank]++;
 break;
 }
 }
@@ -712,68 +716,38 @@
 return val;
 }

-void
-TAGEBase::regStats()
+TAGEBase::TAGEBaseStats::TAGEBaseStats(
+Stats::Group *parent, unsigned nHistoryTables)
+: Stats::Group(parent),
+  ADD_STAT(longestMatchProviderCorrect, "Number of times TAGE Longest"
+  " Match is the provider and the prediction is correct"),
+  ADD_STAT(altMatchProviderCorrect, "Number of times TAGE Alt Match"
+  " is the provider and the prediction is correct"),
+  ADD_STAT(bimodalAltMatchProviderCorrect, "Number of times TAGE Alt"
+  " Match is the bimodal and it is the provider and the prediction"
+  " is correct"),
+  ADD_STAT(bimodalProviderCorrect, "Number of times there are no"
+  " hits on the TAGE tables and the bimodal prediction is  
correct"),

+  ADD_STAT(longestMatchProviderWrong, "Number of times TAGE Longest"
+  " Match is the provider and the prediction is wrong"),
+  ADD_STAT(altMatchProviderWrong, "Number of times TAGE Alt Match is"
+  " the provider and the prediction is wrong"),
+  ADD_STAT(bimodalAltMatchProviderWrong, "Number of times TAGE Alt  
Match"

+  " is the bimodal and it is the provider and the prediction is"
+  " wrong"),
+  ADD_STAT(bimodalProviderWrong, "Number of times there are no hits"
+  " on the TAGE tables and the bimodal prediction is wrong"),
+  

[gem5-dev] Change in gem5/gem5[develop]: cpu: convert loop_predictor to new style stats

2020-09-03 Thread Emily Brickey (Gerrit) via gem5-dev
Emily Brickey has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33935 )


Change subject: cpu: convert loop_predictor to new style stats
..

cpu: convert loop_predictor to new style stats

Change-Id: Ib0383fc6d5f884fd6c020bcd938eee2f802ad412
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33935
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/cpu/pred/loop_predictor.cc
M src/cpu/pred/loop_predictor.hh
2 files changed, 15 insertions(+), 22 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/cpu/pred/loop_predictor.cc b/src/cpu/pred/loop_predictor.cc
index 4b23fd1..5dad797 100644
--- a/src/cpu/pred/loop_predictor.cc
+++ b/src/cpu/pred/loop_predictor.cc
@@ -57,7 +57,8 @@
 restrictAllocation(p->restrictAllocation),
 initialLoopIter(p->initialLoopIter),
 initialLoopAge(p->initialLoopAge),
-optionalAgeReset(p->optionalAgeReset)
+optionalAgeReset(p->optionalAgeReset),
+stats(this)
 {
 assert(initialLoopAge <= ((1 << loopTableAgeBits) - 1));
 }
@@ -314,9 +315,9 @@
 LoopPredictor::updateStats(bool taken, BranchInfo* bi)
 {
 if (taken == bi->loopPred) {
-loopPredictorCorrect++;
+stats.correct++;
 } else {
-loopPredictorWrong++;
+stats.wrong++;
 }
 }

@@ -344,18 +345,13 @@
 loopUpdate(branch_pc, taken, bi, tage_pred);
 }

-void
-LoopPredictor::regStats()
+LoopPredictor::LoopPredictorStats::LoopPredictorStats(Stats::Group *parent)
+: Stats::Group(parent),
+  ADD_STAT(correct, "Number of times the loop predictor is"
+  " the provider and the prediction is correct"),
+  ADD_STAT(wrong, "Number of times the loop predictor is the"
+  " provider and the prediction is wrong")
 {
-loopPredictorCorrect
-.name(name() + ".loopPredictorCorrect")
-.desc("Number of times the loop predictor is the provider and "
-  "the prediction is correct");
-
-loopPredictorWrong
-.name(name() + ".loopPredictorWrong")
-.desc("Number of times the loop predictor is the provider and "
-  "the prediction is wrong");
 }

 size_t
diff --git a/src/cpu/pred/loop_predictor.hh b/src/cpu/pred/loop_predictor.hh
index e6af53d..b26bc71 100644
--- a/src/cpu/pred/loop_predictor.hh
+++ b/src/cpu/pred/loop_predictor.hh
@@ -83,9 +83,11 @@
 const unsigned initialLoopAge;
 const bool optionalAgeReset;

-// stats
-Stats::Scalar loopPredictorCorrect;
-Stats::Scalar loopPredictorWrong;
+struct LoopPredictorStats : public Stats::Group {
+LoopPredictorStats(Stats::Group *parent);
+Stats::Scalar correct;
+Stats::Scalar wrong;
+} stats;

 /**
  * Updates an unsigned counter based on up/down parameter
@@ -250,11 +252,6 @@
  */
 void init() override;

-/**
- * Register stats for this object
- */
-void regStats() override;
-
 LoopPredictor(LoopPredictorParams *p);

 size_t getSizeInBits() const;

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33935
To unsubscribe, or for help writing mail filters, visit  
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ib0383fc6d5f884fd6c020bcd938eee2f802ad412
Gerrit-Change-Number: 33935
Gerrit-PatchSet: 2
Gerrit-Owner: Emily Brickey 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Emily Brickey 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Re: Scons minimum version breaks GCN-gpu dockerfile build

2020-09-03 Thread Poremba, Matthew via gem5-dev
[AMD Public Use]

Hi all,


I would also be interested if anyone has found a solution to this.  I currently 
cannot test any of the patches I was hoping to finish this week due to this 
issue.  I am not very familiar with docker, and after about 30 minutes of going 
through documentation wasn't even sure how to install additional things after 
the build command. Eventually I ended up rebuilding the whole image again.  
I've also tried adding scons with pip, which seems to install the correct 
"script" for scons, however the "engine" version is still pointing to the older 
copy that ships with 16.04 so that again didn't work. The last thing I am going 
to try it figure out what is installing the system version of scons (apt?) and 
remove that completely in hopes that it only finds the pip version.


-Matt

From: Jason Lowe-Power via gem5-dev 
Sent: Wednesday, September 2, 2020 8:03 AM
To: Gabe Black 
Cc: gem5 Developer List ; Kyle Roarty ; 
Jason Lowe-Power 
Subject: [gem5-dev] Re: Scons minimum version breaks GCN-gpu dockerfile build

[CAUTION: External Email]
It's AMD's GPGPU runtime framework: 
https://rocmdocs.amd.com/en/latest/

>From what I can tell (it's been many years since I've worked deeply with AMD 
>GPGPUs) the user and kernel APIs change incredibly frequently. So, rather than 
>trying to keep up with a moving target, the current GCN (graphics core next, 
>which is actually not "next" anymore but a couple of generations behind) 
>support in gem5 is tied to a version of ROCm from ~3-5 years ago. This 
>requires Ubuntu 16.04. Kyle did a great job setting up a docker environment 
>with everything that's needed 
>(https://gem5.googlesource.com/public/gem5/+/refs/heads/develop/util/dockerfiles/gcn-gpu/Dockerfile).
> Annoyingly, since gem5 (currently) only supports SE mode for GPGPUs you have 
>to use the docker container to build benchmarks, build gem5 *and run* gem5.

Matt, Brad, Tony, Kyle and others can probably answer any deeper questions.

Cheers,
jason

On Wed, Sep 2, 2020 at 1:46 AM Gabe Black 
mailto:gabebl...@google.com>> wrote:
What's a ROCM?

Gabe

On Tue, Sep 1, 2020 at 11:43 AM Jason Lowe-Power via gem5-dev 
mailto:gem5-dev@gem5.org>> wrote:
Hi Dan,

:facepalm: At least this is on develop and not the stable branch!

I think we need to get input from Kyle on this since he developed that docker 
image. TBH, I think pip isn't a bad solution given that 16.04 is more than four 
years old and we're stuck with that to support the older version of the ROCM 
stack.

Creating a jira issue would be appreciated. Please tag Kyle in it, if you do 
that.

Cheers,
Jason

On Tue, Sep 1, 2020 at 11:19 AM Daniel Gerzhoy via gem5-dev 
mailto:gem5-dev@gem5.org>> wrote:
Hey all,

Pulled latest updates and the minimum version requirement for scons breaks the 
GCN-gpu dockerfile.

My fix involved installing the latest scons via pip (after installing pip) but 
there is probably a better way to do it (apt-get) but it looks like the 
Ubuntu16.04 base for the DockerFile automatically points to 2.4 not 3.0 and I 
haven't figured out how to get it to install 3.0 instead yet.

I can open up a Jira ticket as well if that's desirable. (Also if I should have 
just done that instead of sending this email please let me know, still learning 
protocol).

Thanks,

Dan
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[gem5-dev] Change in gem5/gem5[develop]: arch-arm: XPACD, XPACI, XPACLRI do not trap

2020-09-03 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/34055 )



Change subject: arch-arm: XPACD, XPACI, XPACLRI do not trap
..

arch-arm: XPACD, XPACI, XPACLRI do not trap

The HCR_EL2.API and SCR_EL3.API bits do not control the trapping of
those stripping instructions.

Change-Id: I84349937f8c50d63b5b52146743b035d1058fd8d
Signed-off-by: Giacomo Travaglini 
---
M src/arch/arm/isa/insts/pauth.isa
M src/arch/arm/pauth_helpers.cc
M src/arch/arm/pauth_helpers.hh
3 files changed, 11 insertions(+), 53 deletions(-)



diff --git a/src/arch/arm/isa/insts/pauth.isa  
b/src/arch/arm/isa/insts/pauth.isa

index 4806e6a..699d86b 100644
--- a/src/arch/arm/isa/insts/pauth.isa
+++ b/src/arch/arm/isa/insts/pauth.isa
@@ -89,7 +89,7 @@

 code = pacEnabledCode(hint) + """
 uint64_t res;
-fault = stripPAC(xc->tcBase(), XDest, data, );
+stripPAC(xc->tcBase(), XDest, data, );
 XDest = res;
 """
 regoptype = 'RegOp'
diff --git a/src/arch/arm/pauth_helpers.cc b/src/arch/arm/pauth_helpers.cc
index 7424eb3..d38e745 100644
--- a/src/arch/arm/pauth_helpers.cc
+++ b/src/arch/arm/pauth_helpers.cc
@@ -1,5 +1,6 @@
 // -*- mode:c++ -*-

+// Copyright (c) 2020 ARM Limited
 // Copyright (c) 2020 Metempsy Technology Consulting
 // All rights reserved
 //
@@ -857,13 +858,9 @@



-Fault
-ArmISA::stripPAC(ThreadContext* tc, uint64_t A, bool data, uint64_t* out){
-bool trapEL2 = false;
-bool trapEL3 = false;
-
-uint64_t ptr;
-
+void
+ArmISA::stripPAC(ThreadContext* tc, uint64_t A, bool data, uint64_t* out)
+{
 ExceptionLevel el = currEL(tc);

 bool tbi = calculateTBI(tc, el, A, data);
@@ -871,51 +868,14 @@
 int bottom_PAC_bit = calculateBottomPACBit(tc, el, selbit);

 int top_bit = tbi ? 55 : 63;
-uint32_t nbits = (top_bit+1) - bottom_PAC_bit;
+uint32_t nbits = (top_bit + 1) - bottom_PAC_bit;
 uint64_t pacbits = ((uint64_t)0x1 << nbits) -1; // 2^n -1;
 uint64_t mask = pacbits << bottom_PAC_bit; // creates mask

-
 if (selbit) {
-ptr = A | mask;
+*out = A | mask;
 } else {
-ptr = A & ~mask;
+*out = A & ~mask;
 }
-
-SCR scr3 = tc->readMiscReg(MISCREG_SCR_EL3);
-HCR   hcr = tc->readMiscReg(MISCREG_HCR_EL2);
-bool have_el3 = ArmSystem::haveEL(tc, EL3);
-
-switch (el)
-{
-case EL0:
-trapEL2 = (EL2Enabled(tc) && hcr.api == 0 &&
-   (hcr.tge == 0 || hcr.e2h == 0));
-trapEL3 = have_el3 && scr3.api == 0;
-break;
-case EL1:
-trapEL2 = EL2Enabled(tc) && hcr.api == 0;
-trapEL3 = have_el3 && scr3.api == 0;
-break;
-case EL2:
-trapEL2 = false;
-trapEL3 = have_el3 && scr3.api == 0;
-break;
-case EL3:
-trapEL2 = false;
-trapEL3 = false;
-break;
-default:
-// Unnaccessible
-break;
-}
-if (trapEL2)
-return trapPACUse(tc, EL2);
-else if (trapEL3)
-return trapPACUse(tc, EL3);
-else
-*out = ptr;
-
-return NoFault;
 }

diff --git a/src/arch/arm/pauth_helpers.hh b/src/arch/arm/pauth_helpers.hh
index 24e745c..66b2c7e 100644
--- a/src/arch/arm/pauth_helpers.hh
+++ b/src/arch/arm/pauth_helpers.hh
@@ -1,5 +1,6 @@
 // -*- mode:c++ -*-

+// Copyright (c) 2020 ARM Limited
 // Copyright (c) 2020 Metempsy Technology Consulting
 // All rights reserved
 //
@@ -110,15 +111,12 @@
   Fault
   addPACIB(ThreadContext* tc, uint64_t X, uint64_t Y, uint64_t* out);

-  //  Strip()
-  //===
-  //  Strip() returns a 64-bit value containing A, but replacing the
+  // stripPAC returns a 64-bit value containing A, but replacing the
   // pointer authentication code field bits with the extension of the
   // address bits. This can apply to either instructions or data, where,
   // as the use of tagged pointers is distinct, it might be
   // handled differently.
-
-  Fault
+  void
   stripPAC(ThreadContext* tc, uint64_t A, bool data, uint64_t* out);

 };

--
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Gerrit-Change-Number: 34055
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[gem5-dev] Change in gem5/gem5[develop]: cpu: Set ContextId on request from trace CPU

2020-09-03 Thread Jason Lowe-Power (Gerrit) via gem5-dev
Jason Lowe-Power has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/34035 )



Change subject: cpu: Set ContextId on request from trace CPU
..

cpu: Set ContextId on request from trace CPU

Adds a contextId to the trace CPU in one more case that was missing.
Without this a panic is triggered in the cache.

Change-Id: I78bd70ad1e3657c9a6a1d56c234c007c2e2b586c
Signed-off-by: Jason Lowe-Power 
---
M src/cpu/trace/trace_cpu.cc
1 file changed, 3 insertions(+), 0 deletions(-)



diff --git a/src/cpu/trace/trace_cpu.cc b/src/cpu/trace/trace_cpu.cc
index dd91257..13f194c 100644
--- a/src/cpu/trace/trace_cpu.cc
+++ b/src/cpu/trace/trace_cpu.cc
@@ -653,6 +653,9 @@
 node_ptr->physAddr, node_ptr->size, node_ptr->flags, masterID);
 req->setReqInstSeqNum(node_ptr->seqNum);

+// If this is not done it triggers assert in L1 cache for invalid  
contextId

+req->setContext(ContextID(0));
+
 req->setPC(node_ptr->pc);
 // If virtual address is valid, set the virtual address field
 // of the request.

--
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[gem5-dev] Change in gem5/gem5[develop]: arch: Use a fault to trigger system calls in SE mode.

2020-09-03 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33281 )


Change subject: arch: Use a fault to trigger system calls in SE mode.
..

arch: Use a fault to trigger system calls in SE mode.

When the system call happens during the execution of the system call
instruction, it can be ambiguous what state takes precedence, the state
update from the instruction or the system call. These may be tracked
differently and found in an unpredictable order in, for example, the O3
CPU. An instruction can avoid updating any state explicitly, but
implicitly updated state (specifically the PC) will always update,
whether the instruction wants it to or not.

If the system call can be deferred by using a Fault object, then it's no
longer ambiguous. The PC update will be discarded, and the system call
can set the PC however it likes. Because there is no implicit PC update,
the PC needs to be walked forward, either to what it would have been
anyway, or to what the system call set in NPC.

In addition, because of the existing semantics around handling Faults,
the instruction no longer needs to be marked as serializing,
non-speculative, etc.

The "normal", aka architectural, aka FS version of the system call
instructions don't return a Fault artificially.

Change-Id: I72011a16a89332b1dcfb01c79f2f0d75c55ab773
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33281
Maintainer: Gabe Black 
Tested-by: kokoro 
Reviewed-by: Andreas Sandberg 
---
M src/arch/mips/isa/decoder.isa
M src/arch/power/isa/decoder.isa
M src/arch/x86/isa/decoder/one_byte_opcodes.isa
M src/arch/x86/isa/decoder/two_byte_opcodes.isa
M src/sim/faults.cc
M src/sim/faults.hh
6 files changed, 35 insertions(+), 14 deletions(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/mips/isa/decoder.isa b/src/arch/mips/isa/decoder.isa
index 6e19f85..d35fc18 100644
--- a/src/arch/mips/isa/decoder.isa
+++ b/src/arch/mips/isa/decoder.isa
@@ -159,9 +159,12 @@
 0x2: movz({{ Rd = (Rt == 0) ? Rs : Rd; }});
 0x3: movn({{ Rd = (Rt != 0) ? Rs : Rd; }});
 0x4: decode FullSystemInt {
-0: syscall_se({{ xc->syscall(); }},
-IsSerializeAfter, IsNonSpeculative);
-  default: syscall({{ fault =  
std::make_shared(); }});

+0: syscall_se({{
+fault = std::make_shared();
+}});
+  default: syscall({{
+fault = std::make_shared();
+}});
 }
 0x7: sync({{ ; }}, IsMemBarrier);
   0x5: break({{fault =  
std::make_shared();}});

diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa
index 2e88aea..b7b9aff 100644
--- a/src/arch/power/isa/decoder.isa
+++ b/src/arch/power/isa/decoder.isa
@@ -515,8 +515,7 @@
 55: stfdu({{ Mem_df = Fs; }});
 }

-17: IntOp::sc({{ xc->syscall(); }},
-  [ IsSyscall, IsNonSpeculative, IsSerializeAfter ]);
+17: IntOp::sc({{ return std::make_shared(); }});

 format FloatArithOp {
 59: decode A_XO {
diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa  
b/src/arch/x86/isa/decoder/one_byte_opcodes.isa

index b1b6218..b5f77cd 100644
--- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa
@@ -398,9 +398,9 @@
 // will sign extend it, and there's no easy way to
 // specify only checking the first byte.
 0xff80:
-SyscallInst::int80('xc->syscall()',
-   IsSyscall, IsNonSpeculative,
-   IsSerializeAfter);
+SyscallInst::int80({{
+return std::make_shared();
+}});
 }

 default: Inst::INT(Ib);
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa  
b/src/arch/x86/isa/decoder/two_byte_opcodes.isa

index 0dec25b..5d45144 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -237,9 +237,9 @@
 }
 }
 0x05: decode FullSystemInt {
-0: SyscallInst::syscall('xc->syscall()',
-IsSyscall, IsNonSpeculative,
-IsSerializeAfter);
+0: SyscallInst::syscall({{
+return std::make_shared();
+}});
 default: decode MODE_MODE {
 0x0: 

[gem5-dev] Change in gem5/gem5[develop]: ext: Make the testing-results folder visible

2020-09-03 Thread Hoa Nguyen (Gerrit) via gem5-dev
Hoa Nguyen has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/34015 )



Change subject: ext: Make the testing-results folder visible
..

ext: Make the testing-results folder visible

Currently, testlib will write outputs to .testing-results, which
is hidden folder. However, the outputs in the folder are useful
for debugging. This commit makes this folder visible for Linux
systems.

Change-Id: I158e1a4a62c7b494309a0a4bf6521fedd04cbe22
Signed-off-by: Hoa Nguyen 
---
M ext/testlib/configuration.py
M tests/.gitignore
2 files changed, 2 insertions(+), 2 deletions(-)



diff --git a/ext/testlib/configuration.py b/ext/testlib/configuration.py
index 4e2b695..892de1a 100644
--- a/ext/testlib/configuration.py
+++ b/ext/testlib/configuration.py
@@ -213,7 +213,7 @@
 defaults.base_dir = os.path.abspath(os.path.join(absdirpath(__file__),
   os.pardir,
   os.pardir))
-defaults.result_path = os.path.join(os.getcwd(), '.testing-results')
+defaults.result_path = os.path.join(os.getcwd(), 'testing-results')
 defaults.resource_url = 'http://dist.gem5.org/dist/develop'

 def define_constants(constants):
diff --git a/tests/.gitignore b/tests/.gitignore
index 7c78cf7..30cf9a6 100644
--- a/tests/.gitignore
+++ b/tests/.gitignore
@@ -1,4 +1,4 @@
-.testing-results
+testing-results
 gem5/cpu_tests/benchmarks
 gem5/fs/linux/arm/*.tar.bz2
 gem5/fs/linux/arm/binaries

--
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Gerrit-Change-Id: I158e1a4a62c7b494309a0a4bf6521fedd04cbe22
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[gem5-dev] Change in gem5/gem5[develop]: ext,tests: Copy test's output files from /tmp to testing-results

2020-09-03 Thread Hoa Nguyen (Gerrit) via gem5-dev
Hoa Nguyen has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33998 )



Change subject: ext,tests: Copy test's output files from /tmp to  
testing-results

..

ext,tests: Copy test's output files from /tmp to testing-results

When a test is complete, the output files are in a random folder
in /tmp.

This commit adds a procedure copying those files to
testing-results/SuiteUID/TestUID/ folder, where SuiteUID and
TestUID are the corresponding uid's of the test.

This procedure is triggered after a test is complete and before
the folder in /tmp being removed.

Change-Id: Id960e7f2f1629769008ae99aff4c8bfafa9ca849
Signed-off-by: Hoa Nguyen 
---
M tests/gem5/fixture.py
1 file changed, 18 insertions(+), 1 deletion(-)



diff --git a/tests/gem5/fixture.py b/tests/gem5/fixture.py
index fc6aee8..5b37d49 100644
--- a/tests/gem5/fixture.py
+++ b/tests/gem5/fixture.py
@@ -47,7 +47,7 @@

 from testlib.fixture import Fixture
 from testlib.configuration import config, constants
-from testlib.helper import log_call, cacheresult, joinpath, absdirpath
+from testlib.helper import log_call, cacheresult, joinpath, absdirpath,  
mkdir_p

 import testlib.log as log
 from testlib.state import Result

@@ -67,6 +67,23 @@
 def setup(self, testitem):
 self.path = tempfile.mkdtemp(prefix='gem5out')

+def post_test_procedure(self, testitem):
+suiteUID = testitem.metadata.uid.suite
+testUID = testitem.metadata.name
+testing_result_folder = os.path.join(config.result_path,
+ "SuiteUID:" + suiteUID,
+ "TestUID:" + testUID)
+
+# Copy the output files of the run from /tmp to testing-results
+# We want to wipe the entire result folder for this test first.  
Why?
+#   If the result folder exists (probably from the previous run),  
if

+#   this run emits fewer files, there'll be files from the previous
+#   run in this folder, which would cause confusion if one does not
+#   check the timestamp of the file.
+if os.path.exists(testing_result_folder):
+shutil.rmtree(testing_result_folder)
+shutil.copytree(self.path, testing_result_folder)
+
 def teardown(self, testitem):
 if testitem.result == Result.Passed:
 shutil.rmtree(self.path)

--
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[gem5-dev] Change in gem5/gem5[develop]: ext: Add post_test_procedure to testlib runner

2020-09-03 Thread Hoa Nguyen (Gerrit) via gem5-dev
Hoa Nguyen has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33997 )



Change subject: ext: Add post_test_procedure to testlib runner
..

ext: Add post_test_procedure to testlib runner

This procedure is trigger after a test has finished and before
the tearing down process kicks in.

Change-Id: I58ce10814fbc80d96f2f72565491b18de0ec290a
Signed-off-by: Hoa Nguyen 
---
M ext/testlib/fixture.py
M ext/testlib/runner.py
2 files changed, 8 insertions(+), 0 deletions(-)



diff --git a/ext/testlib/fixture.py b/ext/testlib/fixture.py
index 79b57c0..bcd22d9 100644
--- a/ext/testlib/fixture.py
+++ b/ext/testlib/fixture.py
@@ -70,6 +70,9 @@
 def setup(self, testitem):
 pass

+def post_test_procedure(self, testitem):
+pass
+
 def teardown(self, testitem):
 pass

diff --git a/ext/testlib/runner.py b/ext/testlib/runner.py
index a59aca3..ee658c9 100644
--- a/ext/testlib/runner.py
+++ b/ext/testlib/runner.py
@@ -128,6 +128,7 @@
 self.testable.status = Status.Running
 self.test()
 finally:
+self.builder.post_test_procedure(self.testable)
 self.testable.status = Status.TearingDown
 self.builder.teardown(self.testable)

@@ -209,6 +210,10 @@
 raise BrokenFixtureException(fixture, testitem,
 traceback.format_exc())

+def post_test_procedure(self, testitem):
+for fixture in self.built_fixtures:
+fixture.post_test_procedure(testitem)
+
 def teardown(self, testitem):
 for fixture in self.built_fixtures:
 try:

--
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[gem5-dev] Change in gem5/gem5[develop]: sparc: Remove support for Solaris SE mode.

2020-09-03 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33996 )



Change subject: sparc: Remove support for Solaris SE mode.
..

sparc: Remove support for Solaris SE mode.

In SPARC and SE mode, system calls are triggered by a trap exception
with the appropriate trap number, and then a handler within the Workload
(formerly the Process) object recognizes the trap number and triggers
the system call.

For Linux, this special handling happens in the Linux specific Workload,
and other types of traps are passed through to the base SPARC SE
Workload class. For Solaris however, no special handling is implemented.
That means that it's actually impossible for a Solaris SE mode program
to actually trigger a system call, and so while there is some code
written for Solaris SE mode, this feature does not actually work at all.

Also, while it's relatively easy to build binaries for Linux on various
architectures using, for instance, the crosstool-ng configs in util/,
there is no ready made option that I could find for building a SPARC
Solaris cross compiler which would run on x86 linux.

Given that the support that exists isn't actually hooked up properly,
SPARC is not one of the most popular ISAs within gem5, Solaris is not a
widely used operating system, we have (to my knowledge) no test binary
to run, and setting up a cross compiler would be non-trivial, it makes
the most sense to me to remove this support.

Change-Id: I896b5abc4bf337bd4e4c06c49de7111a3b2b784c
---
M src/arch/sparc/SConscript
M src/arch/sparc/SparcSeWorkload.py
D src/arch/sparc/solaris/se_workload.cc
D src/arch/sparc/solaris/se_workload.hh
4 files changed, 0 insertions(+), 437 deletions(-)



diff --git a/src/arch/sparc/SConscript b/src/arch/sparc/SConscript
index e47f99e..c8367e8 100644
--- a/src/arch/sparc/SConscript
+++ b/src/arch/sparc/SConscript
@@ -43,7 +43,6 @@
 Source('process.cc')
 Source('remote_gdb.cc')
 Source('se_workload.cc')
-Source('solaris/se_workload.cc')
 Source('solaris/solaris.cc')
 Source('tlb.cc')
 Source('ua2005.cc')
diff --git a/src/arch/sparc/SparcSeWorkload.py  
b/src/arch/sparc/SparcSeWorkload.py

index 9f910f5..17b303a 100644
--- a/src/arch/sparc/SparcSeWorkload.py
+++ b/src/arch/sparc/SparcSeWorkload.py
@@ -42,13 +42,3 @@
 def _is_compatible_with(cls, obj):
 return obj.get_arch() in ('sparc64', 'sparc32') and \
 obj.get_op_sys() == 'linux'
-
-class SparcEmuSolaris(SparcSEWorkload):
-type = 'SparcEmuSolaris'
-cxx_header = "arch/sparc/solaris/se_workload.hh"
-cxx_class = 'SparcISA::EmuSolaris'
-
-@classmethod
-def _is_compatible_with(cls, obj):
-return obj.get_arch() in ('sparc64', 'sparc32') and \
-obj.get_op_sys() == 'solaris'
diff --git a/src/arch/sparc/solaris/se_workload.cc  
b/src/arch/sparc/solaris/se_workload.cc

deleted file mode 100644
index 347a5fb..000
--- a/src/arch/sparc/solaris/se_workload.cc
+++ /dev/null
@@ -1,364 +0,0 @@
-/*
- * Copyright 2020 Google Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/sparc/solaris/se_workload.hh"
-
-#include 
-
-#include "arch/sparc/process.hh"
-#include "base/loader/object_file.hh"
-#include "base/trace.hh"
-#include "cpu/thread_context.hh"
-#include "sim/proxy_ptr.hh"
-#include "sim/syscall_desc.hh"
-#include "sim/syscall_emul.hh"
-
-namespace
-{
-
-class SolarisLoader : public Process::Loader
-{