[gem5-dev] Build failed in Jenkins: Nightly #193

2021-01-19 Thread jenkins-no-reply--- via gem5-dev 
See 

Changes:

[matthew.poremba] arch-gcn3,gpu-compute: Update stats style for GPU

[Giacomo Travaglini] arch-arm: dtb_addr is already encoding the loadAddrOffset

[gabe.black] arch: Wrap InstObjParams with a class and not a function.

[gabe.black] arm: Use local src and dest reg index arrays.

[gabe.black] cpu: Remove the default, globally sized index arrays from 
StaticInst.

[gabe.black] arch: Fix the code that computes MaxMiscDestReg.

[odanrc] base: Add unit tests for flags.hh

[odanrc] base: Remove dubious/unused Flags functions

[odanrc] base: Rename Flags::update as Flags::replace


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[gem5-dev] Change in gem5/gem5[develop]: arm: Export the mostly generic syscall ABI.

2021-01-19 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/39315 )


Change subject: arm: Export the mostly generic syscall ABI.
..

arm: Export the mostly generic syscall ABI.

This ABI is also applicable for gem5 ops. Rather than have the gem5 ops
use the syscall ABI, this change exports the syscall ABI and renames it
the "reg" ABI, or in other words an ABI which only uses registers. The
SE workload class then just creates a local name for the "reg" ABI so it
can continue to use it for system calls.

Change-Id: Ifaa38a94d6f0d49b8a2e515e02ce94472a499a00
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39315
Reviewed-by: Giacomo Travaglini 
Maintainer: Giacomo Travaglini 
Tested-by: kokoro 
---
M src/arch/arm/SConscript
R src/arch/arm/reg_abi.cc
A src/arch/arm/reg_abi.hh
M src/arch/arm/se_workload.hh
4 files changed, 83 insertions(+), 45 deletions(-)

Approvals:
  Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/SConscript b/src/arch/arm/SConscript
index 31e83a7..1d6799e 100644
--- a/src/arch/arm/SConscript
+++ b/src/arch/arm/SConscript
@@ -89,11 +89,11 @@
 Source('process.cc')
 Source('qarma.cc')
 Source('remote_gdb.cc')
+Source('reg_abi.cc')
 Source('semihosting.cc')
 Source('system.cc')
 Source('table_walker.cc')
 Source('self_debug.cc')
-Source('se_workload.cc')
 Source('stage2_mmu.cc')
 Source('stage2_lookup.cc')
 Source('tlb.cc')
diff --git a/src/arch/arm/se_workload.cc b/src/arch/arm/reg_abi.cc
similarity index 87%
rename from src/arch/arm/se_workload.cc
rename to src/arch/arm/reg_abi.cc
index 72abb8d..ba1511c 100644
--- a/src/arch/arm/se_workload.cc
+++ b/src/arch/arm/reg_abi.cc
@@ -25,17 +25,12 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */

-#include "arch/arm/se_workload.hh"
+#include "arch/arm/reg_abi.hh"

 namespace ArmISA
 {

-const std::vector SEWorkload::SyscallABI32::ArgumentRegs = {
-0, 1, 2, 3, 4, 5, 6
-};
-
-const std::vector SEWorkload::SyscallABI64::ArgumentRegs = {
-0, 1, 2, 3, 4, 5, 6
-};
+const std::vector RegABI32::ArgumentRegs = {0, 1, 2, 3, 4, 5, 6};
+const std::vector RegABI64::ArgumentRegs = {0, 1, 2, 3, 4, 5, 6};

 } // namespace ArmISA
diff --git a/src/arch/arm/reg_abi.hh b/src/arch/arm/reg_abi.hh
new file mode 100644
index 000..eb87eff
--- /dev/null
+++ b/src/arch/arm/reg_abi.hh
@@ -0,0 +1,76 @@
+/*
+ * Copyright 2020 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __ARCH_ARM_REG_ABI_HH__
+#define __ARCH_ARM_REG_ABI_HH__
+
+#include 
+
+#include "base/logging.hh"
+#include "sim/syscall_abi.hh"
+
+namespace ArmISA
+{
+
+struct RegABI32 : public GenericSyscallABI32
+{
+static const std::vector ArgumentRegs;
+};
+
+struct RegABI64 : public GenericSyscallABI64
+{
+static const std::vector ArgumentRegs;
+};
+
+} // namespace ArmISA
+
+namespace GuestABI
+{
+
+template 
+struct Argument::value &&
+ABI::template IsWide::value>>
+{
+static Arg
+get(ThreadContext *tc, typename ABI::State )
+{
+// 64 bit arguments are passed starting in an even register.
+if (state % 2)
+state++;
+panic_if(state + 1 >= ABI::ArgumentRegs.size(),
+"Ran out of syscall argument registers.");
+auto low = ABI::ArgumentRegs[state++];
+auto high =

[gem5-dev] Change in gem5/gem5[develop]: gpu-compute: Simplify LGKM decrementing for Flat instructions

2021-01-19 Thread Kyle Roarty (Gerrit) via gem5-dev 
Kyle Roarty has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/39396 )



Change subject: gpu-compute: Simplify LGKM decrementing for Flat  
instructions

..

gpu-compute: Simplify LGKM decrementing for Flat instructions

This commit makes it so LGKM count is decremented in a single place
(after completeAcc), which fixes a couple of potential bugs

1. Data is only written by completeAcc, not after initiateAcc. LGKM
count is supposed to be decremented after data is written.
2. LGKM count is now properly decremented for atomics without return

Change-Id: Ic791af3b42e04f7baaa0ce50cb2a2c6286c54f5a
---
M src/gpu-compute/global_memory_pipeline.cc
1 file changed, 1 insertion(+), 5 deletions(-)



diff --git a/src/gpu-compute/global_memory_pipeline.cc  
b/src/gpu-compute/global_memory_pipeline.cc

index 48f767b..2f251e8 100644
--- a/src/gpu-compute/global_memory_pipeline.cc
+++ b/src/gpu-compute/global_memory_pipeline.cc
@@ -130,7 +130,7 @@
 DPRINTF(GPUMem, "CU%d: WF[%d][%d]: Completing global mem  
instr %s\n",

 m->cu_id, m->simdId, m->wfSlotId, m->disassemble());
 m->completeAcc(m);
-if (m->isFlat() && (m->isLoad() || m->isAtomicRet())) {
+if (m->isFlat()) {
 w->decLGKMInstsIssued();
 }
 w->decVMemInstsIssued();
@@ -196,10 +196,6 @@
 mp->disassemble(), mp->seqNum());
 mp->initiateAcc(mp);

-if (mp->isFlat() && mp->isStore()) {
-mp->wavefront()->decLGKMInstsIssued();
-}
-
 if (mp->isStore() && mp->isGlobalSeg()) {
 mp->wavefront()->decExpInstsIssued();
 }

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ic791af3b42e04f7baaa0ce50cb2a2c6286c54f5a
Gerrit-Change-Number: 39396
Gerrit-PatchSet: 1
Gerrit-Owner: Kyle Roarty 
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[gem5-dev] Change in gem5/gem5[develop]: dev: Fixing EtherDevice stats initialization order

2021-01-19 Thread Hoa Nguyen (Gerrit) via gem5-dev 
Hoa Nguyen has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/39395 )



Change subject: dev: Fixing EtherDevice stats initialization order
..

dev: Fixing EtherDevice stats initialization order

Previously, the stat `totalBandwidth` is initialized before `txBandwidth`
and `rxBandwidth`. However, `totalBandwith` is of type Stats::Formula
and it uses the values of `txBandwidth` and `rxBandwidth`.
Therefore, `totalBandwidth` should be initialized after the other two.

This change fixes the variable and stats initialization order accordingly.

The bug was reported here:   
https://github.com/gem5/gem5/commit/3db48cbbc6e475592e6608b52a870d92ac2214aa#commitcomment-46094633.


Jira: https://gem5.atlassian.net/browse/GEM5-894

Change-Id: I2c7cc4120df672edf15b9a3ab6becc0bbebb778b
Signed-off-by: Hoa Nguyen 
---
M src/dev/net/etherdevice.cc
M src/dev/net/etherdevice.hh
2 files changed, 7 insertions(+), 7 deletions(-)



diff --git a/src/dev/net/etherdevice.cc b/src/dev/net/etherdevice.cc
index 64ab438..e279a9c 100644
--- a/src/dev/net/etherdevice.cc
+++ b/src/dev/net/etherdevice.cc
@@ -37,6 +37,10 @@
   ADD_STAT(rxBytes, "Bytes Received"),
   ADD_STAT(txPackets, "Number of Packets Transmitted"),
   ADD_STAT(rxPackets, "Number of Packets Received"),
+  ADD_STAT(txBandwidth, "Transmit Bandwidth (bits/s)",
+   txBytes * Stats::constant(8) / simSeconds),
+  ADD_STAT(rxBandwidth, "Receive Bandwidth (bits/s)",
+   rxBytes * Stats::constant(8) / simSeconds),
   ADD_STAT(txIpChecksums, "Number of tx IP Checksums done by device"),
   ADD_STAT(rxIpChecksums, "Number of rx IP Checksums done by device"),
   ADD_STAT(txTcpChecksums, "Number of tx TCP Checksums done by  
device"),

@@ -53,10 +57,6 @@
   ADD_STAT(totBytes, "Total Bytes", txBytes + rxBytes),
   ADD_STAT(totPacketRate, "Total Tranmission Rate (packets/s)",
totPackets / simSeconds),
-  ADD_STAT(txBandwidth, "Transmit Bandwidth (bits/s)",
-   txBytes * Stats::constant(8) / simSeconds),
-  ADD_STAT(rxBandwidth, "Receive Bandwidth (bits/s)",
-   rxBytes * Stats::constant(8) / simSeconds),
   ADD_STAT(txPacketRate, "Packet Tranmission Rate (packets/s)",
txPackets / simSeconds),
   ADD_STAT(rxPacketRate, "Packet Reception Rate (packets/s)",
diff --git a/src/dev/net/etherdevice.hh b/src/dev/net/etherdevice.hh
index 0cc54d0..a853cd8 100644
--- a/src/dev/net/etherdevice.hh
+++ b/src/dev/net/etherdevice.hh
@@ -70,6 +70,9 @@
 Stats::Scalar txPackets;
 Stats::Scalar rxPackets;

+Stats::Formula txBandwidth;
+Stats::Formula rxBandwidth;
+
 Stats::Scalar txIpChecksums;
 Stats::Scalar rxIpChecksums;

@@ -90,9 +93,6 @@
 Stats::Formula totBytes;
 Stats::Formula totPacketRate;

-Stats::Formula txBandwidth;
-Stats::Formula rxBandwidth;
-
 Stats::Formula txPacketRate;
 Stats::Formula rxPacketRate;


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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I2c7cc4120df672edf15b9a3ab6becc0bbebb778b
Gerrit-Change-Number: 39395
Gerrit-PatchSet: 1
Gerrit-Owner: Hoa Nguyen 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: tests: Add Python unit tests for m5.util.convert

2021-01-19 Thread Andreas Sandberg (Gerrit) via gem5-dev 
Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/39377 )



Change subject: tests: Add Python unit tests for m5.util.convert
..

tests: Add Python unit tests for m5.util.convert

Change-Id: I80d1aabbe1d87b01b48280972f9418317e648779
Signed-off-by: Andreas Sandberg 
---
A tests/pyunit/__init__.py
A tests/pyunit/util/__init__.py
A tests/pyunit/util/test_convert.py
A tests/run_pyunit.py
4 files changed, 319 insertions(+), 0 deletions(-)



diff --git a/tests/pyunit/__init__.py b/tests/pyunit/__init__.py
new file mode 100644
index 000..8b13789
--- /dev/null
+++ b/tests/pyunit/__init__.py
@@ -0,0 +1 @@
+
diff --git a/tests/pyunit/util/__init__.py b/tests/pyunit/util/__init__.py
new file mode 100644
index 000..8b13789
--- /dev/null
+++ b/tests/pyunit/util/__init__.py
@@ -0,0 +1 @@
+
diff --git a/tests/pyunit/util/test_convert.py  
b/tests/pyunit/util/test_convert.py

new file mode 100644
index 000..6010ab5
--- /dev/null
+++ b/tests/pyunit/util/test_convert.py
@@ -0,0 +1,266 @@
+#!/usr/bin/env python3
+#
+# Copyright (c) 2021 ARM Limited
+# All rights reserved
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+import unittest
+
+from m5.util import convert
+
+def _ip(*args):
+return (args[0] << 24) | (args[1] << 16) | (args[2] << 8) | args[3]
+
+class ConvertTestSuite(unittest.TestCase):
+"""Test cases for unit conversion"""
+
+def test_toMetricFloat(self):
+def conv(x):
+return convert.toMetricFloat(x, 'value', 'X')
+
+self.assertEqual(conv('42'),  42e0)
+self.assertEqual(conv('42.0'),  42e0)
+self.assertEqual(conv('42kX'), 42e3)
+self.assertEqual(conv('42.0kX'), 42e3)
+self.assertEqual(conv('42MX'), 42e6)
+self.assertEqual(conv('42GX'), 42e9)
+self.assertEqual(conv('42TX'), 42e12)
+self.assertEqual(conv('42PX'), 42e15)
+self.assertEqual(conv('42EX'), 42e18)
+
+self.assertEqual(conv('42KiX'), 42 * 2**10)
+self.assertEqual(conv('42MiX'), 42 * 2**20)
+self.assertEqual(conv('42GiX'), 42 * 2**30)
+self.assertEqual(conv('42TiX'), 42 * 2**40)
+self.assertEqual(conv('42PiX'), 42 * 2**50)
+self.assertEqual(conv('42EiX'), 42 * 2**60)
+
+self.assertRaises(ValueError, conv, '42k')
+self.assertRaises(ValueError, conv, '42KX')
+self.assertRaises(ValueError, conv, '42kiX')
+
+self.assertEqual(convert.toMetricFloat('42'), 42)
+# Prefixes not allowed without a unit
+self.assertRaises(ValueError, convert.toMetricFloat, '42k')
+
+def test_toMetricInteger(self):
+def conv(x):
+return convert.toMetricInteger(x, 'value', 'X')
+
+self.assertEqual(conv('42'),  42 * 10**0)
+self.assertEqual(conv('42kX'), 42 * 10**3)
+self.assertEqual(conv('42MX'), 42 * 10**6)
+

[gem5-dev] Change in gem5/gem5[develop]: python: Fix incorrect anyToLatency conversion

2021-01-19 Thread Andreas Sandberg (Gerrit) via gem5-dev 
Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/39376 )



Change subject: python: Fix incorrect anyToLatency conversion
..

python: Fix incorrect anyToLatency conversion

The anyToLatency conversion function incorrectly inverted values
without units.

Change-Id: Ife0aa6837bf7d830b9a3f2611c77f6501cfe19ab
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/util/convert.py
1 file changed, 4 insertions(+), 4 deletions(-)



diff --git a/src/python/m5/util/convert.py b/src/python/m5/util/convert.py
index 73335e6..4dab2e6 100644
--- a/src/python/m5/util/convert.py
+++ b/src/python/m5/util/convert.py
@@ -156,13 +156,13 @@
 def anyToLatency(value):
 """result is a clock period"""
 try:
-return 1 / toFrequency(value)
-except (ValueError, ZeroDivisionError):
+return toLatency(value)
+except ValueError:
 pass

 try:
-return toLatency(value)
-except ValueError:
+return 1 / toFrequency(value)
+except (ValueError, ZeroDivisionError):
 pass

 raise ValueError("cannot convert '%s' to clock period" % value)

--
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[gem5-dev] Change in gem5/gem5[develop]: python: Fix incorrect prefixes is m5.utils.convert

2021-01-19 Thread Andreas Sandberg (Gerrit) via gem5-dev 
Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/39375 )



Change subject: python: Fix incorrect prefixes is m5.utils.convert
..

python: Fix incorrect prefixes is m5.utils.convert

The conversion functions incorrectly assumed that kibibytes are 'kiB'
rather than 'KiB' (correct).

Change-Id: I7ef9e54546fdb3379435b40af6d9f619ad9b37a5
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/util/convert.py
1 file changed, 2 insertions(+), 2 deletions(-)



diff --git a/src/python/m5/util/convert.py b/src/python/m5/util/convert.py
index d3088f6..73335e6 100644
--- a/src/python/m5/util/convert.py
+++ b/src/python/m5/util/convert.py
@@ -62,7 +62,7 @@
 'Gi': gibi,
 'G': giga,
 'M': mega,
-'ki': kibi,
+'Ki': kibi,
 'k': kilo,
 'Mi': mebi,
 'm': milli,
@@ -84,7 +84,7 @@
 'G' : gibi,
 'Mi': mebi,
 'M' : mebi,
-'ki': kibi,
+'Ki': kibi,
 'k' : kibi,
 }


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[gem5-dev] Change in gem5/gem5[develop]: python: Refactor toNum to support a selection of units

2021-01-19 Thread Andreas Sandberg (Gerrit) via gem5-dev 
Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/39217 )



Change subject: python: Refactor toNum to support a selection of units
..

python: Refactor toNum to support a selection of units

Add support for matching one of several different units in toNum. The
units parameter can now either be a tuple or a string describing the
supported unit(s). The function now returns a (magnitude, unit) tuple.

Change-Id: I683819722a93ade91a6def2bfa77209c29b4b39e
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/util/convert.py
1 file changed, 36 insertions(+), 12 deletions(-)



diff --git a/src/python/m5/util/convert.py b/src/python/m5/util/convert.py
index d3088f6..772fba2 100644
--- a/src/python/m5/util/convert.py
+++ b/src/python/m5/util/convert.py
@@ -1,3 +1,15 @@
+# Copyright (c) 2021 Arm Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
 # Copyright (c) 2005 The Regents of The University of Michigan
 # Copyright (c) 2010 Advanced Micro Devices, Inc.
 # All rights reserved.
@@ -92,34 +104,46 @@
 if not isinstance(value, str):
 raise TypeError("wrong type '%s' should be str" % type(value))

+def _find_suffix(value, suffixes, default=''):
+matches = [ sfx for sfx in suffixes if value.endswith(sfx) ]
+assert len(matches) <= 1
+
+return matches[0] if matches else default

 # memory size configuration stuff
 def toNum(value, target_type, units, prefixes, converter):
 assertStr(value)

 def convert(val):
+return converter(val)
 try:
 return converter(val)
 except ValueError:
 raise ValueError(
 "cannot convert '%s' to %s" % (value, target_type))

-if units and not value.endswith(units):
-units = None
+# Units can be None, the empty string, or an a list/tuple. Convert
+# to a tuple for consistent handling.
 if not units:
-return convert(value)
+units = tuple()
+elif isinstance(units, str):
+units = (units,)
+else:
+units = tuple(units)

-value = value[:-len(units)]
+unit = _find_suffix(value, units)

-prefix = next((p for p in prefixes.keys() if value.endswith(p)), None)
-if not prefix:
-return convert(value)
-value = value[:-len(prefix)]
+# We only allow a prefix if there is a unit
+if unit:
+prefix = _find_suffix(value[:-len(unit)], prefixes)
+scale = prefixes[prefix] if prefix else 1
+else:
+prefix, scale = '', 1

-return convert(value) * prefixes[prefix]
+return convert(value[:len(value) - len(unit) - len(prefix)]) * scale,  
unit


 def toFloat(value, target_type='float', units=None, prefixes=[]):
-return toNum(value, target_type, units, prefixes, float)
+return toNum(value, target_type, units, prefixes, float)[0]

 def toMetricFloat(value, target_type='float', units=None):
 return toFloat(value, target_type, units, metric_prefixes)
@@ -128,8 +152,8 @@
 return toFloat(value, target_type, units, binary_prefixes)

 def toInteger(value, target_type='integer', units=None, prefixes=[]):
-intifier = lambda x: int(x, 0)
-return toNum(value, target_type, units, prefixes, intifier)
+return toNum(value, target_type, units, prefixes,
+ lambda x: int(x, 0))[0]

 def toMetricInteger(value, target_type='integer', units=None):
 return toInteger(value, target_type, units, metric_prefixes)

--
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[gem5-dev] Change in gem5/gem5[develop]: base, python: Add a Temperature type and associated param

2021-01-19 Thread Andreas Sandberg (Gerrit) via gem5-dev 
Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/39218 )



Change subject: base, python: Add a Temperature type and associated param
..

base, python: Add a Temperature type and associated param

Add a class to represent a temperature. The class stores temperatures
in Kelvin and provides helper methods to convert to/from Celsius. The
corresponding param type automatically converts from Kelvin, Celsius,
and Fahrenheit to the underlying C++ type.

Change-Id: I5783cc4f4fecbea5aba9821dfc71bfa77c3f75a9
Signed-off-by: Andreas Sandberg 
---
M src/base/SConscript
A src/base/temperature.cc
A src/base/temperature.hh
M src/python/m5/params.py
M src/python/m5/util/convert.py
M src/python/pybind11/core.cc
6 files changed, 258 insertions(+), 2 deletions(-)



diff --git a/src/base/SConscript b/src/base/SConscript
index b3d9506..dd699f3 100644
--- a/src/base/SConscript
+++ b/src/base/SConscript
@@ -71,6 +71,7 @@
 GTest('str.test', 'str.test.cc', 'str.cc')
 Source('time.cc')
 Source('version.cc')
+Source('temperature.cc')
 Source('trace.cc')
 GTest('trie.test', 'trie.test.cc')
 Source('types.cc')
diff --git a/src/base/temperature.cc b/src/base/temperature.cc
new file mode 100644
index 000..d225b26
--- /dev/null
+++ b/src/base/temperature.cc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2021 Arm Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "base/temperature.hh"
+
+Temperature
+Temperature::fromKelvin(double _value)
+{
+return Temperature(_value);
+}
+
+Temperature
+Temperature::fromCelsius(double _value)
+{
+return Temperature(_value - 273.15);
+}
+
+std::ostream&
+operator<<(std::ostream , const Temperature )
+{
+out << temp.value << "K";
+return out;
+}
diff --git a/src/base/temperature.hh b/src/base/temperature.hh
new file mode 100644
index 000..f36b1e1
--- /dev/null
+++ b/src/base/temperature.hh
@@ -0,0 +1,123 @@
+/*
+ * Copyright (c) 2021 Arm Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ *

[gem5-dev] Change in gem5/gem5[develop]: sim: Don't serialise params in thermal models

2021-01-19 Thread Andreas Sandberg (Gerrit) via gem5-dev 
Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/39221 )



Change subject: sim: Don't serialise params in thermal models
..

sim: Don't serialise params in thermal models

ThermalDomain and ThermalReference shouldn't serialise their params.

Change-Id: Idc4438b68c0db1fe312d37888c901f2ea87b1d60
Signed-off-by: Andreas Sandberg 
---
M src/sim/power/thermal_domain.cc
M src/sim/power/thermal_domain.hh
M src/sim/power/thermal_model.cc
M src/sim/power/thermal_model.hh
4 files changed, 3 insertions(+), 80 deletions(-)



diff --git a/src/sim/power/thermal_domain.cc  
b/src/sim/power/thermal_domain.cc

index a2276c5..b0868be 100644
--- a/src/sim/power/thermal_domain.cc
+++ b/src/sim/power/thermal_domain.cc
@@ -46,7 +46,6 @@
 #include "sim/linear_solver.hh"
 #include "sim/power/thermal_model.hh"
 #include "sim/probe/probe.hh"
-#include "sim/serialize.hh"
 #include "sim/sub_system.hh"

 ThermalDomain::ThermalDomain(const Params )
@@ -80,18 +79,6 @@
 ppThermalUpdate->notify(node->temp);
 }

-void
-ThermalDomain::serialize(CheckpointOut ) const
-{
-SERIALIZE_SCALAR(_initTemperature);
-}
-
-void
-ThermalDomain::unserialize(CheckpointIn )
-{
-UNSERIALIZE_SCALAR(_initTemperature);
-}
-

 LinearEquation
 ThermalDomain::getEquation(ThermalNode * tn, unsigned n, double step) const
diff --git a/src/sim/power/thermal_domain.hh  
b/src/sim/power/thermal_domain.hh

index 421f340..9da753e 100644
--- a/src/sim/power/thermal_domain.hh
+++ b/src/sim/power/thermal_domain.hh
@@ -93,9 +93,6 @@
   */
 void setSubSystem(SubSystem * ss);

-void serialize(CheckpointOut ) const override;
-void unserialize(CheckpointIn ) override;
-
   private:
 double _initTemperature;
 ThermalNode * node;
diff --git a/src/sim/power/thermal_model.cc b/src/sim/power/thermal_model.cc
index 306a4fa..c57e284 100644
--- a/src/sim/power/thermal_model.cc
+++ b/src/sim/power/thermal_model.cc
@@ -45,7 +45,6 @@
 #include "sim/clocked_object.hh"
 #include "sim/linear_solver.hh"
 #include "sim/power/thermal_domain.hh"
-#include "sim/serialize.hh"
 #include "sim/sim_object.hh"

 /**
@@ -56,18 +55,6 @@
 {
 }

-void
-ThermalReference::serialize(CheckpointOut ) const
-{
-SERIALIZE_SCALAR(_temperature);
-}
-
-void
-ThermalReference::unserialize(CheckpointIn )
-{
-UNSERIALIZE_SCALAR(_temperature);
-}
-
 LinearEquation
 ThermalReference::getEquation(ThermalNode * n, unsigned nnodes,
   double step) const {
@@ -83,18 +70,6 @@
 {
 }

-void
-ThermalResistor::serialize(CheckpointOut ) const
-{
-SERIALIZE_SCALAR(_resistance);
-}
-
-void
-ThermalResistor::unserialize(CheckpointIn )
-{
-UNSERIALIZE_SCALAR(_resistance);
-}
-
 LinearEquation
 ThermalResistor::getEquation(ThermalNode * n, unsigned nnodes,
  double step) const
@@ -130,18 +105,6 @@
 {
 }

-void
-ThermalCapacitor::serialize(CheckpointOut ) const
-{
-SERIALIZE_SCALAR(_capacitance);
-}
-
-void
-ThermalCapacitor::unserialize(CheckpointIn )
-{
-UNSERIALIZE_SCALAR(_capacitance);
-}
-
 LinearEquation
 ThermalCapacitor::getEquation(ThermalNode * n, unsigned nnodes,
   double step) const
@@ -181,18 +144,6 @@
 }

 void
-ThermalModel::serialize(CheckpointOut ) const
-{
-SERIALIZE_SCALAR(_step);
-}
-
-void
-ThermalModel::unserialize(CheckpointIn )
-{
-UNSERIALIZE_SCALAR(_step);
-}
-
-void
 ThermalModel::doStep()
 {
 // Calculate new temperatures!
diff --git a/src/sim/power/thermal_model.hh b/src/sim/power/thermal_model.hh
index 295e508..3d9b36d 100644
--- a/src/sim/power/thermal_model.hh
+++ b/src/sim/power/thermal_model.hh
@@ -62,9 +62,6 @@
 typedef ThermalResistorParams Params;
 ThermalResistor(const Params );

-void serialize(CheckpointOut ) const override;
-void unserialize(CheckpointIn ) override;
-
 void setNodes(ThermalNode * n1, ThermalNode * n2) {
 node1 = n1;
 node2 = n2;
@@ -91,9 +88,6 @@
 typedef ThermalCapacitorParams Params;
 ThermalCapacitor(const Params );

-void serialize(CheckpointOut ) const override;
-void unserialize(CheckpointIn ) override;
-
 LinearEquation getEquation(ThermalNode * tn, unsigned n,
double step) const override;

@@ -104,7 +98,7 @@

   private:
 /* Capacitance value in J/K */
-double _capacitance;
+const double _capacitance;
 /* Nodes connected to the resistor */
 ThermalNode * node1, * node2;
 };
@@ -128,11 +122,8 @@
 LinearEquation getEquation(ThermalNode * tn, unsigned n,
double step) const override;

-void serialize(CheckpointOut ) const override;
-void unserialize(CheckpointIn ) override;
-
 /* Fixed temperature value in centigrate degrees */
-double _temperature;
+const double _temperature;
 /* Nodes connected to the resistor */

[gem5-dev] Change in gem5/gem5[develop]: sim: Use the Temperature param type

2021-01-19 Thread Andreas Sandberg (Gerrit) via gem5-dev 
Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/39219 )



Change subject: sim: Use the Temperature param type
..

sim: Use the Temperature param type

Add support for passing typed temperatures using the new Temperature
param type.

Change-Id: If68d619fd824e171d895a5cbbe4d0325d4c4f4db
Signed-off-by: Andreas Sandberg 
---
M src/sim/power/PowerModel.py
M src/sim/power/ThermalDomain.py
M src/sim/power/ThermalModel.py
M src/sim/power/power_model.cc
M src/sim/power/thermal_domain.cc
M src/sim/power/thermal_model.cc
6 files changed, 11 insertions(+), 11 deletions(-)



diff --git a/src/sim/power/PowerModel.py b/src/sim/power/PowerModel.py
index 2047c64..cfbd8cb 100644
--- a/src/sim/power/PowerModel.py
+++ b/src/sim/power/PowerModel.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2016-2018 ARM Limited
+# Copyright (c) 2016-2018, 2021 Arm Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -63,4 +63,4 @@
 pm_type = Param.PMType("All", "Type of power model")

 # Ambient temperature to be used when no thermal model is present
-ambient_temp = Param.Float(25.0, "Ambient temperature")
+ambient_temp = Param.Temperature("25.0C", "Ambient temperature")
diff --git a/src/sim/power/ThermalDomain.py b/src/sim/power/ThermalDomain.py
index 3fd5cad..57c53b2 100644
--- a/src/sim/power/ThermalDomain.py
+++ b/src/sim/power/ThermalDomain.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2015 ARM Limited
+# Copyright (c) 2015, 2021 Arm Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -46,4 +46,4 @@
 ]

 # Static temperature which may change over time
-initial_temperature = Param.Float(25.0, "Initial temperature")
+initial_temperature = Param.Temperature("25.0C", "Initial temperature")
diff --git a/src/sim/power/ThermalModel.py b/src/sim/power/ThermalModel.py
index 2894dd8..90710e1 100644
--- a/src/sim/power/ThermalModel.py
+++ b/src/sim/power/ThermalModel.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2015 ARM Limited
+# Copyright (c) 2015, 2021 Arm Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -77,7 +77,7 @@
 ]

 # Static temperature which may change over time
-temperature = Param.Float(25.0, "Operational temperature in Celsius")
+temperature = Param.Temperature("25.0C", "Operational temperature")


 # Represents a thermal capacitor
diff --git a/src/sim/power/power_model.cc b/src/sim/power/power_model.cc
index fbc67d3..42515ac 100644
--- a/src/sim/power/power_model.cc
+++ b/src/sim/power/power_model.cc
@@ -66,7 +66,7 @@
 // The temperature passed here will be overwritten, if there is
 // a thermal model present
 for (auto & pms: states_pm){
-pms->setTemperature(p.ambient_temp);
+pms->setTemperature(p.ambient_temp.toCelsius());
 }

 dynamicPower
diff --git a/src/sim/power/thermal_domain.cc  
b/src/sim/power/thermal_domain.cc

index e9f4d3c..a2276c5 100644
--- a/src/sim/power/thermal_domain.cc
+++ b/src/sim/power/thermal_domain.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015 ARM Limited
+ * Copyright (c) 2015, 2021 Arm Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -50,7 +50,7 @@
 #include "sim/sub_system.hh"

 ThermalDomain::ThermalDomain(const Params )
-: SimObject(p), _initTemperature(p.initial_temperature),
+: SimObject(p), _initTemperature(p.initial_temperature.toCelsius()),
 node(NULL), subsystem(NULL),
 ADD_STAT(currentTemp, "Temperature in centigrade degrees")
 {
diff --git a/src/sim/power/thermal_model.cc b/src/sim/power/thermal_model.cc
index 408642c..ce2abe3 100644
--- a/src/sim/power/thermal_model.cc
+++ b/src/sim/power/thermal_model.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015 ARM Limited
+ * Copyright (c) 2015, 2021 Arm Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -51,7 +51,7 @@
  * ThermalReference
  */
 ThermalReference::ThermalReference(const Params )
-: SimObject(p), _temperature(p.temperature), node(NULL)
+: SimObject(p), _temperature(p.temperature.toCelsius()), node(NULL)
 {
 }


--
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[gem5-dev] Change in gem5/gem5[develop]: sim: Thermal model style fixes

2021-01-19 Thread Andreas Sandberg (Gerrit) via gem5-dev 
Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/39220 )



Change subject: sim: Thermal model style fixes
..

sim: Thermal model style fixes

Fix various style issues in the thermal model implementation.

Change-Id: Ie31c862a23885f32f2931e927d7f87b7992bd099
Signed-off-by: Andreas Sandberg 
---
M src/sim/power/thermal_model.cc
M src/sim/power/thermal_model.hh
2 files changed, 23 insertions(+), 9 deletions(-)



diff --git a/src/sim/power/thermal_model.cc b/src/sim/power/thermal_model.cc
index ce2abe3..306a4fa 100644
--- a/src/sim/power/thermal_model.cc
+++ b/src/sim/power/thermal_model.cc
@@ -39,6 +39,7 @@

 #include "base/statistics.hh"
 #include "params/ThermalCapacitor.hh"
+#include "params/ThermalModel.hh"
 #include "params/ThermalReference.hh"
 #include "params/ThermalResistor.hh"
 #include "sim/clocked_object.hh"
@@ -253,24 +254,37 @@
 schedule(stepEvent, curTick() + SimClock::Int::s * _step);
 }

-void ThermalModel::addDomain(ThermalDomain * d) {
+void
+ThermalModel::addDomain(ThermalDomain * d)
+{
 domains.push_back(d);
 entities.push_back(d);
 }
-void ThermalModel::addReference(ThermalReference * r) {
+
+void
+ThermalModel::addReference(ThermalReference * r)
+{
 references.push_back(r);
 entities.push_back(r);
 }
-void ThermalModel::addCapacitor(ThermalCapacitor * c) {
+
+void
+ThermalModel::addCapacitor(ThermalCapacitor * c)
+{
 capacitors.push_back(c);
 entities.push_back(c);
 }
-void ThermalModel::addResistor(ThermalResistor * r) {
+
+void
+ThermalModel::addResistor(ThermalResistor * r)
+{
 resistors.push_back(r);
 entities.push_back(r);
 }

-double ThermalModel::getTemp() const {
+double
+ThermalModel::getTemp() const
+{
 // Just pick the highest temperature
 double temp = 0;
 for (auto & n : eq_nodes)
diff --git a/src/sim/power/thermal_model.hh b/src/sim/power/thermal_model.hh
index 81c1de8..295e508 100644
--- a/src/sim/power/thermal_model.hh
+++ b/src/sim/power/thermal_model.hh
@@ -40,16 +40,16 @@

 #include 

-#include "params/ThermalCapacitor.hh"
-#include "params/ThermalModel.hh"
-#include "params/ThermalReference.hh"
-#include "params/ThermalResistor.hh"
 #include "sim/clocked_object.hh"
 #include "sim/power/thermal_domain.hh"
 #include "sim/power/thermal_entity.hh"
 #include "sim/power/thermal_node.hh"
 #include "sim/sim_object.hh"

+struct ThermalCapacitorParams;
+struct ThermalModelParams;
+struct ThermalReferenceParams;
+struct ThermalResistorParams;

 /**
  * A ThermalResistor is used to model a thermal resistance between two

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie31c862a23885f32f2931e927d7f87b7992bd099
Gerrit-Change-Number: 39220
Gerrit-PatchSet: 1
Gerrit-Owner: Andreas Sandberg 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: tests: Fix syntax error in cpu_tests/test.py

2021-01-19 Thread Giacomo Travaglini (Gerrit) via gem5-dev 
Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/39295 )


Change subject: tests: Fix syntax error in cpu_tests/test.py
..

tests: Fix syntax error in cpu_tests/test.py

The testsuite was not loaded with the following error:

Exception thrown while loading
/tests/gem5/cpu_tests/test.py

Signed-off-by: Giacomo Travaglini 
Change-Id: I1e88b8957bb24471e1bb6113ffc7c78886b6ed70
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39295
Reviewed-by: Hoa Nguyen 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M tests/gem5/cpu_tests/test.py
1 file changed, 3 insertions(+), 3 deletions(-)

Approvals:
  Hoa Nguyen: Looks good to me, approved
  Jason Lowe-Power: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/tests/gem5/cpu_tests/test.py b/tests/gem5/cpu_tests/test.py
index 393ff26..ee56400 100644
--- a/tests/gem5/cpu_tests/test.py
+++ b/tests/gem5/cpu_tests/test.py
@@ -60,9 +60,9 @@
 base_url = config.resource_url + '/gem5/cpu_tests/benchmarks/bin/'

 isa_url = {
-constants.gcn3_x86_tag : base_url + "x86"
-constants.arm_tag : base_url + "arm"
-constants.riscv_tag : base_url + "riscv"
+constants.gcn3_x86_tag : base_url + "x86",
+constants.arm_tag : base_url + "arm",
+constants.riscv_tag : base_url + "riscv",
 }

 for isa in valid_isas:

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I1e88b8957bb24471e1bb6113ffc7c78886b6ed70
Gerrit-Change-Number: 39295
Gerrit-PatchSet: 3
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Hoa Nguyen 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: configs: MemConfig, add QoSMemSinkCtrl support

2021-01-19 Thread Adrian Herrera (Gerrit) via gem5-dev 
Adrian Herrera has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/35797 )


Change subject: configs: MemConfig, add QoSMemSinkCtrl support
..

configs: MemConfig, add QoSMemSinkCtrl support

QoSMemSinkInterface is a special case of memory interface type, similar
to SimpleMemory. It requires a QoSMemSinkCtrl where most model parameters
are exposed. By adding support in "config_mem", we allow configurations
with multiple QoSMemSinkCtrls to be centrally configured, particularly
interleaving parameters.

Change-Id: I46462b55d587acd2c861963bc0279bce92d5f450
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35797
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M configs/common/MemConfig.py
1 file changed, 5 insertions(+), 1 deletion(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/configs/common/MemConfig.py b/configs/common/MemConfig.py
index 8221f85..63301ab 100644
--- a/configs/common/MemConfig.py
+++ b/configs/common/MemConfig.py
@@ -229,11 +229,15 @@
  static_frontend_latency  
= '4ns')

 elif opt_mem_type == "SimpleMemory":
 mem_ctrl = m5.objects.SimpleMemory()
+elif opt_mem_type == "QoSMemSinkInterface":
+mem_ctrl = m5.objects.QoSMemSinkCtrl()
 else:
 mem_ctrl = m5.objects.MemCtrl()

 # Hookup the controller to the interface and add to the  
list

-if opt_mem_type != "SimpleMemory":
+if opt_mem_type == "QoSMemSinkInterface":
+mem_ctrl.interface = dram_intf
+elif opt_mem_type != "SimpleMemory":
 mem_ctrl.dram = dram_intf

 mem_ctrls.append(mem_ctrl)

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I46462b55d587acd2c861963bc0279bce92d5f450
Gerrit-Change-Number: 35797
Gerrit-PatchSet: 2
Gerrit-Owner: Adrian Herrera 
Gerrit-Reviewer: Adrian Herrera 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Nikos Nikoleris 
Gerrit-Reviewer: Wendy Elsasser 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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