[gem5-dev] Change in gem5/gem5[develop]: base: Stop both conditionally and unconditionally including cmath.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45365 )



Change subject: base: Stop both conditionally and unconditionally including  
cmath.

..

base: Stop both conditionally and unconditionally including cmath.

base/stats/text.cc was both conditionally (in two places) and  
unconditionally

including cmath. Once should be enough.

Change-Id: I941dfb8631eb71d1a8b423011022f78d628baa33
---
M src/base/stats/text.cc
1 file changed, 1 insertion(+), 11 deletions(-)



diff --git a/src/base/stats/text.cc b/src/base/stats/text.cc
index 26f1622..718b65c 100644
--- a/src/base/stats/text.cc
+++ b/src/base/stats/text.cc
@@ -42,19 +42,9 @@
 #define _GLIBCPP_USE_C99 1
 #endif

-#if defined(__sun)
-#include 
-
-#endif
-
-#include 
-
-#ifdef __SUNPRO_CC
-#include 
-
-#endif
 #include "base/stats/text.hh"

+#include 
 #include 
 #include 
 #include 

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I941dfb8631eb71d1a8b423011022f78d628baa33
Gerrit-Change-Number: 45365
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: mem: Get rid of the SET* macros in packet.cc.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45367 )



Change subject: mem: Get rid of the SET* macros in packet.cc.
..

mem: Get rid of the SET* macros in packet.cc.

Replace these with a helper function which merges attributes into a
unsigned long long which the bitset constructor can accept.

Change-Id: I36f809503a47c17b82dc75dee0d5bb8615eda27b
---
M src/mem/packet.cc
M src/mem/packet.hh
2 files changed, 76 insertions(+), 80 deletions(-)



diff --git a/src/mem/packet.cc b/src/mem/packet.cc
index 0783e0f..820a4bf 100644
--- a/src/mem/packet.cc
+++ b/src/mem/packet.cc
@@ -58,34 +58,24 @@
 #include "base/trace.hh"
 #include "mem/packet_access.hh"

-// The one downside to bitsets is that static initializers can get ugly.
-#define SET1(a1) (1 << (a1))
-#define SET2(a1, a2) (SET1(a1) | SET1(a2))
-#define SET3(a1, a2, a3) (SET2(a1, a2) | SET1(a3))
-#define SET4(a1, a2, a3, a4) (SET3(a1, a2, a3) | SET1(a4))
-#define SET5(a1, a2, a3, a4, a5) (SET4(a1, a2, a3, a4) | SET1(a5))
-#define SET6(a1, a2, a3, a4, a5, a6) (SET5(a1, a2, a3, a4, a5) | SET1(a6))
-#define SET7(a1, a2, a3, a4, a5, a6, a7) (SET6(a1, a2, a3, a4, a5, a6) | \
-  SET1(a7))
-
 const MemCmd::CommandInfo
 MemCmd::commandInfo[] =
 {
 /* InvalidCmd */
-{ 0, InvalidCmd, "InvalidCmd" },
+{ {}, InvalidCmd, "InvalidCmd" },
 /* ReadReq - Read issued by a non-caching agent such as a CPU or
  * device, with no restrictions on alignment. */
-{ SET3(IsRead, IsRequest, NeedsResponse), ReadResp, "ReadReq" },
+{ {IsRead, IsRequest, NeedsResponse}, ReadResp, "ReadReq" },
 /* ReadResp */
-{ SET3(IsRead, IsResponse, HasData), InvalidCmd, "ReadResp" },
+{ {IsRead, IsResponse, HasData}, InvalidCmd, "ReadResp" },
 /* ReadRespWithInvalidate */
-{ SET4(IsRead, IsResponse, HasData, IsInvalidate),
+{ {IsRead, IsResponse, HasData, IsInvalidate},
 InvalidCmd, "ReadRespWithInvalidate" },
 /* WriteReq */
-{ SET5(IsWrite, NeedsWritable, IsRequest, NeedsResponse, HasData),
+{ {IsWrite, NeedsWritable, IsRequest, NeedsResponse, HasData},
 WriteResp, "WriteReq" },
 /* WriteResp */
-{ SET2(IsWrite, IsResponse), InvalidCmd, "WriteResp" },
+{ {IsWrite, IsResponse}, InvalidCmd, "WriteResp" },
 /* WriteCompleteResp - The WriteCompleteResp command is needed
  * because in the GPU memory model we use a WriteResp to indicate
  * that a write has reached the cache controller so we can free
@@ -93,148 +83,139 @@
  * completes we send a WriteCompleteResp to the CU so its wait
  * counters can be updated. Wait counters in the CU is how memory
  * dependences are handled in the GPU ISA. */
-{ SET2(IsWrite, IsResponse), InvalidCmd, "WriteCompleteResp" },
+{ {IsWrite, IsResponse}, InvalidCmd, "WriteCompleteResp" },
 /* WritebackDirty */
-{ SET5(IsWrite, IsRequest, IsEviction, HasData, FromCache),
+{ {IsWrite, IsRequest, IsEviction, HasData, FromCache},
 InvalidCmd, "WritebackDirty" },
 /* WritebackClean - This allows the upstream cache to writeback a
  * line to the downstream cache without it being considered
  * dirty. */
-{ SET5(IsWrite, IsRequest, IsEviction, HasData, FromCache),
+{ {IsWrite, IsRequest, IsEviction, HasData, FromCache},
 InvalidCmd, "WritebackClean" },
 /* WriteClean - This allows a cache to write a dirty block to a memory
below without evicting its copy. */
-{ SET4(IsWrite, IsRequest, HasData, FromCache),  
InvalidCmd, "WriteClean" },

+{ {IsWrite, IsRequest, HasData, FromCache}, InvalidCmd, "WriteClean" },
 /* CleanEvict */
-{ SET3(IsRequest, IsEviction, FromCache), InvalidCmd, "CleanEvict" },
+{ {IsRequest, IsEviction, FromCache}, InvalidCmd, "CleanEvict" },
 /* SoftPFReq */
-{ SET4(IsRead, IsRequest, IsSWPrefetch, NeedsResponse),
+{ {IsRead, IsRequest, IsSWPrefetch, NeedsResponse},
 SoftPFResp, "SoftPFReq" },
 /* SoftPFExReq */
-{ SET6(IsRead, NeedsWritable, IsInvalidate, IsRequest,
-   IsSWPrefetch, NeedsResponse), SoftPFResp, "SoftPFExReq" },
+{ {IsRead, NeedsWritable, IsInvalidate, IsRequest,
+   IsSWPrefetch, NeedsResponse}, SoftPFResp, "SoftPFExReq" },
 /* HardPFReq */
-{ SET5(IsRead, IsRequest, IsHWPrefetch, NeedsResponse, FromCache),
+{ {IsRead, IsRequest, IsHWPrefetch, NeedsResponse, FromCache},
 HardPFResp, "HardPFReq" },
 /* SoftPFResp */
-{ SET4(IsRead, IsResponse, IsSWPrefetch, HasData),
-InvalidCmd, "SoftPFResp" },
+{ {IsRead, IsResponse, IsSWPrefetch, HasData},  
InvalidCmd, "SoftPFResp" },

 /* HardPFResp */
-{ SET4(IsRead, IsResponse, IsHWPrefetch, HasData),
-InvalidCmd, "HardPFResp" },
+{ 

[gem5-dev] Change in gem5/gem5[develop]: base: Stop using macros to handle nan in stats/text.cc.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45366 )



Change subject: base: Stop using macros to handle nan in stats/text.cc.
..

base: Stop using macros to handle nan in stats/text.cc.

c++ provides a standard way to retrieve the value of nan. Use that
instead of a function to compute it, or macros defined for c.

Change-Id: I483e8642d28cc3187682ce6bb7457b5e796cf61c
---
M src/base/stats/text.cc
1 file changed, 26 insertions(+), 41 deletions(-)



diff --git a/src/base/stats/text.cc b/src/base/stats/text.cc
index 718b65c..17d1e3b 100644
--- a/src/base/stats/text.cc
+++ b/src/base/stats/text.cc
@@ -48,6 +48,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 

@@ -56,28 +57,12 @@
 #include "base/stats/info.hh"
 #include "base/str.hh"

-#ifndef NAN
-float __nan();
-/** Define Not a number. */
-#define NAN (__nan())
-/** Need to define __nan() */
-#define __M5_NAN
-#endif
-
-#ifdef __M5_NAN
-float
-__nan()
+namespace
 {
-union
-{
-uint32_t ui;
-float f;
-} nan;

-nan.ui = 0x7fc0;
-return nan.f;
-}
-#endif
+constexpr auto Nan = std::numeric_limits::quiet_NaN();
+
+} // anonymous namespace

 namespace Stats {

@@ -342,8 +327,8 @@
 print.descriptions = descriptions;
 print.units = units;
 print.flags = flags;
-print.pdf = _total ? 0.0 : NAN;
-print.cdf = _total ? 0.0 : NAN;
+print.pdf = _total ? 0.0 : Nan;
+print.cdf = _total ? 0.0 : Nan;

 bool havesub = !subnames.empty();

@@ -389,8 +374,8 @@
 }

 if (flags.isSet(::Stats::total)) {
-print.pdf = NAN;
-print.cdf = NAN;
+print.pdf = Nan;
+print.cdf = Nan;
 print.name = base + "total";
 print.desc = desc;
 print.unitStr = unitStr;
@@ -472,8 +457,8 @@
 print.descriptions = descriptions;
 print.desc = desc;
 print.unitStr = unitStr;
-print.pdf = NAN;
-print.cdf = NAN;
+print.pdf = Nan;
+print.cdf = Nan;

 if (flags.isSet(oneline)) {
 print.name = base + "bucket_size";
@@ -494,16 +479,16 @@
 print(stream);

 print.name = base + "mean";
-print.value = data.samples ? data.sum / data.samples : NAN;
+print.value = data.samples ? data.sum / data.samples : Nan;
 print(stream);

 if (data.type == Hist) {
 print.name = base + "gmean";
-print.value = data.samples ? exp(data.logs / data.samples) : NAN;
+print.value = data.samples ? exp(data.logs / data.samples) : Nan;
 print(stream);
 }

-Result stdev = NAN;
+Result stdev = Nan;
 if (data.samples)
 stdev = sqrt((data.samples * data.squares - data.sum * data.sum) /
  (data.samples * (data.samples - 1.0)));
@@ -517,11 +502,11 @@
 size_t size = data.cvec.size();

 Result total = 0.0;
-if (data.type == Dist && data.underflow != NAN)
+if (data.type == Dist && data.underflow != Nan)
 total += data.underflow;
 for (off_type i = 0; i < size; ++i)
 total += data.cvec[i];
-if (data.type == Dist && data.overflow != NAN)
+if (data.type == Dist && data.overflow != Nan)
 total += data.overflow;

 if (total) {
@@ -529,7 +514,7 @@
 print.cdf = 0.0;
 }

-if (data.type == Dist && data.underflow != NAN) {
+if (data.type == Dist && data.underflow != Nan) {
 print.name = base + "underflows";
 print.update(data.underflow, total);
 print(stream);
@@ -565,22 +550,22 @@
 stream << std::endl;
 }

-if (data.type == Dist && data.overflow != NAN) {
+if (data.type == Dist && data.overflow != Nan) {
 print.name = base + "overflows";
 print.update(data.overflow, total);
 print(stream);
 }

-print.pdf = NAN;
-print.cdf = NAN;
+print.pdf = Nan;
+print.cdf = Nan;

-if (data.type == Dist && data.min_val != NAN) {
+if (data.type == Dist && data.min_val != Nan) {
 print.name = base + "min_value";
 print.value = data.min_val;
 print(stream);
 }

-if (data.type == Dist && data.max_val != NAN) {
+if (data.type == Dist && data.max_val != Nan) {
 print.name = base + "max_value";
 print.value = data.max_val;
 print(stream);
@@ -606,8 +591,8 @@
 print.descriptions = descriptions;
 print.units = units;
 print.precision = info.precision;
-print.pdf = NAN;
-print.cdf = NAN;
+print.pdf = Nan;
+print.cdf = Nan;

 print(*stream);
 }
@@ -810,8 +795,8 @@
 print.units = units;
 print.desc = desc;
 print.unitStr = unitStr;
-print.pdf = NAN;
-print.cdf = NAN;
+print.pdf = Nan;
+print.cdf = Nan;

 print.name = base + "samples";
 print.value = data.samples;

--
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[gem5-dev] Re: Build failed in Jenkins: nightly #307

2021-05-11 Thread Gabe Black via gem5-dev
Yes, I think Daniel has the right diagnosis.

Gabe

On Tue, May 11, 2021 at 1:47 PM Daniel Carvalho  wrote:

> Hi, Bobby,
>
> Previous to that patch, enabled() (now tracing()) checked if the flag was
> globally enabled and if it had been individually enabled, and the tracing
> check was done elsewhere (DTRACE(flag) did that). Now tracing() is checking
> both conditions AND if tracing is on, which is likely a much more desirable
> design. As such, the tests must be updated to reflect this API change
> (e.g., replace ASSERT_TRUE(x.tracing()) with ASSERT_TRUE(!TRACING_ON ||
> x.tracing()), or simply disable these tests altogether with a NDEBUG check).
>
> Regards,
> Daniel
> Em terça-feira, 11 de maio de 2021 16:48:35 BRT, Bobby Bruce <
> bbr...@ucdavis.edu> escreveu:
>
>
> Hey Daniel and Gabe,
>
> I'm looking into this test failure (reproducible with `scons
> build/NULL/unittests.fast`). I'm a little confused about how these tests
> ever passed. This patchet introduces the error (or at least, if this patch
> is reverted, the tests pass):
> https://gem5-review.googlesource.com/c/public/gem5/+/45008, but this
> doesn't appear to be doing anything bad. If compiling to `.fast`
> `tracing()` should return false (as far as I understand things), but the
> tests appear to assume this should return true, mostly so this branch is
> traversed:
> https://gem5.googlesource.com/public/gem5/+/refs/heads/develop/src/base/debug.cc#177.
> As things currently stand `TRACING_ON` is false and `_tracing` is true with
> `.fast`.
>
> Does anyone have any insight? I feel like I might be overlooking something
> here. I realize things have been moved around in debug.hh recently but
> nothing seems particularly incorrect.
>
> Kind regards,
> Bobby
>
> --
> Dr. Bobby R. Bruce
> Room 3050,
> Kemper Hall, UC Davis
> Davis,
> CA, 95616
>
> web: https://www.bobbybruce.net
>
>
> On Mon, May 10, 2021 at 11:43 PM jenkins-no-reply--- via gem5-dev <
> gem5-dev@gem5.org> wrote:
>
> See <
> https://jenkins.gem5.org/job/nightly/307/display/redirect?page=changes>
>
> Changes:
>
> [gabe.black] base: Add macros to mark things as deprecated.
>
> [gabe.black] base: Mark the unused DPRINTF_UNCONDITIONAL macro as
> deprecated.
>
> [gabe.black] base,arch,dev,mem: Always compile DPRINTFs, even if they're
> disabled.
>
> [gabe.black] base: Collapse the DTRACE macro in DPRINTF.
>
> [gabe.black] base: Simplify the definition of DTRACE.
>
> [Giacomo Travaglini] arch-arm: Fix SMM* instructions
>
> [gabe.black] base,python: Simplify how we check if a debug flag is enabled.
>
> [gabe.black] base: Move TRACING_ON check into Flag::tracing().
>
> [gabe.black] misc: Collapse all uses of DTRACE(x) to Debug::x.
>
> [gabe.black] base,arch-sparc: Overhaul the small fenv wrapper in base.
>
> [gabe.black] arch-arm: Use src/base/fenv.hh instead of raw fenv.h.
>
> [gabe.black] cpu: Delete an unnecessary return in RegId::flatIndex.
>
> [gabe.black] arch,cpu: Get rid of is*Reg() methods in RegId.
>
> [gabe.black] cpu: Get rid of the unused NumRegClasses constant.
>
> [gabe.black] cpu: Get rid of the redundant PhysRegIndex type.
>
> [gabe.black] scons,misc: Remove the ability to disable some trivial
> features.
>
> [gabe.black] scons: Pull builder definitions out of SConstruct.
>
> [gabe.black] scons: Simplify finding the python lib with ParseConfig.
>
> [gabe.black] scons: Update comments in SConstruct.
>
> [gabe.black] python: Collapse away the now unused readCommandWithReturn
> function.
>
> [gabe.black] python,scons: Move readCommand and compareVersions into
> site_scons.
>
> [gabe.black] arch-x86: Clean up x86 integer indexes.
>
> [gabe.black] arch-x86: Create some infrastructure for x86 microop operands.
>
> [gabe.black] arch: Set %(op_idx)s properly when predicated operands are
> present.
>
> [gabe.black] arch-x86: Build source picking into the operands.
>
>
> --
> [...truncated 506.72 KB...]
> [==] Running 8 tests from 1 test suite.
> [--] Global test environment set-up.
> [--] 8 tests from Coroutine
> [ RUN  ] Coroutine.Unstarted
> [   OK ] Coroutine.Unstarted (0 ms)
> [ RUN  ] Coroutine.Unfinished
> [   OK ] Coroutine.Unfinished (0 ms)
> [ RUN  ] Coroutine.Passing
> [   OK ] Coroutine.Passing (1 ms)
> [ RUN  ] Coroutine.Returning
> [   OK ] Coroutine.Returning (0 ms)
> [ RUN  ] Coroutine.Fibonacci
> [   OK ] Coroutine.Fibonacci (0 ms)
> [ RUN  ] Coroutine.Cooperative
> [   OK ] Coroutine.Cooperative (0 ms)
> [ RUN  ] Coroutine.Nested
> [   OK ] Coroutine.Nested (0 ms)
> [ RUN  ] Coroutine.TwoCallers
> [   OK ] Coroutine.TwoCallers (0 ms)
> [--] 8 tests from Coroutine (1 ms total)
>
> [--] Global test environment tear-down
> [==] 8 tests from 1 test suite ran. (1 ms total)
> [  PASSED  ] 8 tests.
> Running main() from build/googletest/googletest/src/gtest_main.cc
> [==] Running 16 tests from 1 test suite.
> 

[gem5-dev] Re: Build failed in Jenkins: nightly #307

2021-05-11 Thread Daniel Carvalho via gem5-dev
 Hi, Bobby,
Previous to that patch, enabled() (now tracing()) checked if the flag was 
globally enabled and if it had been individually enabled, and the tracing check 
was done elsewhere (DTRACE(flag) did that). Now tracing() is checking both 
conditions AND if tracing is on, which is likely a much more desirable design. 
As such, the tests must be updated to reflect this API change (e.g., replace 
ASSERT_TRUE(x.tracing()) with ASSERT_TRUE(!TRACING_ON || x.tracing()), or 
simply disable these tests altogether with a NDEBUG check).
Regards,Daniel
Em terça-feira, 11 de maio de 2021 16:48:35 BRT, Bobby Bruce 
 escreveu:  
 
 Hey Daniel and Gabe,
I'm looking into this test failure (reproducible with `scons 
build/NULL/unittests.fast`). I'm a little confused about how these tests ever 
passed. This patchet introduces the error (or at least, if this patch is 
reverted, the tests pass): 
https://gem5-review.googlesource.com/c/public/gem5/+/45008, but this doesn't 
appear to be doing anything bad. If compiling to `.fast` `tracing()` should 
return false (as far as I understand things), but the tests appear to assume 
this should return true, mostly so this branch is traversed: 
https://gem5.googlesource.com/public/gem5/+/refs/heads/develop/src/base/debug.cc#177.
 As things currently stand `TRACING_ON` is false and `_tracing` is true with 
`.fast`.

Does anyone have any insight? I feel like I might be overlooking something 
here. I realize things have been moved around in debug.hh recently but nothing 
seems particularly incorrect.

Kind regards,Bobby

--Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616
web: https://www.bobbybruce.net


On Mon, May 10, 2021 at 11:43 PM jenkins-no-reply--- via gem5-dev 
 wrote:

See 

Changes:

[gabe.black] base: Add macros to mark things as deprecated.

[gabe.black] base: Mark the unused DPRINTF_UNCONDITIONAL macro as deprecated.

[gabe.black] base,arch,dev,mem: Always compile DPRINTFs, even if they're 
disabled.

[gabe.black] base: Collapse the DTRACE macro in DPRINTF.

[gabe.black] base: Simplify the definition of DTRACE.

[Giacomo Travaglini] arch-arm: Fix SMM* instructions

[gabe.black] base,python: Simplify how we check if a debug flag is enabled.

[gabe.black] base: Move TRACING_ON check into Flag::tracing().

[gabe.black] misc: Collapse all uses of DTRACE(x) to Debug::x.

[gabe.black] base,arch-sparc: Overhaul the small fenv wrapper in base.

[gabe.black] arch-arm: Use src/base/fenv.hh instead of raw fenv.h.

[gabe.black] cpu: Delete an unnecessary return in RegId::flatIndex.

[gabe.black] arch,cpu: Get rid of is*Reg() methods in RegId.

[gabe.black] cpu: Get rid of the unused NumRegClasses constant.

[gabe.black] cpu: Get rid of the redundant PhysRegIndex type.

[gabe.black] scons,misc: Remove the ability to disable some trivial features.

[gabe.black] scons: Pull builder definitions out of SConstruct.

[gabe.black] scons: Simplify finding the python lib with ParseConfig.

[gabe.black] scons: Update comments in SConstruct.

[gabe.black] python: Collapse away the now unused readCommandWithReturn 
function.

[gabe.black] python,scons: Move readCommand and compareVersions into site_scons.

[gabe.black] arch-x86: Clean up x86 integer indexes.

[gabe.black] arch-x86: Create some infrastructure for x86 microop operands.

[gabe.black] arch: Set %(op_idx)s properly when predicated operands are present.

[gabe.black] arch-x86: Build source picking into the operands.


--
[...truncated 506.72 KB...]
[==] Running 8 tests from 1 test suite.
[--] Global test environment set-up.
[--] 8 tests from Coroutine
[ RUN      ] Coroutine.Unstarted
[       OK ] Coroutine.Unstarted (0 ms)
[ RUN      ] Coroutine.Unfinished
[       OK ] Coroutine.Unfinished (0 ms)
[ RUN      ] Coroutine.Passing
[       OK ] Coroutine.Passing (1 ms)
[ RUN      ] Coroutine.Returning
[       OK ] Coroutine.Returning (0 ms)
[ RUN      ] Coroutine.Fibonacci
[       OK ] Coroutine.Fibonacci (0 ms)
[ RUN      ] Coroutine.Cooperative
[       OK ] Coroutine.Cooperative (0 ms)
[ RUN      ] Coroutine.Nested
[       OK ] Coroutine.Nested (0 ms)
[ RUN      ] Coroutine.TwoCallers
[       OK ] Coroutine.TwoCallers (0 ms)
[--] 8 tests from Coroutine (1 ms total)

[--] Global test environment tear-down
[==] 8 tests from 1 test suite ran. (1 ms total)
[  PASSED  ] 8 tests.
Running main() from build/googletest/googletest/src/gtest_main.cc
[==] Running 16 tests from 1 test suite.
[--] Global test environment set-up.
[--] 16 tests from FlagsTest
[ RUN      ] FlagsTest.ConstructorZero
[       OK ] FlagsTest.ConstructorZero (0 ms)
[ RUN      ] FlagsTest.ConstructorSingle
[       OK ] FlagsTest.ConstructorSingle (0 ms)
[ RUN      ] FlagsTest.ConstructorMulti
[       OK ] FlagsTest.ConstructorMulti (0 ms)
[ RUN      ] 

[gem5-dev] Change in gem5/gem5[develop]: arch: Stop using deprecated M5_AT_* constants.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45243 )


Change subject: arch: Stop using deprecated M5_AT_* constants.
..

arch: Stop using deprecated M5_AT_* constants.

Also stop using the non-namespaced version of AuxVector.

Change-Id: I26fc0cf1f27c1a1dcae479096b183ab1f5abc8e2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45243
Tested-by: kokoro 
Maintainer: Gabe Black 
Reviewed-by: Daniel Carvalho 
---
M src/arch/arm/process.cc
M src/arch/mips/process.cc
M src/arch/power/process.cc
M src/arch/riscv/process.cc
M src/arch/sparc/process.cc
M src/arch/x86/process.cc
M src/arch/x86/process.hh
7 files changed, 130 insertions(+), 125 deletions(-)

Approvals:
  Daniel Carvalho: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/process.cc b/src/arch/arm/process.cc
index a9cf4bd..ec00e6b 100644
--- a/src/arch/arm/process.cc
+++ b/src/arch/arm/process.cc
@@ -258,7 +258,7 @@
 {
 int intSize = sizeof(IntType);

-std::vector> auxv;
+std::vector> auxv;

 std::string filename;
 if (argv.size() < 1)
@@ -279,41 +279,41 @@

 //Bits which describe the system hardware capabilities
 //XXX Figure out what these should be
-auxv.emplace_back(M5_AT_HWCAP, features);
+auxv.emplace_back(gem5::auxv::Hwcap, features);
 //Frequency at which times() increments
-auxv.emplace_back(M5_AT_CLKTCK, 0x64);
+auxv.emplace_back(gem5::auxv::Clktck, 0x64);
 //Whether to enable "secure mode" in the executable
-auxv.emplace_back(M5_AT_SECURE, 0);
+auxv.emplace_back(gem5::auxv::Secure, 0);
 // Pointer to 16 bytes of random data
-auxv.emplace_back(M5_AT_RANDOM, 0);
+auxv.emplace_back(gem5::auxv::Random, 0);
 //The filename of the program
-auxv.emplace_back(M5_AT_EXECFN, 0);
+auxv.emplace_back(gem5::auxv::Execfn, 0);
 //The string "v71" -- ARM v7 architecture
-auxv.emplace_back(M5_AT_PLATFORM, 0);
+auxv.emplace_back(gem5::auxv::Platform, 0);
 }

 //The system page size
-auxv.emplace_back(M5_AT_PAGESZ, ArmISA::PageBytes);
+auxv.emplace_back(gem5::auxv::Pagesz, ArmISA::PageBytes);
 // For statically linked executables, this is the virtual address  
of

 // the program header tables if they appear in the executable image
-auxv.emplace_back(M5_AT_PHDR, elfObject->programHeaderTable());
+auxv.emplace_back(gem5::auxv::Phdr,  
elfObject->programHeaderTable());

 // This is the size of a program header entry from the elf file.
-auxv.emplace_back(M5_AT_PHENT, elfObject->programHeaderSize());
+auxv.emplace_back(gem5::auxv::Phent,  
elfObject->programHeaderSize());
 // This is the number of program headers from the original elf  
file.

-auxv.emplace_back(M5_AT_PHNUM, elfObject->programHeaderCount());
+auxv.emplace_back(gem5::auxv::Phnum,  
elfObject->programHeaderCount());

 // This is the base address of the ELF interpreter; it should be
 // zero for static executables or contain the base address for
 // dynamic executables.
-auxv.emplace_back(M5_AT_BASE, getBias());
+auxv.emplace_back(gem5::auxv::Base, getBias());
 //XXX Figure out what this should be.
-auxv.emplace_back(M5_AT_FLAGS, 0);
+auxv.emplace_back(gem5::auxv::Flags, 0);
 //The entry point to the program
-auxv.emplace_back(M5_AT_ENTRY, objFile->entryPoint());
+auxv.emplace_back(gem5::auxv::Entry, objFile->entryPoint());
 //Different user and group IDs
-auxv.emplace_back(M5_AT_UID, uid());
-auxv.emplace_back(M5_AT_EUID, euid());
-auxv.emplace_back(M5_AT_GID, gid());
-auxv.emplace_back(M5_AT_EGID, egid());
+auxv.emplace_back(gem5::auxv::Uid, uid());
+auxv.emplace_back(gem5::auxv::Euid, euid());
+auxv.emplace_back(gem5::auxv::Gid, gid());
+auxv.emplace_back(gem5::auxv::Egid, egid());
 }

 //Figure out how big the initial stack nedes to be
@@ -414,13 +414,13 @@

 //Fix up the aux vectors which point to other data
 for (int i = auxv.size() - 1; i >= 0; i--) {
-if (auxv[i].type == M5_AT_PLATFORM) {
+if (auxv[i].type == gem5::auxv::Platform) {
 auxv[i].val = platform_base;
 initVirtMem->writeString(platform_base, platform.c_str());
-} else if (auxv[i].type == M5_AT_EXECFN) {
+} else if (auxv[i].type == gem5::auxv::Execfn) {
 auxv[i].val = aux_data_base;
 initVirtMem->writeString(aux_data_base, filename.c_str());
-} else if (auxv[i].type == M5_AT_RANDOM) {
+} else if 

[gem5-dev] Change in gem5/gem5[develop]: sim: Deprecate M5_AT_* constants.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45242 )


Change subject: sim: Deprecate M5_AT_* constants.
..

sim: Deprecate M5_AT_* constants.

These are formatted as #defines, but they are actually enum constants.
If they were actually macros, they should use a GEM5_ prefix. Put them
in the gem5 namespace to remove the need for that prefix, and an auxv
namespace to remove the need for the AT prefix.

Since we now have a gem5::auxv namespace, move the AuxVector template
into it and deprecate the old, global namespace version.

Also, one of the constants was M5_BASE_PLATFORM, which was inconsistent
with the rest of the constants which were M5_AT_... This was not
actually because the constant in any header files was different, it was
just incorrectly transcribed and should have been M5_AT_BASE_PLATFORM.
Since we're changing names anyway, replace this with
gem5::auxv::BasePlatform.

Change-Id: Ie0dc34a683b113a4ed4bc76054eb822676f6e802
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45242
Tested-by: kokoro 
Maintainer: Gabe Black 
Reviewed-by: Daniel Carvalho 
---
M src/sim/aux_vector.hh
1 file changed, 85 insertions(+), 29 deletions(-)

Approvals:
  Daniel Carvalho: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/sim/aux_vector.hh b/src/sim/aux_vector.hh
index 79f45c9..55a4a05 100644
--- a/src/sim/aux_vector.hh
+++ b/src/sim/aux_vector.hh
@@ -34,6 +34,14 @@
 #ifndef __AUX_VECTOR_HH__
 #define __AUX_VECTOR_HH__

+#include "base/compiler.hh"
+
+namespace gem5
+{
+
+namespace auxv
+{
+
 template
 class AuxVector
 {
@@ -45,41 +53,89 @@
 IntType val = 0;
 };

-template
+// Ensure the global versions of swap_byte are visible.
+using ::swap_byte;
+
+// Define swap_byte in this namespace, so argument dependent resolution can
+// find it.
+template 
 inline AuxVector
-swap_byte(AuxVector av)
+swap_byte(const AuxVector )
 {
-av.type = swap_byte(av.type);
-av.val = swap_byte(av.val);
-return av;
+return AuxVector(swap_byte(av.type), swap_byte(av.val));
 }

+enum Type
+{
+Null = 0,  // End of vector.
+Ignore = 1,// Ignored.
+Execfd = 2,// File descriptor of program if interpreter used.
+Phdr = 3,  // Address of program header tables in memory.
+Phent = 4, // Size in bytes of one program header entry.
+Phnum = 5, // Number of entries in program header table.
+Pagesz = 6,// System page size.
+Base = 7,  // Base address of interpreter program in memory.
+Flags = 8, // Unused.
+Entry = 9, // Entry point of program after interpreter setup.
+Notelf = 10,   // Non-zero if format is different than ELF.
+Uid = 11,  // Address of real user ID of thread.
+Euid = 12, // Address of effective user ID of thread.
+Gid = 13,  // Address of real group ID of thread.
+Egid = 14, // Address of effective group ID of thread.
+Platform = 15, // Platform string for the architecture.
+Hwcap = 16,// Bits which describe the hardware capabilities.
+Clktck = 17,   // Frequency at which times() syscall increments.
+Secure = 23,   // Whether to enable "secure mode" in executable.
+BasePlatform = 24, // Platform string (differs on PowerPC only).
+Random = 25,   // Pointer to 16 bytes of random data.
+Hwcap2 = 26,   // Extension of AT_HWCAP.
+Execfn = 31,   // Filename of the program.
+VectorSize = 44
+};
+
+} // namespace auxv
+
+} // namespace gem5
+
+#define GEM5_DEPRECATE_AT(NAME, name) M5_AT_##NAME \
+GEM5_DEPRECATED("Replace M5_AT_" #NAME " with gem5::auxv::" #name) = \
+gem5::auxv::name
+
 enum AuxiliaryVectorType
 {
-M5_AT_NULL = 0,// End of vector.
-M5_AT_IGNORE = 1,  // Ignored.
-M5_AT_EXECFD = 2,  // File descriptor of program if interpreter  
used.

-M5_AT_PHDR = 3,// Address of program header tables in memory.
-M5_AT_PHENT = 4,   // Size in bytes of one program header entry.
-M5_AT_PHNUM = 5,   // Number of entries in program header table.
-M5_AT_PAGESZ = 6,  // System page size.
-M5_AT_BASE = 7,// Base address of interpreter program in  
memory.

-M5_AT_FLAGS = 8,   // Unused.
-M5_AT_ENTRY = 9,   // Entry point of program after interpreter  
setup.

-M5_AT_NOTELF = 10, // Non-zero if format is different than ELF.
-M5_AT_UID = 11,// Address of real user ID of thread.
-M5_AT_EUID = 12,   // Address of effective user ID of thread.
-M5_AT_GID = 13,// Address of real group ID of thread.
-M5_AT_EGID = 14,   // Address of effective group ID of thread.
-M5_AT_PLATFORM = 15,   // Platform string for the architecture.
-M5_AT_HWCAP = 16,   

[gem5-dev] Change in gem5/gem5[develop]: misc: Replace M5_FOR_EACH_IN_PACK with GEM5_FOR_EACH_IN_PACK.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45240 )


Change subject: misc: Replace M5_FOR_EACH_IN_PACK with  
GEM5_FOR_EACH_IN_PACK.

..

misc: Replace M5_FOR_EACH_IN_PACK with GEM5_FOR_EACH_IN_PACK.

Change-Id: I5d565c496129033634d2b913f83d014c5e07b1dc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45240
Tested-by: kokoro 
Maintainer: Gabe Black 
Reviewed-by: Daniel Carvalho 
---
M src/arch/x86/insts/microop_args.hh
M src/sim/guest_abi/dispatch.hh
M src/sim/guest_abi/layout.hh
3 files changed, 5 insertions(+), 5 deletions(-)

Approvals:
  Daniel Carvalho: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/x86/insts/microop_args.hh  
b/src/arch/x86/insts/microop_args.hh

index a8a01b1..fe893a7 100644
--- a/src/arch/x86/insts/microop_args.hh
+++ b/src/arch/x86/insts/microop_args.hh
@@ -353,8 +353,8 @@
 std::stringstream response;
 Base::printMnemonic(response, this->instMnem, this->mnemonic);
 int count = 0;
-M5_FOR_EACH_IN_PACK(ccprintf(response, count++ ? ", " : ""),
-Operands::print(response));
+GEM5_FOR_EACH_IN_PACK(ccprintf(response, count++ ? ", " : ""),
+  Operands::print(response));
 return response.str();
 }
 };
diff --git a/src/sim/guest_abi/dispatch.hh b/src/sim/guest_abi/dispatch.hh
index 2caa208..32e07b4 100644
--- a/src/sim/guest_abi/dispatch.hh
+++ b/src/sim/guest_abi/dispatch.hh
@@ -102,8 +102,8 @@
 int count = 0;
 // Extract all the arguments from the thread context and print them,
 // prefixed with either a ( or a , as appropriate.
-M5_FOR_EACH_IN_PACK(os << (count++ ? ", " : "("),
-os << getArgument(tc, state));
+GEM5_FOR_EACH_IN_PACK(os << (count++ ? ", " : "("),
+  os << getArgument(tc, state));
 os << ")";
 }

diff --git a/src/sim/guest_abi/layout.hh b/src/sim/guest_abi/layout.hh
index 08840ec..9c8f42f 100644
--- a/src/sim/guest_abi/layout.hh
+++ b/src/sim/guest_abi/layout.hh
@@ -112,7 +112,7 @@
 prepareForArguments(GEM5_VAR_USED ThreadContext *tc,
 typename ABI::State )
 {
-M5_FOR_EACH_IN_PACK(Preparer::prepare(tc, state));
+GEM5_FOR_EACH_IN_PACK(Preparer::prepare(tc,  
state));

 }

 template 



1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/45240
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I5d565c496129033634d2b913f83d014c5e07b1dc
Gerrit-Change-Number: 45240
Gerrit-PatchSet: 6
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: misc: Replace M5_CLASS_VAR_USED with GEM5_CLASS_VAR_USED.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45241 )


Change subject: misc: Replace M5_CLASS_VAR_USED with GEM5_CLASS_VAR_USED.
..

misc: Replace M5_CLASS_VAR_USED with GEM5_CLASS_VAR_USED.

Change-Id: Ibd2230d684f41201b07fa9083881145e36176a68
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45241
Tested-by: kokoro 
Maintainer: Gabe Black 
Reviewed-by: Daniel Carvalho 
---
M src/cpu/o3/scoreboard.hh
M src/dev/arm/smmu_v3_transl.hh
M src/mem/mem_interface.hh
M src/mem/ruby/network/garnet/OutputUnit.hh
M src/sim/probe/probe.hh
5 files changed, 5 insertions(+), 5 deletions(-)

Approvals:
  Daniel Carvalho: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/cpu/o3/scoreboard.hh b/src/cpu/o3/scoreboard.hh
index 239497a..85a70d9 100644
--- a/src/cpu/o3/scoreboard.hh
+++ b/src/cpu/o3/scoreboard.hh
@@ -58,7 +58,7 @@
 std::vector regScoreBoard;

 /** The number of actual physical registers */
-M5_CLASS_VAR_USED unsigned numPhysRegs;
+GEM5_CLASS_VAR_USED unsigned numPhysRegs;

   public:
 /** Constructs a scoreboard.
diff --git a/src/dev/arm/smmu_v3_transl.hh b/src/dev/arm/smmu_v3_transl.hh
index bfe6319..fbe97b0 100644
--- a/src/dev/arm/smmu_v3_transl.hh
+++ b/src/dev/arm/smmu_v3_transl.hh
@@ -97,7 +97,7 @@
 TranslContext context;

 Tick recvTick;
-M5_CLASS_VAR_USED Tick faultTick;
+GEM5_CLASS_VAR_USED Tick faultTick;

 virtual void main(Yield );

diff --git a/src/mem/mem_interface.hh b/src/mem/mem_interface.hh
index d1bf671..7710e95 100644
--- a/src/mem/mem_interface.hh
+++ b/src/mem/mem_interface.hh
@@ -140,7 +140,7 @@
 /**
  * General timing requirements
  */
-M5_CLASS_VAR_USED const Tick tCK;
+GEM5_CLASS_VAR_USED const Tick tCK;
 const Tick tCS;
 const Tick tBURST;
 const Tick tRTW;
diff --git a/src/mem/ruby/network/garnet/OutputUnit.hh  
b/src/mem/ruby/network/garnet/OutputUnit.hh

index 1245269..fe7f889 100644
--- a/src/mem/ruby/network/garnet/OutputUnit.hh
+++ b/src/mem/ruby/network/garnet/OutputUnit.hh
@@ -99,7 +99,7 @@

   private:
 Router *m_router;
-M5_CLASS_VAR_USED int m_id;
+GEM5_CLASS_VAR_USED int m_id;
 PortDirection m_direction;
 int m_vc_per_vnet;
 NetworkLink *m_out_link;
diff --git a/src/sim/probe/probe.hh b/src/sim/probe/probe.hh
index eb0e445..a0bc568 100644
--- a/src/sim/probe/probe.hh
+++ b/src/sim/probe/probe.hh
@@ -155,7 +155,7 @@
 {
   private:
 /** Required for sensible debug messages.*/
-M5_CLASS_VAR_USED const SimObject *object;
+GEM5_CLASS_VAR_USED const SimObject *object;
 /** Vector for name look-up. */
 std::vector points;




1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/45241
To unsubscribe, or for help writing mail filters, visit  
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ibd2230d684f41201b07fa9083881145e36176a68
Gerrit-Change-Number: 45241
Gerrit-PatchSet: 6
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Move the macros in compiler.hh to a GEM5_ prefix.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45230 )


Change subject: base: Move the macros in compiler.hh to a GEM5_ prefix.
..

base: Move the macros in compiler.hh to a GEM5_ prefix.

Also add macros which define the old names to the new names for
backwards compatibility.

This change also takes the opportunity to rename the M5_ATTR_PACKED
macro to GEM5_PACKED, dropping the ATTR. None of the other attribute
based macros bother to specify that they stand for an attribute, making
this one inconsistent and overly verbose.

Similarly, it renames M5_NODISCARD to GEM5_NO_DISCARD to be consistent
with other macros which separate out individual words like GEM5_VAR_USED
and GEM5_NO_INLINE

Change-Id: I22d404492faf28b79a8247f869f14af21c9cf967
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45230
Reviewed-by: Daniel Carvalho 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
M src/base/compiler.hh
1 file changed, 41 insertions(+), 25 deletions(-)

Approvals:
  Daniel Carvalho: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/base/compiler.hh b/src/base/compiler.hh
index 97dec94..4ea0dbb 100644
--- a/src/base/compiler.hh
+++ b/src/base/compiler.hh
@@ -50,32 +50,32 @@
  * Attributes that become standard in later versions of c++.
  */

-// Use M5_FALLTHROUGH to mark when you're intentionally falling through  
from
+// Use GEM5_FALLTHROUGH to mark when you're intentionally falling through  
from

 // one case to another in a switch statement.
 #if __has_cpp_attribute(fallthrough) // Standard in c++17.
-#  define M5_FALLTHROUGH [[fallthrough]]
+#  define GEM5_FALLTHROUGH [[fallthrough]]
 #else
 // Not supported, so it's not necessary to avoid warnings.
-#  define M5_FALLTHROUGH
+#  define GEM5_FALLTHROUGH
 #endif

 // When the return value of a function should not be discarded, mark it  
with

-// M5_NODISCARD.
+// GEM5_NO_DISCARD.
 #if __has_cpp_attribute(nodiscard) // Standard in c++17, with message in  
c++20.

-#  define M5_NODISCARD [[nodiscard]]
+#  define GEM5_NO_DISCARD [[nodiscard]]
 #else
 // Not supported, but it's optional so we can just omit it.
-#  define M5_NODISCARD
+#  define GEM5_NO_DISCARD
 #endif

 // When a variable may purposefully not be used, for instance if it's only  
used

-// in debug statements which might be disabled, mark it with M5_VAR_USED.
+// in debug statements which might be disabled, mark it with GEM5_VAR_USED.
 #if __has_cpp_attribute(maybe_unused) // Standard in c++17.
-#  define M5_VAR_USED [[maybe_unused]]
+#  define GEM5_VAR_USED [[maybe_unused]]
 #elif defined(__GNUC__)
 // gcc and clang support a custom attribute which is essentially the same
 // thing.
-#  define M5_VAR_USED [[gnu::unused]]
+#  define GEM5_VAR_USED [[gnu::unused]]
 #else
 #  error "Don't know what to do for your compiler."
 #endif
@@ -89,29 +89,29 @@
 // Mark a structure as packed, so that no padding is added to its layout.  
This
 // padding might be added to, for instance, ensure certain fields have  
certain

 // alignment.
-#  define M5_ATTR_PACKED [[gnu::packed]]
+#  define GEM5_PACKED [[gnu::packed]]

 // Prevent a function from being inlined.
-#  define M5_NO_INLINE [[gnu::noinline]]
+#  define GEM5_NO_INLINE [[gnu::noinline]]

 // Set the visibility of a symbol.
-#  define M5_PUBLIC [[gnu:visibility("default")]]
-#  define M5_LOCAL [[gnu::visibility("hidden")]]
-#  define M5_WEAK [[gnu::weak]]
+#  define GEM5_PUBLIC [[gnu:visibility("default")]]
+#  define GEM5_LOCAL [[gnu::visibility("hidden")]]
+#  define GEM5_WEAK [[gnu::weak]]

 // Force an alignment for a variable.
-#  define M5_ALIGNED(alignment) [[gnu::aligned(alignment)]]
+#  define GEM5_ALIGNED(alignment) [[gnu::aligned(alignment)]]

 // Marker for what should be an unreachable point in the code.
-#  define M5_UNREACHABLE __builtin_unreachable()
+#  define GEM5_UNREACHABLE __builtin_unreachable()

 // To mark a branch condition as likely taken, wrap it's condition with
-// M5_LIKELY. To mark it as likely not taken, wrap it's condition with
-// M5_UNLIKELY. These can be replaced with the standard attributes  
[[likely]]

+// GEM5_LIKELY. To mark it as likely not taken, wrap it's condition with
+// GEM5_UNLIKELY. These can be replaced with the standard attributes  
[[likely]]

 // and [[unlikely]] in c++20, although the syntax is different enough that
 // we can't do that with direct substitution.
-#  define M5_LIKELY(cond) __builtin_expect(!!(cond), 1)
-#  define M5_UNLIKELY(cond) __builtin_expect(!!(cond), 0)
+#  define GEM5_LIKELY(cond) __builtin_expect(!!(cond), 1)
+#  define GEM5_UNLIKELY(cond) __builtin_expect(!!(cond), 0)

 // Mark a c++ declaration as deprecated, with a message explaining what to  
do

 // to update to a non-deprecated alternative.
@@ -134,21 +134,37 @@
 // the elements of a brace inclosed initializer list are evaluated 

[gem5-dev] Change in gem5/gem5[develop]: misc: Replace M5_FALLTHROUGH with GEM5_FALLTHROUGH.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45233 )


Change subject: misc: Replace M5_FALLTHROUGH with GEM5_FALLTHROUGH.
..

misc: Replace M5_FALLTHROUGH with GEM5_FALLTHROUGH.

Change-Id: I058f311b6d9c284f745bcc915db72236d05db21b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45233
Reviewed-by: Gabe Black 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
M src/arch/arm/insts/pred_inst.hh
M src/arch/arm/isa/formats/aarch64.isa
M src/arch/arm/isa/formats/data.isa
M src/arch/arm/isa/formats/fp.isa
M src/arch/arm/isa/formats/sve_top_level.isa
M src/arch/arm/regs/misc.cc
M src/arch/arm/table_walker.cc
M src/arch/arm/tlb.cc
M src/arch/arm/utility.cc
M src/arch/sparc/tlb.cc
M src/arch/x86/isa.cc
M src/arch/x86/isa/microops/regop.isa
M src/base/cprintf.cc
M src/base/imgwriter.cc
M src/cpu/kvm/base.cc
M src/cpu/kvm/x86_cpu.cc
M src/dev/arm/smmu_v3.cc
M src/dev/storage/ide_disk.cc
M src/kern/linux/printk.cc
M src/mem/slicc/symbols/Type.py
M src/systemc/dt/fx/scfx_rep.cc
21 files changed, 38 insertions(+), 38 deletions(-)

Approvals:
  Gabe Black: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/insts/pred_inst.hh  
b/src/arch/arm/insts/pred_inst.hh

index fa040df..00b8fb2 100644
--- a/src/arch/arm/insts/pred_inst.hh
+++ b/src/arch/arm/insts/pred_inst.hh
@@ -150,7 +150,7 @@
 break;
 }
 }
-M5_FALLTHROUGH;
+GEM5_FALLTHROUGH;
   default:
 immValid = false;
 break;
diff --git a/src/arch/arm/isa/formats/aarch64.isa  
b/src/arch/arm/isa/formats/aarch64.isa

index a873b1e..a4c7082 100644
--- a/src/arch/arm/isa/formats/aarch64.isa
+++ b/src/arch/arm/isa/formats/aarch64.isa
@@ -595,7 +595,7 @@
 return new Unknown64(machInst);
 }
 }
-  M5_FALLTHROUGH;
+  GEM5_FALLTHROUGH;
   default:
 return new Unknown64(machInst);
 }
diff --git a/src/arch/arm/isa/formats/data.isa  
b/src/arch/arm/isa/formats/data.isa

index b742951..60d2db9 100644
--- a/src/arch/arm/isa/formats/data.isa
+++ b/src/arch/arm/isa/formats/data.isa
@@ -1440,7 +1440,7 @@
 const uint32_t satImm = bits(machInst, 4, 0);
 return new Ssat16(machInst, rd, satImm + 1, rn);
 }
-M5_FALLTHROUGH;
+GEM5_FALLTHROUGH;
   case 0x10:
 {
 const uint32_t satImm = bits(machInst, 4, 0);
@@ -1473,7 +1473,7 @@
 const uint32_t satImm = bits(machInst, 4, 0);
 return new Usat16(machInst, rd, satImm, rn);
 }
-M5_FALLTHROUGH;
+GEM5_FALLTHROUGH;
   case 0x18:
 {
 const uint32_t satImm = bits(machInst, 4, 0);
diff --git a/src/arch/arm/isa/formats/fp.isa  
b/src/arch/arm/isa/formats/fp.isa

index 5e7880e..967f343 100644
--- a/src/arch/arm/isa/formats/fp.isa
+++ b/src/arch/arm/isa/formats/fp.isa
@@ -131,7 +131,7 @@
 width = 1;
 break;
 }
-M5_FALLTHROUGH;
+GEM5_FALLTHROUGH;
   default:
 return new Unknown(machInst);
 }
@@ -2113,7 +2113,7 @@
false, true, true, offset);
 }
 }
-M5_FALLTHROUGH;
+GEM5_FALLTHROUGH;
   case 0x3:
 const bool up = (bits(machInst, 23) == 1);
 const uint32_t imm = bits(machInst, 7, 0) << 2;
diff --git a/src/arch/arm/isa/formats/sve_top_level.isa  
b/src/arch/arm/isa/formats/sve_top_level.isa

index 02c40bf..43cdea5 100644
--- a/src/arch/arm/isa/formats/sve_top_level.isa
+++ b/src/arch/arm/isa/formats/sve_top_level.isa
@@ -248,7 +248,7 @@
   case 4:
 if (!bits(machInst, 10))
 return decodeSveFpMulIndexed(machInst);
-M5_FALLTHROUGH;
+GEM5_FALLTHROUGH;
   default:
 return new Unknown64(machInst);
 }
diff --git a/src/arch/arm/regs/misc.cc b/src/arch/arm/regs/misc.cc
index 7b0b616..20b303c 100644
--- a/src/arch/arm/regs/misc.cc
+++ b/src/arch/arm/regs/misc.cc
@@ -2865,7 +2865,7 @@
 }
 break;
 }
-M5_FALLTHROUGH;
+GEM5_FALLTHROUGH;
   default:
 // S3__11__
 return MISCREG_IMPDEF_UNIMPL;
diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc
index 82a9570..9fa4315 100644
--- a/src/arch/arm/table_walker.cc
+++ b/src/arch/arm/table_walker.cc
@@ -1562,7 +1562,7 @@
   case 0x1 ... 0x3: // Normal Memory, Inner Write-through transient
   case 0x9 ... 0xb: // Normal Memory, Inner Write-through  

[gem5-dev] Change in gem5/gem5[develop]: misc: Replace M5_UNREACHABLE with GEM5_UNREACHABLE.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45238 )


Change subject: misc: Replace M5_UNREACHABLE with GEM5_UNREACHABLE.
..

misc: Replace M5_UNREACHABLE with GEM5_UNREACHABLE.

Change-Id: Id4cbdb8ae58c1077411e01579ac3a2d72b3b7465
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45238
Tested-by: kokoro 
Maintainer: Gabe Black 
Reviewed-by: Daniel Carvalho 
---
M src/arch/arm/isa/formats/aarch64.isa
M src/arch/arm/isa/formats/data.isa
M src/arch/arm/isa/formats/fp.isa
M src/arch/arm/isa/formats/mem.isa
M src/arch/arm/isa/formats/mult.isa
M src/arch/arm/isa/formats/neon64.isa
M src/arch/arm/regs/misc.cc
M src/arch/isa_parser/isa_parser.py
M src/base/cprintf.cc
M src/dev/arm/gic_v3_distributor.cc
M src/dev/arm/gic_v3_redistributor.cc
11 files changed, 70 insertions(+), 70 deletions(-)

Approvals:
  Daniel Carvalho: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/isa/formats/aarch64.isa  
b/src/arch/arm/isa/formats/aarch64.isa

index a4c7082..ad5238a 100644
--- a/src/arch/arm/isa/formats/aarch64.isa
+++ b/src/arch/arm/isa/formats/aarch64.isa
@@ -108,7 +108,7 @@
   case 0x3:
 return new SubXImmCc(machInst, rdzr, rnsp, imm);
   default:
-M5_UNREACHABLE;
+GEM5_UNREACHABLE;
 }
   }
   case 0x4:
@@ -152,7 +152,7 @@
   case 0x3:
 return new AndXImmCc(machInst, rdzr, rn, imm);
   default:
-M5_UNREACHABLE;
+GEM5_UNREACHABLE;
 }
   }
   case 0x5:
@@ -171,7 +171,7 @@
   case 0x3:
 return new Movk(machInst, rdzr, imm16, hw * 16);
   default:
-M5_UNREACHABLE;
+GEM5_UNREACHABLE;
 }
   }
   case 0x6:
@@ -187,7 +187,7 @@
   case 0x3:
 return new Unknown64(machInst);
   default:
-M5_UNREACHABLE;
+GEM5_UNREACHABLE;
 }
   case 0x7:
   {
@@ -520,7 +520,7 @@
   }
   break;
   default:
-M5_UNREACHABLE;
+GEM5_UNREACHABLE;
 }
 } else if (bits(machInst, 25) == 0x1) {
 uint8_t opc = bits(machInst, 24, 21);
@@ -720,7 +720,7 @@
 else
 return new LDADDLA64(machInst, rt, rnsp, rs);
 default:
-M5_UNREACHABLE;
+GEM5_UNREACHABLE;
 }
 case 0x1:
 switch(size_ar){
@@ -781,7 +781,7 @@
 case 0xf:
 return new LDCLRLA64(machInst, rt, rnsp, rs);
 default:
-M5_UNREACHABLE;
+GEM5_UNREACHABLE;
 }
 case 0x2:
 switch(size_ar){
@@ -842,7 +842,7 @@
 case 0xf:
 return new LDEORLA64(machInst, rt, rnsp, rs);
 default:
-M5_UNREACHABLE;
+GEM5_UNREACHABLE;
 }
 case 0x3:
 switch(size_ar){
@@ -903,7 +903,7 @@
 case 0xf:
 return new LDSETLA64(machInst, rt, rnsp, rs);
 default:
-M5_UNREACHABLE;
+GEM5_UNREACHABLE;
 }
 case 0x4:
 switch(size_ar){
@@ -964,7 +964,7 @@
 case 0xf:
 return new LDSMAXLA64(machInst, rt, rnsp, rs);
 default:
-M5_UNREACHABLE;
+GEM5_UNREACHABLE;
 }
 case 0x5:
 switch(size_ar){
@@ -1025,7 +1025,7 @@
 case 0xf:
 return new LDSMINLA64(machInst, rt, rnsp, rs);
 default:
-M5_UNREACHABLE;
+GEM5_UNREACHABLE;
 }
 case 0x6:
 switch(size_ar){
@@ -1086,7 +1086,7 @@
 case 0xf:
 return new LDUMAXLA64(machInst, rt, rnsp, rs);
 default:
-M5_UNREACHABLE;
+GEM5_UNREACHABLE;
 }
 case 0x7:
 switch(size_ar){
@@ -1147,7 +1147,7 @@
 case 0xf:
 return new LDUMINLA64(machInst, rt, rnsp, rs);
 default:
-M5_UNREACHABLE;
+GEM5_UNREACHABLE;

[gem5-dev] Change in gem5/gem5[develop]: misc: Replace M5_NODISCARD with GEM5_NO_DISCARD.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45232 )


Change subject: misc: Replace M5_NODISCARD with GEM5_NO_DISCARD.
..

misc: Replace M5_NODISCARD with GEM5_NO_DISCARD.

Change-Id: I1ddaf03afe865092d1664e395b51b1f573c19c85
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45232
Tested-by: kokoro 
Maintainer: Gabe Black 
Reviewed-by: Daniel Carvalho 
---
M src/gpu-compute/compute_unit.hh
M src/mem/cache/base.hh
M src/mem/cache/cache.hh
M src/mem/cache/noncoherent_cache.hh
4 files changed, 4 insertions(+), 4 deletions(-)

Approvals:
  Daniel Carvalho: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/gpu-compute/compute_unit.hh  
b/src/gpu-compute/compute_unit.hh

index 186a456..cdefb2b 100644
--- a/src/gpu-compute/compute_unit.hh
+++ b/src/gpu-compute/compute_unit.hh
@@ -476,7 +476,7 @@
 int32_t
 getRefCounter(const uint32_t dispatchId, const uint32_t wgId) const;

-M5_NODISCARD bool sendToLds(GPUDynInstPtr gpuDynInst);
+GEM5_NO_DISCARD bool sendToLds(GPUDynInstPtr gpuDynInst);

 typedef std::unordered_map> pageDataStruct;
 pageDataStruct pageAccesses;
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index 18d54a5..3285c97 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -802,7 +802,7 @@
  * @param blk Block to invalidate
  * @return A packet with the writeback, can be nullptr
  */
-M5_NODISCARD virtual PacketPtr evictBlock(CacheBlk *blk) = 0;
+GEM5_NO_DISCARD virtual PacketPtr evictBlock(CacheBlk *blk) = 0;

 /**
  * Evict a cache block.
diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh
index d370d8b..556f0be 100644
--- a/src/mem/cache/cache.hh
+++ b/src/mem/cache/cache.hh
@@ -133,7 +133,7 @@
 uint32_t handleSnoop(PacketPtr pkt, CacheBlk *blk,
  bool is_timing, bool is_deferred, bool  
pending_inval);


-M5_NODISCARD PacketPtr evictBlock(CacheBlk *blk) override;
+GEM5_NO_DISCARD PacketPtr evictBlock(CacheBlk *blk) override;

 /**
  * Create a CleanEvict request for the given block.
diff --git a/src/mem/cache/noncoherent_cache.hh  
b/src/mem/cache/noncoherent_cache.hh

index 4fade02..49ee3da 100644
--- a/src/mem/cache/noncoherent_cache.hh
+++ b/src/mem/cache/noncoherent_cache.hh
@@ -116,7 +116,7 @@
bool needs_writable,
bool is_whole_line_write) const override;

-M5_NODISCARD PacketPtr evictBlock(CacheBlk *blk) override;
+GEM5_NO_DISCARD PacketPtr evictBlock(CacheBlk *blk) override;

   public:
 NoncoherentCache(const NoncoherentCacheParams );



3 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/45232
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I1ddaf03afe865092d1664e395b51b1f573c19c85
Gerrit-Change-Number: 45232
Gerrit-PatchSet: 7
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: misc: Replace M5_ALIGNED with GEM5_ALIGNED.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45237 )


Change subject: misc: Replace M5_ALIGNED with GEM5_ALIGNED.
..

misc: Replace M5_ALIGNED with GEM5_ALIGNED.

Change-Id: Ia06bc959c81e9b37e0a506c022b8f8d86a0897ac
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45237
Tested-by: kokoro 
Maintainer: Gabe Black 
Reviewed-by: Daniel Carvalho 
---
M src/arch/arm/linux/linux.hh
M src/arch/mips/linux/aligned.hh
M src/base/statistics.hh
3 files changed, 7 insertions(+), 7 deletions(-)

Approvals:
  Daniel Carvalho: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/linux/linux.hh b/src/arch/arm/linux/linux.hh
index 6698a1c..6ca877c 100644
--- a/src/arch/arm/linux/linux.hh
+++ b/src/arch/arm/linux/linux.hh
@@ -226,9 +226,9 @@
 uint32_t  st_gid;
 uint64_t  st_rdev;
 uint8_t   __pad3[4];
-M5_ALIGNED(8) int64_t st_size;
+GEM5_ALIGNED(8) int64_t st_size;
 uint32_t  st_blksize;
-M5_ALIGNED(8) uint64_t st_blocks;
+GEM5_ALIGNED(8) uint64_t st_blocks;
 uint32_t  st_atimeX;
 uint32_t  st_atime_nsec;
 uint32_t  st_mtimeX;
diff --git a/src/arch/mips/linux/aligned.hh b/src/arch/mips/linux/aligned.hh
index 84157a2..ad80a0f 100644
--- a/src/arch/mips/linux/aligned.hh
+++ b/src/arch/mips/linux/aligned.hh
@@ -30,8 +30,8 @@
 #define __ARCH_MIPS_LINUX_ALIGNED_HH__


-typedef M5_ALIGNED(8) uint64_t uint64_ta;
-typedef M5_ALIGNED(8) int64_t int64_ta;
-typedef M5_ALIGNED(8) Addr Addr_a;
+typedef GEM5_ALIGNED(8) uint64_t uint64_ta;
+typedef GEM5_ALIGNED(8) int64_t int64_ta;
+typedef GEM5_ALIGNED(8) Addr Addr_a;

 #endif /* __ARCH_MIPS_LINUX_ALIGNED_HH__ */
diff --git a/src/base/statistics.hh b/src/base/statistics.hh
index 9de975b..e96cc7b 100644
--- a/src/base/statistics.hh
+++ b/src/base/statistics.hh
@@ -515,7 +515,7 @@

   protected:
 /** The storage of this stat. */
-M5_ALIGNED(8) char storage[sizeof(Storage)];
+GEM5_ALIGNED(8) char storage[sizeof(Storage)];

   protected:
 /**
@@ -1284,7 +1284,7 @@

   protected:
 /** The storage for this stat. */
-M5_ALIGNED(8) char storage[sizeof(Storage)];
+GEM5_ALIGNED(8) char storage[sizeof(Storage)];

   protected:
 /**



1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/45237
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ia06bc959c81e9b37e0a506c022b8f8d86a0897ac
Gerrit-Change-Number: 45237
Gerrit-PatchSet: 7
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: misc: Replace M5_ATTR_PACKED with GEM5_PACKED.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45234 )


Change subject: misc: Replace M5_ATTR_PACKED with GEM5_PACKED.
..

misc: Replace M5_ATTR_PACKED with GEM5_PACKED.

Change-Id: Ie59071ca1fc81a76267a54ddd2d35dfc4477995d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45234
Maintainer: Gabe Black 
Tested-by: kokoro 
Reviewed-by: Daniel Carvalho 
---
M src/arch/arm/remote_gdb.hh
M src/arch/x86/bios/acpi.hh
M src/arch/x86/linux/linux.hh
M src/arch/x86/remote_gdb.hh
M src/base/bmpwriter.hh
M src/base/inet.hh
M src/base/pngwriter.hh
M src/base/vnc/vncinput.hh
M src/base/vnc/vncserver.hh
M src/cpu/kvm/x86_cpu.cc
M src/dev/virtio/base.hh
M src/dev/virtio/block.hh
M src/dev/virtio/console.hh
M src/dev/virtio/fs9p.hh
M src/kern/linux/helpers.cc
15 files changed, 42 insertions(+), 40 deletions(-)

Approvals:
  Daniel Carvalho: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/remote_gdb.hh b/src/arch/arm/remote_gdb.hh
index ce9cd69..ea6cd05 100644
--- a/src/arch/arm/remote_gdb.hh
+++ b/src/arch/arm/remote_gdb.hh
@@ -66,7 +66,7 @@
 {
   using BaseGdbRegCache::BaseGdbRegCache;
   private:
-struct M5_ATTR_PACKED
+struct GEM5_PACKED
 {
   uint32_t gpr[16];
   uint32_t cpsr;
@@ -89,7 +89,7 @@
 {
   using BaseGdbRegCache::BaseGdbRegCache;
   private:
-struct M5_ATTR_PACKED
+struct GEM5_PACKED
 {
   uint64_t x[31];
   uint64_t spx;
diff --git a/src/arch/x86/bios/acpi.hh b/src/arch/x86/bios/acpi.hh
index 1c9f8e0..fa6fa10 100644
--- a/src/arch/x86/bios/acpi.hh
+++ b/src/arch/x86/bios/acpi.hh
@@ -95,7 +95,7 @@

 static const char signature[];

-struct M5_ATTR_PACKED MemR0
+struct GEM5_PACKED MemR0
 {
 // src: https://wiki.osdev.org/RSDP
 char signature[8] = {};
@@ -107,7 +107,7 @@
 static_assert(std::is_trivially_copyable::value,
 "Type not suitable for memcpy.");

-struct M5_ATTR_PACKED Mem : public MemR0
+struct GEM5_PACKED Mem : public MemR0
 {
 // since version 2
 uint32_t length = 0;
@@ -132,7 +132,7 @@
   protected:
 PARAMS(X86ACPISysDescTable);

-struct M5_ATTR_PACKED Mem
+struct GEM5_PACKED Mem
 {
 // src: https://wiki.osdev.org/RSDT
 char signature[4] = {};
@@ -207,7 +207,7 @@
   protected:
 PARAMS(X86ACPIMadtRecord);

-struct M5_ATTR_PACKED Mem
+struct GEM5_PACKED Mem
 {
 uint8_t type = 0;
 uint8_t length = 0;
@@ -236,7 +236,7 @@
   protected:
 PARAMS(X86ACPIMadtLAPIC);

-struct M5_ATTR_PACKED Mem : public Record::Mem
+struct GEM5_PACKED Mem : public Record::Mem
 {
 uint8_t acpiProcessorId = 0;
 uint8_t apicId = 0;
@@ -256,7 +256,7 @@
   protected:
 PARAMS(X86ACPIMadtIOAPIC);

-struct M5_ATTR_PACKED Mem : public Record::Mem
+struct GEM5_PACKED Mem : public Record::Mem
 {
 uint8_t ioApicId = 0;
 uint8_t _reserved = 0;
@@ -277,7 +277,7 @@
   protected:
 PARAMS(X86ACPIMadtIntSourceOverride);

-struct M5_ATTR_PACKED Mem : public Record::Mem
+struct GEM5_PACKED Mem : public Record::Mem
 {
 uint8_t busSource = 0;
 uint8_t irqSource = 0;
@@ -298,7 +298,7 @@
   protected:
 PARAMS(X86ACPIMadtNMI);

-struct M5_ATTR_PACKED Mem : public Record::Mem
+struct GEM5_PACKED Mem : public Record::Mem
 {
 uint8_t acpiProcessorId = 0;
 uint16_t flags = 0;
@@ -318,7 +318,7 @@
   protected:
 PARAMS(X86ACPIMadtLAPICOverride);

-struct M5_ATTR_PACKED Mem : public Record::Mem
+struct GEM5_PACKED Mem : public Record::Mem
 {
 uint16_t _reserved = 0;
 uint64_t localAPICAddress = 0;
@@ -337,7 +337,7 @@
   protected:
 PARAMS(X86ACPIMadt);

-struct M5_ATTR_PACKED Mem : public SysDescTable::Mem
+struct GEM5_PACKED Mem : public SysDescTable::Mem
 {
 uint32_t localAPICAddress = 0;
 uint32_t flags = 0;
diff --git a/src/arch/x86/linux/linux.hh b/src/arch/x86/linux/linux.hh
index 5dd75eb..c808a4b 100644
--- a/src/arch/x86/linux/linux.hh
+++ b/src/arch/x86/linux/linux.hh
@@ -247,7 +247,7 @@
 class X86Linux32 : public X86Linux
 {
   public:
-typedef struct M5_ATTR_PACKED
+typedef struct GEM5_PACKED
 {
 uint64_t st_dev;
 uint8_t __pad0[4];
diff --git a/src/arch/x86/remote_gdb.hh b/src/arch/x86/remote_gdb.hh
index 4ebaa04..92fdea3 100644
--- a/src/arch/x86/remote_gdb.hh
+++ b/src/arch/x86/remote_gdb.hh
@@ -94,7 +94,7 @@
 {
   using BaseGdbRegCache::BaseGdbRegCache;
   private:
-struct M5_ATTR_PACKED
+struct GEM5_PACKED
 {
   uint64_t rax;
   uint64_t rbx;
diff --git a/src/base/bmpwriter.hh b/src/base/bmpwriter.hh
index 3e9f16d..4d75861 100644

[gem5-dev] Change in gem5/gem5[develop]: misc: Replace M5_LOCAL and M5_WEAK with GEM5_LOCAL and GEM5_WEAK.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45236 )


Change subject: misc: Replace M5_LOCAL and M5_WEAK with GEM5_LOCAL and  
GEM5_WEAK.

..

misc: Replace M5_LOCAL and M5_WEAK with GEM5_LOCAL and GEM5_WEAK.

Change-Id: Ieb8350e647480f9bf582479b7933f0462f18d14d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45236
Tested-by: kokoro 
Maintainer: Gabe Black 
Reviewed-by: Daniel Carvalho 
---
M src/cpu/testers/traffic_gen/pygen.hh
M src/sim/init.cc
M src/systemc/core/sc_main_fiber.cc
3 files changed, 3 insertions(+), 3 deletions(-)

Approvals:
  Daniel Carvalho: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/cpu/testers/traffic_gen/pygen.hh  
b/src/cpu/testers/traffic_gen/pygen.hh

index 3e2b4d2..9f84914 100644
--- a/src/cpu/testers/traffic_gen/pygen.hh
+++ b/src/cpu/testers/traffic_gen/pygen.hh
@@ -45,7 +45,7 @@

 struct PyTrafficGenParams;

-class M5_LOCAL PyTrafficGen : public BaseTrafficGen
+class GEM5_LOCAL PyTrafficGen : public BaseTrafficGen
 {
   public:
 PyTrafficGen(const PyTrafficGenParams );
diff --git a/src/sim/init.cc b/src/sim/init.cc
index df53c29..3b34ff6 100644
--- a/src/sim/init.cc
+++ b/src/sim/init.cc
@@ -245,7 +245,7 @@
  * Make the commands array weak so that they can be overridden (used
  * by unit tests to specify a different python main function.
  */
-M5_WEAK const char *m5MainCommands[] = {
+GEM5_WEAK const char *m5MainCommands[] = {
 "import m5",
 "m5.main()",
 0 // sentinel is required
diff --git a/src/systemc/core/sc_main_fiber.cc  
b/src/systemc/core/sc_main_fiber.cc

index df804d0..83c3419 100644
--- a/src/systemc/core/sc_main_fiber.cc
+++ b/src/systemc/core/sc_main_fiber.cc
@@ -38,7 +38,7 @@
 #include "systemc/utils/report.hh"

 // A weak symbol to detect if sc_main has been defined, and if so where it  
is.

-M5_WEAK int sc_main(int argc, char *argv[]);
+GEM5_WEAK int sc_main(int argc, char *argv[]);

 namespace sc_gem5
 {



1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ieb8350e647480f9bf582479b7933f0462f18d14d
Gerrit-Change-Number: 45236
Gerrit-PatchSet: 7
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Replace M5_UNLIKELY with GEM5_UNLIKELY.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45239 )


Change subject: base: Replace M5_UNLIKELY with GEM5_UNLIKELY.
..

base: Replace M5_UNLIKELY with GEM5_UNLIKELY.

Change-Id: Id5f01675da5110f6503bd799a7889e8eb73433a1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45239
Tested-by: kokoro 
Maintainer: Gabe Black 
Reviewed-by: Daniel Carvalho 
---
M src/base/logging.hh
M src/base/trace.hh
2 files changed, 10 insertions(+), 10 deletions(-)

Approvals:
  Daniel Carvalho: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/base/logging.hh b/src/base/logging.hh
index 650aecd..050f2c6 100644
--- a/src/base/logging.hh
+++ b/src/base/logging.hh
@@ -199,7 +199,7 @@
  */
 #define panic_if(cond, ...)  \
 do { \
-if (M5_UNLIKELY(cond)) { \
+if (GEM5_UNLIKELY(cond)) { \
 panic("panic condition " # cond " occurred: %s", \
   csprintf(__VA_ARGS__));\
 }\
@@ -221,7 +221,7 @@
  */
 #define fatal_if(cond, ...) \
 do {\
-if (M5_UNLIKELY(cond)) {\
+if (GEM5_UNLIKELY(cond)) {\
 fatal("fatal condition " # cond " occurred: %s",\
   csprintf(__VA_ARGS__));   \
 }   \
@@ -265,13 +265,13 @@
  */
 #define warn_if(cond, ...) \
 do { \
-if (M5_UNLIKELY(cond)) \
+if (GEM5_UNLIKELY(cond)) \
 warn(__VA_ARGS__); \
 } while (0)

 #define warn_if_once(cond, ...) \
 do { \
-if (M5_UNLIKELY(cond)) \
+if (GEM5_UNLIKELY(cond)) \
 warn_once(__VA_ARGS__); \
 } while (0)
 /** @} */ // end of api_logger
@@ -294,7 +294,7 @@
 #else //!NDEBUG
 #define chatty_assert(cond, ...)\
 do {\
-if (M5_UNLIKELY(!(cond)))   \
+if (GEM5_UNLIKELY(!(cond)))   \
 panic("assert(" # cond ") failed: %s", csprintf(__VA_ARGS__));  
\

 } while (0)
 #endif // NDEBUG
diff --git a/src/base/trace.hh b/src/base/trace.hh
index c1804e8..fff05f7 100644
--- a/src/base/trace.hh
+++ b/src/base/trace.hh
@@ -174,34 +174,34 @@
  */

 #define DDUMP(x, data, count) do {   \
-if (M5_UNLIKELY(TRACING_ON && Debug::x)) \
+if (GEM5_UNLIKELY(TRACING_ON && Debug::x)) \
 Trace::getDebugLogger()->dump(   \
 curTick(), name(), data, count, #x); \
 } while (0)

 #define DPRINTF(x, ...) do { \
-if (M5_UNLIKELY(TRACING_ON && Debug::x)) {   \
+if (GEM5_UNLIKELY(TRACING_ON && Debug::x)) {   \
 Trace::getDebugLogger()->dprintf_flag(   \
 curTick(), name(), #x, __VA_ARGS__); \
 }\
 } while (0)

 #define DPRINTFS(x, s, ...) do {\
-if (M5_UNLIKELY(TRACING_ON && Debug::x)) {  \
+if (GEM5_UNLIKELY(TRACING_ON && Debug::x)) {  \
 Trace::getDebugLogger()->dprintf_flag(  \
 curTick(), s->name(), #x, __VA_ARGS__); \
 }   \
 } while (0)

 #define DPRINTFR(x, ...) do {  \
-if (M5_UNLIKELY(TRACING_ON && Debug::x)) { \
+if (GEM5_UNLIKELY(TRACING_ON && Debug::x)) { \
 Trace::getDebugLogger()->dprintf_flag( \
 (Tick)-1, std::string(), #x, __VA_ARGS__); \
 }  \
 } while (0)

 #define DPRINTFV(x, ...) do {  \
-if (M5_UNLIKELY(TRACING_ON && (x))) {  \
+if (GEM5_UNLIKELY(TRACING_ON && (x))) {  \
 Trace::getDebugLogger()->dprintf_flag( \
 curTick(), name(), x.name(), __VA_ARGS__); \
 }  \



1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id5f01675da5110f6503bd799a7889e8eb73433a1
Gerrit-Change-Number: 45239
Gerrit-PatchSet: 6
Gerrit-Owner: Gabe 

[gem5-dev] Change in gem5/gem5[develop]: arch-sparc: Replace M5_NO_INLINE with GEM5_NO_INLINE.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45235 )


Change subject: arch-sparc: Replace M5_NO_INLINE with GEM5_NO_INLINE.
..

arch-sparc: Replace M5_NO_INLINE with GEM5_NO_INLINE.

Change-Id: Ibea33196765cc2d038d12c1388e6585275eaba55
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45235
Tested-by: kokoro 
Maintainer: Gabe Black 
Reviewed-by: Daniel Carvalho 
---
M src/arch/sparc/isa/formats/basic.isa
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  Daniel Carvalho: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/sparc/isa/formats/basic.isa  
b/src/arch/sparc/isa/formats/basic.isa

index 901b5df..e0441b3 100644
--- a/src/arch/sparc/isa/formats/basic.isa
+++ b/src/arch/sparc/isa/formats/basic.isa
@@ -55,7 +55,7 @@
 // Constructor.
 %(class_name)s(ExtMachInst machInst);
 Fault execute(ExecContext *, Trace::InstRecord *) const override;
-M5_NO_INLINE Fault doFpOp(ExecContext *, Trace::InstRecord *) const;
+GEM5_NO_INLINE Fault doFpOp(ExecContext *, Trace::InstRecord *) const;
 };
 }};




1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ibea33196765cc2d038d12c1388e6585275eaba55
Gerrit-Change-Number: 45235
Gerrit-PatchSet: 7
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: sim: Use type_traits to steer swap_bytes.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45286 )


Change subject: sim: Use type_traits to steer swap_bytes.
..

sim: Use type_traits to steer swap_bytes.

Rather than have a function with a if which checks against each
supported size of a type T which calls the right version of
swap_bytesNN, this change uses SFINAE and type traits to select the
function, and adds the requirement that the type being swapped is
actually convertible to the unsigned integer type of the appropriate
size.

This has the nice benefit of also avoiding hard coding which sizes can
be supported by the base swap_bytes, although that's probably not much a
limit in practice, avoids forcing all types to be convertible to all
sizes of uint*_ts for unused branches of the if, and removes a
dependence on base/logging.hh for the panic.

Change-Id: I2267f69a2868fcba2318c7562a49d27fef785395
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45286
Reviewed-by: Daniel Carvalho 
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/sim/byteswap.hh
1 file changed, 33 insertions(+), 18 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  Daniel Carvalho: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/sim/byteswap.hh b/src/sim/byteswap.hh
index 35857a0..30e63d1 100644
--- a/src/sim/byteswap.hh
+++ b/src/sim/byteswap.hh
@@ -33,7 +33,6 @@
 #ifndef __SIM_BYTE_SWAP_HH__
 #define __SIM_BYTE_SWAP_HH__

-#include "base/logging.hh"
 #include "base/types.hh"
 #include "enums/ByteOrder.hh"

@@ -54,8 +53,10 @@
 #include 
 #endif

-//These functions actually perform the swapping for parameters
-//of various bit lengths
+#include 
+
+// These functions actually perform the swapping for parameters of various  
bit

+// lengths.
 inline uint64_t
 swap_byte64(uint64_t x)
 {
@@ -102,22 +103,36 @@
 #endif
 }

-// This function lets the compiler figure out how to call the
-// swap_byte functions above for different data types.  Since the
-// sizeof() values are known at compile time, it should inline to a
-// direct call to the right swap_byteNN() function.
 template 
-inline T swap_byte(T x) {
-if (sizeof(T) == 8)
-return swap_byte64((uint64_t)x);
-else if (sizeof(T) == 4)
-return swap_byte32((uint32_t)x);
-else if (sizeof(T) == 2)
-return swap_byte16((uint16_t)x);
-else if (sizeof(T) == 1)
-return x;
-else
-panic("Can't byte-swap values larger than 64 bits");
+inline std::enable_if_t<
+sizeof(T) == 8 && std::is_convertible::value, T>
+swap_byte(T x)
+{
+return swap_byte64((uint64_t)x);
+}
+
+template 
+inline std::enable_if_t<
+sizeof(T) == 4 && std::is_convertible::value, T>
+swap_byte(T x)
+{
+return swap_byte32((uint32_t)x);
+}
+
+template 
+inline std::enable_if_t<
+sizeof(T) == 2 && std::is_convertible::value, T>
+swap_byte(T x)
+{
+return swap_byte16((uint16_t)x);
+}
+
+template 
+inline std::enable_if_t<
+sizeof(T) == 1 && std::is_convertible::value, T>
+swap_byte(T x)
+{
+return x;
 }

 template 

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I2267f69a2868fcba2318c7562a49d27fef785395
Gerrit-Change-Number: 45286
Gerrit-PatchSet: 2
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: dev: Overload swap_bytes, don't specialize the template.

2021-05-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45285 )


Change subject: dev: Overload swap_bytes, don't specialize the template.
..

dev: Overload swap_bytes, don't specialize the template.

The effect is the same, the rules for overloads are easier to work with
than the rules for templates, and it removes the assumption that
swap_bytes actually is a template.

Also some minor style fixes.

Change-Id: Id9439177185b5269dd89605bbd05b09390a18d40
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45285
Reviewed-by: Daniel Carvalho 
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Bobby R. Bruce 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/dev/virtio/base.hh
1 file changed, 6 insertions(+), 4 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, but someone else must approve; Looks  
good to me, approved

  Daniel Carvalho: Looks good to me, but someone else must approve
  Bobby R. Bruce: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/dev/virtio/base.hh b/src/dev/virtio/base.hh
index 8b20be1..416d3a4 100644
--- a/src/dev/virtio/base.hh
+++ b/src/dev/virtio/base.hh
@@ -68,15 +68,17 @@
  */


-template <> inline vring_used_elem
-swap_byte(vring_used_elem v) {
+static inline vring_used_elem
+swap_byte(vring_used_elem v)
+{
 v.id = swap_byte(v.id);
 v.len = swap_byte(v.len);
 return v;
 }

-template <> inline vring_desc
-swap_byte(vring_desc v) {
+static inline vring_desc
+swap_byte(vring_desc v)
+{
 v.addr = swap_byte(v.addr);
 v.len = swap_byte(v.len);
 v.flags = swap_byte(v.flags);

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id9439177185b5269dd89605bbd05b09390a18d40
Gerrit-Change-Number: 45285
Gerrit-PatchSet: 2
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Nikos Nikoleris 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Re: Build failed in Jenkins: nightly #307

2021-05-11 Thread Bobby Bruce via gem5-dev
Hey Daniel and Gabe,

I'm looking into this test failure (reproducible with `scons
build/NULL/unittests.fast`). I'm a little confused about how these tests
ever passed. This patchet introduces the error (or at least, if this patch
is reverted, the tests pass):
https://gem5-review.googlesource.com/c/public/gem5/+/45008, but this
doesn't appear to be doing anything bad. If compiling to `.fast`
`tracing()` should return false (as far as I understand things), but the
tests appear to assume this should return true, mostly so this branch is
traversed:
https://gem5.googlesource.com/public/gem5/+/refs/heads/develop/src/base/debug.cc#177.
As things currently stand `TRACING_ON` is false and `_tracing` is true with
`.fast`.

Does anyone have any insight? I feel like I might be overlooking something
here. I realize things have been moved around in debug.hh recently but
nothing seems particularly incorrect.

Kind regards,
Bobby

--
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Mon, May 10, 2021 at 11:43 PM jenkins-no-reply--- via gem5-dev <
gem5-dev@gem5.org> wrote:

> See <
> https://jenkins.gem5.org/job/nightly/307/display/redirect?page=changes>
>
> Changes:
>
> [gabe.black] base: Add macros to mark things as deprecated.
>
> [gabe.black] base: Mark the unused DPRINTF_UNCONDITIONAL macro as
> deprecated.
>
> [gabe.black] base,arch,dev,mem: Always compile DPRINTFs, even if they're
> disabled.
>
> [gabe.black] base: Collapse the DTRACE macro in DPRINTF.
>
> [gabe.black] base: Simplify the definition of DTRACE.
>
> [Giacomo Travaglini] arch-arm: Fix SMM* instructions
>
> [gabe.black] base,python: Simplify how we check if a debug flag is enabled.
>
> [gabe.black] base: Move TRACING_ON check into Flag::tracing().
>
> [gabe.black] misc: Collapse all uses of DTRACE(x) to Debug::x.
>
> [gabe.black] base,arch-sparc: Overhaul the small fenv wrapper in base.
>
> [gabe.black] arch-arm: Use src/base/fenv.hh instead of raw fenv.h.
>
> [gabe.black] cpu: Delete an unnecessary return in RegId::flatIndex.
>
> [gabe.black] arch,cpu: Get rid of is*Reg() methods in RegId.
>
> [gabe.black] cpu: Get rid of the unused NumRegClasses constant.
>
> [gabe.black] cpu: Get rid of the redundant PhysRegIndex type.
>
> [gabe.black] scons,misc: Remove the ability to disable some trivial
> features.
>
> [gabe.black] scons: Pull builder definitions out of SConstruct.
>
> [gabe.black] scons: Simplify finding the python lib with ParseConfig.
>
> [gabe.black] scons: Update comments in SConstruct.
>
> [gabe.black] python: Collapse away the now unused readCommandWithReturn
> function.
>
> [gabe.black] python,scons: Move readCommand and compareVersions into
> site_scons.
>
> [gabe.black] arch-x86: Clean up x86 integer indexes.
>
> [gabe.black] arch-x86: Create some infrastructure for x86 microop operands.
>
> [gabe.black] arch: Set %(op_idx)s properly when predicated operands are
> present.
>
> [gabe.black] arch-x86: Build source picking into the operands.
>
>
> --
> [...truncated 506.72 KB...]
> [==] Running 8 tests from 1 test suite.
> [--] Global test environment set-up.
> [--] 8 tests from Coroutine
> [ RUN  ] Coroutine.Unstarted
> [   OK ] Coroutine.Unstarted (0 ms)
> [ RUN  ] Coroutine.Unfinished
> [   OK ] Coroutine.Unfinished (0 ms)
> [ RUN  ] Coroutine.Passing
> [   OK ] Coroutine.Passing (1 ms)
> [ RUN  ] Coroutine.Returning
> [   OK ] Coroutine.Returning (0 ms)
> [ RUN  ] Coroutine.Fibonacci
> [   OK ] Coroutine.Fibonacci (0 ms)
> [ RUN  ] Coroutine.Cooperative
> [   OK ] Coroutine.Cooperative (0 ms)
> [ RUN  ] Coroutine.Nested
> [   OK ] Coroutine.Nested (0 ms)
> [ RUN  ] Coroutine.TwoCallers
> [   OK ] Coroutine.TwoCallers (0 ms)
> [--] 8 tests from Coroutine (1 ms total)
>
> [--] Global test environment tear-down
> [==] 8 tests from 1 test suite ran. (1 ms total)
> [  PASSED  ] 8 tests.
> Running main() from build/googletest/googletest/src/gtest_main.cc
> [==] Running 16 tests from 1 test suite.
> [--] Global test environment set-up.
> [--] 16 tests from FlagsTest
> [ RUN  ] FlagsTest.ConstructorZero
> [   OK ] FlagsTest.ConstructorZero (0 ms)
> [ RUN  ] FlagsTest.ConstructorSingle
> [   OK ] FlagsTest.ConstructorSingle (0 ms)
> [ RUN  ] FlagsTest.ConstructorMulti
> [   OK ] FlagsTest.ConstructorMulti (0 ms)
> [ RUN  ] FlagsTest.TypeAssignment
> [   OK ] FlagsTest.TypeAssignment (0 ms)
> [ RUN  ] FlagsTest.TypeAssignmentOverwrite
> [   OK ] FlagsTest.TypeAssignmentOverwrite (0 ms)
> [ RUN  ] FlagsTest.FlagsAssignment
> [   OK ] FlagsTest.FlagsAssignment (0 ms)
> [ RUN  ] FlagsTest.FlagsAssignmentOverwrite
> [   OK ] FlagsTest.FlagsAssignmentOverwrite (0 ms)
> [ RUN  ] FlagsTest.IsSetValue
> [   OK ] FlagsTest.IsSetValue (0 ms)
> [ RUN  ] 

[gem5-dev] Change in gem5/gem5[develop]: arch-gcn3,arch-vega,gpu-compute: Move request counters

2021-05-11 Thread Kyle Roarty (Gerrit) via gem5-dev
Kyle Roarty has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45347 )



Change subject: arch-gcn3,arch-vega,gpu-compute: Move request counters
..

arch-gcn3,arch-vega,gpu-compute: Move request counters

When the Vega ISA got committed, it lacked the request counter
tracking for memory requests that existed in the GCN3 code.

Instead of copying over the same lines from the GCN3 code to the Vega
code, this commit makes the various memory pipelines handle updating the
request counter information instead, as every memory instruction calls a
memory pipeline.

This commit also adds an issueRequest in scalar_memory_pipeline, as
previously, the gpuDynInsts were explicitly placed in the queue of
issuedRequests.

Change-Id: I5140d3b2f12be582f2ae9ff7c433167aeec5b68e
---
M src/arch/amdgpu/gcn3/insts/instructions.cc
M src/arch/amdgpu/vega/insts/instructions.cc
M src/gpu-compute/global_memory_pipeline.cc
M src/gpu-compute/local_memory_pipeline.cc
M src/gpu-compute/scalar_memory_pipeline.cc
M src/gpu-compute/scalar_memory_pipeline.hh
6 files changed, 82 insertions(+), 408 deletions(-)



diff --git a/src/arch/amdgpu/gcn3/insts/instructions.cc  
b/src/arch/amdgpu/gcn3/insts/instructions.cc

index a5f28e3..a51354e 100644
--- a/src/arch/amdgpu/gcn3/insts/instructions.cc
+++ b/src/arch/amdgpu/gcn3/insts/instructions.cc
@@ -4494,12 +4494,7 @@
 calcAddr(gpuDynInst, addr, offset);

 gpuDynInst->computeUnit()->scalarMemoryPipe
-.getGMReqFIFO().push(gpuDynInst);
-
-wf->scalarRdGmReqsInPipe--;
-wf->scalarOutstandingReqsRdGm++;
-gpuDynInst->wavefront()->outstandingReqs++;
-gpuDynInst->wavefront()->validateRequestCounters();
+.issueRequest(gpuDynInst);
 }

 void
@@ -4553,12 +4548,7 @@
 calcAddr(gpuDynInst, addr, offset);

 gpuDynInst->computeUnit()->scalarMemoryPipe.
-getGMReqFIFO().push(gpuDynInst);
-
-wf->scalarRdGmReqsInPipe--;
-wf->scalarOutstandingReqsRdGm++;
-gpuDynInst->wavefront()->outstandingReqs++;
-gpuDynInst->wavefront()->validateRequestCounters();
+issueRequest(gpuDynInst);
 }

 void
@@ -4610,12 +4600,7 @@
 calcAddr(gpuDynInst, addr, offset);

 gpuDynInst->computeUnit()->scalarMemoryPipe.
-getGMReqFIFO().push(gpuDynInst);
-
-wf->scalarRdGmReqsInPipe--;
-wf->scalarOutstandingReqsRdGm++;
-gpuDynInst->wavefront()->outstandingReqs++;
-gpuDynInst->wavefront()->validateRequestCounters();
+issueRequest(gpuDynInst);
 }

 void
@@ -4667,12 +4652,7 @@
 calcAddr(gpuDynInst, addr, offset);

 gpuDynInst->computeUnit()->scalarMemoryPipe.
-getGMReqFIFO().push(gpuDynInst);
-
-wf->scalarRdGmReqsInPipe--;
-wf->scalarOutstandingReqsRdGm++;
-gpuDynInst->wavefront()->outstandingReqs++;
-gpuDynInst->wavefront()->validateRequestCounters();
+issueRequest(gpuDynInst);
 }

 void
@@ -4724,12 +4704,7 @@
 calcAddr(gpuDynInst, addr, offset);

 gpuDynInst->computeUnit()->scalarMemoryPipe.
-getGMReqFIFO().push(gpuDynInst);
-
-wf->scalarRdGmReqsInPipe--;
-wf->scalarOutstandingReqsRdGm++;
-gpuDynInst->wavefront()->outstandingReqs++;
-gpuDynInst->wavefront()->validateRequestCounters();
+issueRequest(gpuDynInst);
 }

 void
@@ -4782,12 +4757,7 @@
 calcAddr(gpuDynInst, rsrcDesc, offset);

 gpuDynInst->computeUnit()->scalarMemoryPipe
-.getGMReqFIFO().push(gpuDynInst);
-
-wf->scalarRdGmReqsInPipe--;
-wf->scalarOutstandingReqsRdGm++;
-gpuDynInst->wavefront()->outstandingReqs++;
-gpuDynInst->wavefront()->validateRequestCounters();
+.issueRequest(gpuDynInst);
 } // execute

 void
@@ -4841,12 +4811,7 @@
 calcAddr(gpuDynInst, rsrcDesc, offset);

 gpuDynInst->computeUnit()->scalarMemoryPipe
-.getGMReqFIFO().push(gpuDynInst);
-
-wf->scalarRdGmReqsInPipe--;
-wf->scalarOutstandingReqsRdGm++;
-gpuDynInst->wavefront()->outstandingReqs++;
-gpuDynInst->wavefront()->validateRequestCounters();
+.issueRequest(gpuDynInst);
 } // execute

 void
@@ -4900,12 +4865,7 @@
 calcAddr(gpuDynInst, rsrcDesc, offset);

 gpuDynInst->computeUnit()->scalarMemoryPipe
-.getGMReqFIFO().push(gpuDynInst);
-
-wf->scalarRdGmReqsInPipe--;
-wf->scalarOutstandingReqsRdGm++;
-gpuDynInst->wavefront()->outstandingReqs++;
-gpuDynInst->wavefront()->validateRequestCounters();
+.issueRequest(gpuDynInst);
 } // execute

 void
@@ -4959,12 +4919,7 @@
 calcAddr(gpuDynInst, rsrcDesc, offset);

 gpuDynInst->computeUnit()->scalarMemoryPipe
-

[gem5-dev] Change in gem5/gem5[develop]: arch-gcn3,gpu-compute: Set gpuDynInst exec_mask before use

2021-05-11 Thread Kyle Roarty (Gerrit) via gem5-dev
Kyle Roarty has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45346 )



Change subject: arch-gcn3,gpu-compute: Set gpuDynInst exec_mask before use
..

arch-gcn3,gpu-compute: Set gpuDynInst exec_mask before use

vector_register_file uses the exec_mask of a memory instruction in
order to determine if it should mark a register as in-use or not.
Previously, the exec_mask of memory instructions were only set on
execution of that instruction, which occurs after the code in
vector_register_file. This lead to the code reading potentially garbage
data, leading to a scenario where a register would be marked used when
it shouldn't be.

This fix sets the exec_mask of memory instructions in schedule_stage,
which works because the only time the wavefront execMask() is updated is
on a instruction executing, and we know the previous instruction will
have executed by the time schedule_stage executes, due to the order the
pipeline is executed in.

This also undoes part of a patch from last year (62ec973) which treated
the symptom of accidental register allocation, without preventing the
registers from being allocated in the first place.

This patch also removes now redundant code that sets the exec_mask in
instructions.cc for memory instructions

Change-Id: Idabd3502764fb06133ac2458606c1aaf6f04
---
M src/arch/amdgpu/gcn3/insts/instructions.cc
M src/gpu-compute/schedule_stage.cc
2 files changed, 29 insertions(+), 155 deletions(-)



diff --git a/src/arch/amdgpu/gcn3/insts/instructions.cc  
b/src/arch/amdgpu/gcn3/insts/instructions.cc

index 4ae4c29..a5f28e3 100644
--- a/src/arch/amdgpu/gcn3/insts/instructions.cc
+++ b/src/arch/amdgpu/gcn3/insts/instructions.cc
@@ -31240,7 +31240,6 @@
 {
 Wavefront *wf = gpuDynInst->wavefront();
 gpuDynInst->execUnitId = wf->execUnitId;
-gpuDynInst->exec_mask = wf->execMask();
 gpuDynInst->latency.init(gpuDynInst->computeUnit());
 gpuDynInst->latency.set(
 gpuDynInst->computeUnit()->cyclesToTicks(Cycles(24)));
@@ -31301,7 +31300,6 @@
 {
 Wavefront *wf = gpuDynInst->wavefront();
 gpuDynInst->execUnitId = wf->execUnitId;
-gpuDynInst->exec_mask = wf->execMask();
 gpuDynInst->latency.init(gpuDynInst->computeUnit());
 gpuDynInst->latency.set(
 gpuDynInst->computeUnit()->cyclesToTicks(Cycles(24)));
@@ -31365,7 +31363,6 @@
 {
 Wavefront *wf = gpuDynInst->wavefront();
 gpuDynInst->execUnitId = wf->execUnitId;
-gpuDynInst->exec_mask = wf->execMask();
 gpuDynInst->latency.init(gpuDynInst->computeUnit());
 gpuDynInst->latency.set(
 gpuDynInst->computeUnit()->cyclesToTicks(Cycles(24)));
@@ -31545,7 +31542,6 @@
 {
 Wavefront *wf = gpuDynInst->wavefront();
 gpuDynInst->execUnitId = wf->execUnitId;
-gpuDynInst->exec_mask = wf->execMask();
 gpuDynInst->latency.init(gpuDynInst->computeUnit());
 gpuDynInst->latency.set(
 gpuDynInst->computeUnit()->cyclesToTicks(Cycles(24)));
@@ -31605,7 +31601,6 @@
 {
 Wavefront *wf = gpuDynInst->wavefront();
 gpuDynInst->execUnitId = wf->execUnitId;
-gpuDynInst->exec_mask = wf->execMask();
 gpuDynInst->latency.init(gpuDynInst->computeUnit());
 gpuDynInst->latency.set(
 gpuDynInst->computeUnit()->cyclesToTicks(Cycles(24)));
@@ -32070,7 +32065,6 @@
 {
 Wavefront *wf = gpuDynInst->wavefront();
 gpuDynInst->execUnitId = wf->execUnitId;
-gpuDynInst->exec_mask = wf->execMask();
 gpuDynInst->latency.init(gpuDynInst->computeUnit());
 gpuDynInst->latency.set(
 gpuDynInst->computeUnit()->cyclesToTicks(Cycles(24)));
@@ -32132,7 +32126,6 @@
 {
 Wavefront *wf = gpuDynInst->wavefront();
 gpuDynInst->execUnitId = wf->execUnitId;
-gpuDynInst->exec_mask = wf->execMask();
 gpuDynInst->latency.init(gpuDynInst->computeUnit());
 gpuDynInst->latency.set(
 gpuDynInst->computeUnit()->cyclesToTicks(Cycles(24)));
@@ -32197,7 +32190,6 @@
 {
 Wavefront *wf = gpuDynInst->wavefront();
 gpuDynInst->execUnitId = wf->execUnitId;
-gpuDynInst->exec_mask = wf->execMask();
 gpuDynInst->latency.init(gpuDynInst->computeUnit());
 gpuDynInst->latency.set(
 gpuDynInst->computeUnit()->cyclesToTicks(Cycles(24)));
@@ -32281,7 +32273,6 @@
 {
 Wavefront *wf = gpuDynInst->wavefront();
 gpuDynInst->execUnitId = wf->execUnitId;
-gpuDynInst->exec_mask = wf->execMask();
 gpuDynInst->latency.init(gpuDynInst->computeUnit());
 gpuDynInst->latency.set(
 gpuDynInst->computeUnit()->cyclesToTicks(Cycles(24)));
@@ -32362,7 +32353,6 @@
 {
 Wavefront *wf = 

[gem5-dev] Change in gem5/gem5[develop]: arch-gcn3: Read registers in execute instead of initiateAcc

2021-05-11 Thread Kyle Roarty (Gerrit) via gem5-dev
Kyle Roarty has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45345 )



Change subject: arch-gcn3: Read registers in execute instead of initiateAcc
..

arch-gcn3: Read registers in execute instead of initiateAcc

Certain memory writes were reading their registers in
initiateAcc, which lead to scenarios where a subsequent instruction
would execute, clobbering the value in that register before the memory
writes' initiateAcc method was called, causing the memory write to read
wrong data.

This patch moves all register reads to execute, preventing the above
scenario from happening.

Change-Id: Iee107c19e4b82c2e172bf2d6cc95b79983a43d83
---
M src/arch/amdgpu/gcn3/insts/instructions.cc
1 file changed, 116 insertions(+), 125 deletions(-)



diff --git a/src/arch/amdgpu/gcn3/insts/instructions.cc  
b/src/arch/amdgpu/gcn3/insts/instructions.cc

index 8cadff7..4ae4c29 100644
--- a/src/arch/amdgpu/gcn3/insts/instructions.cc
+++ b/src/arch/amdgpu/gcn3/insts/instructions.cc
@@ -5065,8 +5065,13 @@
 gpuDynInst->latency.set(gpuDynInst->computeUnit()->clockPeriod());
 ScalarRegU32 offset(0);
 ConstScalarOperandU64 addr(gpuDynInst, instData.SBASE << 1);
+ConstScalarOperandU32 sdata(gpuDynInst, instData.SDATA);

 addr.read();
+sdata.read();
+
+std::memcpy((void*)gpuDynInst->scalar_data, sdata.rawDataPtr(),
+sizeof(ScalarRegU32));

 if (instData.IMM) {
 offset = extData.OFFSET;
@@ -5090,10 +5095,6 @@
 void
 Inst_SMEM__S_STORE_DWORD::initiateAcc(GPUDynInstPtr gpuDynInst)
 {
-ConstScalarOperandU32 sdata(gpuDynInst, instData.SDATA);
-sdata.read();
-std::memcpy((void*)gpuDynInst->scalar_data, sdata.rawDataPtr(),
-sizeof(ScalarRegU32));
 initMemWrite<1>(gpuDynInst);
 } // initiateAcc

@@ -5124,8 +5125,13 @@
 gpuDynInst->latency.set(gpuDynInst->computeUnit()->clockPeriod());
 ScalarRegU32 offset(0);
 ConstScalarOperandU64 addr(gpuDynInst, instData.SBASE << 1);
+ConstScalarOperandU64 sdata(gpuDynInst, instData.SDATA);

 addr.read();
+sdata.read();
+
+std::memcpy((void*)gpuDynInst->scalar_data, sdata.rawDataPtr(),
+sizeof(ScalarRegU64));

 if (instData.IMM) {
 offset = extData.OFFSET;
@@ -5149,10 +5155,6 @@
 void
 Inst_SMEM__S_STORE_DWORDX2::initiateAcc(GPUDynInstPtr gpuDynInst)
 {
-ConstScalarOperandU64 sdata(gpuDynInst, instData.SDATA);
-sdata.read();
-std::memcpy((void*)gpuDynInst->scalar_data, sdata.rawDataPtr(),
-sizeof(ScalarRegU64));
 initMemWrite<2>(gpuDynInst);
 } // initiateAcc

@@ -5183,8 +5185,13 @@
 gpuDynInst->latency.set(gpuDynInst->computeUnit()->clockPeriod());
 ScalarRegU32 offset(0);
 ConstScalarOperandU64 addr(gpuDynInst, instData.SBASE << 1);
+ConstScalarOperandU128 sdata(gpuDynInst, instData.SDATA);

 addr.read();
+sdata.read();
+
+std::memcpy((void*)gpuDynInst->scalar_data, sdata.rawDataPtr(),
+4 * sizeof(ScalarRegU32));

 if (instData.IMM) {
 offset = extData.OFFSET;
@@ -5208,10 +5215,6 @@
 void
 Inst_SMEM__S_STORE_DWORDX4::initiateAcc(GPUDynInstPtr gpuDynInst)
 {
-ConstScalarOperandU128 sdata(gpuDynInst, instData.SDATA);
-sdata.read();
-std::memcpy((void*)gpuDynInst->scalar_data, sdata.rawDataPtr(),
-4 * sizeof(ScalarRegU32));
 initMemWrite<4>(gpuDynInst);
 } // initiateAcc

@@ -35743,9 +35746,18 @@
 ConstVecOperandU32 addr1(gpuDynInst, extData.VADDR + 1);
 ConstScalarOperandU128 rsrcDesc(gpuDynInst, extData.SRSRC * 4);
 ConstScalarOperandU32 offset(gpuDynInst, extData.SOFFSET);
+ConstVecOperandI8 data(gpuDynInst, extData.VDATA);

 rsrcDesc.read();
 offset.read();
+data.read();
+
+for (int lane = 0; lane < NumVecElemPerVecReg; ++lane) {
+if (gpuDynInst->exec_mask[lane]) {
+(reinterpret_cast(gpuDynInst->d_data))[lane]
+= data[lane];
+}
+}

 int inst_offset = instData.OFFSET;

@@ -35790,16 +35802,6 @@
 void
 Inst_MUBUF__BUFFER_STORE_BYTE::initiateAcc(GPUDynInstPtr gpuDynInst)
 {
-ConstVecOperandI8 data(gpuDynInst, extData.VDATA);
-data.read();
-
-for (int lane = 0; lane < NumVecElemPerVecReg; ++lane) {
-if (gpuDynInst->exec_mask[lane]) {
-(reinterpret_cast(gpuDynInst->d_data))[lane]
-= data[lane];
-}
-}
-
 initMemWrite(gpuDynInst);
 } // initiateAcc

@@ -35839,9 +35841,18 @@
 ConstVecOperandU32 addr1(gpuDynInst, extData.VADDR + 1);
 ConstScalarOperandU128 rsrcDesc(gpuDynInst, extData.SRSRC * 4);
   

[gem5-dev] Build failed in Jenkins: nightly #307

2021-05-11 Thread jenkins-no-reply--- via gem5-dev
See 

Changes:

[gabe.black] base: Add macros to mark things as deprecated.

[gabe.black] base: Mark the unused DPRINTF_UNCONDITIONAL macro as deprecated.

[gabe.black] base,arch,dev,mem: Always compile DPRINTFs, even if they're 
disabled.

[gabe.black] base: Collapse the DTRACE macro in DPRINTF.

[gabe.black] base: Simplify the definition of DTRACE.

[Giacomo Travaglini] arch-arm: Fix SMM* instructions

[gabe.black] base,python: Simplify how we check if a debug flag is enabled.

[gabe.black] base: Move TRACING_ON check into Flag::tracing().

[gabe.black] misc: Collapse all uses of DTRACE(x) to Debug::x.

[gabe.black] base,arch-sparc: Overhaul the small fenv wrapper in base.

[gabe.black] arch-arm: Use src/base/fenv.hh instead of raw fenv.h.

[gabe.black] cpu: Delete an unnecessary return in RegId::flatIndex.

[gabe.black] arch,cpu: Get rid of is*Reg() methods in RegId.

[gabe.black] cpu: Get rid of the unused NumRegClasses constant.

[gabe.black] cpu: Get rid of the redundant PhysRegIndex type.

[gabe.black] scons,misc: Remove the ability to disable some trivial features.

[gabe.black] scons: Pull builder definitions out of SConstruct.

[gabe.black] scons: Simplify finding the python lib with ParseConfig.

[gabe.black] scons: Update comments in SConstruct.

[gabe.black] python: Collapse away the now unused readCommandWithReturn 
function.

[gabe.black] python,scons: Move readCommand and compareVersions into site_scons.

[gabe.black] arch-x86: Clean up x86 integer indexes.

[gabe.black] arch-x86: Create some infrastructure for x86 microop operands.

[gabe.black] arch: Set %(op_idx)s properly when predicated operands are present.

[gabe.black] arch-x86: Build source picking into the operands.


--
[...truncated 506.72 KB...]
[==] Running 8 tests from 1 test suite.
[--] Global test environment set-up.
[--] 8 tests from Coroutine
[ RUN  ] Coroutine.Unstarted
[   OK ] Coroutine.Unstarted (0 ms)
[ RUN  ] Coroutine.Unfinished
[   OK ] Coroutine.Unfinished (0 ms)
[ RUN  ] Coroutine.Passing
[   OK ] Coroutine.Passing (1 ms)
[ RUN  ] Coroutine.Returning
[   OK ] Coroutine.Returning (0 ms)
[ RUN  ] Coroutine.Fibonacci
[   OK ] Coroutine.Fibonacci (0 ms)
[ RUN  ] Coroutine.Cooperative
[   OK ] Coroutine.Cooperative (0 ms)
[ RUN  ] Coroutine.Nested
[   OK ] Coroutine.Nested (0 ms)
[ RUN  ] Coroutine.TwoCallers
[   OK ] Coroutine.TwoCallers (0 ms)
[--] 8 tests from Coroutine (1 ms total)

[--] Global test environment tear-down
[==] 8 tests from 1 test suite ran. (1 ms total)
[  PASSED  ] 8 tests.
Running main() from build/googletest/googletest/src/gtest_main.cc
[==] Running 16 tests from 1 test suite.
[--] Global test environment set-up.
[--] 16 tests from FlagsTest
[ RUN  ] FlagsTest.ConstructorZero
[   OK ] FlagsTest.ConstructorZero (0 ms)
[ RUN  ] FlagsTest.ConstructorSingle
[   OK ] FlagsTest.ConstructorSingle (0 ms)
[ RUN  ] FlagsTest.ConstructorMulti
[   OK ] FlagsTest.ConstructorMulti (0 ms)
[ RUN  ] FlagsTest.TypeAssignment
[   OK ] FlagsTest.TypeAssignment (0 ms)
[ RUN  ] FlagsTest.TypeAssignmentOverwrite
[   OK ] FlagsTest.TypeAssignmentOverwrite (0 ms)
[ RUN  ] FlagsTest.FlagsAssignment
[   OK ] FlagsTest.FlagsAssignment (0 ms)
[ RUN  ] FlagsTest.FlagsAssignmentOverwrite
[   OK ] FlagsTest.FlagsAssignmentOverwrite (0 ms)
[ RUN  ] FlagsTest.IsSetValue
[   OK ] FlagsTest.IsSetValue (0 ms)
[ RUN  ] FlagsTest.IsSetType
[   OK ] FlagsTest.IsSetType (0 ms)
[ RUN  ] FlagsTest.AllSetMatch
[   OK ] FlagsTest.AllSetMatch (0 ms)
[ RUN  ] FlagsTest.NoneSetMatch
[   OK ] FlagsTest.NoneSetMatch (0 ms)
[ RUN  ] FlagsTest.Clear
[   OK ] FlagsTest.Clear (0 ms)
[ RUN  ] FlagsTest.ClearMatch
[   OK ] FlagsTest.ClearMatch (0 ms)
[ RUN  ] FlagsTest.SetOverlapping
[   OK ] FlagsTest.SetOverlapping (0 ms)
[ RUN  ] FlagsTest.ConditionalSet
[   OK ] FlagsTest.ConditionalSet (0 ms)
[ RUN  ] FlagsTest.ReplaceOverlapping
[   OK ] FlagsTest.ReplaceOverlapping (0 ms)
[--] 16 tests from FlagsTest (0 ms total)

[--] Global test environment tear-down
[==] 16 tests from 1 test suite ran. (0 ms total)
[  PASSED  ] 16 tests.
 [ CXX] NULL/base/loader/image_file_data.cc -> .fo
 [ CXX] NULL/base/logging.test.cc -> .fo
 [ CXX] NULL/base/logging.cc -> .fo
 [ CXX] NULL/base/hostinfo.cc -> .fo
build/NULL/base/channel_addr.test.fast 
--gtest_output=xml:build/NULL/unittests.fast/base/channel_addr.test.xml
Running main() from build/googletest/googletest/src/gtest_main.cc
[==] Running 2 tests from 1 test suite.
[--] Global test environment set-up.
[--] 2 tests from ChannelAddrRange
[ RUN  ]