date:20220322

[gem5-dev] Change in gem5/gem5[develop]: systemc: Set response status for transport_dbg in tlm_to_gem5 bridge

2022-03-22 Thread Han-sheng Liu (Gerrit) via gem5-dev

Han-sheng Liu has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/58089 )



Change subject: systemc: Set response status for transport_dbg in  
tlm_to_gem5 bridge

..

systemc: Set response status for transport_dbg in tlm_to_gem5 bridge

Change-Id: Ie7e44b6515b61646df0030cc6cdb526d4c8c97c1
---
M src/systemc/tlm_bridge/tlm_to_gem5.cc
1 file changed, 10 insertions(+), 0 deletions(-)



diff --git a/src/systemc/tlm_bridge/tlm_to_gem5.cc  
b/src/systemc/tlm_bridge/tlm_to_gem5.cc

index 2b9ced8..995178e 100644
--- a/src/systemc/tlm_bridge/tlm_to_gem5.cc
+++ b/src/systemc/tlm_bridge/tlm_to_gem5.cc
@@ -375,6 +375,7 @@
 }
 }

+trans.set_response_status(tlm::TLM_OK_RESPONSE);
 return trans.get_data_length();
 }


--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie7e44b6515b61646df0030cc6cdb526d4c8c97c1
Gerrit-Change-Number: 58089
Gerrit-PatchSet: 1
Gerrit-Owner: Han-sheng Liu 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: base: change bitunion default constructor to default

2022-03-22 Thread Yu-hsin Wang (Gerrit) via gem5-dev

Yu-hsin Wang has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/57730 )


Change subject: base: change bitunion default constructor to default
..

base: change bitunion default constructor to default

Current implementation prevents customers from performing zero
initialize on BitUnion class. Customers would get unexpected results
when writing `BitUnion{}`. Changing the default constructor to default
can solve this issue.

After changing the default constructor, the test failed with unused
variable. I also change one with zero initializer and make the other
with maybe_unused label.
```
tests/build/ARM/base/bitunion.test.cc:133:14: error: 'emptySixteen' defined  
but not used [-Werror=unused-variable]

  133 | EmptySixteen emptySixteen;
  |  ^~~~
tests/build/ARM/base/bitunion.test.cc:132:16: error: 'emptyThirtyTwo'  
defined but not used [-Werror=unused-variable]

  132 | EmptyThirtyTwo emptyThirtyTwo;
  |^~
```

Change-Id: Icbed36b3fa6751cbda63e84443eaab6d865d9bd6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57730
Reviewed-by: Gabe Black 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
M src/base/bitunion.hh
M src/base/bitunion.test.cc
2 files changed, 33 insertions(+), 3 deletions(-)

Approvals:
  Gabe Black: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/base/bitunion.hh b/src/base/bitunion.hh
index 92d747c..c8bb659 100644
--- a/src/base/bitunion.hh
+++ b/src/base/bitunion.hh
@@ -261,7 +261,7 @@

 BitUnionOperators(const BitUnionOperators &) = default;

-BitUnionOperators() {}
+BitUnionOperators() = default;

 //Conversion operators.
 operator const typename Base::__StorageType () const
diff --git a/src/base/bitunion.test.cc b/src/base/bitunion.test.cc
index 7300efe..06c7a61 100644
--- a/src/base/bitunion.test.cc
+++ b/src/base/bitunion.test.cc
@@ -129,8 +129,8 @@
 // Declare these as global so g++ doesn't ignore them. Initialize them in
 // various ways.
 EmptySixtyFour emptySixtyFour = 0;
-EmptyThirtyTwo emptyThirtyTwo;
-EmptySixteen emptySixteen;
+EmptyThirtyTwo emptyThirtyTwo{};
+[[maybe_unused]] EmptySixteen emptySixteen;
 EmptyEight emptyEight(0);

 class BitUnionData : public testing::Test

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Icbed36b3fa6751cbda63e84443eaab6d865d9bd6
Gerrit-Change-Number: 57730
Gerrit-PatchSet: 6
Gerrit-Owner: Yu-hsin Wang 
Gerrit-Reviewer: Bobby Bruce 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jui-min Lee 
Gerrit-Reviewer: Yu-hsin Wang 
Gerrit-Reviewer: kokoro 
Gerrit-CC: Ahbong Chang 
Gerrit-CC: Earl Ou 
Gerrit-CC: Gabe Black 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: stdlib: Add file lock to the resources.json download

2022-03-22 Thread Bobby Bruce (Gerrit) via gem5-dev

Bobby Bruce has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/57789 )


Change subject: stdlib: Add file lock to the resources.json download
..

stdlib: Add file lock to the resources.json download

There have been failures on the weekly tests during the decoding of the
downloaded resources.json base64 file. These errors suggested an
incomplete download or some form of file corruption. These errors only
ever seem to occur when multiple threads of gem5 are running. It has
therefore been proposed that perhaps, in some cases, the cached
downloaded file was bring re-downloaded while also being read by
another thread. For this reason this patch adds a filelock so only one
instance of gem5, at any one time, can download and read the
resources.json file. Even if this is not the cause of the weekly test
errors, it still adds some additional safeguards.

Change-Id: I7c6e1c1786c1919e8519587e53b6a77f4aafa932
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57789
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/python/gem5/resources/downloader.py
1 file changed, 50 insertions(+), 19 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/python/gem5/resources/downloader.py  
b/src/python/gem5/resources/downloader.py

index 5ca7387..828ebc8 100644
--- a/src/python/gem5/resources/downloader.py
+++ b/src/python/gem5/resources/downloader.py
@@ -83,27 +83,34 @@
 f"gem5-resources-{hashlib.md5(url.encode()).hexdigest()}.base64",
 )

-# The resources.json file can change at any time, but to avoid  
excessive
-# retrieval we cache a version locally and use it for up to an hour  
before

-# obtaining a fresh copy.
-#
-# `time.time()` and `os.path.getmtime(..)` both return an unix epoch  
time

-# in seconds. Therefore, the value of "3600" here represents an hour
-# difference between the two values. `time.time()` gets the current  
time,
-# and `os.path.getmtime()` gets the modification time of the  
file.
-# This is the most portable solution as other ideas, like "file  
creation

-# time", are  not always the same concept between operating systems.
-if not use_caching or not os.path.exists(file_path) or \
-(time.time() - os.path.getmtime(file_path)) > 3600:
-_download(url, file_path)
+# We apply a lock on the resources file for when it's downloaded, or
+# re-downloaded, and read. This stops a corner-case from occuring where
+# the file is re-downloaded while being read by another gem5 thread.
+# Note the timeout is 120 so the `_download` function is given time to  
run

+# its Truncated Exponential Backoff algorithm
+# (maximum of roughly 1 minute). Typically this code will run quickly.
+with FileLock("{}.lock".format(file_path), timeout=120):

-# Note: Google Source does not properly support obtaining files as raw
-# text. Therefore when we open the URL we receive the JSON in base64
-# format. Conversion is needed before it can be loaded.
-with open(file_path) as file:
-to_return =  
json.loads(base64.b64decode(file.read()).decode("utf-8"))

+# The resources.json file can change at any time, but to avoid
+# excessive retrieval we cache a version locally and use it for up  
to

+# an hour before obtaining a fresh copy.
+#
+# `time.time()` and `os.path.getmtime(..)` both return an unix  
epoch
+# time in seconds. Therefore, the value of "3600" here represents  
an

+# hour difference between the two values. `time.time()` gets the
+# current time, and `os.path.getmtime()` gets the  
modification
+# time of the file. This is the most portable solution as other  
ideas,
+# like "file creation time", are  not always the same concept  
between

+# operating systems.
+if not use_caching or not os.path.exists(file_path) or \
+(time.time() - os.path.getmtime(file_path)) > 3600:
+_download(url, file_path)

-return to_return
+# Note: Google Source does not properly support obtaining files as  
raw
+# text. Therefore when we open the URL we receive the JSON in  
base64

+# format. Conversion is needed before it can be loaded.
+with open(file_path) as file:
+return  
json.loads(base64.b64decode(file.read()).decode("utf-8"))


 def _get_resources_json() -> Dict:
 """

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I7c6e1c1786c1919e8519587e53b6a77f4aafa932
Gerrit-Change-Number: 57789

[gem5-dev] Build failed in Jenkins: nightly #169

2022-03-22 Thread jenkins-no-reply--- via gem5-dev

See 

Changes:

[Giacomo Travaglini] util: Remove python3-six package from dockerfiles

[wlm199558] sim-se: add getrandom() syscall support


--
[...truncated 3.00 MB...]
 [SO Param] m5.objects.Terminal, Terminal -> 
X86_MI_example/python/_m5/param_Terminal.cc
 [SO Param] m5.objects.ExternalSlave, ExternalSlave -> 
X86_MI_example/python/_m5/param_ExternalSlave.cc
 [SO Param] m5.objects.PowerState, PowerState -> 
X86_MI_example/python/_m5/param_PowerState.cc
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X86_MI_example/python/_m5/param_WeightedLRURP.cc
 [SO Param] m5.objects.Ethernet, IGbE -> X86_MI_example/python/_m5/param_IGbE.cc
 [SO Param] m5.objects.Uart, SimpleUart -> 
X86_MI_example/python/_m5/param_SimpleUart.cc
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X86_MI_example/params/DVFSHandler.hh
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X86_MI_example/params/DCPTPrefetcher.hh
 [SO Param] m5.objects.BranchPredictor, TAGE_SC_L_64KB -> 
X86_MI_example/params/TAGE_SC_L_64KB.hh
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X86_MI_example/params/TlmToGem5BridgeBase.hh
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X86_MI_example/params/TAGE_SC_L.hh
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X86_MI_example/params/GarnetIntLink.hh
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X86_MI_example/python/_m5/param_Base64Delta8.cc
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X86_MI_example/python/_m5/param_Gem5ToTlmBridge32.cc
 [SO Param] m5.objects.Ethernet, DistEtherLink -> 
X86_MI_example/params/DistEtherLink.hh
 [SO Param] m5.objects.ThermalDomain, ThermalDomain -> 
X86_MI_example/python/_m5/param_ThermalDomain.cc
 [ENUM STR] m5.objects.System, MemoryMode -> X86_MI_example/enums/MemoryMode.cc
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X86_MI_example/params/MemFootprintProbe.hh
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X86_MI_example/python/_m5/param_IntelTrace.cc
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X86_MI_example/params/FaultModel.hh
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X86_MI_example/params/AMPMPrefetcher.hh
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X86_MI_example/params/BaseO3CPU.hh
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X86_MI_example/python/_m5/param_X86IntelMPCompatAddrSpaceMod.cc
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X86_MI_example/params/RubyPortProxy.hh
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X86_MI_example/python/_m5/param_BaseReplacementPolicy.cc
 [SO Param] m5.objects.XBar, CoherentXBar -> 
X86_MI_example/params/CoherentXBar.hh
 [SO Param] m5.objects.BranchPredictor, MPP_TAGE_8KB -> 
X86_MI_example/python/_m5/param_MPP_TAGE_8KB.cc
 [SO Param] m5.objects.RubyDirectedTester, InvalidateGenerator -> 
X86_MI_example/python/_m5/param_InvalidateGenerator.cc
 [SO Param] m5.objects.Compressors, MultiCompressor -> 
X86_MI_example/params/MultiCompressor.hh
 [SO Param] m5.objects.Workload, KernelWorkload -> 
X86_MI_example/params/KernelWorkload.hh
 [SO Param] m5.objects.BranchPredictor, TAGE_SC_L_TAGE_8KB -> 
X86_MI_example/python/_m5/param_TAGE_SC_L_TAGE_8KB.cc
 [SO Param] m5.objects.BaseISA, BaseISA -> 
X86_MI_example/python/_m5/param_BaseISA.cc
 [SO Param] m5.objects.DiskImage, RawDiskImage -> 
X86_MI_example/params/RawDiskImage.hh
 [SO Param] m5.objects.ThermalModel, ThermalReference -> 
X86_MI_example/params/ThermalReference.hh
 [SO Param] m5.objects.X86ISA, X86ISA -> X86_MI_example/params/X86ISA.hh
 [ENUMDECL] m5.objects.DRAMInterface, PageManage -> 
X86_MI_example/enums/PageManage.hh
 [SO Param] m5.objects.PciDevice, PciLegacyIoBar -> 
X86_MI_example/params/PciLegacyIoBar.hh
 [SO Param] m5.objects.BranchPredictor, MultiperspectivePerceptronTAGE64KB -> 
X86_MI_example/python/_m5/param_MultiperspectivePerceptronTAGE64KB.cc
 [SO Param] m5.objects.BaseMinorCPU, MinorOpClassSet -> 
X86_MI_example/python/_m5/param_MinorOpClassSet.cc
 [SO Param] m5.objects.Device, IsaFake -> X86_MI_example/params/IsaFake.hh
 [SO Param] m5.objects.Process, Process -> 
X86_MI_example/python/_m5/param_Process.cc
 [SO Param] m5.objects.QoSPolicy, QoSPropFairPolicy -> 
X86_MI_example/params/QoSPropFairPolicy.hh
 [SO Param] m5.objects.BloomFilters, BloomFilterH3 -> 
X86_MI_example/python/_m5/param_BloomFilterH3.cc
 [SO Param] m5.objects.SubSystem, SubSystem -> 
X86_MI_example/python/_m5/param_SubSystem.cc
 [SO Param] m5.objects.PciDevice, PciMemUpperBar -> 
X86_MI_example/python/_m5/param_PciMemUpperBar.cc
 [SO Param] m5.objects.Ethernet, EtherDevBase -> 
X86_MI_example/params/EtherDevBase.hh
 [SO Param] m5.objects.Probe, ProbeListenerObject -> 
X86_MI_example/python/_m5/param_ProbeListenerObject.cc
 [SO Param] m5.objects.Prefetcher, BOPPrefetcher -> 
X86_MI_example/params/BOPPrefetcher.hh
 [SO Param]

[gem5-dev] Re: Build failed in Jenkins: nightly #166

2022-03-22 Thread Giacomo Travaglini via gem5-dev

Hi Bobby,

No sure, maybe something weird on the XML side? It is weird though; the plot 
plugin has been running for some days and this is the first time we are getting 
this kind of error.
Let’s see if disabling it fixes the issue

Giacomo


From: Bobby Bruce 
Date: Monday, 21 March 2022 at 19:05
To: gem5 Developer List , Giacomo Travaglini 

Subject: Re: [gem5-dev] Build failed in Jenkins: nightly #166
It seems like the tests were failing due to the Plots plugin running into an 
error: https://jenkins.gem5.org/job/nightly/166/console. I have disabled this 
and suspect the Nightly tests should pass now.

@Giacomo: Any idea what's going on here? Though I've turned this off, i've 
taken note of the values you had for the plots plugin:

```
Plot group: All Regressions
Plot title: CPU execution time
Plot description: CPU execution time
Plot description: CPU execution time
Number of builds to include: 6
Plot style: Line
Data series file -> Load data from xml file using xpath -> XPath Expression: 
//testsuite[@name='realview-simple-atomic-ARM-x86_64-opt']
```

--
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616


web: https://www.bobbybruce.net



On Sat, Mar 19, 2022 at 5:54 PM jenkins-no-reply--- via gem5-dev 
mailto:gem5-dev@gem5.org>> wrote:
See 

Changes:

[Bobby R. Bruce] tests: Add 'kvm' tag to tests

[Bobby R. Bruce] tests,ext: Fix so ex/include regex are applied after defaults

[Bobby R. Bruce] tests: Add KVM Tests to the nightly run

[gabe.black] arch-vega: Replace deprecated Stats namespace recently 
reintroduced.

[matthew.poremba] arch-vega: Mark global instructions executed as global

[mattdsinclair] configs, gpu-compute: change default GPU reg allocator to 
dynamic


--
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[gem5-dev] Change in gem5/gem5[develop]: dev-amdgpu: Add SystemHub for GPU load/store to host

2022-03-22 Thread Matthew Poremba (Gerrit) via gem5-dev

Matthew Poremba has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51851 )


 (

12 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

 )Change subject: dev-amdgpu: Add SystemHub for GPU load/store to host
..

dev-amdgpu: Add SystemHub for GPU load/store to host

In a dGPU configuration, vector and scalar loads/stores can either be
requests to device memory or host memory depending on if the system bit
is set in the PTE when the request's virtual address is translated. This
object is used to send/receive those requests to the host via DMA.

This object will be used in a later changeset by the compute unit and
fetch units to issue data and instruction loads from the GPU which
translate to physical addresses on the host/cpu memory.

Change-Id: I4537059f90ebc03f3b2e6b8b631b4c452841f83f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51851
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/dev/amdgpu/AMDGPU.py
M src/dev/amdgpu/SConscript
A src/dev/amdgpu/system_hub.cc
A src/dev/amdgpu/system_hub.hh
4 files changed, 194 insertions(+), 1 deletion(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/dev/amdgpu/AMDGPU.py b/src/dev/amdgpu/AMDGPU.py
index 0956e47..be568b1 100644
--- a/src/dev/amdgpu/AMDGPU.py
+++ b/src/dev/amdgpu/AMDGPU.py
@@ -95,3 +95,8 @@
 type = 'AMDGPUInterruptHandler'
 cxx_header = "dev/amdgpu/interrupt_handler.hh"
 cxx_class = 'gem5::AMDGPUInterruptHandler'
+
+class AMDGPUSystemHub(DmaDevice):
+type = 'AMDGPUSystemHub'
+cxx_class = 'gem5::AMDGPUSystemHub'
+cxx_header = "dev/amdgpu/system_hub.hh"
diff --git a/src/dev/amdgpu/SConscript b/src/dev/amdgpu/SConscript
index 09ee7f6..dd80bd2 100644
--- a/src/dev/amdgpu/SConscript
+++ b/src/dev/amdgpu/SConscript
@@ -34,12 +34,14 @@

 # Controllers
 SimObject('AMDGPU.py',  
sim_objects=['AMDGPUDevice', 'AMDGPUInterruptHandler',

-'AMDGPUMemoryManager'], tags='x86 isa')
+'AMDGPUMemoryManager', 'AMDGPUSystemHub'],
+tags='x86 isa')

 Source('amdgpu_device.cc', tags='x86 isa')
 Source('interrupt_handler.cc', tags='x86 isa')
 Source('memory_manager.cc', tags='x86 isa')
 Source('mmio_reader.cc', tags='x86 isa')
+Source('system_hub.cc', tags='x86 isa')

 DebugFlag('AMDGPUDevice', tags='x86 isa')
 DebugFlag('AMDGPUMem', tags='x86 isa')
diff --git a/src/dev/amdgpu/system_hub.cc b/src/dev/amdgpu/system_hub.cc
new file mode 100644
index 000..b55cc52
--- /dev/null
+++ b/src/dev/amdgpu/system_hub.cc
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2021 Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are  
met:

+ *
+ * 1. Redistributions of source code must retain the above copyright  
notice,

+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright  
notice,
+ * this list of conditions and the following disclaimer in the  
documentation

+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from  
this

+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS  
IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,  
THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR  
PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS  
BE

+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF  
THE

+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "dev/amdgpu/system_hub.hh"
+
+#include "mem/port.hh"
+
+namespace gem5
+{
+
+void
+AMDGPUSystemHub::sendRequest(PacketPtr pkt, Event *callback)
+{
+ResponseEvent *dmaRespEvent = new ResponseEvent(pkt, callback);
+Tick delay = 0;
+
+// Assuming read XOR write (i.e., not an atomic).
+assert(pkt->isRead() ^ pkt->isWrite());
+
+if (pkt->isRead()) {
+dmaRead(pkt->getAddr(), pkt->getSize(), dmaRespEvent,
+pkt->getPtr(), 0, 0, delay);
+} else {
+

[gem5-dev] Change in gem5/gem5[develop]: dev-amdgpu: Add GPU interrupt handler object

2022-03-22 Thread Matthew Poremba (Gerrit) via gem5-dev

Matthew Poremba has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51849 )


Change subject: dev-amdgpu: Add GPU interrupt handler object
..

dev-amdgpu: Add GPU interrupt handler object

Add device interrupt handler for amdgpu device. The interrupt handler is
primarily used to signal that fences in the kernel driver can be passed.

Change-Id: I574fbfdef6e3bae310ec7f86058811e1e4886df6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51849
Maintainer: Matthew Poremba 
Reviewed-by: Matt Sinclair 
Maintainer: Matt Sinclair 
Tested-by: kokoro 
---
M src/dev/amdgpu/AMDGPU.py
M src/dev/amdgpu/SConscript
M src/dev/amdgpu/amdgpu_device.cc
M src/dev/amdgpu/amdgpu_device.hh
A src/dev/amdgpu/ih_mmio.hh
A src/dev/amdgpu/interrupt_handler.cc
A src/dev/amdgpu/interrupt_handler.hh
7 files changed, 639 insertions(+), 4 deletions(-)

Approvals:
  Matt Sinclair: Looks good to me, approved; Looks good to me, approved
  Matthew Poremba: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/dev/amdgpu/AMDGPU.py b/src/dev/amdgpu/AMDGPU.py
index 9ca9b3b..471a67c 100644
--- a/src/dev/amdgpu/AMDGPU.py
+++ b/src/dev/amdgpu/AMDGPU.py
@@ -28,8 +28,10 @@
 # POSSIBILITY OF SUCH DAMAGE.

 from m5.params import *
+from m5.proxy import *
 from m5.objects.PciDevice import PciDevice
 from m5.objects.PciDevice import PciMemBar, PciMemUpperBar, PciLegacyIoBar
+from m5.objects.Device import DmaDevice

 # PCI device model for an AMD Vega 10 based GPU. The PCI codes and BARs
 # correspond to a Vega Frontier Edition hardware device. None of the PCI
@@ -71,3 +73,14 @@
 trace_file = Param.String("MMIO trace collected on hardware")
 checkpoint_before_mmios = Param.Bool(False, "Take a checkpoint before  
the"
 " device begins sending  
MMIOs")

+
+# The cp is needed here to handle certain packets the device may  
receive.
+# The config script should not create a new cp here but rather assign  
the

+# same cp that is assigned to the Shader SimObject.
+cp = Param.GPUCommandProcessor(NULL, "Command Processor")
+device_ih = Param.AMDGPUInterruptHandler("GPU Interrupt handler")
+
+class AMDGPUInterruptHandler(DmaDevice):
+type = 'AMDGPUInterruptHandler'
+cxx_header = "dev/amdgpu/interrupt_handler.hh"
+cxx_class = 'gem5::AMDGPUInterruptHandler'
diff --git a/src/dev/amdgpu/SConscript b/src/dev/amdgpu/SConscript
index 87a560e..f149812 100644
--- a/src/dev/amdgpu/SConscript
+++ b/src/dev/amdgpu/SConscript
@@ -33,9 +33,11 @@
 Return()

 # Controllers
-SimObject('AMDGPU.py', sim_objects=['AMDGPUDevice'], tags='x86 isa')
+SimObject('AMDGPU.py',  
sim_objects=['AMDGPUDevice', 'AMDGPUInterruptHandler']

+ , tags='x86 isa')

 Source('amdgpu_device.cc', tags='x86 isa')
+Source('interrupt_handler.cc', tags='x86 isa')
 Source('mmio_reader.cc', tags='x86 isa')

 DebugFlag('AMDGPUDevice', tags='x86 isa')
diff --git a/src/dev/amdgpu/amdgpu_device.cc  
b/src/dev/amdgpu/amdgpu_device.cc

index a4edef4..fb140d4 100644
--- a/src/dev/amdgpu/amdgpu_device.cc
+++ b/src/dev/amdgpu/amdgpu_device.cc
@@ -34,6 +34,7 @@
 #include 

 #include "debug/AMDGPUDevice.hh"
+#include "dev/amdgpu/interrupt_handler.hh"
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
 #include "params/AMDGPUDevice.hh"
@@ -196,8 +197,19 @@
 void
 AMDGPUDevice::writeMMIO(PacketPtr pkt, Addr offset)
 {
+Addr aperture = getMmioAperture(offset);
+Addr aperture_offset = offset - aperture;
+
 DPRINTF(AMDGPUDevice, "Wrote MMIO %#lx\n", offset);
-mmioReader.writeFromTrace(pkt, MMIO_BAR, offset);
+
+switch (aperture) {
+  case IH_BASE:
+deviceIH->writeMMIO(pkt, aperture_offset >> IH_OFFSET_SHIFT);
+break;
+  default:
+DPRINTF(AMDGPUDevice, "Unknown MMIO aperture for %#x\n", offset);
+break;
+}
 }

 Tick
@@ -263,6 +275,19 @@
 }

 void
+AMDGPUDevice::setDoorbellType(uint32_t offset, QueueType qt)
+{
+DPRINTF(AMDGPUDevice, "Setting doorbell type for %x\n", offset);
+doorbells[offset] = qt;
+}
+
+void
+AMDGPUDevice::intrPost()
+{
+PciDevice::intrPost();
+}
+
+void
 AMDGPUDevice::serialize(CheckpointOut ) const
 {
 // Serialize the PciDevice base class
diff --git a/src/dev/amdgpu/amdgpu_device.hh  
b/src/dev/amdgpu/amdgpu_device.hh

index b0ea86a..fb72172 100644
--- a/src/dev/amdgpu/amdgpu_device.hh
+++ b/src/dev/amdgpu/amdgpu_device.hh
@@ -44,6 +44,8 @@
 namespace gem5
 {

+class AMDGPUInterruptHandler;
+
 /**
  * Device model for an AMD GPU. This models the interface between the PCI  
bus
  * and the various IP blocks behind it. It translates requests to the  
various

@@ -77,6 +79,14 @@
 void writeMMIO(PacketPtr pkt, Addr offset);

 /**
+ * Structures to hold registers, doorbells, and some frame memory
+ */
+using GPURegMap = std::unordered_map;
+GPURegMap

[gem5-dev] Change in gem5/gem5[develop]: dev-amdgpu: Add memory manager for GPU VRAM

2022-03-22 Thread Matthew Poremba (Gerrit) via gem5-dev

Matthew Poremba has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51850 )


Change subject: dev-amdgpu: Add memory manager for GPU VRAM
..

dev-amdgpu: Add memory manager for GPU VRAM

The memory manager is responsible for reading and writes to VRAM memory
for direct requests that bypass GPU caches.

Change-Id: I4aa1e77737ce52f2f2c01929b58984126bdcb925
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51850
Maintainer: Matt Sinclair 
Reviewed-by: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/dev/amdgpu/AMDGPU.py
M src/dev/amdgpu/SConscript
M src/dev/amdgpu/amdgpu_device.cc
M src/dev/amdgpu/amdgpu_device.hh
A src/dev/amdgpu/memory_manager.cc
A src/dev/amdgpu/memory_manager.hh
6 files changed, 271 insertions(+), 3 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved
  Matt Sinclair: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/dev/amdgpu/AMDGPU.py b/src/dev/amdgpu/AMDGPU.py
index 471a67c..0956e47 100644
--- a/src/dev/amdgpu/AMDGPU.py
+++ b/src/dev/amdgpu/AMDGPU.py
@@ -32,6 +32,7 @@
 from m5.objects.PciDevice import PciDevice
 from m5.objects.PciDevice import PciMemBar, PciMemUpperBar, PciLegacyIoBar
 from m5.objects.Device import DmaDevice
+from m5.objects.ClockedObject import ClockedObject

 # PCI device model for an AMD Vega 10 based GPU. The PCI codes and BARs
 # correspond to a Vega Frontier Edition hardware device. None of the PCI
@@ -78,8 +79,18 @@
 # The config script should not create a new cp here but rather assign  
the

 # same cp that is assigned to the Shader SimObject.
 cp = Param.GPUCommandProcessor(NULL, "Command Processor")
+memory_manager = Param.AMDGPUMemoryManager("GPU Memory Manager")
+memories = VectorParam.AbstractMemory([], "All memories in the device")
 device_ih = Param.AMDGPUInterruptHandler("GPU Interrupt handler")

+class AMDGPUMemoryManager(ClockedObject):
+type = 'AMDGPUMemoryManager'
+cxx_header = 'dev/amdgpu/memory_manager.hh'
+cxx_class = 'gem5::AMDGPUMemoryManager'
+
+port = RequestPort('Memory Port to access VRAM (device memory)')
+system = Param.System(Parent.any, 'System the dGPU belongs to')
+
 class AMDGPUInterruptHandler(DmaDevice):
 type = 'AMDGPUInterruptHandler'
 cxx_header = "dev/amdgpu/interrupt_handler.hh"
diff --git a/src/dev/amdgpu/SConscript b/src/dev/amdgpu/SConscript
index f149812..09ee7f6 100644
--- a/src/dev/amdgpu/SConscript
+++ b/src/dev/amdgpu/SConscript
@@ -33,11 +33,13 @@
 Return()

 # Controllers
-SimObject('AMDGPU.py',  
sim_objects=['AMDGPUDevice', 'AMDGPUInterruptHandler']

- , tags='x86 isa')
+SimObject('AMDGPU.py',  
sim_objects=['AMDGPUDevice', 'AMDGPUInterruptHandler',

+'AMDGPUMemoryManager'], tags='x86 isa')

 Source('amdgpu_device.cc', tags='x86 isa')
 Source('interrupt_handler.cc', tags='x86 isa')
+Source('memory_manager.cc', tags='x86 isa')
 Source('mmio_reader.cc', tags='x86 isa')

 DebugFlag('AMDGPUDevice', tags='x86 isa')
+DebugFlag('AMDGPUMem', tags='x86 isa')
diff --git a/src/dev/amdgpu/amdgpu_device.cc  
b/src/dev/amdgpu/amdgpu_device.cc

index fb140d4..7551938 100644
--- a/src/dev/amdgpu/amdgpu_device.cc
+++ b/src/dev/amdgpu/amdgpu_device.cc
@@ -250,6 +250,8 @@

 switch (barnum) {
   case FRAMEBUFFER_BAR:
+  gpuMemMgr->writeRequest(offset, pkt->getPtr(),
+  pkt->getSize());
   writeFrame(pkt, offset);
   break;
   case DOORBELL_BAR:
@@ -266,6 +268,9 @@
 // Reads return 0 by default.
 uint64_t data = pkt->getUintX(ByteOrder::little);

+DPRINTF(AMDGPUDevice, "PCI Write to %#lx data %#lx\n",
+pkt->getAddr(), data);
+
 if (data || regs.find(pkt->getAddr()) != regs.end())
 regs[pkt->getAddr()] = data;

diff --git a/src/dev/amdgpu/amdgpu_device.hh  
b/src/dev/amdgpu/amdgpu_device.hh

index fb72172..b522663 100644
--- a/src/dev/amdgpu/amdgpu_device.hh
+++ b/src/dev/amdgpu/amdgpu_device.hh
@@ -36,6 +36,7 @@

 #include "base/bitunion.hh"
 #include "dev/amdgpu/amdgpu_defines.hh"
+#include "dev/amdgpu/memory_manager.hh"
 #include "dev/amdgpu/mmio_reader.hh"
 #include "dev/io_device.hh"
 #include "dev/pci/device.hh"
@@ -100,6 +101,8 @@
  */
 AMDMMIOReader mmioReader;

+AMDGPUMemoryManager *gpuMemMgr;
+
 /**
  * Blocks of the GPU
  */
@@ -183,7 +186,7 @@
 /**
  * Methods related to translations and system/device memory.
  */
-RequestorID vramRequestorId() { return 0; }
+RequestorID vramRequestorId() { return gpuMemMgr->getRequestorID(); }

 Addr
 getPageTableBase(uint16_t vmid)
diff --git a/src/dev/amdgpu/memory_manager.cc  
b/src/dev/amdgpu/memory_manager.cc

new file mode 100644
index 000..5698a70
--- /dev/null
+++ b/src/dev/amdgpu/memory_manager.cc
@@ -0,0 +1,118 @@
+/*
+ * Copyright (c) 2021

[gem5-dev] Change in gem5/gem5[develop]: dev-amdgpu: Add aperture base definitions file

2022-03-22 Thread Matthew Poremba (Gerrit) via gem5-dev

Matthew Poremba has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/57769 )


Change subject: dev-amdgpu: Add aperture base definitions file
..

dev-amdgpu: Add aperture base definitions file

These are used in subsequent patches. Adding all of them at once.

Change-Id: Idbb43b7daba1732a32d8033adcb1178a1c581b43
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57769
Maintainer: Matthew Poremba 
Tested-by: kokoro 
Reviewed-by: Matt Sinclair 
Maintainer: Matt Sinclair 
---
A src/dev/amdgpu/amdgpu_defines.hh
M src/dev/amdgpu/amdgpu_device.hh
2 files changed, 109 insertions(+), 9 deletions(-)

Approvals:
  Matt Sinclair: Looks good to me, approved; Looks good to me, approved
  Matthew Poremba: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/dev/amdgpu/amdgpu_defines.hh  
b/src/dev/amdgpu/amdgpu_defines.hh

new file mode 100644
index 000..9407a68
--- /dev/null
+++ b/src/dev/amdgpu/amdgpu_defines.hh
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2021 Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are  
met:

+ *
+ * 1. Redistributions of source code must retain the above copyright  
notice,

+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright  
notice,
+ * this list of conditions and the following disclaimer in the  
documentation

+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from  
this

+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS  
IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,  
THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR  
PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS  
BE

+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF  
THE

+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __DEV_AMDGPU_AMDGPU_DEFINES_HH__
+#define __DEV_AMDGPU_AMDGPU_DEFINES_HH__
+
+namespace gem5
+{
+
+/* Types of queues supported by device */
+enum QueueType
+{
+Compute,
+Gfx,
+SDMAGfx,
+SDMAPage,
+ComputeAQL,
+InterruptHandler,
+RLC
+};
+
+/* Names of BARs used by the device. */
+constexpr int FRAMEBUFFER_BAR = 0;
+constexpr int DOORBELL_BAR = 2;
+constexpr int MMIO_BAR = 5;
+
+/* By default the X86 kernel expects the vga ROM at 0xc. */
+constexpr uint32_t VGA_ROM_DEFAULT = 0xc;
+constexpr uint32_t ROM_SIZE = 0x2;// 128kB
+
+/* SDMA base, size, mmio offset shift. */
+static constexpr uint32_t SDMA0_BASE  = 0x4980;
+static constexpr uint32_t SDMA1_BASE  = 0x5180;
+static constexpr uint32_t SDMA_SIZE  = 0x800;
+static constexpr uint32_t SDMA_OFFSET_SHIFT  = 2;
+
+/* Interrupt handler base, size, mmio offset shift. */
+static constexpr uint32_t IH_BASE = 0x4280;
+static constexpr uint32_t IH_SIZE = 0x700;
+static constexpr uint32_t IH_OFFSET_SHIFT = 2;
+
+/* Graphics register bus manager base, size, mmio offset shift. */
+static constexpr uint32_t GRBM_BASE  = 0x8000;
+static constexpr uint32_t GRBM_SIZE  = 0x5000;
+static constexpr uint32_t GRBM_OFFSET_SHIFT  = 2;
+
+/* GFX base, size, mmio offset shift. */
+static constexpr uint32_t GFX_BASE  = 0x28000;
+static constexpr uint32_t GFX_SIZE  = 0x17000;
+static constexpr uint32_t GFX_OFFSET_SHIFT  = 2;
+
+/* MMHUB base, size, mmio offset shift. */
+static constexpr uint32_t MMHUB_BASE = 0x68000;
+static constexpr uint32_t MMHUB_SIZE = 0x2120;
+static constexpr uint32_t MMHUB_OFFSET_SHIFT = 2;
+
+/* NBIO base and size. */
+static constexpr uint32_t NBIO_BASE = 0x0;
+static constexpr uint32_t NBIO_SIZE = 0x4280;
+
+} // namespace gem5
+
+#endif // __DEV_AMDGPU_AMDGPU_DEFINES_HH__
+
diff --git a/src/dev/amdgpu/amdgpu_device.hh  
b/src/dev/amdgpu/amdgpu_device.hh

index 1265e2f..b0ea86a 100644
--- a/src/dev/amdgpu/amdgpu_device.hh
+++ b/src/dev/amdgpu/amdgpu_device.hh
@@ -35,6 +35,7 @@
 #include 

 #include "base/bitunion.hh"
+#include "dev/amdgpu/amdgpu_defines.hh"
 #include "dev/amdgpu/mmio_reader.hh"
 #include "dev/io_device.hh"
 #include "dev/pci/device.hh"
@@ -43,15 +44,6 @@
 namespace gem5
 {

-/* Names of BARs used by the device. */

[gem5-dev] Change in gem5/gem5[develop]: scons: Add a SourceLib method for adding libs to gem5.

2022-03-22 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/58069 )


Change subject: scons: Add a SourceLib method for adding libs to gem5.
..

scons: Add a SourceLib method for adding libs to gem5.

Sometimes a library is needed to support particular functionality in
gem5, and that functionality is only used (or even desirable) in
certain binaries SCons can build. We can currently filter sources to
include in a particular executable using tags, but libraries have been
added to the environment globally using the LIBS variable which applies
to all Executables.

This change adds a SourceLib() mechanism which is a new category of
source which represents libraries. This is independent from classes
which inherit from SourceFile which represent actual files, as opposed
to more abstract libraries.

When gem5 builds an executable, the filters it provides are used to
select both Source()-es, aka c/c++ files, and libraries. If something
like a unit test does not need all the libraries gem5 proper does,
then those won't be picked up by its filter, and it won't include them.

Change-Id: I003e029eb82f7800a7ecff698c260e2d18ea2900
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58069
Reviewed-by: Yu-hsin Wang 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
M site_scons/gem5_scons/sources.py
M src/SConscript
2 files changed, 72 insertions(+), 15 deletions(-)

Approvals:
  Yu-hsin Wang: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/site_scons/gem5_scons/sources.py  
b/site_scons/gem5_scons/sources.py

index 7a2a641..85b0b4e 100644
--- a/site_scons/gem5_scons/sources.py
+++ b/site_scons/gem5_scons/sources.py
@@ -188,13 +188,13 @@
 super(SourceMeta, cls).__init__(name, bases, dict)
 cls.all = SourceList()

-class SourceFile(object, metaclass=SourceMeta):
-'''Base object that encapsulates the notion of a source file.
-This includes, the source node, target node, various manipulations
-of those.  A source file also specifies a set of tags which
-describing arbitrary properties of the source file.'''
-
+class SourceItem(object, metaclass=SourceMeta):
+'''Base object that encapsulates the notion of a source component for
+gem5. This specifies a set of tags which help group components into  
groups

+based on arbitrary properties.'''
 def __init__(self, source, tags=None, add_tags=None, append=None):
+self.source = source
+
 if tags is None:
 tags='gem5 lib'
 if isinstance(tags, str):
@@ -212,16 +212,24 @@

 self.append = append

+for base in type(self).__mro__:
+if issubclass(base, SourceItem):
+base.all.append(self)
+
+class SourceFile(SourceItem):
+'''Base object that encapsulates the notion of a source file.
+This includes, the source node, target node, various manipulations
+of those.'''
+
+def __init__(self, source, tags=None, add_tags=None, append=None):
+super().__init__(source, tags=tags, add_tags=add_tags,  
append=append)

+
 tnode = SCons.Script.File(source)

 self.tnode = tnode
 self.filename = str(self.tnode)
 self.snode = tnode.srcnode()

-for base in type(self).__mro__:
-if issubclass(base, SourceFile):
-base.all.append(self)
-
 def static(self, env):
 if self.append:
 env = env.Clone()
@@ -234,6 +242,7 @@
 env.Append(**self.append)
 return env.SharedObject(self.tnode)

+
 __all__ = ['TagImpliesTool', 'SourceFilter', 'SourceList', 'SourceFile',
-   'with_any_tags', 'with_all_tags', 'with_tag', 'without_tags',
-   'without_tag']
+   'SourceItem', 'with_any_tags', 'with_all_tags', 'with_tag',
+   'without_tags', 'without_tag']
diff --git a/src/SConscript b/src/SConscript
index 64f1318..5dd84ce 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -78,6 +78,9 @@
 class Source(SourceFile):
 pass

+class SourceLib(SourceItem):
+pass
+
 build_tools = Dir('#build_tools')

 # Build a small helper that runs Python code using the same version of  
Python

@@ -318,11 +321,15 @@
 self.target = target

 isFilter = lambda arg: isinstance(arg, SourceFilter)
-self.filters = filter(isFilter, srcs_and_filts)
-sources = filter(lambda a: not isFilter(a), srcs_and_filts)
+isLib = lambda arg: isinstance(arg, SourceLib)
+# If something isn't a library or filter, assume it's a source  
file.

+isSourceFile = lambda arg: not isFilter(arg) and not isLib(arg)
+self.filters = list(filter(isFilter, srcs_and_filts))
+self.sourceLibs = list(filter(isLib, srcs_and_filts))
+source_files = list(filter(isSourceFile, srcs_and_filts))

 srcs = SourceList()
-for src in

[gem5-dev] Change in gem5/gem5[develop]: systemc: Set response status for transport_dbg in tlm_to_gem5 bridge

[gem5-dev] Change in gem5/gem5[develop]: base: change bitunion default constructor to default

[gem5-dev] Change in gem5/gem5[develop]: stdlib: Add file lock to the resources.json download

[gem5-dev] Build failed in Jenkins: nightly #169

[gem5-dev] Re: Build failed in Jenkins: nightly #166

[gem5-dev] Change in gem5/gem5[develop]: dev-amdgpu: Add SystemHub for GPU load/store to host

[gem5-dev] Change in gem5/gem5[develop]: dev-amdgpu: Add GPU interrupt handler object

[gem5-dev] Change in gem5/gem5[develop]: dev-amdgpu: Add memory manager for GPU VRAM

[gem5-dev] Change in gem5/gem5[develop]: dev-amdgpu: Add aperture base definitions file

[gem5-dev] Change in gem5/gem5[develop]: scons: Add a SourceLib method for adding libs to gem5.

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