Boris Shingarov has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/40901 )
Change subject: arch-power: Add fields for DX form instructions
..
arch-power: Add fields for DX form instructions
This introduces the extended opcode field for DS form
instructions and the fields d0, d1 and d2 which are
concatenated for specifying a signed integer immediate
operand.
Change-Id: Id60e85d79f9157d680f813bf90ab6e1e064253a9
Signed-off-by: Sandipan Das
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40901
Reviewed-by: Boris Shingarov
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M src/arch/power/isa/bitfields.isa
M src/arch/power/types.hh
2 files changed, 4 insertions(+), 0 deletions(-)
Approvals:
Boris Shingarov: Looks good to me, approved
Jason Lowe-Power: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/power/isa/bitfields.isa
b/src/arch/power/isa/bitfields.isa
index 771a822..84a3a2c 100644
--- a/src/arch/power/isa/bitfields.isa
+++ b/src/arch/power/isa/bitfields.isa
@@ -37,6 +37,7 @@
def bitfield PO<31:26>;
def bitfield A_XO <5:1>;
def bitfield DS_XO <1:0>;
+def bitfield DX_XO <5:1>;
def bitfield X_XO <10:1>;
def bitfield XFL_XO<10:1>;
def bitfield XFX_XO<10:1>;
diff --git a/src/arch/power/types.hh b/src/arch/power/types.hh
index 354da59..6f55821 100644
--- a/src/arch/power/types.hh
+++ b/src/arch/power/types.hh
@@ -55,6 +55,9 @@
Bitfield<15, 0> ui;
Bitfield<15, 0> d;
Bitfield<15, 2> ds;
+Bitfield<15, 6> d0;
+Bitfield<20, 16> d1;
+Bitfield< 1, 0> d2;
// Special purpose register identifier
Bitfield<20, 11> spr;
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id60e85d79f9157d680f813bf90ab6e1e064253a9
Gerrit-Change-Number: 40901
Gerrit-PatchSet: 7
Gerrit-Owner: Sandipan Das
Gerrit-Reviewer: Boris Shingarov
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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