[gem5-dev] Change in gem5/gem5[develop]: arch-power: Fix disassembly for branch instructions

[Boris Shingarov (Gerrit) via gem5-dev]

Boris Shingarov has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40888 )


Change subject: arch-power: Fix disassembly for branch instructions
..

arch-power: Fix disassembly for branch instructions

This fixes disassembly generated for branch instructions
based on the AA and LK bits which determine how the target
address is calculated and whether a return address needs
to be set implicitly or not.

Change-Id: I1acba72c360a1fcb4691de17fbae1a012a752dbe
Signed-off-by: Sandipan Das 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40888
Reviewed-by: Boris Shingarov 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
M src/arch/power/insts/branch.cc
1 file changed, 30 insertions(+), 5 deletions(-)

Approvals:
  Boris Shingarov: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/power/insts/branch.cc b/src/arch/power/insts/branch.cc
index 1077f33..1789734 100644
--- a/src/arch/power/insts/branch.cc
+++ b/src/arch/power/insts/branch.cc
@@ -67,7 +67,16 @@
 std::stringstream ss;
 Addr target;

-ccprintf(ss, "%-10s ", mnemonic);
+// Generate correct mnemonic
+std::string myMnemonic(mnemonic);
+std::string suffix;
+
+// Additional characters depending on isa bits being set
+if (lk)
+suffix += "l";
+if (aa)
+suffix += "a";
+ccprintf(ss, "%-10s ", myMnemonic + suffix);

 if (aa)
 target = li;
@@ -102,10 +111,19 @@
 std::stringstream ss;
 Addr target;

-ccprintf(ss, "%-10s ", mnemonic);
+// Generate the correct mnemonic
+std::string myMnemonic(mnemonic);
+std::string suffix;
+
+// Additional characters depending on isa bits being set
+if (lk)
+suffix += "l";
+if (aa)
+suffix += "a";
+ccprintf(ss, "%-10s ", myMnemonic + suffix);

 // Print BI and BO fields
-ss << bi << ", " << bo << ", ";
+ss << (int) bi << ", " << (int) bo << ", ";

 if (aa)
 target = bd;
@@ -136,10 +154,17 @@
 {
 std::stringstream ss;

-ccprintf(ss, "%-10s ", mnemonic);
+// Generate the correct mnemonic
+std::string myMnemonic(mnemonic);
+std::string suffix;
+
+// Additional characters depending on isa bits being set
+if (lk)
+suffix += "l";
+ccprintf(ss, "%-10s ", myMnemonic + suffix);

 // Print the BI and BO fields
-ss << bi << ", " << bo;
+ss << (int) bi << ", " << (int) bo;

 return ss.str();
 }

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I1acba72c360a1fcb4691de17fbae1a012a752dbe
Gerrit-Change-Number: 40888
Gerrit-PatchSet: 6
Gerrit-Owner: Sandipan Das 
Gerrit-Reviewer: Boris Shingarov 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: arch-power: Fix disassembly for branch instructions

[Sandipan Das (Gerrit) via gem5-dev]

Sandipan Das has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40888 )



Change subject: arch-power: Fix disassembly for branch instructions
..

arch-power: Fix disassembly for branch instructions

This fixes disassembly generated for branch instructions
based on the AA and LK bits which determine how the target
address is calculated and whether a return address needs
to be set implicitly or not.

Change-Id: I1acba72c360a1fcb4691de17fbae1a012a752dbe
Signed-off-by: Sandipan Das 
---
M src/arch/power/insts/branch.cc
1 file changed, 19 insertions(+), 2 deletions(-)



diff --git a/src/arch/power/insts/branch.cc b/src/arch/power/insts/branch.cc
index 26a3c74..3747bf1 100644
--- a/src/arch/power/insts/branch.cc
+++ b/src/arch/power/insts/branch.cc
@@ -71,7 +71,13 @@
 std::stringstream ss;
 Addr target;

-ccprintf(ss, "%-10s ", mnemonic);
+// Generate correct mnemonic
+std::string myMnemonic(mnemonic);
+
+// Additional characters depending on isa bits being set
+if (lkSet) myMnemonic = myMnemonic + "l";
+if (aaSet) myMnemonic = myMnemonic + "a";
+ccprintf(ss, "%-10s ", myMnemonic);

 if (aaSet) {
 target = disp;
@@ -107,7 +113,13 @@
 std::stringstream ss;
 Addr target;

-ccprintf(ss, "%-10s ", mnemonic);
+// Generate the correct mnemonic
+std::string myMnemonic(mnemonic);
+
+// Additional characters depending on isa bits being set
+if (lkSet) myMnemonic = myMnemonic + "l";
+if (aaSet) myMnemonic = myMnemonic + "a";
+ccprintf(ss, "%-10s ", myMnemonic);

 // Print BI and BO fields
 ss << crBit << ", " << opts << ", ";
@@ -142,6 +154,11 @@
 {
 std::stringstream ss;

+// Generate the correct mnemonic
+std::string myMnemonic(mnemonic);
+
+// Additional characters depending on isa bits being set
+if (lkSet) myMnemonic = myMnemonic + "l";
 ccprintf(ss, "%-10s ", mnemonic);

 // Print the BI and BO fields

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/40888
To unsubscribe, or for help writing mail filters, visit  
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I1acba72c360a1fcb4691de17fbae1a012a752dbe
Gerrit-Change-Number: 40888
Gerrit-PatchSet: 1
Gerrit-Owner: Sandipan Das 
Gerrit-MessageType: newchange
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