Re: [gem5-dev] Review Request 3796: misc: Clean up and complete the gem5<->SystemC-TLM bridge [7/6]
--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3796/#review9374 --- Ship it! Ship It! - Matthias Jung On Jan. 30, 2017, 4:13 nachm., Christian Menard wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3796/ > --- > > (Updated Jan. 30, 2017, 4:13 nachm.) > > > Review request for Default. > > > Repository: gem5 > > > Description > --- > > Changeset 11800:b5ad6c483119 > --- > misc: Clean up and complete the gem5<->SystemC-TLM bridge [7/6] > > The current TLM bridge only provides a Slave Port that allows the gem5 world > to > send request to the SystemC world. This patch series refractors and cleans up > the existing code, and adds a Master Port that allows the SystemC world to > send > requests to the gem5 world. > > This patch: > * Implement 'pipe through' for gem5 Packets (see explanation below) > > Basically, this patch ensures that all transactions that originated in the > gem5 > world are converted back to the original packet when entering the gem5 world. > So far, this only worked for packets that are responded to by a SyctemC > component (e.g. when a gem5 CPU sends a request to a SystemC memory). By > implementing the 'pipe through' this patch ensures, that packets that are > responded to by a gem5 component (e.g. when a gem5 CPU sends a request to a > gem5 memory via a SystemC interconnect) are handled properly. > > > Diffs > - > > util/tlm/sc_ext.hh c10c50cb8ac9 > util/tlm/sc_ext.cc c10c50cb8ac9 > util/tlm/sc_master_port.hh PRE-CREATION > util/tlm/sc_master_port.cc PRE-CREATION > util/tlm/sc_slave_port.cc PRE-CREATION > > Diff: http://reviews.gem5.org/r/3796/diff/ > > > Testing > --- > > > Thanks, > > Christian Menard > > ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] Review Request 3796: misc: Clean up and complete the gem5<->SystemC-TLM bridge [7/6]
> On Feb. 1, 2017, 1:29 p.m., Andreas Hansson wrote: > > It would be tremendously helpful if we could get some regressions tests, > > but until core SystemC is available with Apache v2 (which supposedly should > > happen) I do not see a good way. Any thoughts? Actually, I noticed that the systemc2.3.1a download is actually updated to Apache v2. I am tempted to suggest we include it in gem5's ext/ directory, which would also enable us to integrate the systemc builds into regressions. What do you think? Is anyone happy to give it a go? - Andreas --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3796/#review9361 --- On Jan. 30, 2017, 4:13 p.m., Christian Menard wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3796/ > --- > > (Updated Jan. 30, 2017, 4:13 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > --- > > Changeset 11800:b5ad6c483119 > --- > misc: Clean up and complete the gem5<->SystemC-TLM bridge [7/6] > > The current TLM bridge only provides a Slave Port that allows the gem5 world > to > send request to the SystemC world. This patch series refractors and cleans up > the existing code, and adds a Master Port that allows the SystemC world to > send > requests to the gem5 world. > > This patch: > * Implement 'pipe through' for gem5 Packets (see explanation below) > > Basically, this patch ensures that all transactions that originated in the > gem5 > world are converted back to the original packet when entering the gem5 world. > So far, this only worked for packets that are responded to by a SyctemC > component (e.g. when a gem5 CPU sends a request to a SystemC memory). By > implementing the 'pipe through' this patch ensures, that packets that are > responded to by a gem5 component (e.g. when a gem5 CPU sends a request to a > gem5 memory via a SystemC interconnect) are handled properly. > > > Diffs > - > > util/tlm/sc_ext.hh c10c50cb8ac9 > util/tlm/sc_ext.cc c10c50cb8ac9 > util/tlm/sc_master_port.hh PRE-CREATION > util/tlm/sc_master_port.cc PRE-CREATION > util/tlm/sc_slave_port.cc PRE-CREATION > > Diff: http://reviews.gem5.org/r/3796/diff/ > > > Testing > --- > > > Thanks, > > Christian Menard > > ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Review Request 3796: misc: Clean up and complete the gem5<->SystemC-TLM bridge [7/6]
--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3796/ --- Review request for Default. Repository: gem5 Description --- Changeset 11800:b5ad6c483119 --- misc: Clean up and complete the gem5<->SystemC-TLM bridge [7/6] The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Implement 'pipe through' for gem5 Packets (see explanation below) Basically, this patch ensures that all transactions that originated in the gem5 world are converted back to the original packet when entering the gem5 world. So far, this only worked for packets that are responded to by a SyctemC component (e.g. when a gem5 CPU sends a request to a SystemC memory). By implementing the 'pipe through' this patch ensures, that packets that are responded to by a gem5 component (e.g. when a gem5 CPU sends a request to a gem5 memory via a SystemC interconnect) are handled properly. Diffs - util/tlm/sc_ext.hh c10c50cb8ac9 util/tlm/sc_ext.cc c10c50cb8ac9 util/tlm/sc_master_port.hh PRE-CREATION util/tlm/sc_master_port.cc PRE-CREATION util/tlm/sc_slave_port.cc PRE-CREATION Diff: http://reviews.gem5.org/r/3796/diff/ Testing --- Thanks, Christian Menard ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
