date:20170814

Re: [gem5-users] L2 cache partitioning

2017-08-14 Thread Farshchi, Farzad

Hi all,



I made a patch to enable L2 cache partitioning on gem5. Please find it at 
https://github.com/farzadfch/gem5-cache-partitioning



I wrote this code a while ago and I wanted to make it more flexible and 
implement it on a later version of gem5 before making it publicly available, 
but this has not happened so far therefore, I decided to release it anyway. I 
believe it can be still useful for someone who wants to implement cache 
partitioning on gem5. More explanations about using this patch are given in the 
readme next to it.



Cheers,

Farzad



>

Hi,



Have a look at src/mem/cache/tags/base_set_assoc.{hh,cc}



You will find that there is already functionality to restrict the

allocation to certain set indices (allocAssoc) for any access. It

shouldn't be too hard extending this to do what you want.



Please do post the patches once you have something working.



Andreas



On 23/02/2016, 23:33, "gem5-users on behalf of Farzad Farshchi"

 wrote:



>Andreas Hansson  arm.com> writes:

>

>>

>>

>> Hi Prathap,

>>

>> We have some patches to restrict way allocation in the cache itself

>>(not

>per core though). You can probably use that as a starting point. I'm

>afraid

>beyond that you will need to add the appropriate functionality to look at

>e.g. masterId and decide on a

>>  way. I'll try and get those patches posted in the next few days.

>>

>> Andreas

>>

>>

>>

>> From: Prathap Kolakkampadath  gmail.com>Reply-To: gem5

>users mailing list  gem5.org>Date: Monday, 8 June 2015

>17:29To: gem5 users mailing list  gem5.org>Subject: [gem5-

>users] L2 cache partitioning

>>

>>

>>

>> Dear Users,

>>

>> I am using ARM Full System configuration, where L2 is 8-way set

>associative shared Last Level Cache. I am trying to partition the L2

>cache

>by

>> ways among four cores, so that each core gets two ways.

>>

>> Is there a hardware support(configuration register) available to do

>>this?

>If not can anyone throw some pointers to achieve way partitioning.

>>

>> Thanks in advance.

>>

>> Prathap

>>

>>

>>

>> -- IMPORTANT NOTICE: The contents of this email and any attachments are

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>>  to any other person, use it for any purpose, or store or copy the

>information in any medium. Thank you.

>> ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ,

>Registered in England & Wales, Company No: 2557590

>> ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1

>>9NJ,

>Registered in England & Wales, Company No: 2548782

>>

>>

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>

>Hi Andreas,

>

>I am also looking for the same feature in gem5. I was wondering if you

>have

>posted your patches. If you did, can you please give me a pointer to them?

>

>Thanks,

>Farzad

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[gem5-users] [gem5-user] building error the latest version of gem5 on CentOS6.9

2017-08-14 Thread 김성규

Hi all.
I'm having a hard time due to scons building errors. Thanks in advance for your 
help!I am using CentOS 6.9, gcc 4.9.2, python 2.7.12 and swig 3.0.12.When I was 
typed "scons build/ARM/gem5.opt", The build aborts with the following error:
scons: Building targets ...
 [NEW DEPS] ARM/arch/arm/generated/inc.d - arm-deps
 [ENVIRONS] arm-deps - arm-environs
 [ CXX] ARM/sim/main.cc - .o
In file included from ext/pybind11/include/pybind11/cast.h:13:0,
 from ext/pybind11/include/pybind11/attr.h:13,
 from ext/pybind11/include/pybind11/pybind11.h:36,
 from build/ARM/sim/init.hh:46,
 from build/ARM/sim/main.cc:33:
ext/pybind11/include/pybind11/pytypes.h: In member function 'bool 
pybind11::capsule::check() const':
ext/pybind11/include/pybind11/pytypes.h:681:78: error: 'PyCapsule_CheckExact' 
was not declared in this scope
 bool check() const { return m_ptr != nullptr  (bool) 
CheckFun(m_ptr); } \
  ^
ext/pybind11/include/pybind11/pytypes.h:690:5: note: in expansion of macro 
'PYBIND11_OBJECT_COMMON'
 PYBIND11_OBJECT_COMMON(Name, Parent, CheckFun) \
 ^
ext/pybind11/include/pybind11/pytypes.h:696:5: note: in expansion of macro 
'PYBIND11_OBJECT'
 PYBIND11_OBJECT(Name, Parent, CheckFun) \
 ^
ext/pybind11/include/pybind11/pytypes.h:1004:5: note: in expansion of macro 
'PYBIND11_OBJECT_DEFAULT'
 PYBIND11_OBJECT_DEFAULT(capsule, object, PyCapsule_CheckExact)
 ^
ext/pybind11/include/pybind11/pytypes.h: In static member function 'static bool 
pybind11::capsule::check_(pybind11::handle)':
ext/pybind11/include/pybind11/pytypes.h:682:85: error: 'PyCapsule_CheckExact' 
was not declared in this scope
 static bool check_(handle h) { return h.ptr() != nullptr  
CheckFun(h.ptr()); }

 ^
ext/pybind11/include/pybind11/pytypes.h:690:5: note: in expansion of macro 
'PYBIND11_OBJECT_COMMON'
 PYBIND11_OBJECT_COMMON(Name, Parent, CheckFun) \
 ^
ext/pybind11/include/pybind11/pytypes.h:696:5: note: in expansion of macro 
'PYBIND11_OBJECT'
 PYBIND11_OBJECT(Name, Parent, CheckFun) \
 ^
ext/pybind11/include/pybind11/pytypes.h:1004:5: note: in expansion of macro 
'PYBIND11_OBJECT_DEFAULT'
 PYBIND11_OBJECT_DEFAULT(capsule, object, PyCapsule_CheckExact)
 ^
In file included from ext/pybind11/include/pybind11/cast.h:13:0,
 from ext/pybind11/include/pybind11/attr.h:13,
 from ext/pybind11/include/pybind11/pybind11.h:36,
 from build/ARM/sim/init.hh:46,
 from build/ARM/sim/main.cc:33:
ext/pybind11/include/pybind11/pytypes.h: In constructor 
'pybind11::capsule::capsule(const void*)':
ext/pybind11/include/pybind11/pytypes.h:1009:75: error: 'PyCapsule_New' was not 
declared in this scope
 : object(PyCapsule_New(const_castvoid *(value), nullptr, 
nullptr), stolen) {
   ^
ext/pybind11/include/pybind11/pytypes.h: In constructor 
'pybind11::capsule::capsule(const void*, void (*)(PyObject*))':
ext/pybind11/include/pybind11/pytypes.h:1016:75: error: 'PyCapsule_New' was not 
declared in this scope
 : object(PyCapsule_New(const_castvoid*(value), nullptr, 
destruct), stolen) {
   ^
ext/pybind11/include/pybind11/pytypes.h: In lambda function:
ext/pybind11/include/pybind11/pytypes.h:1023:88: error: 'PyCapsule_GetContext' 
was not declared in this scope
 auto destructor = reinterpret_castvoid (*)(void 
*)(PyCapsule_GetContext(o));

^
ext/pybind11/include/pybind11/pytypes.h:1024:56: error: 'PyCapsule_GetPointer' 
was not declared in this scope
 void *ptr = PyCapsule_GetPointer(o, nullptr);
^
ext/pybind11/include/pybind11/pytypes.h: In constructor 
'pybind11::capsule::capsule(const void*, void (*)(void*))':
ext/pybind11/include/pybind11/pytypes.h:1026:10: error: 'PyCapsule_New' was not 
declared in this scope
 });
  ^
ext/pybind11/include/pybind11/pytypes.h:1031:60: error: 'PyCapsule_SetContext' 
was not declared in this scope
 if (PyCapsule_SetContext(m_ptr, (void *) destructor) != 0)
^
ext/pybind11/include/pybind11/pytypes.h: In lambda function:
ext/pybind11/include/pybind11/pytypes.h:1037:91: error: 'PyCapsule_GetPointer' 
was not declared in this scope
 auto destructor = reinterpret_castvoid 
(*)()(PyCapsule_GetPointer(o, nullptr));

   ^
ext/pybind11/include/pybind11/pytypes.h: In constructor

Re: [gem5-users] use_kvm.hh

2017-08-14 Thread Nidhi Kamath

Thank You.

The issue got resolved.

"USE_KVM" was missing from export_vars in gem5_dir/src/SConscript. Adding
it there, helped the build complete successfully.

Regards
Nidhi

On Thu, Aug 10, 2017 at 4:01 PM, Serhat Gesoglu <
serhat.geso...@manchester.ac.uk> wrote:

> Hello,
> Not sure what could have caused the error. Which patches did you apply if
> I may ask?
>
> The file is supposed to be created by gem5_dir/SConstruct. You can see
> "USE_KVM" there and export_vars in gem5_dir/src/SConscript. It only
> contains one line which, for my case, "#define USE_KVM 0".
>
> https://gem5.googlesource.com/public/gem5/+/master/SConstruct#1295
> https://gem5.googlesource.com/public/gem5/+/master/src/SConscript#361
>
> Cheers
> Serhat Gesoglu
> 
> From: gem5-users [gem5-users-boun...@gem5.org] on behalf of Nidhi Kamath [
> nidhikamat...@gmail.com]
> Sent: 09 August 2017 21:33
> To: gem5 users mailing list
> Subject: Re: [gem5-users] use_kvm.hh
>
> Yes,
>
> I am using the latest version gem5 git repository.
>
> I installed it and successfully build it. After which I applied a patch on
> it which is when i am getting the issue.
>
> That is why I wanted to know how exactly is the file generated and from
> where.
>
> Can you explain more about the cleanup?
>
> Regards
> Nidhi
>
> On Aug 9, 2017 10:30 PM, "Serhat Gesoglu"  > wrote:
> Hello,
> The file should be created by scons. I just did a clean clone and build,
> and the aforementioned file was created without any problems. Are you using
> the latest version of gem5? Can you try rebuilding again?
>
> Cheers
> Serhat Gesoglu
> 
> From: gem5-users [gem5-users-boun...@gem5.org gem5.org>] on behalf of Nidhi Kamath [nidhikamat...@gmail.com nidhikamat...@gmail.com>]
> Sent: 09 August 2017 18:55
> To: gem5 users mailing list
> Subject: Re: [gem5-users] use_kvm.hh
>
> Hello,
>
> Yes. But it is not getting generated automatically during build and hence
> the system.cc file throws an error saying it cannot find that file.
>
> Can you tell me what exactly generates this file?
>
> Regards
> Nidhi
>
> On Aug 9, 2017 5:14 PM, "Serhat Gesoglu"   t.geso...@manchester.ac.uk>>
> wrote:
> Hello,
> It is an automatically created file, after building a system you can find
> this file in gem5_dir/build/[arch]/config/
>
> Hope this helps.
>
> Serhat Gesoglu
> 
> From: gem5-users [gem5-users-boun...@gem5.org gem5.org> users-boun...@gem5.org>>] on behalf of Nidhi Kamath [
> nidhikamat...@gmail.com nidhikamat...@gmail.com>]
> Sent: 09 August 2017 15:30
> To: gem5 users mailing list
> Subject: [gem5-users] use_kvm.hh
>
> Hello,
>
> In the new gem5 git repository , the file system.cc in src/sim uses the
> file
> #include "config/use_kvm.hh".
>
> I cannot find this file in any location. What does this file and where can
> I find it?
>
> Regards
> Nidhi
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>
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[gem5-users] A strange thing was found when simulating using different frequencies for each multiple CPU.

2017-08-14 Thread rty e

Dear all

I simulated different benchmarks of Spec CPU2006 by giving different
frequencies to each of 8 CPUs.

By simply modifying the file 'se.py' as shown below, I could give each CPU
a different frequency.

-
i = 0
num = '1.27' # CPU0 freq

# All cpus belong to a common cpu_clk_domain, therefore running at a common
# frequency.
for cpu in system.cpu:
freq = num + 'GHz'
print freq
system.cpu_clk_domain_fs = SrcClockDomain(clock = freq,
   voltage_domain =
   system.cpu_voltage_domain)
if i == 0 :
num = '0.86' # CPU1 freq
if i == 1 :
num = '0.51' # CPU2 freq
if i == 2 :
num = '2.13' # CPU3 freq
if i == 3 :
num = '3.1' # CPU4 freq
if i == 4 :
num = '2.6' # CPU5 freq
if i == 5 :
num = '4' # CPU6 freq
if i == 6 :
num = '2.59' # CPU7 freq

i = i + 1

cpu.clk_domain = system.cpu_clk_domain_fs


I also simulated when 8 CPUs had the same frequency of 4 GHz.

A strange point was found when comparing the results of two simulations.

When the frequencies of 4GHz and 1.27GHz were applied to the same core, the
'numCycles' (number of cpu cycles simulated) was 352,523,502 and
115,626,606 respectively.

I think, the 'numCycles' seems to have an appropriate value proportional to
frequency.

However, the value of each 'committedInsts' (Number of Instructions
Simulated) was 26,958,308 and 52,761,444, and the lower frequency was
higher. (Int insts, fp_insts, commit.branches, branchMispredicts,
commit.loads  etc. were also higher in the lower frequencies.)

Moreover, values of other int, fp instruction, or values of int,
fp_alu_accesses, etc. are higher in the lower frequency.

I think there is definitely a problem with the value coming out like this.

I checked the 'config.ini' file and thought that the frequency was entered
correctly.

I also checked the source files to see how the value of the problem
parameter increases.

But I could not figure out why this was happening.

If you are aware of the cause of these problems, please let me know how I
can solve this problem.

Thanks for reading.
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Re: [gem5-users] L2 cache partitioning

[gem5-users] [gem5-user] building error the latest version of gem5 on CentOS6.9

Re: [gem5-users] use_kvm.hh

[gem5-users] A strange thing was found when simulating using different frequencies for each multiple CPU.

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