Re: [gem5-users] Warm up instructions in gem5

2019-11-25 Thread Abhishek Singh
Yes, just use that, flag is designed to warmup or to bypass the booting
process.

On Mon, Nov 25, 2019 at 9:58 PM Charitha Saumya 
wrote:

>   -F FAST_FORWARD, --fast-forward=FAST_FORWARD
> Number of instructions to fast forward before
> switching
>
> I am not sure fast forward can help me here.
>
>
>
> On Mon, Nov 25, 2019 at 9:55 PM Abhishek Singh <
> abhishek.singh199...@gmail.com> wrote:
>
>>
>> Is there any flag called “fast forward”?
>>
>> On Mon, Nov 25, 2019 at 9:53 PM Charitha Saumya 
>> wrote:
>>
>>> No. -s means
>>>   -s STANDARD_SWITCH, --standard-switch=STANDARD_SWITCH
>>> switch from timing to Detailed CPU after warmup
>>> period
>>> of 
>>> But I am still not convinces all these flags are functional. Can someone
>>> confirm gem5 supports this flag? and what CPU models are used before and
>>> after switch?
>>>
>>> Thanks
>>>
>>>
>>>
>>> On Mon, Nov 25, 2019 at 9:50 PM Abhishek Singh <
>>> abhishek.singh199...@gmail.com> wrote:
>>>
 If -s flag means fast forward then it’s correct.
 Check the correct flags using ./build/X86/gem5.opt config/example/se.py
 -h

 On Mon, Nov 25, 2019 at 9:46 PM Charitha Saumya <
 saumyachari...@gmail.com> wrote:

> Hi,
>
> I want to run my x86 binary for 300M  instructions from which 100M
> will be for warming up the caches. I also want to use DerivO3CPU model for
> my simulation. What is the correct way to do this? And what determines
> which CPU model will be used for warmup and non-warmup portions? For
> example AtomicSimple for warmup and DerivO3 for non-warmup cycles?
>
> Currently I am using ,
> ./build/X86/gem5.opt configs/example/se.py \
> --cmd=./tests/test-progs/simple/simple32 \
> --cpu-type=DerivO3CPU \
> --caches --l2cache \
> --l2_size='256kB' \
> --l1d_size='16kB' \
> --l1i_size='16kB' \
> -s 1 \
> -I 3
>
> Can someone confirm what I did was correct?
>
> Thanks,
> Charitha
> ___
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Re: [gem5-users] Warm up instructions in gem5

2019-11-25 Thread Charitha Saumya
  -F FAST_FORWARD, --fast-forward=FAST_FORWARD
Number of instructions to fast forward before
switching

I am not sure fast forward can help me here.



On Mon, Nov 25, 2019 at 9:55 PM Abhishek Singh <
abhishek.singh199...@gmail.com> wrote:

>
> Is there any flag called “fast forward”?
>
> On Mon, Nov 25, 2019 at 9:53 PM Charitha Saumya 
> wrote:
>
>> No. -s means
>>   -s STANDARD_SWITCH, --standard-switch=STANDARD_SWITCH
>> switch from timing to Detailed CPU after warmup
>> period
>> of 
>> But I am still not convinces all these flags are functional. Can someone
>> confirm gem5 supports this flag? and what CPU models are used before and
>> after switch?
>>
>> Thanks
>>
>>
>>
>> On Mon, Nov 25, 2019 at 9:50 PM Abhishek Singh <
>> abhishek.singh199...@gmail.com> wrote:
>>
>>> If -s flag means fast forward then it’s correct.
>>> Check the correct flags using ./build/X86/gem5.opt config/example/se.py
>>> -h
>>>
>>> On Mon, Nov 25, 2019 at 9:46 PM Charitha Saumya <
>>> saumyachari...@gmail.com> wrote:
>>>
 Hi,

 I want to run my x86 binary for 300M  instructions from which 100M will
 be for warming up the caches. I also want to use DerivO3CPU model for my
 simulation. What is the correct way to do this? And what determines which
 CPU model will be used for warmup and non-warmup portions? For example
 AtomicSimple for warmup and DerivO3 for non-warmup cycles?

 Currently I am using ,
 ./build/X86/gem5.opt configs/example/se.py \
 --cmd=./tests/test-progs/simple/simple32 \
 --cpu-type=DerivO3CPU \
 --caches --l2cache \
 --l2_size='256kB' \
 --l1d_size='16kB' \
 --l1i_size='16kB' \
 -s 1 \
 -I 3

 Can someone confirm what I did was correct?

 Thanks,
 Charitha
 ___
 gem5-users mailing list
 gem5-users@gem5.org
 http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
>>>
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Re: [gem5-users] Warm up instructions in gem5

2019-11-25 Thread Abhishek Singh
Is there any flag called “fast forward”?

On Mon, Nov 25, 2019 at 9:53 PM Charitha Saumya 
wrote:

> No. -s means
>   -s STANDARD_SWITCH, --standard-switch=STANDARD_SWITCH
> switch from timing to Detailed CPU after warmup
> period
> of 
> But I am still not convinces all these flags are functional. Can someone
> confirm gem5 supports this flag? and what CPU models are used before and
> after switch?
>
> Thanks
>
>
>
> On Mon, Nov 25, 2019 at 9:50 PM Abhishek Singh <
> abhishek.singh199...@gmail.com> wrote:
>
>> If -s flag means fast forward then it’s correct.
>> Check the correct flags using ./build/X86/gem5.opt config/example/se.py -h
>>
>> On Mon, Nov 25, 2019 at 9:46 PM Charitha Saumya 
>> wrote:
>>
>>> Hi,
>>>
>>> I want to run my x86 binary for 300M  instructions from which 100M will
>>> be for warming up the caches. I also want to use DerivO3CPU model for my
>>> simulation. What is the correct way to do this? And what determines which
>>> CPU model will be used for warmup and non-warmup portions? For example
>>> AtomicSimple for warmup and DerivO3 for non-warmup cycles?
>>>
>>> Currently I am using ,
>>> ./build/X86/gem5.opt configs/example/se.py \
>>> --cmd=./tests/test-progs/simple/simple32 \
>>> --cpu-type=DerivO3CPU \
>>> --caches --l2cache \
>>> --l2_size='256kB' \
>>> --l1d_size='16kB' \
>>> --l1i_size='16kB' \
>>> -s 1 \
>>> -I 3
>>>
>>> Can someone confirm what I did was correct?
>>>
>>> Thanks,
>>> Charitha
>>> ___
>>> gem5-users mailing list
>>> gem5-users@gem5.org
>>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
>>
>> ___
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Re: [gem5-users] Warm up instructions in gem5

2019-11-25 Thread Charitha Saumya
No. -s means
  -s STANDARD_SWITCH, --standard-switch=STANDARD_SWITCH
switch from timing to Detailed CPU after warmup
period
of 
But I am still not convinces all these flags are functional. Can someone
confirm gem5 supports this flag? and what CPU models are used before and
after switch?

Thanks



On Mon, Nov 25, 2019 at 9:50 PM Abhishek Singh <
abhishek.singh199...@gmail.com> wrote:

> If -s flag means fast forward then it’s correct.
> Check the correct flags using ./build/X86/gem5.opt config/example/se.py -h
>
> On Mon, Nov 25, 2019 at 9:46 PM Charitha Saumya 
> wrote:
>
>> Hi,
>>
>> I want to run my x86 binary for 300M  instructions from which 100M will
>> be for warming up the caches. I also want to use DerivO3CPU model for my
>> simulation. What is the correct way to do this? And what determines which
>> CPU model will be used for warmup and non-warmup portions? For example
>> AtomicSimple for warmup and DerivO3 for non-warmup cycles?
>>
>> Currently I am using ,
>> ./build/X86/gem5.opt configs/example/se.py \
>> --cmd=./tests/test-progs/simple/simple32 \
>> --cpu-type=DerivO3CPU \
>> --caches --l2cache \
>> --l2_size='256kB' \
>> --l1d_size='16kB' \
>> --l1i_size='16kB' \
>> -s 1 \
>> -I 3
>>
>> Can someone confirm what I did was correct?
>>
>> Thanks,
>> Charitha
>> ___
>> gem5-users mailing list
>> gem5-users@gem5.org
>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
>
> ___
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Re: [gem5-users] Warm up instructions in gem5

2019-11-25 Thread Abhishek Singh
If -s flag means fast forward then it’s correct.
Check the correct flags using ./build/X86/gem5.opt config/example/se.py -h

On Mon, Nov 25, 2019 at 9:46 PM Charitha Saumya 
wrote:

> Hi,
>
> I want to run my x86 binary for 300M  instructions from which 100M will be
> for warming up the caches. I also want to use DerivO3CPU model for my
> simulation. What is the correct way to do this? And what determines which
> CPU model will be used for warmup and non-warmup portions? For example
> AtomicSimple for warmup and DerivO3 for non-warmup cycles?
>
> Currently I am using ,
> ./build/X86/gem5.opt configs/example/se.py \
> --cmd=./tests/test-progs/simple/simple32 \
> --cpu-type=DerivO3CPU \
> --caches --l2cache \
> --l2_size='256kB' \
> --l1d_size='16kB' \
> --l1i_size='16kB' \
> -s 1 \
> -I 3
>
> Can someone confirm what I did was correct?
>
> Thanks,
> Charitha
> ___
> gem5-users mailing list
> gem5-users@gem5.org
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[gem5-users] Warm up instructions in gem5

2019-11-25 Thread Charitha Saumya
Hi,

I want to run my x86 binary for 300M  instructions from which 100M will be
for warming up the caches. I also want to use DerivO3CPU model for my
simulation. What is the correct way to do this? And what determines which
CPU model will be used for warmup and non-warmup portions? For example
AtomicSimple for warmup and DerivO3 for non-warmup cycles?

Currently I am using ,
./build/X86/gem5.opt configs/example/se.py \
--cmd=./tests/test-progs/simple/simple32 \
--cpu-type=DerivO3CPU \
--caches --l2cache \
--l2_size='256kB' \
--l1d_size='16kB' \
--l1i_size='16kB' \
-s 1 \
-I 3

Can someone confirm what I did was correct?

Thanks,
Charitha
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[gem5-users] Difference cpu clock and sys clock

2019-11-25 Thread Nikos Giakoumoglou
What is the difference in cpu and sys clock? 
Can’t figure it out from any file 

NG
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Re: [gem5-users] statistics for each cycle(Tick)

2019-11-25 Thread Francisco Carlos
I would suggest implementing these counters in the tick() function in the 
src/cpu/o3/cpu.cc file because this method is called every cycle. However, I am 
not an expert in the cache code from gem5, therefore i don't know how to access 
information from MSHR. Additionally, I believe you should implement the logic 
in the src/mem/cache/cache.cc and, in the tick method(), just called this 
function that implements this logic to get information from MSHR.



--
Francisco Carlos Silva Junior
Ph.D. student



De: gem5-users  em nome de Rosen Lu 

Enviado: segunda-feira, 25 de novembro de 2019 16:18
Para: gem5 users mailing list 
Assunto: Re: [gem5-users] statistics for each cycle(Tick)

Hello Carlos,

Yes O3CPU.

Francisco Carlos mailto:juninho.u...@hotmail.com>> 
于2019年11月25日周一 下午12:55写道:
Hello, Rosen

Which CPU model are you using? O3CPU?

--
Francisco Carlos Silva Junior
Ph.D. student



De: gem5-users 
mailto:gem5-users-boun...@gem5.org>> em nome de 
Rosen Lu mailto:wisdom@gmail.com>>
Enviado: segunda-feira, 25 de novembro de 2019 15:39
Para: gem5 users mailing list mailto:gem5-users@gem5.org>>
Assunto: [gem5-users] statistics for each cycle(Tick)

Hello,

I want to implement two functions, these two functions need to be called every 
cycle(Tick). The first function needs to return the number of outstanding 
demand misses in MSHR, it shows the total number of misses in MSHR for each 
cycle. The second function needs to return the number of hits occur in each 
cycle, if no hits in that cycle, it will return 0.

I need the cycle information, so these functions need to be called every cycle 
and get statistics. I want to know how to implement these functions in gem5, 
can I implement the logic in src/mem/cache/cache.cc?

Any ideas or suggestions for implementing would be helpful.

Thank you very much.

Rosen
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Re: [gem5-users] statistics for each cycle(Tick)

2019-11-25 Thread Rosen Lu
Hello Carlos,

Yes O3CPU.

Francisco Carlos  于2019年11月25日周一 下午12:55写道:

> Hello, Rosen
>
> Which CPU model are you using? O3CPU?
>
>
> --
> Francisco Carlos Silva Junior
> Ph.D. student
>
>
> --
> *De:* gem5-users  em nome de Rosen Lu <
> wisdom@gmail.com>
> *Enviado:* segunda-feira, 25 de novembro de 2019 15:39
> *Para:* gem5 users mailing list 
> *Assunto:* [gem5-users] statistics for each cycle(Tick)
>
> Hello,
>
> I want to implement two functions, these two functions need to be called
> every cycle(Tick). The first function needs to return the number of
> outstanding demand misses in MSHR, it shows the total number of misses in
> MSHR for each cycle. The second function needs to return the number of hits
> occur in each cycle, if no hits in that cycle, it will return 0.
>
> I need the cycle information, so these functions need to be called every
> cycle and get statistics. I want to know how to implement these functions
> in gem5, can I implement the logic in src/mem/cache/cache.cc?
>
> Any ideas or suggestions for implementing would be helpful.
>
> Thank you very much.
>
> Rosen
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Re: [gem5-users] statistics for each cycle(Tick)

2019-11-25 Thread Francisco Carlos
Hello, Rosen

Which CPU model are you using? O3CPU?

--
Francisco Carlos Silva Junior
Ph.D. student



De: gem5-users  em nome de Rosen Lu 

Enviado: segunda-feira, 25 de novembro de 2019 15:39
Para: gem5 users mailing list 
Assunto: [gem5-users] statistics for each cycle(Tick)

Hello,

I want to implement two functions, these two functions need to be called every 
cycle(Tick). The first function needs to return the number of outstanding 
demand misses in MSHR, it shows the total number of misses in MSHR for each 
cycle. The second function needs to return the number of hits occur in each 
cycle, if no hits in that cycle, it will return 0.

I need the cycle information, so these functions need to be called every cycle 
and get statistics. I want to know how to implement these functions in gem5, 
can I implement the logic in src/mem/cache/cache.cc?

Any ideas or suggestions for implementing would be helpful.

Thank you very much.

Rosen
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[gem5-users] statistics for each cycle(Tick)

2019-11-25 Thread Rosen Lu
Hello,

I want to implement two functions, these two functions need to be called
every cycle(Tick). The first function needs to return the number of
outstanding demand misses in MSHR, it shows the total number of misses in
MSHR for each cycle. The second function needs to return the number of hits
occur in each cycle, if no hits in that cycle, it will return 0.

I need the cycle information, so these functions need to be called every
cycle and get statistics. I want to know how to implement these functions
in gem5, can I implement the logic in src/mem/cache/cache.cc?

Any ideas or suggestions for implementing would be helpful.

Thank you very much.

Rosen
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Re: [gem5-users] X86 CLFLUSH Flush Cache Line Instruction

2019-11-25 Thread Abhishek Singh
Hey,
You can do that, just go to the decoder code and make the secure flag high

The code should be located at src/arch/x86/isa/

On Mon, Nov 25, 2019 at 11:20 AM Muralidharan K 
wrote:

> Hello,
>
> I am aware that the above instruction has been implemented in the latest
> build of gem5, but wanted to know if we can make changes in Gem5 to only
> allow such instructions to run only in secure processes and with secure
> kernel privileges and not allowed to run in user application mode.
>
> Can we implement such changes in gem5, any ideas/suggestions for
> implementing it would be welcome..
>
> Thanks in advance
>
> Bala
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[gem5-users] X86 CLFLUSH Flush Cache Line Instruction

2019-11-25 Thread Muralidharan K
Hello,

I am aware that the above instruction has been implemented in the latest
build of gem5, but wanted to know if we can make changes in Gem5 to only
allow such instructions to run only in secure processes and with secure
kernel privileges and not allowed to run in user application mode.

Can we implement such changes in gem5, any ideas/suggestions for
implementing it would be welcome..

Thanks in advance

Bala
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