Re: [gem5-users] Impact of using NonCachingSimpleCPU for profiling and creating checkpoints
Great, now I see the reason that they check for non-caching cpu in scripts. We used to use AtomicSimpleCPU and fastmem option for checkpointing, and NonCachingSimpleCPU is a replacement for this. Thanks Daniel and Abhishek, Ali On Sun, Mar 15, 2020 at 8:23 AM Daniel Carvalho wrote: > In particular, the following description seems to be relevant to your > questions: > > "Simple CPU model based on the atomic CPU. Unlike the atomic CPU, this > model causes the memory system to bypass caches and is therefore slightly > faster in some cases. However, its main purpose is as a substitute for > hardware virtualized CPUs when stress-testing the memory system." > > > You can find further details in the commit that introduced > NonCachingSimpleCPU: > https://gem5-review.googlesource.com/c/public/gem5/+/12419 > > > When checkpoints/simpoints are taken, the cache contents are not stored, > therefore it would not matter if you created the checkpoints with them. > Then, when you restore the checkpoints, you must provide the real desired > configuration, which would include the cache hierarchy and your > non-cache-bypassing CPU type. As such, when the checkpoints are restored, > the caches will be empty, so you should provide a warmup period to fill > them. > > > Regards, > > Daniel > Em sábado, 14 de março de 2020 23:04:40 GMT+1, Abhishek Singh < > abhishek.singh199...@gmail.com> escreveu: > > > Hi, > > I do not know the reason for that. But if you want to create simpoints > which will be used by O3CPU, you should use the AtomicSimpleCPU with > "--caches" option and also add "--l2cache" if your O3CPU is using L2 cache. > > Best regards, > > Abhishek > > > On Sat, Mar 14, 2020 at 5:53 PM Ali Hajiabadi > wrote: > > Thanks for your reply. But se.py script checks that the CPU type is > non-caching. Is there a reason for that? Can I ignore those checks? > > On Sun, Mar 15, 2020 at 5:41 AM Abhishek Singh < > abhishek.singh199...@gmail.com> wrote: > > Hi, > I would advise using Atomic Simple Cpu with “—caches” option to create > Simpoints > > > On Sat, Mar 14, 2020 at 5:35 PM Ali Hajiabadi > wrote: > > Hi everyone, > > What is the difference between using NonCachingSimpleCPU > and AtomicSimpleCPU in order to profile and taking simpoints and > checkpoints? I want to use checkpoints to simulate and evaluate my own > modified version of O3 core model. Which CPU type is the best to profile > and take checkpoints? I don't want to bypass caches in my O3 model. > > Also, I am using RISCV implementation of gem5. > > Thanks, > Ali > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Re: [gem5-users] Impact of using NonCachingSimpleCPU for profiling and creating checkpoints
In particular, the following description seems to be relevant to your questions: "Simple CPU model based on the atomic CPU. Unlike the atomic CPU, this model causes the memory system to bypass caches and is therefore slightly faster in some cases. However, its main purpose is as a substitute for hardware virtualized CPUs when stress-testing the memory system." You can find further details in the commit that introduced NonCachingSimpleCPU: https://gem5-review.googlesource.com/c/public/gem5/+/12419 When checkpoints/simpoints are taken, the cache contents are not stored, therefore it would not matter if you created the checkpoints with them. Then, when you restore the checkpoints, you must provide the real desired configuration, which would include the cache hierarchy and your non-cache-bypassing CPU type. As such, when the checkpoints are restored, the caches will be empty, so you should provide a warmup period to fill them. Regards, Daniel Em sábado, 14 de março de 2020 23:04:40 GMT+1, Abhishek Singh escreveu: Hi, I do not know the reason for that. But if you want to create simpoints which will be used by O3CPU, you should use the AtomicSimpleCPU with "--caches" option and also add "--l2cache" if your O3CPU is using L2 cache. Best regards, Abhishek On Sat, Mar 14, 2020 at 5:53 PM Ali Hajiabadi wrote: Thanks for your reply. But se.py script checks that the CPU type is non-caching. Is there a reason for that? Can I ignore those checks? On Sun, Mar 15, 2020 at 5:41 AM Abhishek Singh wrote: Hi,I would advise using Atomic Simple Cpu with “—caches” option to create Simpoints On Sat, Mar 14, 2020 at 5:35 PM Ali Hajiabadi wrote: Hi everyone, What is the difference between using NonCachingSimpleCPU and AtomicSimpleCPU in order to profile and taking simpoints and checkpoints? I want to use checkpoints to simulate and evaluate my own modified version of O3 core model. Which CPU type is the best to profile and take checkpoints? I don't want to bypass caches in my O3 model. Also, I am using RISCV implementation of gem5. Thanks,Ali___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Re: [gem5-users] x86 multi-threaded test application behaviour
Hello Everyone, When I change the gcc/g++ version from 4.8 to 5.5, everything works fine! Best regards, Abhishek On Sat, Mar 14, 2020 at 6:01 PM Abhishek Singh < abhishek.singh199...@gmail.com> wrote: > Hello Everyone, > > I am using gem5-19, I tested > "tests/test-progs/threads/bin/x86/linux/threads" application, when I run > the application using O3CPU and x86 using just one CPU, the application > prints a statement specified in its source file which is > "Validating...Success!" > > The source file can be found in "tests/test-progs/threads/src/". The test > is written by "Jason Lowe-Power". > > When I run using more than 1 o3cpu with the CLI (Command Line) > > ./build/X86/gem5.opt configs/example/se.py -c > tests/test-progs/threads/bin/x86/linux/threads --caches --l2cache > --cpu-type=DerivO3CPU *-n 2* > > The application does not print "Validating...Success!". > My question is in the code, was the validation step performed? > In the code there is the line "delete[] threads;" just before cout << > "Validating..." << flush; > I tried commenting "delete[] threads;" and see the behavior, still > validating cout statement is not shown. Note that when I run the same code > on AtomicSimpleCPU with caches, validating cout statement can be seen. > > Does anyone know about this behavior, if its an error, please let me know, > I can then submit the Jira Issue about it? > > > Best regards, > > Abhishek > ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Re: [gem5-users] Impact of using NonCachingSimpleCPU for profiling and creating checkpoints
Hi, I do not know the reason for that. But if you want to create simpoints which will be used by O3CPU, you should use the AtomicSimpleCPU with "--caches" option and also add "--l2cache" if your O3CPU is using L2 cache. Best regards, Abhishek On Sat, Mar 14, 2020 at 5:53 PM Ali Hajiabadi wrote: > Thanks for your reply. But se.py script checks that the CPU type is > non-caching. Is there a reason for that? Can I ignore those checks? > > On Sun, Mar 15, 2020 at 5:41 AM Abhishek Singh < > abhishek.singh199...@gmail.com> wrote: > >> Hi, >> I would advise using Atomic Simple Cpu with “—caches” option to create >> Simpoints >> >> >> On Sat, Mar 14, 2020 at 5:35 PM Ali Hajiabadi >> wrote: >> >>> Hi everyone, >>> >>> What is the difference between using NonCachingSimpleCPU >>> and AtomicSimpleCPU in order to profile and taking simpoints and >>> checkpoints? I want to use checkpoints to simulate and evaluate my own >>> modified version of O3 core model. Which CPU type is the best to profile >>> and take checkpoints? I don't want to bypass caches in my O3 model. >>> >>> Also, I am using RISCV implementation of gem5. >>> >>> Thanks, >>> Ali >>> ___ >>> gem5-users mailing list >>> gem5-users@gem5.org >>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> >> ___ >> gem5-users mailing list >> gem5-users@gem5.org >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
[gem5-users] x86 multi-threaded test application behaviour
Hello Everyone, I am using gem5-19, I tested "tests/test-progs/threads/bin/x86/linux/threads" application, when I run the application using O3CPU and x86 using just one CPU, the application prints a statement specified in its source file which is "Validating...Success!" The source file can be found in "tests/test-progs/threads/src/". The test is written by "Jason Lowe-Power". When I run using more than 1 o3cpu with the CLI (Command Line) ./build/X86/gem5.opt configs/example/se.py -c tests/test-progs/threads/bin/x86/linux/threads --caches --l2cache --cpu-type=DerivO3CPU *-n 2* The application does not print "Validating...Success!". My question is in the code, was the validation step performed? In the code there is the line "delete[] threads;" just before cout << "Validating..." << flush; I tried commenting "delete[] threads;" and see the behavior, still validating cout statement is not shown. Note that when I run the same code on AtomicSimpleCPU with caches, validating cout statement can be seen. Does anyone know about this behavior, if its an error, please let me know, I can then submit the Jira Issue about it? Best regards, Abhishek ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
[gem5-users] dump stats for every N misses
Hello everyone, I know that we can call periodStatDump() in se.py to dump stats for every N cycles. Now I want to dump starts for every N misses, define the period with the number of misses. Does gem5 has any function to support that? Any ideas or suggestions would be helpful. Thank you very much. Rosen ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Re: [gem5-users] Impact of using NonCachingSimpleCPU for profiling and creating checkpoints
Thanks for your reply. But se.py script checks that the CPU type is non-caching. Is there a reason for that? Can I ignore those checks? On Sun, Mar 15, 2020 at 5:41 AM Abhishek Singh < abhishek.singh199...@gmail.com> wrote: > Hi, > I would advise using Atomic Simple Cpu with “—caches” option to create > Simpoints > > > On Sat, Mar 14, 2020 at 5:35 PM Ali Hajiabadi > wrote: > >> Hi everyone, >> >> What is the difference between using NonCachingSimpleCPU >> and AtomicSimpleCPU in order to profile and taking simpoints and >> checkpoints? I want to use checkpoints to simulate and evaluate my own >> modified version of O3 core model. Which CPU type is the best to profile >> and take checkpoints? I don't want to bypass caches in my O3 model. >> >> Also, I am using RISCV implementation of gem5. >> >> Thanks, >> Ali >> ___ >> gem5-users mailing list >> gem5-users@gem5.org >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Re: [gem5-users] Impact of using NonCachingSimpleCPU for profiling and creating checkpoints
Hi, I would advise using Atomic Simple Cpu with “—caches” option to create Simpoints On Sat, Mar 14, 2020 at 5:35 PM Ali Hajiabadi wrote: > Hi everyone, > > What is the difference between using NonCachingSimpleCPU > and AtomicSimpleCPU in order to profile and taking simpoints and > checkpoints? I want to use checkpoints to simulate and evaluate my own > modified version of O3 core model. Which CPU type is the best to profile > and take checkpoints? I don't want to bypass caches in my O3 model. > > Also, I am using RISCV implementation of gem5. > > Thanks, > Ali > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
[gem5-users] Impact of using NonCachingSimpleCPU for profiling and creating checkpoints
Hi everyone, What is the difference between using NonCachingSimpleCPU and AtomicSimpleCPU in order to profile and taking simpoints and checkpoints? I want to use checkpoints to simulate and evaluate my own modified version of O3 core model. Which CPU type is the best to profile and take checkpoints? I don't want to bypass caches in my O3 model. Also, I am using RISCV implementation of gem5. Thanks, Ali ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
