[gem5-users] Need help in building gem5

[Shivakumar,Raghul via gem5-users]

Hello All,

I am trying to build gem5. I cloned the "stable" branch of gem5 from Github. I 
am getting below errors when trying to build.
What is wrong with my build process? I was able to successfully build gem5 2 
months ago, but now I am getting these errors.
GCC - 5.2.0
SCONS - 3.1.2
[cid:image001.png@01D6AA44.C34E1260]


Thanks,
Raghul S
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[gem5-users] Re: track the write syscall in the kernel

[Matt Sinclair via gem5-users]

Assuming you are asking about SE mode, I think this is what you are looking
for:
https://gem5.googlesource.com/public/gem5/+/refs/heads/develop/src/sim/syscall_emul.hh#2412
?

Matt

On Sat, Oct 24, 2020 at 4:00 PM ABD ALRHMAN ABO ALKHEEL via gem5-users <
gem5-users@gem5.org> wrote:

> Hi All;
>
> I want to track the write syscall in order to do some calculations on the
> written bytes. I just want to know what is the function that does write
> syscall function and how I can the written bytes from it.
>
> Any help would be appreciated.
>
> Thanks
>
> https://github.com/torvalds/linux/blob/master/fs/read_write.c
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[gem5-users] track the write syscall in the kernel

[ABD ALRHMAN ABO ALKHEEL via gem5-users]

Hi All;

I want to track the write syscall in order to do some calculations on the 
written bytes. I just want to know what is the function that does write syscall 
function and how I can the written bytes from it.

Any help would be appreciated.

Thanks

https://github.com/torvalds/linux/blob/master/fs/read_write.c
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[gem5-users] MMIO address range check in allocPhysPages in System

[Tapojyoti Mandal via gem5-users]

Hi,
I am trying to do a custom method of allocating physical address. I found that 
allocPhysPages(int npages) is the one which handles allocating new pages. In 
this function there is this following section of code which check if the 
physical addr provided is in MMIO region or not:

AddrRange m5opRange(0x, 0x1);
if (m5opRange.contains(next_return_addr)) {
warn("Reached m5ops MMIO region\n");
return_addr = 0x;
pagePtr = 0x >> PageShift;
}
I was wondering if I can comment this out to keep my allocation logic simple. 
That is, if I don't handle this MMIO region check would it lead to any kind of 
failure during simulation in SE mode?

Thanks,
Tapojyoti Mandal
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[gem5-users] Re: How to run Python code with TensorFlow in Gem5 syscall emulation mode?

[Dimitrios Chasapis via gem5-users]

Hi,

I have been running keras (python interface for tensorflow)  in Gem5.  
If I understand correctly you want to run a python script in Gem5 from a 
C++ source file, correct?  Gem5 already uses pytbind11 (which is a 
header's only library simplifying embedding python code in C++ and vice 
versa).  Thus, I think you don't need to add any compilation flags etc.  
You can see the documentation here.



Note that you don't need to start or kill the interpreter, I think gem5 
already does that.  The only thing that may cause some issues is to take 
care that both Gem5 and your python libraries link to the same third 
party libraries.  For me these were h5 and protobuff.


For the systemcall I never had this problem, maybe it has to do with the 
specific code you are trying to run?


Hasan, for me it runs both for FS and SE, the code is the same for both 
versions, it shouldn't matter which one you use, but you are right that 
in FS you won't run into the systemcall problem.


Best,

Dimitrios


On 10/23/2020 10:54 PM, Abhishek Singh via gem5-users wrote:

Hi Hasan,
I have been trying to run tensorflow on gem5, have you tried full system?
I was able to run simple python code like hello on it.
Let me know if it works

On Fri, Oct 23, 2020 at 12:28 PM Hasan, S M Shamimul via gem5-users 
mailto:gem5-users@gem5.org>> wrote:


Hello,

* I want to run cosmoGAN code inside Gem5. The cosmoGAN code is
available here (https://github.com/MustafaMustafa/cosmoGAN). The
cosmoGAN code is in Python language, which uses TensorFlow. To run
some code inside the Gem5, I need a binary file of my code. Hence,
how can I run cosmoGAN Python code in the Gem5 syscall emulation mode?

* Earlier, I was interested to know how I can run a simple "Hello
World" code in Gem5 syscall emulation mode. Therefore, I posted
the following question in StackOverflow.

StackOverflow Question Link:
===

https://stackoverflow.com/questions/6344/is-it-possible-to-run-python-code-in-gem5-syscall-emulation-mode

In the StackOverflow answer, Ciro Santilli told me to implement
syscalls. I was getting an error for the "fchmod" syscall. Hence,
I implemented it in the following file
(/gem5/src/arch/x86/linux/process.cc) like below. However, it was
not working for me. The Gem5 creates a large output file, and
after that, it terminates.

Syscall Implementation:
==
{ 91, "fchmod", fchmodFunc },

* Please let me know how I can run cosmoGAN Python code (with
TensorFlow) in the Gem5 syscall emulation mode?

Thank you in advance.

Sincerely,
S.M.Shamimul Hasan


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--
Best Regards,
Abhishek

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[gem5-users] Cache-line contains both instructions and data?

[Derrick.Greenspan via gem5-users]

Hello everyone,

Bear with me here, as this is a complicated question:

I am porting a memory system simulator originally developed as an extension to 
Multi2Sim to Gem5. Until now, all was more-or-less straightforward in the 
porting process.

However, for the past three months, I've been fighting a very strange issue. 
Using the default hello32 binary, the CPU attempts to read a particular cache 
line (0x140) as data, writing it into its L1D cache, and then attempts to read 
it as an instruction, attempting to write it into its L1I cache. From what I 
know, this should not be possible -- a cache line can only contain either 
instructions, or data, but not both. Neither ruby nor the default gem5 cache 
implementation have any issue with this behavior. However, the memory system I 
am porting certainly does!


I have tried everything to figure out why this is happening. I can say that the 
cache line maps to part of the .rel.plt segment of the hello32 binary -- 
specifically, virtual addresses [0x8048140-0x804180], and these virtual 
addresses appear to me to be instructions rather than data. So, I am not at all 
sure why gem5 loads this as data first.


The instruction which causes the initial data load, according to the request 
packet, is cmp byte [ebx*8 + 0x8048138], 0x2a -- program counter 0x80489b0, 
which is in .text (so it is appropriately an instruction). The instruction 
which causes the later instruction fetch, according to that request packet, is 
push ebp -- program counter 0x804815c, which is the start of the function 
prologue for __rel_iplt_end().


But I remain completely at a loss as to why this is happening. Is this in fact 
proper behavior? My impression is that except in very specific circumstances, 
there is a strict separation between instructions and data, and each cache line 
(and even operating system level page) can be only one or the other. Is there 
something I simply do not know about either x86 assembly, or caches in general, 
that indicates that this behavior is appropriate?


Thank you for any help you can provide. Hopefully, I can figure this out soon!


All the best,

Derrick Greenspan MSCS
PhD Graduate Research Assistant
University of Central Florida
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