[gem5-users] Re: Tracing Instructions in gem5 (re: Adding a New Instruction)

2021-05-14 Thread Jason Z via gem5-users
Hi Giacomo,

Thank you for your reply, I really appreciate it!

My main goal is to be able to implement new instructions in gem5 similar to 
ARM's MTE instructions, so I've been trying to modify the gem5 files to be able 
to add these new instructions.

And I thought I had figured it out, but when I try to run it, it is causing a 
panic error so I am thinking that I am still missing something. The exact error 
message that I am getting is:

   panic: panic condition !handled occurred: Page table fault when accessing 
virtual address 0

I've been trying to manually inspect the files, but I am worried that there are 
some files that I am not aware of that I need to change, because I've only 
modified the following files so far:

   src/arch/arm/isa/formats/aarch64.isa
   src/arch/arm/isa/templates/mem64.isa
   src/arch/arm/isa/insts/str64.isa

So I was thinking that if I could trace a current instruction in gem5 to see 
what files it is using, then I would know which files I may still need to 
change to get new instructions to work properly. But I just wasn't sure if 
there was something like this available through gem5's debugging or using GDB.

I've also only ran gem5 inside GDB, and I haven't tried remote GDB yet, so I'm 
not sure it that makes a difference or not. 

Right now I am in the process of trying to add my own debug flags using 
DPRINTF() statements, but I'm not sure if that will work either since a lot of 
the files are of ".isa" extension types.

I apologize for the abundance of questions all in one post, but I just found 
this forum yesterday and I've been working on this issue for a while, so if 
there is anything that I am missing that might help, it would be so greatly 
appreciated. Thank you again for your time!

Respectfully,

Jason Z.
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[gem5-users] Broadcast and Multicast Traffics in the Garnet

2021-05-14 Thread Arash Azizi via gem5-users
Hi All,

I want to do broadcast and multicast traffics in the Garnet for different 
topologies like Mesh, Crossbar, and Pt2Pt. Does anybody have an idea, how I can 
do it? Does Garnet support broadcast and multicast traffic?

Thanks,

Arash
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[gem5-users] Re: Run full system with Garnet

2021-05-14 Thread Jiayi Huang via gem5-users
Can you share your command line to provide more info?

On Tue, Apr 6, 2021 at 2:21 AM 等价无穷小 via gem5-users 
wrote:

> Hello Gem5 !
>
> Recently I am looking to run the fs mode with garnet.
> When I use the parameter --network=garnet, which returns a error : no such
> option.
> I check the configurable parameters, the parameters do not include the
> network parameter.
> Is there any way to use the network module that I can add the network?
>
> Thanks very much!
> Zhang Meng
>
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[gem5-users] Re: Boot FS with kvm and multiple cores

2021-05-14 Thread Pedro Henrique Exenberger Becker via gem5-users
Hi Giacomo, thanks for the feedback.

However, I didn't follow when you said

> I gave a quick look. _build_kvm seems more or less the same.

There is a manipulation of the event queues specifically for the KVM
case in fs_bigLITTLE.py that I couldn't find in fs.py. In my
experiments, if those are not present the boot never advances.

> The problem is in the fs.py sim_quantum:
>
> root.sim_quantum = int(1e9) # 1 ms
>
> This is obviously wrong
>
> And it should align with fs_bigLITTLE.

I could not find
root.sim_quantum = int(1e9) # 1 ms

in the fs.py 
(https://gem5.googlesource.com/public/gem5/+/refs/heads/master/configs/example/fs.py)
as you mentioned.
In fact, if that was the case (if it was in fs.py) I would say the
value is correct because if I print the root.sim_quantum in the
fs_bigLITTLE (which works) after it is assigned inside the instantiate
function, I do get "10" as output, i.e. (1e9). So I'm not sure
I'm on the same page as you...

Anyway, the following is the reported diff between my own branch (my
modifications to make fs.py work) compared to the stable branch of
gem5 (v21.0.0.0). Hope it helps to explain my point.

diff --git a/configs/example/fs.py b/configs/example/fs.py
index f388503e2..438175d69 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -63,6 +63,21 @@ from common import ObjectList
 from common.Caches import *
 from common import Options

+def _to_ticks(value):  # copied from fs_bigLITTLE.py
+"""Helper function to convert a latency from string format to Ticks"""
+
+return m5.ticks.fromSeconds(m5.util.convert.anyToLatency(value))
+
+def _using_pdes(root):# copied from fs_bigLITTLE.py
+"""Determine if the simulator is using multiple parallel event queues"""
+
+for obj in root.descendants():
+if not m5.proxy.isproxy(obj.eventq_index) and \
+   obj.eventq_index != root.eventq_index:
+return True
+
+return False
+
 def cmd_line_template():
 if options.command_line and options.command_line_file:
 print("Error: --command-line and --command-line-file are "
@@ -75,6 +90,7 @@ def cmd_line_template():
 return None

 def build_test_system(np):
+m5.ticks.fixGlobalFrequency()  # copied from
fs_bigLITTLE.py, otherwise gem5 complains the frequency is not fixed
for kvm multicore
 cmdline = cmd_line_template()
 if buildEnv['TARGET_ISA'] == "mips":
 test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0], cmdline=cmdline)
@@ -147,6 +163,20 @@ def build_test_system(np):
 if ObjectList.is_kvm_cpu(TestCPUClass) or \
 ObjectList.is_kvm_cpu(FutureClass):
 test_sys.kvm_vm = KvmVM()
+# Assign KVM CPUs to their own event queues / threads. This
+# has to be done after creating caches and other child objects
+# since these mustn't inherit the CPU event queue.
+cpus = test_sys.cpu
 # adapted from fs_bigLITTLE.py
+if len(cpus) > 1:
+device_eq = 0
+first_cpu_eq = 1
+for idx, cpu in enumerate(cpus):
+# Child objects usually inherit the parent's event
+# queue. Override that and use the same event queue for
+# all devices.
+for obj in cpu.descendants():
+obj.eventq_index = device_eq
+cpu.eventq_index = first_cpu_eq + idx

 if options.ruby:
 bootmem = getattr(test_sys, '_bootmem', None)
@@ -368,6 +398,10 @@ if buildEnv['TARGET_ISA'] == "arm" and not
options.bare_metal \
 sys.workload.dtb_filename = \
 os.path.join(m5.options.outdir, '%s.dtb' % sysname)
 sys.generateDtb(sys.workload.dtb_filename)
+if root and _using_pdes(root): #
adapted from bigLITTLE.py
+m5.util.inform("Running in PDES mode with a %s simulation quantum.",
+   "1ms")
 # reporting as in fs_bigLITTLE.py, not really needed but well
+root.sim_quantum = _to_ticks("1ms") # adapted
from bigLITTLE.py

 Simulation.setWorkCountOptions(test_sys, options)
 Simulation.run(options, root, test_sys, FutureClass)



> Are you keen on posting a patch fixing it?
>
> Otherwise I can post it myself (if you don't want to)

I am kind of in a rush to get some experiments working and never
really contributed to the gem5 upstream, so if you don't mind pushing
it to the main repo that would save me some time.
I can do it otherwise, but I'd have to check how to contribute and all
of that (likely not to be done today).

Again, thank you very much for the help.
Best,
Pedro.
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[gem5-users] Re: gem5 ARM RealView Ctrl

2021-05-14 Thread Samuel Thomas via gem5-users
Hello,

I’m following up on this. Does anyone have any advice for how to resolve this?

Best,
Sam

> On May 11, 2021, at 8:31 PM, Samuel Thomas  wrote:
> 
> Hi all,
> 
> I am writing because I am trying to set up an existing project on a new 
> machine. Unfortunately, when transferring the code over and setting up the 
> environment, I’ve been running into an issue that I’ve never seen before. 
> That is, the code doesn’t pass through the assertion in line 57 of the 
> src/dev/arm/rv_ctrl.cc  code (pkt->getSize() == 4). It 
> turns out the first packet has a size of 64.
> 
> I have a few suspects for what could be triggering the error, but I’m not 
> exactly sure what it is. A first guess could be that the project requires 
> building a new device tree buffer, but I’m getting the same error even with 
> the pre-built dtb files.
> 
> 
> The command line that I’m using to run the script is the following: 
> …/gem5-workspace/gem5/build/ARM/gem5.opt 
> …/gem5-workspace/gem5/configs/example/arm/fs_bigLITTLE.py —kernel 
> …/gem5-workspace/gem5/dist/binaries/vmlinux.arm64 —kernel-init /init.gem5 
> —cpu-type atomic —dtb 
> …/gem5-workspace/gem5/system/arm/dt/armv8_gem5_v1_big_little_2_2.dtb —disk 
> …/gem5-workspace/gem5/dist/disks/ubuntu-18.04-arm64-docker.img
> 
> Does anything stand out that I’m missing that could be triggering this?
> 
> I’ve tried reverting as many of the candidate changes as I can to the 
> original, but it’s hard to say which it could be without having a real 
> understanding of what the RealView Controller reads. Does anyone have any 
> immediate inclinations as to what could be causing this? Otherwise, I’m happy 
> to provide more details as necessary.
> 
> Best,
> Sam

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[gem5-users] Re: Boot FS with kvm and multiple cores

2021-05-14 Thread Giacomo Travaglini via gem5-users
Hi Pedro, glad it worked

> -Original Message-
> From: Pedro Henrique Exenberger Becker 
> Sent: 14 May 2021 10:48
> To: Giacomo Travaglini 
> Cc: gem5 users mailing list 
> Subject: Re: [gem5-users] Re: Boot FS with kvm and multiple cores
>
> Hi Giacomo,
>
>
>
>   --little-cpus option defaults to 1. This means you are effectively
> running with 9 cpus.
>
>   Could you try setting --little-cpus to zero from command line?
>
>
> Yes, this works. Rookie mistake of mine.
>
> At this point, I have already adapted code from fs_bigLITTLE.py script to the
> fs.py script and got it working.
> (For those interested, I "ported" the _build_kvm method and also set the
> root.sim_quantum to 1ms as in the as done in fs_bigLITTLE.py)

I gave a quick look. _build_kvm seems more or less the same.
The problem is in the fs.py sim_quantum:

root.sim_quantum = int(1e9) # 1 ms

This is obviously wrong

And it should align with fs_bigLITTLE.
Are you keen on posting a patch fixing it?

Otherwise I can post it myself (if you don't want to)

Kind Regards

Giacomo


>
> Anyway, thank you for the help!
> Best,
> Pedro.
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[gem5-users] Re: Boot FS with kvm and multiple cores

2021-05-14 Thread Pedro Henrique Exenberger Becker via gem5-users
Hi Giacomo,

--little-cpus option defaults to 1. This means you are effectively running
> with 9 cpus.

Could you try setting --little-cpus to zero from command line?


Yes, this works. Rookie mistake of mine.

At this point, I have already adapted code from fs_bigLITTLE.py script to
the fs.py script and got it working.
(For those interested, I "ported" the *_build_kvm *method and also set the
root.sim_quantum to 1ms as in the as done in fs_bigLITTLE.py)

Anyway, thank you for the help!
Best,
Pedro.
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[gem5-users] Re: Tracing Instructions in gem5 (re: Adding a New Instruction)

2021-05-14 Thread Giacomo Travaglini via gem5-users
Hi Jason,

> -Original Message-
> From: jzell001--- via gem5-users 
> Sent: 14 May 2021 00:44
> To: gem5-users@gem5.org
> Cc: jzell...@ucr.edu
> Subject: [gem5-users] Tracing Instructions in gem5 (re: Adding a New
> Instruction)
>
> Hi Everyone,
>
> I am fairly new to gem5, so I apologize if this has already been addressed, 
> but
> I haven't been able to find a solution yet.

Do not worry, every question is welcome here 

>
> I am trying to add a new type of store instruction to gem5 similar to the STG
> instruction from ARM's MTE instructions.
>
> I was wondering if there was a debug flag or an approach using GDB to
> determine what files are used when processing an instruction in gem5.

Do you want to record *every* uprocessor activity on a specific instruction 
(the one you are implementing)?
For example, tracing the lifetime of the instruction within the pipeline.
If that is the case, there's no such thing at the moment in gem5. This is 
because we trace from a uprocessor perspective rather than from an instruction
point of view.

For example, I can turn on/off instruction fetch tracing or decode tracing or 
rename tracing, but this will be done for every instruction
and I cannot easily filter it for a specific instruction only.

You are asking about files and classes. This confuses me a bit. If you just 
want to know which files are used I can tell you most files in the used cpu 
model
subdirectory (e.g. src/cpu/o3) will deal with instruction processing as that's 
the main activity of a uprocessor pipeline.

>
> I am aware of some of the general files that need to be edited, such as:
>
>src/arch/arm/isa/formats/aarch64.isa
>src/arch/arm/isa/templates/mem64.isa
>src/arch/arm/isa/insts/str64.isa
>
> But I would like to be able to see all of these files/functions/classes as 
> they
> are used/touched as an instruction is processed through gem5. For instance,
> seeing what things are accessed when a STR instruction that already is
> implemented in gem5 is being processed.

I have the impression you are merging two different problems in one (correct me 
if I am wrong):
1)  Understanding how the simulator works (this is why you want to trace the 
used classes and files)
2)  Effectively tracing your instruction handling during your workload execution

I believe you should achieve 1 by actually understanding the code plus getting 
an idea on what you really want to trace
about an instruction. Do you really want to trace everything? Maybe you are 
just interested about tracing the architectural results of your store. If 
that's the case no need
to check the cpu subdirectory.
Once you know what you want to trace during your workload execution and where 
the code resides in the repo you can pass to point 2 and effectively add your 
DPRINTFs
to the code.

>
> Any help or advice would be greatly appreciated. Thank you for your time!
>
>
> Respectfully,
>
> Jason Z.
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Hope this helped

Kind Regards

Giacomo
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[gem5-users] Re: Boot FS with kvm and multiple cores

2021-05-14 Thread Giacomo Travaglini via gem5-users
Hi Pedro

> The main problem I still have is fs_bigLITTLE.py with --big-cpus 8 (I want to
> have an 8-core setup) causes panic:
> info: Using bootloader at address 0x10
> info: Using kernel entry physical address at 0x8008
> info: Loading DTB file: m5out/system.dtb at address 0x8800
> info: KVM: Coalesced MMIO disabled by config.
> info: KVM: Coalesced MMIO disabled by config.
> info: KVM: Coalesced MMIO disabled by config.
> info: KVM: Coalesced MMIO disabled by config.
> info: KVM: Coalesced MMIO disabled by config.
> info: KVM: Coalesced MMIO disabled by config.
> info: KVM: Coalesced MMIO disabled by config.
> info: KVM: Coalesced MMIO disabled by config.
> panic: KVM: Failed to create virtual CPU Memory Usage: 2619720 KBytes
> Program aborted at tick 0
> --- BEGIN LIBC BACKTRACE ---
> ./build/ARM/gem5.opt(_Z15print_backtracev+0x40)[0x5576c8e090]
> ./build/ARM/gem5.opt(_Z12abortHandleri+0x5c)[0x55770cbdb4]
> linux-vdso.so.1(__kernel_rt_sigreturn+0x0)[0x7f9b01e6c0]
> /lib/aarch64-linux-gnu/libc.so.6(raise+0xb0)[0x7f9abe94f8]
> --- END LIBC BACKTRACE ---
> Aborted (core dumped)
>
> I saw some discussion on gem5 supporting gicv2 but not gicv3, but from what
> I read even the former should support up to 8 cores. So I'm not sure this is
> the problem here. Any suggestions?


--little-cpus option defaults to 1. This means you are effectively running with 
9 cpus.
Could you try setting --little-cpus to zero from command line?

>
> Thanks,
> Pedro.
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Kind Regards

Giacomo
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