[gem5-users] Older version GEM5 with m5thread

2020-01-28 Thread Yang Zhou
Hi community, 

I am trying to run an old version of gem5 code (around 7 year old) heavily 
hacked by a research paper. I want to simulate some ARM binaries with 
multi-threading; in that early version of gem5, it seems that I can only use 
m5thread. 

However, I faced the error of “panic: Page table fault when accessing virtual 
address 0x00” when simulating binaries which uses m5thread, the same error as 
this one posted here: 
https://www.mail-archive.com/gem5-users@gem5.org/msg10107.html 


The above post mentioned using gcc 4.2 or older can solve (since some data 
structure has been changed in newer gcc and is not commutable with old gem5). I 
am using arm-linux-gnueabi-gcc 5.4; but it seems pretty hard to download a 4.2 
version of arm-linux-gnueabi-gcc pre-built deb or cross-compile it from scratch 
(I tried this cross-combine tutorial 
, but it 
always shows "cannot find crt1.o” error when building gcc 4.2). 

So I am wondering if there is any rep that hosts some older version of 
arm-linux-gnueabi-gcc? Or any one having experiences of build older 
arm-linux-gnueabi-gcc? 

Any suggestions and comments are appreciated! 

Best,
Yang___
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[gem5-users] Modeling the capacity of core-memory interconnect interface

2020-01-25 Thread Yang Zhou
Hi community:

I am trying to model a multi-core device with specification stating that “To 
support load and store operations from multiple cores;  owns a 
high-performance coherent memory interconnect interface supporting up to 50 
Gb/s of data transfer.“ 

Just wondering if there is any option in gem5 that can model this memory 
transferring capacity. 

Any comments and suggestions are highly appreciated! 

Best,
Yang
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