[gem5-users] Dump_and_reset_stats in various cpu types

[Michail Mavropoulos via gem5-users]

Hi all,

I have a question regarding m5_dump_reset_stats instruction and 
different cpu-types.

I have included the m5_dump_reset_stats instruction into a code and as 
it is expected the stats file splits into two sections.
When I setup the cpu-type equal to TimingSimpleCPU, I observe that the 
L1 stats are not reset. For example, the dl1 misses reported on the 
second stats section are equal to the dl1 misses reported when I don't 
make use of the m5 instruction. This does not happen for L2 statistics, 
so in l2 case in order to match the l2 misses reported when m5 
instruction not in use I have to add the l2 misses reported in two stats 
sections.
This issue does not occurs when DeriveO3CPU cpu type is selected.

Is it a known issue? Why when I run a timing simulation the stats of L1 
caches do not reset?

I am using a gem5 version with head commit id: 
9d3b9e96c56386ee6539657c21cba95e118e576a, Octomber 15th, 2019.

Best regards,
Michail
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