Hi Tom,
On Tue, Mar 29, 2022 at 9:39 AM tomjosekallooran--- via gem5-users <
gem5-users@gem5.org> wrote:
> Hi ,
> This may sound very generic, but i want to try some experiments with the
> out of order implementation. I came across few scenarios, which are listed
> below (any input would be helpful):
> 1. lets consider the following set of instructions (an example which was
> made up):
> Address instr Operands
> 4357136cmp {"x1", "#16"}
> 4357140cmp {"x2", "#16"}
> 4357144bhi {"4387895"}
>
> So if we have two execution units which can execute integer instructions,
> then both "cmp" instruction (4357136 and 4357140) could be issued to the
> execution unit. But an "cmp" instruction will update N,Z,C,V flags which
> inturn are used for evaluating conditional flags (eq_ne, hi_ls, cs_cc etc).
> So, can these two cmp be issued to execution units in the same cycle? If
> so, are the N,Z,C,V for each cmp only updated after inorder commit? How is
> it handled ? (do we use temp registers for holding each N,Z,C,V value?)
>
If I remember correctly, we rename all of the flag registers on each
instruction, and we increase the number of physical registers such that
this renaming is not a bottleneck. In a real processor, I don't think it
would work this way, but it should be OK performance-wise.
>
> 2. In speculative execution, how are stores implemented? do we place them
> into a store buffer and write it to memory once its commited?
>
I think that's correct, at least for x86. In Arm/RISC-V the stores could go
out of order to memory as well. You can check the code in the lsq_unit
files in src/cpu/o3 and poke around for "tso" to see exactly how it's
handled. Someone else may remember better than I do :).
Cheers,
Jason
>
> Any input would be appreciated.
> Regards,
> Tom
> ___
> gem5-users mailing list -- gem5-users@gem5.org
> To unsubscribe send an email to gem5-users-le...@gem5.org
> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
>
___
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
