Hey,
I've tried my hand at this problem before and it can be a bit tricky but
with patience and some python scripts you can get what you want.
First, depending on what memory address you are interested in, you will
probably need to extract the physical address. Or if you can just pick an
address from a DPRINTF trace.
I needed a specific address from the program I was running so I created a
magic instruction like m5_exit() etc `uint64_t m5_paddr(uint64_t vaddr)`
that passes in a virtual address to the simulator
and returns the physical address (if that vaddr is not yet mapped, this
will map it, so that might change behavior, be careful).
Then use whatever trace flags you are interested in. I wanted to trace the
address through the cache coherence system so I used RubySlicc and/or
ProtocolTrace. This will generate
HUGE traces, so make sure you set the debug-start and debug-end flags for
the region you are interested in.
>From here the trace is usually still too large, so I run it through a
python script to filter out the addresses I am interested in.
Good luck!
Dan
On Fri, Nov 13, 2020 at 8:47 AM Hoa Nguyen via gem5-users <
gem5-users@gem5.org> wrote:
> Hi,
>
> I assume that you want to keep track of a piece of data at a specific
> virtual/physical address. I don't know a definite answer to this, but
> one thing you can do is to use the gem5 logging system (i.e. DPRINTF
> and the like) and figure out what flags you should enable to keep
> track of transactions in the memory hierarchy. Also, I believe
> `Packet` objects are the ones that handle data transferring.
>
> Regards,
> Hoa Nguyen
>
> On 11/12/20, yujiecui--- via gem5-users wrote:
> > In the process of step-by-step debugging of gem5, how can I know whether
> a
> > data currently exists in cache or in memory, and what level of cache it
> is?
> > I think gem5 should provide such a method?
> > Thanks for answer.
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