Change in osmo-ccid-firmware[master]: update from Atmel Start (just loading + re-exporting the project)

2019-02-26 Thread Kévin Redon
Kévin Redon has submitted this change and it was merged. ( 
https://gerrit.osmocom.org/13031 )

Change subject: update from Atmel Start (just loading + re-exporting the 
project)
..

update from Atmel Start (just loading + re-exporting the project)

Change-Id: I59b2442a95871b8052bfdfdac6d77a7207d8b70a
---
M sysmoOCTSIM/AtmelStart.gpdsc
M sysmoOCTSIM/atmel_start_config.atstart
M sysmoOCTSIM/hal/include/hpl_spi_m_async.h
M sysmoOCTSIM/hal/include/hpl_spi_m_dma.h
M sysmoOCTSIM/hal/include/hpl_spi_m_sync.h
M sysmoOCTSIM/hal/include/hpl_spi_s_async.h
M sysmoOCTSIM/hal/include/hpl_spi_s_sync.h
7 files changed, 73 insertions(+), 12 deletions(-)

Approvals:
  Jenkins Builder: Verified
  Kévin Redon: Looks good to me, approved



diff --git a/sysmoOCTSIM/AtmelStart.gpdsc b/sysmoOCTSIM/AtmelStart.gpdsc
index 51851db..6546fb5 100644
--- a/sysmoOCTSIM/AtmelStart.gpdsc
+++ b/sysmoOCTSIM/AtmelStart.gpdsc
@@ -67,11 +67,6 @@
 
 
 
-
-
-
-
-
 
 
 
@@ -169,6 +164,11 @@
 
 
 
+
+
+
+
+
 
 
 
diff --git a/sysmoOCTSIM/atmel_start_config.atstart 
b/sysmoOCTSIM/atmel_start_config.atstart
index 975423d..58f05f6 100644
--- a/sysmoOCTSIM/atmel_start_config.atstart
+++ b/sysmoOCTSIM/atmel_start_config.atstart
@@ -2,12 +2,12 @@
 name: sysmoOCTSIM
 versions:
   api: '1.0'
-  backend: 1.4.93
-  commit: 9c29f8365cf76e9937d19b1e765a83bc7a80e4e9
-  content: 1.0.1340
+  backend: 1.5.122
+  commit: 820baecf7dd115d94b0d42ee3b0b9d6ba2da7113
+  content: 1.0.1405
   content_pack_name: acme-packs-all
   format: '2'
-  frontend: 1.4.1810
+  frontend: 1.5.1826
 board:
   identifier: CustomBoard
   device: SAME54N19A-AF
@@ -773,6 +773,8 @@
 nodes:
 - name: CPU
   input: CPU
+  external: false
+  external_frequency: 0
 configuration: {}
   OSC32KCTRL:
 user_label: OSC32KCTRL
@@ -981,8 +983,12 @@
 nodes:
 - name: Core
   input: Generic clock generator 2
+  external: false
+  external_frequency: 0
 - name: Slow
   input: Generic clock generator 3
+  external: false
+  external_frequency: 0
 configuration:
   core_gclk_selection: Generic clock generator 2
   slow_gclk_selection: Generic clock generator 3
@@ -1024,8 +1030,12 @@
 nodes:
 - name: Core
   input: Generic clock generator 2
+  external: false
+  external_frequency: 0
 - name: Slow
   input: Generic clock generator 3
+  external: false
+  external_frequency: 0
 configuration:
   core_gclk_selection: Generic clock generator 2
   slow_gclk_selection: Generic clock generator 3
@@ -1067,8 +1077,12 @@
 nodes:
 - name: Core
   input: Generic clock generator 2
+  external: false
+  external_frequency: 0
 - name: Slow
   input: Generic clock generator 3
+  external: false
+  external_frequency: 0
 configuration:
   core_gclk_selection: Generic clock generator 2
   slow_gclk_selection: Generic clock generator 3
@@ -1110,8 +1124,12 @@
 nodes:
 - name: Core
   input: Generic clock generator 2
+  external: false
+  external_frequency: 0
 - name: Slow
   input: Generic clock generator 3
+  external: false
+  external_frequency: 0
 configuration:
   core_gclk_selection: Generic clock generator 2
   slow_gclk_selection: Generic clock generator 3
@@ -1153,8 +1171,12 @@
 nodes:
 - name: Core
   input: Generic clock generator 2
+  external: false
+  external_frequency: 0
 - name: Slow
   input: Generic clock generator 3
+  external: false
+  external_frequency: 0
 configuration:
   core_gclk_selection: Generic clock generator 2
   slow_gclk_selection: Generic clock generator 3
@@ -1196,8 +1218,12 @@
 nodes:
 - name: Core
   input: Generic clock generator 2
+  external: false
+  external_frequency: 0
 - name: Slow
   input: Generic clock generator 3
+  external: false
+  external_frequency: 0
 configuration:
   core_gclk_selection: Generic clock generator 2
   slow_gclk_selection: Generic clock generator 3
@@ -1239,8 +1265,12 @@
 nodes:
 - name: Core
   input: Generic clock generator 2
+  external: false
+  external_frequency: 0
 - name: Slow
   input: Generic clock generator 3
+  external: false
+  external_frequency: 0
 configuration:
   core_gclk_selection: Generic 

Change in osmo-ccid-firmware[master]: update from Atmel Start (just loading + re-exporting the project)

2019-02-26 Thread Kévin Redon
Kévin Redon has posted comments on this change. ( 
https://gerrit.osmocom.org/13031 )

Change subject: update from Atmel Start (just loading + re-exporting the 
project)
..


Patch Set 2: Code-Review+2


--
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Gerrit-Project: osmo-ccid-firmware
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I59b2442a95871b8052bfdfdac6d77a7207d8b70a
Gerrit-Change-Number: 13031
Gerrit-PatchSet: 2
Gerrit-Owner: Harald Welte 
Gerrit-Reviewer: Jenkins Builder (102)
Gerrit-Reviewer: Kévin Redon 
Gerrit-Comment-Date: Tue, 26 Feb 2019 16:49:36 +
Gerrit-HasComments: No
Gerrit-HasLabels: Yes


Change in osmo-ccid-firmware[master]: update from Atmel Start (just loading + re-exporting the project)

2019-02-24 Thread Harald Welte
Harald Welte has uploaded this change for review. ( 
https://gerrit.osmocom.org/13031


Change subject: update from Atmel Start (just loading + re-exporting the 
project)
..

update from Atmel Start (just loading + re-exporting the project)

Change-Id: I59b2442a95871b8052bfdfdac6d77a7207d8b70a
---
M sysmoOCTSIM/AtmelStart.gpdsc
M sysmoOCTSIM/atmel_start_config.atstart
M sysmoOCTSIM/hal/include/hpl_spi_m_async.h
M sysmoOCTSIM/hal/include/hpl_spi_m_dma.h
M sysmoOCTSIM/hal/include/hpl_spi_m_sync.h
M sysmoOCTSIM/hal/include/hpl_spi_s_async.h
M sysmoOCTSIM/hal/include/hpl_spi_s_sync.h
7 files changed, 73 insertions(+), 12 deletions(-)



  git pull ssh://gerrit.osmocom.org:29418/osmo-ccid-firmware 
refs/changes/31/13031/1

diff --git a/sysmoOCTSIM/AtmelStart.gpdsc b/sysmoOCTSIM/AtmelStart.gpdsc
index 51851db..6546fb5 100644
--- a/sysmoOCTSIM/AtmelStart.gpdsc
+++ b/sysmoOCTSIM/AtmelStart.gpdsc
@@ -67,11 +67,6 @@
 
 
 
-
-
-
-
-
 
 
 
@@ -169,6 +164,11 @@
 
 
 
+
+
+
+
+
 
 
 
diff --git a/sysmoOCTSIM/atmel_start_config.atstart 
b/sysmoOCTSIM/atmel_start_config.atstart
index 975423d..58f05f6 100644
--- a/sysmoOCTSIM/atmel_start_config.atstart
+++ b/sysmoOCTSIM/atmel_start_config.atstart
@@ -2,12 +2,12 @@
 name: sysmoOCTSIM
 versions:
   api: '1.0'
-  backend: 1.4.93
-  commit: 9c29f8365cf76e9937d19b1e765a83bc7a80e4e9
-  content: 1.0.1340
+  backend: 1.5.122
+  commit: 820baecf7dd115d94b0d42ee3b0b9d6ba2da7113
+  content: 1.0.1405
   content_pack_name: acme-packs-all
   format: '2'
-  frontend: 1.4.1810
+  frontend: 1.5.1826
 board:
   identifier: CustomBoard
   device: SAME54N19A-AF
@@ -773,6 +773,8 @@
 nodes:
 - name: CPU
   input: CPU
+  external: false
+  external_frequency: 0
 configuration: {}
   OSC32KCTRL:
 user_label: OSC32KCTRL
@@ -981,8 +983,12 @@
 nodes:
 - name: Core
   input: Generic clock generator 2
+  external: false
+  external_frequency: 0
 - name: Slow
   input: Generic clock generator 3
+  external: false
+  external_frequency: 0
 configuration:
   core_gclk_selection: Generic clock generator 2
   slow_gclk_selection: Generic clock generator 3
@@ -1024,8 +1030,12 @@
 nodes:
 - name: Core
   input: Generic clock generator 2
+  external: false
+  external_frequency: 0
 - name: Slow
   input: Generic clock generator 3
+  external: false
+  external_frequency: 0
 configuration:
   core_gclk_selection: Generic clock generator 2
   slow_gclk_selection: Generic clock generator 3
@@ -1067,8 +1077,12 @@
 nodes:
 - name: Core
   input: Generic clock generator 2
+  external: false
+  external_frequency: 0
 - name: Slow
   input: Generic clock generator 3
+  external: false
+  external_frequency: 0
 configuration:
   core_gclk_selection: Generic clock generator 2
   slow_gclk_selection: Generic clock generator 3
@@ -1110,8 +1124,12 @@
 nodes:
 - name: Core
   input: Generic clock generator 2
+  external: false
+  external_frequency: 0
 - name: Slow
   input: Generic clock generator 3
+  external: false
+  external_frequency: 0
 configuration:
   core_gclk_selection: Generic clock generator 2
   slow_gclk_selection: Generic clock generator 3
@@ -1153,8 +1171,12 @@
 nodes:
 - name: Core
   input: Generic clock generator 2
+  external: false
+  external_frequency: 0
 - name: Slow
   input: Generic clock generator 3
+  external: false
+  external_frequency: 0
 configuration:
   core_gclk_selection: Generic clock generator 2
   slow_gclk_selection: Generic clock generator 3
@@ -1196,8 +1218,12 @@
 nodes:
 - name: Core
   input: Generic clock generator 2
+  external: false
+  external_frequency: 0
 - name: Slow
   input: Generic clock generator 3
+  external: false
+  external_frequency: 0
 configuration:
   core_gclk_selection: Generic clock generator 2
   slow_gclk_selection: Generic clock generator 3
@@ -1239,8 +1265,12 @@
 nodes:
 - name: Core
   input: Generic clock generator 2
+  external: false
+  external_frequency: 0
 - name: Slow
   input: Generic clock generator 3
+  external: false
+  external_frequency: 0
 configuration:
   core_gclk_selection: Generic