Re: Adding support for R6 of MIPS architecture

2015-02-12 Thread Steve Ellcey
On Wed, 2015-02-11 at 13:51 +0100, Torbjörn Granlund wrote:

 I think mpn/alpha/addmul_1.asm might serve as a better starting point
 than the mips64 lo/hi code.  That code is simple enough, yet OK for
 pipelined in-order and out-of-order cores.

I will take a look at that.

   The top-of-tree Qemu is pretty good these days, I use it for GCC
   testing, including R6 testing.
   
 Have you been able to boot some kernel under QEMU in r6 mode?  Or are
 you using user-level QEMU, passing options to QEMU with some trickery?

I just use user-level QEMU.

Steve Ellcey
sell...@imgtec.com

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Re: Adding support for R6 of MIPS architecture

2015-02-05 Thread Steve Ellcey
On Tue, 2015-02-03 at 10:57 +0100, Torbjörn Granlund wrote:
 Marc Glisse marc.gli...@inria.fr writes:
 
   Apparently not, the motivation for the patch is that multu has
   disappeared...
 
 Then I see no other robust approach than making mpn/mipsnomultu_64 (or
 somesuch).
 
 Well, an analogous robust approach would be moving the dmultu code into
 mpn/mips64/dmultu and put the r6 code into mpn/mips64/nodmultu.
 
 (As a side note, I have been planning to move things around a bit,
 creating mpn/x86/32 and mpn/x86/64 with the contents of mpn/x86 and
 mpn/x86_64, respectively.  SImilarly for powerpc32 and powerpc64,
 sparc32 and sparc64, etc.  Common code between 32-bit and 64-bit limbs
 will live in the shared directory (mpn/x86, mpn/powerpc, mpn/sparc,
 etc).  There is a good amount of such common code already, which is
 shared in an ugly manner.)

OK, so what I did was to create a mips32r6 directory under mips32 and a
mips64r6 directory under mips64 and put copies of the routines that had
to be changed for r6 in those directories.  I have done test builds for
various MIPS targets and verified that the non-r6 code has not changed.
For the new r6 stuff I have verified that it all builds but I haven't
tested the changes with 'make check'.

Is there a way to do 'make check' with a simulator or a remote system?
I usually build MIPS code using a cross compiler on an x86 Linux box and
that is what I did to build GMP (using --build=x86_64-unknown-linux-gnu
--host=mips-img-linux-gnu or some other host depending on what flavor of
MIPS I wanted to build).  I was hoping I could run 'make check' on the
x86 box and have it run tests via a simulator.  That makes it easier to
build and test multiple MIPS architectures.

I tweaked the GMP configure script to recognize mips*-mti-* and
mips*-img-* targets, these hosts/targets exist in GCC and binutils as
names to use for cross compilers targeting MIPS (mti for pre-r6, img for
r6).

I have attached the patch as it currently exists to this email so people
could look it over.

Steve Ellcey
sell...@imgtec.com


diff -r 2ff56d3c5dfe configure.ac
--- a/configure.ac	Wed Aug 27 11:24:26 2014 +0200
+++ b/configure.ac	Thu Feb 05 14:27:13 2015 -0800
@@ -907,27 +907,41 @@
 gcc_cflags_optlist=abi
 gcc_cflags_abi=-mabi=32
 gcc_testlist=gcc-mips-o32
-path=mips32
+case $host in
+  mips32r6 | mips*-img-*)
+	path=mips32/mips32r6 mips32 ;;
+  *)
+	path=mips32 ;;
+esac
 cc_cflags=-O2 -o32   # no -g, it disables all optimizations
 # this suits both mips32 and mips64
 GMP_INCLUDE_MPN(mips32/mips-defs.m4)
 
 case $host in
-  [mips64*-*-* | mips*-*-irix[6789]*])
+  [mips64*-*-* | mips*-mti-* | mips*-img-* | mips*-*-irix[6789]*])
 abilist=n32 64 o32
 
 cclist_n32=gcc cc
 gcc_n32_cflags=$gcc_cflags -mabi=n32
 cc_n32_cflags=-O2 -n32	# no -g, it disables all optimizations
 limb_n32=longlong
-path_n32=mips64
 
 cclist_64=gcc cc
 gcc_64_cflags=$gcc_cflags -mabi=64
 gcc_64_ldflags=-Wc,-mabi=64
 cc_64_cflags=-O2 -64		# no -g, it disables all optimizations
 cc_64_ldflags=-Wc,-64
-path_64=mips64
+
+	case $host in
+	  mips64r6 | mips*-img-*)
+	path_n32=mips64/mips64r6 mips64
+	path_64=mips64/mips64r6 mips64
+	;;
+	  *)
+	path_n32=mips64
+	path_64=mips64
+	;;
+	esac
 ;;
 esac
 ;;
diff -r 2ff56d3c5dfe mpn/mips32/mips32r6/addmul_1.asm
--- /dev/null	Thu Jan 01 00:00:00 1970 +
+++ b/mpn/mips32/mips32r6/addmul_1.asm	Thu Feb 05 14:27:13 2015 -0800
@@ -0,0 +1,104 @@
+dnl  MIPS32 mpn_addmul_1 -- Multiply a limb vector with a single limb and add
+dnl  the product to a second limb vector.
+
+dnl  Copyright 1992, 1994, 1996, 2000, 2002 Free Software Foundation, Inc.
+
+dnl  This file is part of the GNU MP Library.
+dnl
+dnl  The GNU MP Library is free software; you can redistribute it and/or modify
+dnl  it under the terms of either:
+dnl
+dnl* the GNU Lesser General Public License as published by the Free
+dnl  Software Foundation; either version 3 of the License, or (at your
+dnl  option) any later version.
+dnl
+dnl  or
+dnl
+dnl* the GNU General Public License as published by the Free Software
+dnl  Foundation; either version 2 of the License, or (at your option) any
+dnl  later version.
+dnl
+dnl  or both in parallel, as here.
+dnl
+dnl  The GNU MP Library is distributed in the hope that it will be useful, but
+dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+dnl  for more details.
+dnl
+dnl  You should have received copies of the GNU General Public License and the
+dnl  GNU Lesser General Public License along with the GNU MP Library.  If not,
+dnl  see https://www.gnu.org/licenses/.
+
+include(`../config.m4')
+
+C INPUT PARAMETERS
+C res_ptr	$4
+C s1_ptr	$5
+C size		$6
+C s2_limb	$7

Adding support for R6 of MIPS architecture

2015-02-02 Thread Steve Ellcey
I am new to the gmp-devel list but have been downloading GMP and using it
as part of my GCC toolchain builds that also include GLIBC.

Recently I updated some of the GMP files that glibc uses in order to support
new revisions of the MIPS architecture (mips32r6 and mips64r6) and I would
like to get those changes into the official GMP as well.

I went ahead and downloaded the GMP 6.0.0 sources from hg (I tried the
unstable branch but it had no configure file and running autoconf on
configure.ac gave me a bunch of errors) and made the same changes there
as I had done in glibc.  Then I tried building GMP and it failed because
the assembly language files are preproccessed by m4 and not by GCC and so
my code with things like:

#if __mips_isa_rev  6
multu   $8,$7
#else
mulu$11,$8,$7
muhu$12,$8,$7
#endif

are not working.  I guess I things more like:

ifdef(`ISA_REV6',`
mulu$11,$8,$7
muhu$12,$8,$7
',`
multu   $8,$7
')

But I am not sure how or where I would set ISA_REV6.  Should this be handled
in the configure script or in a *.m4 file under mpn/mips32 or mpn/mips64?  Is
there an example of a compiler macro being checked and used to set a asm
ifdef somewhere that I could copy from?

The files that I need to change for MIPS R6 are addmul_1.asm, mul_1.asm,
and submul_1.asm in both the mpn/mips32 and mpn/mips64 directories.  There
is also a file mpn/mips64/sqr_diagonal.asm that needs changes but it doesn't
look like this file is currently compiled as part of GMP.

Steve Ellcey
sell...@imgtec.com
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