Re: [Intel-gfx] [PATCH] drm/i915: Assert we hold the CRTC powerwell for generating vblank interrupts

[Maarten Lankhorst]

Op 11-10-16 om 10:32 schreef Ville Syrjälä:
> On Tue, Oct 11, 2016 at 09:45:45AM +0200, Maarten Lankhorst wrote:
>> Op 11-10-16 om 08:55 schreef Ville Syrjälä:
>>> On Tue, Oct 11, 2016 at 08:17:22AM +0200, Maarten Lankhorst wrote:
 Op 10-10-16 om 13:56 schreef Ville Syrjälä:
> On Mon, Oct 10, 2016 at 12:46:32PM +0100, Chris Wilson wrote:
>> On Mon, Oct 10, 2016 at 02:42:01PM +0300, Ville Syrjälä wrote:
>>> On Mon, Oct 10, 2016 at 12:34:54PM +0100, Chris Wilson wrote:
 To enable the vblank itself, we need to have an RPM wakeref for the 
 mmio
 access, and whilst generating the vblank interrupts we continue to
 require the rpm wakeref. The assumption is that the RPM wakeref is held
 by the display powerwell held by the active pipe. As this chain was not
 obvious to me chasing the drm_wait_vblank ioctl, document it with a 
 WARN
 during *_vblank_enable().

 v2: Check the display power well rather than digging inside the atomic
 CRTC state.

 Signed-off-by: Chris Wilson 
 Cc: Ville Syrjälä 
 Cc: Maarten Lankhorst 
 ---
  drivers/gpu/drm/i915/i915_irq.c | 20 
  1 file changed, 20 insertions(+)

 diff --git a/drivers/gpu/drm/i915/i915_irq.c 
 b/drivers/gpu/drm/i915/i915_irq.c
 index 1e43fe30da11..f0f17055dbb9 100644
 --- a/drivers/gpu/drm/i915/i915_irq.c
 +++ b/drivers/gpu/drm/i915/i915_irq.c
 @@ -2715,6 +2715,14 @@ void i915_handle_error(struct drm_i915_private 
 *dev_priv,
i915_reset_and_wakeup(dev_priv);
  }
  
 +static void assert_pipe_is_awake(struct drm_i915_private *dev_priv,
 +   enum pipe pipe)
 +{
 +  WARN_ON(IS_ENABLED(CONFIG_DRM_I915_DEBUG) &&
 +  !intel_display_power_is_enabled(dev_priv,
 +  
 POWER_DOMAIN_PIPE(pipe)));
>>> Uses a mutex. And having a power well enabled doesn't mean much. It
>>> doesn't guarantee that vblanks work.
>> Impasse. :|
>>
>> There should be no point in an explicit assert_rpm_wakeref here as the
>> register access should catch an error there. Is there no safe way we can
>> assert the current state of the CRTC is correct for enabling vblanks?
> crtc->active might be the closest thing, if we just ignore any locking.
> Though it looks like that has gone a bit mad these days, what with being
> set from the .crtc_enable() hooks but getting cleared outside the
> .crtc_disable() hooks.
>
 I'm trying to kill crtc->active.
>>> Because it's evil? I still don't see much problem in having a thing to
>>> track the state of each pipe fairly accurately.
>>>
 Maybe you'd want to use dev_priv->active_crtcs, but that won't save you if 
 you enable interrupts in between atomic commit and .crtc_disable
>>> Nothing atomic based will work well because the state is not flipped at
>>> the same time as the actual hardware state changes.
>>>
 Safest bet is to look at the power state I think.
>>> I don't know which power state you mean, but I already shot down the
>>> power domain thing.
>>>
>>>
>> I would say use assert_pipe_enabled then.
> Nope. That one frobs with power domains too these days.
>
I don't see a nice way to do this, it probably means we shouldn't do this at 
all..
Maybe have a function look at 
dev_priv->power_domains.domain_use_count[[POWER_DOMAIN_PIPE(pipe)] >= 1?
It's potentially racy but I don't see a nice way to check, apart from hoping we 
handle the drm vblank on/off
calls correctly.

The only other way I see is demidlayering vblank.

~Maarten

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Re: [Intel-gfx] [REGRESSION v4.7] i915 / drm crash when undocking from DP monitors

[Vadim Lobanov]

Certainly, done and done. The bug is filed at:
https://bugs.freedesktop.org/show_bug.cgi?id=98211

Thanks!

On Tue, Oct 11, 2016 at 6:55 AM, Jani Nikula
 wrote:
> On Sat, 08 Oct 2016, Vadim Lobanov  wrote:
>> I'm seeing a repeatable crash on my HP EliteBook 840 G2/2216 when
>> booting it while in a docking station connected to two external
>> DisplayPort monitors, undocking, and then either logging out or
>> shutting down -- regardless of whether I've redocked it beforehand or
>> not. Both logout and shutdown work great if I do not undock the laptop
>> at all, so the badness correlates with the DP monitors going away.
>
> Please file a bug at [1] with the info in this mail, add drm.debug=14
> module parameter, and attach dmesg from boot to the problem into the
> bug.
>
> BR,
> Jani.
>
> [1] https://bugs.freedesktop.org/enter_bug.cgi?product=DRI=DRM/Intel
>
> --
> Jani Nikula, Intel Open Source Technology Center
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Re: [Intel-gfx] [PATCH RESEND 9/9] drm/i915: set proper N/M in modeset

[Lin, Mengdong]

> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
> Jani Nikula
> Sent: Monday, October 10, 2016 11:04 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani ; libin.y...@linux.intel.com;
> Pandiyan, Dhinakaran 
> Subject: [Intel-gfx] [PATCH RESEND 9/9] drm/i915: set proper N/M in
> modeset
> 
> When modeset occurs and the LS_CLK is set to some special values in DP
> mode, the N/M need to be set manually if audio is playing. Otherwise the
> first several seconds may be silent in audio playback.
> 
> The relationship of Maud and Naud is expressed in the following equation:
> Maud/Naud = 512 * fs / f_LS_Clk
> 
> Please refer VESA DisplayPort Standard spec for details.
> 
> Signed-off-by: Libin Yang 
> Signed-off-by: Jani Nikula 
> ---
>  drivers/gpu/drm/i915/i915_reg.h|   7 +++
>  drivers/gpu/drm/i915/intel_audio.c | 100
> -
>  2 files changed, 105 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h index 595d196f753f..8d9dbc7d5b32
> 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7359,6 +7359,13 @@ enum {
>  #define _HSW_AUD_MISC_CTRL_B 0x65110
>  #define HSW_AUD_MISC_CTRL(pipe)  _MMIO_PIPE(pipe,
> _HSW_AUD_MISC_CTRL_A, _HSW_AUD_MISC_CTRL_B)
> 
> +#define _HSW_AUD_M_CTS_ENABLE_A  0x65028
> +#define _HSW_AUD_M_CTS_ENABLE_B  0x65128
> +#define HSW_AUD_M_CTS_ENABLE(pipe)   _MMIO_PIPE(pipe,
> _HSW_AUD_M_CTS_ENABLE_A, _HSW_AUD_M_CTS_ENABLE_B)
> +#define   AUD_M_CTS_M_VALUE_INDEX(1 << 21)
> +#define   AUD_M_CTS_M_PROG_ENABLE(1 << 20)
> +#define   AUD_CONFIG_M_MASK  0xf

The last line cause misalignment after applying the patch.

> +
>  #define _HSW_AUD_DIP_ELD_CTRL_ST_A   0x650b4
>  #define _HSW_AUD_DIP_ELD_CTRL_ST_B   0x651b4
>  #define HSW_AUD_DIP_ELD_CTRL(pipe)   _MMIO_PIPE(pipe,
> _HSW_AUD_DIP_ELD_CTRL_ST_A, _HSW_AUD_DIP_ELD_CTRL_ST_B)
> diff --git a/drivers/gpu/drm/i915/intel_audio.c
> b/drivers/gpu/drm/i915/intel_audio.c
> index 81df29ca4947..0bc2701b6c9c 100644
> --- a/drivers/gpu/drm/i915/intel_audio.c
> +++ b/drivers/gpu/drm/i915/intel_audio.c
> @@ -57,6 +57,70 @@
>   * struct _audio_component_audio_ops @audio_ops is called from
> i915 driver.
>   */
> 
> +/* DP N/M table */
> +#define LC_540M 54
> +#define LC_270M 27
> +#define LC_162M 162000
> +
> +struct dp_aud_n_m {
> + int sample_rate;
> + int clock;
> + u16 n;
> + u16 m;
> +};
> +
> +static const struct dp_aud_n_m dp_aud_n_m[] = {
> + { 192000, LC_540M, 5625, 1024 },
> + { 176400, LC_540M, 9375, 1568 },
> + { 96000, LC_540M, 5625, 512 },
> + { 88200, LC_540M, 9375, 784 },
> + { 48000, LC_540M, 5625, 256 },
> + { 44100, LC_540M, 9375, 392 },
> + { 32000, LC_540M, 16875, 512 },
> + { 192000, LC_270M, 5625, 2048 },
> + { 176400, LC_270M, 9375, 3136 },
> + { 96000, LC_270M, 5625, 1024 },
> + { 88200, LC_270M, 9375, 1568 },
> + { 48000, LC_270M, 5625, 512 },
> + { 44100, LC_270M, 9375, 784 },
> + { 32000, LC_270M, 16875, 1024 },
> + { 192000, LC_162M, 3375, 2048 },
> + { 176400, LC_162M, 5625, 3136 },
> + { 96000, LC_162M, 3375, 1024 },
> + { 88200, LC_162M, 5625, 1568 },
> + { 48000, LC_162M, 3375, 512 },
> + { 44100, LC_162M, 5625, 784 },
> + { 32000, LC_162M, 10125, 1024 },
> +};
> +
> +static const struct dp_aud_n_m *
> +audio_config_dp_get_n_m(struct intel_crtc *intel_crtc, int rate) {
> + int i;
> +
> + for (i = 0; i < ARRAY_SIZE(dp_aud_n_m); i++) {
> + if (rate == dp_aud_n_m[i].sample_rate &&
> + intel_crtc->config->port_clock == dp_aud_n_m[i].clock)
> + return _aud_n_m[i];
> + }
> +
> + return NULL;
> +}
> +
> +static int audio_config_dp_get_m(struct intel_crtc *intel_crtc, int
> +rate) {
> + const struct dp_aud_n_m *nm =
> audio_config_dp_get_n_m(intel_crtc,
> +rate);
> +
> + return nm ? nm->m : 0;
> +}
> +
> +static int audio_config_dp_get_n(struct intel_crtc *intel_crtc, int
> +rate) {
> + const struct dp_aud_n_m *nm =
> audio_config_dp_get_n_m(intel_crtc,
> +rate);
> +
> + return nm ? nm->n : 0;
> +}
> +
>  static const struct {
>   int clock;
>   u32 config;
> @@ -225,8 +289,10 @@ hsw_dp_audio_config_update(struct intel_crtc
> *intel_crtc, enum port port,
>  const struct drm_display_mode *adjusted_mode)  {
>   struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
> + struct i915_audio_component *acomp = dev_priv-
> >audio_component;
> + int rate = acomp ? acomp->aud_sample_rate[port] : 0;
>   enum pipe pipe = intel_crtc->pipe;
> - u32 tmp;
> + u32 tmp, n, m;
> 
>   tmp = I915_READ(HSW_AUD_CFG(pipe));
>  

Re: [Intel-gfx] [PATCH v5 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

[Robert Bragg]

On Fri, Oct 7, 2016 at 10:19 AM, Matthew Auld <
matthew.william.a...@gmail.com> wrote:

> On 14 September 2016 at 15:19, Robert Bragg  wrote:
>
> > diff --git a/drivers/gpu/drm/i915/i915_perf.c
> b/drivers/gpu/drm/i915/i915_perf.c
> > index 87530f5..5305982 100644
> > --- a/drivers/gpu/drm/i915/i915_perf.c
> > +++ b/drivers/gpu/drm/i915/i915_perf.c
> > @@ -28,14 +28,860 @@
> >  #include 
> >
> >  #include "i915_drv.h"
> > +#include "intel_ringbuffer.h"
> > +#include "intel_lrc.h"
> Superfluous includes.
>

ah, yup, removed.


> > +#include "i915_oa_hsw.h"
> > +
> > +/* Must be a power of two */
> > +#define OA_BUFFER_SIZE SZ_16M
> It's a power of two between 128K and 16M, maybe add a build_bug_on and
> build_bug_on_not_power_of_2 to check this?
>

okey, added assertions to init_oa_buffer()



>
> > +#define OA_TAKEN(tail, head)   ((tail - head) & (OA_BUFFER_SIZE - 1))
> > +
> > +/* There's a HW race condition between OA unit tail pointer register
> updates and
> > + * writes to memory whereby the tail pointer can sometimes get ahead of
> what's
> > + * been written out to the OA buffer so far.
> > + *
> > + * Although this can be observed explicitly by checking for a zeroed
> report-id
> > + * field in tail reports, it seems preferable to account for this
> earlier e.g.
> > + * as part of the _oa_buffer_is_empty checks to minimize -EAGAIN
> polling cycles
> > + * in this situation.
> > + *
> > + * To give time for the most recent reports to land before they may be
> copied to
> > + * userspace, the driver operates as if the tail pointer effectively
> lags behind
> > + * the HW tail pointer by 'tail_margin' bytes. The margin in bytes is
> calculated
> > + * based on this constant in nanoseconds, the current OA sampling
> exponent
> > + * and current report size.
> > + *
> > + * There is also a fallback check while reading to simply skip over
> reports with
> > + * a zeroed report-id.
> > + */
> > +#define OA_TAIL_MARGIN_NSEC10ULL
> Yikes!
>

Yeah :-)

Although I've had some feedback from the hw side that there probably is a
race as described here; it's currently an assumption that a 100
microseconds is always enough time for any internally buffered OA reports
to get as far as being coherent with the cpu's view. If a more detailed
analysis is ever done to quantify the maximum latency (maybe not best to
measure as a unit of time) maybe we can update this, but for now I've found
this to work. I'm not really pushing for, or expecting this to be
investigated in detail for Haswell.


>
>
> > +
> > +static void gen7_init_oa_buffer(struct drm_i915_private *dev_priv)
> > +{
> > +   /* Pre-DevBDW: OABUFFER must be set with counters off,
> > +* before OASTATUS1, but after OASTATUS2
> > +*/
> > +   I915_WRITE(GEN7_OASTATUS2, dev_priv->perf.oa.oa_buffer.gtt_offset
> |
> > +  OA_MEM_SELECT_GGTT); /* head */
> > +   I915_WRITE(GEN7_OABUFFER, dev_priv->perf.oa.oa_buffer.
> gtt_offset);
> > +   I915_WRITE(GEN7_OASTATUS1, dev_priv->perf.oa.oa_buffer.gtt_offset
> |
> > +  OABUFFER_SIZE_16M); /* tail */
> > +
> > +   /* On Haswell we have to track which OASTATUS1 flags we've
> > +* already seen since they can't be cleared while periodic
> > +* sampling is enabled.
> > +*/
> > +   dev_priv->perf.oa.gen7_latched_oastatus1 = 0;
> > +
> > +   /* NB: although the OA buffer will initially be allocated
> > +* zeroed via shmfs (and so this memset is redundant when
> > +* first allocating), we may re-init the OA buffer, either
> > +* when re-enabling a stream or in error/reset paths.
> > +*
> > +* The reason we clear the buffer for each re-init is for the
> > +* sanity check in gen7_append_oa_reports() that looks at the
> > +* report-id field to make sure it's non-zero which relies on
> > +* the assumption that new reports are being written to zeroed
> > +* memory...
> > +*/
> > +   memset(dev_priv->perf.oa.oa_buffer.addr, 0, SZ_16M);
> OA_BUFFER_SIZE
>

ah, yep.


>
> > +
> > +   /* Maybe make ->pollin per-stream state if we support multiple
> > +* concurrent streams in the future. */
> > +   atomic_set(_priv->perf.oa.pollin, false);
> > +}
> > +
> > +static int alloc_oa_buffer(struct drm_i915_private *dev_priv)
> > +{
> > +   struct drm_i915_gem_object *bo;
> > +   enum i915_map_type map;
> > +   struct i915_vma *vma;
> > +   int ret;
> > +
> > +   BUG_ON(dev_priv->perf.oa.oa_buffer.obj);
> > +
> > +   ret = i915_mutex_lock_interruptible(_priv->drm);
> > +   if (ret)
> > +   return ret;
> > +
> > +   bo = i915_gem_object_create(_priv->drm, OA_BUFFER_SIZE);
> > +   if (IS_ERR(bo)) {
> > +   DRM_ERROR("Failed to allocate OA buffer\n");
> > +   ret = PTR_ERR(bo);
> > +   goto unlock;
> > +   }
> > +   

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Respect alternate_ddc_pin for all DDI ports

[Maarten Maathuis]

My name does not include the word "show" (Tested-by tag).

On Tue, Oct 11, 2016 at 7:52 PM,  wrote:

> From: Ville Syrjälä 
>
> The VBT provides the platform a way to mix and match the DDI ports vs.
> GMBUS pins. Currently we only trust the VBT for DDI E, which I suppose
> has no standard GMBUS pin assignment. However, there are machines out
> there that use a non-standard mapping for the other ports as well.
> Let's start trusting the VBT on this one for all ports on DDI platforms.
>
> I've structured the code such that other platforms could easily start
> using this as well, by simply filling in the ddi_port_info. IIRC there
> may be CHV system that might actually need this.
>
> v2: Include a commit message, include a debug message during init
>
> Cc: sta...@vger.kernel.org
> Cc: Maarten Maathuis 
> Tested-by: Maarten Maatt show huis 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97877
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/intel_hdmi.c | 84 ++
> -
>  1 file changed, 48 insertions(+), 36 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
> b/drivers/gpu/drm/i915/intel_hdmi.c
> index 8d46f5836746..9ca86e901fc8 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -1799,6 +1799,50 @@ intel_hdmi_add_properties(struct intel_hdmi
> *intel_hdmi, struct drm_connector *c
> intel_hdmi->aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
>  }
>
> +static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
> +enum port port)
> +{
> +   const struct ddi_vbt_port_info *info =
> +   _priv->vbt.ddi_port_info[port];
> +   u8 ddc_pin;
> +
> +   if (info->alternate_ddc_pin) {
> +   DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (VBT)\n",
> + info->alternate_ddc_pin, port_name(port));
> +   return info->alternate_ddc_pin;
> +   }
> +
> +   switch (port) {
> +   case PORT_B:
> +   if (IS_BROXTON(dev_priv))
> +   ddc_pin = GMBUS_PIN_1_BXT;
> +   else
> +   ddc_pin = GMBUS_PIN_DPB;
> +   break;
> +   case PORT_C:
> +   if (IS_BROXTON(dev_priv))
> +   ddc_pin = GMBUS_PIN_2_BXT;
> +   else
> +   ddc_pin = GMBUS_PIN_DPC;
> +   break;
> +   case PORT_D:
> +   if (IS_CHERRYVIEW(dev_priv))
> +   ddc_pin = GMBUS_PIN_DPD_CHV;
> +   else
> +   ddc_pin = GMBUS_PIN_DPD;
> +   break;
> +   default:
> +   MISSING_CASE(port);
> +   ddc_pin = GMBUS_PIN_DPB;
> +   break;
> +   }
> +
> +   DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (platform
> default)\n",
> + ddc_pin, port_name(port));
> +
> +   return ddc_pin;
> +}
> +
>  void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
>struct intel_connector *intel_connector)
>  {
> @@ -1808,7 +1852,6 @@ void intel_hdmi_init_connector(struct
> intel_digital_port *intel_dig_port,
> struct drm_device *dev = intel_encoder->base.dev;
> struct drm_i915_private *dev_priv = to_i915(dev);
> enum port port = intel_dig_port->port;
> -   uint8_t alternate_ddc_pin;
>
> DRM_DEBUG_KMS("Adding HDMI connector on port %c\n",
>   port_name(port));
> @@ -1826,12 +1869,10 @@ void intel_hdmi_init_connector(struct
> intel_digital_port *intel_dig_port,
> connector->doublescan_allowed = 0;
> connector->stereo_allowed = 1;
>
> +   intel_hdmi->ddc_bus = intel_hdmi_ddc_pin(dev_priv, port);
> +
> switch (port) {
> case PORT_B:
> -   if (IS_BROXTON(dev_priv))
> -   intel_hdmi->ddc_bus = GMBUS_PIN_1_BXT;
> -   else
> -   intel_hdmi->ddc_bus = GMBUS_PIN_DPB;
> /*
>  * On BXT A0/A1, sw needs to activate DDIA HPD logic and
>  * interrupts to check the external panel connection.
> @@ -1842,46 +1883,17 @@ void intel_hdmi_init_connector(struct
> intel_digital_port *intel_dig_port,
> intel_encoder->hpd_pin = HPD_PORT_B;
> break;
> case PORT_C:
> -   if (IS_BROXTON(dev_priv))
> -   intel_hdmi->ddc_bus = GMBUS_PIN_2_BXT;
> -   else
> -   intel_hdmi->ddc_bus = GMBUS_PIN_DPC;
> intel_encoder->hpd_pin = HPD_PORT_C;
> break;
> case PORT_D:
> -   if (WARN_ON(IS_BROXTON(dev_priv)))
> -   intel_hdmi->ddc_bus = GMBUS_PIN_DISABLED;
> -

Re: [Intel-gfx] [PATCH 04/10] drm/i915/gen9: Cleanup skl_pipe_wm_active_state

[Paulo Zanoni]

Em Sex, 2016-10-07 às 20:11 -0400, Lyude escreveu:
> This function is a wreck, let's help it get it's life back together
> and
> cleanup all of the copy pasta here.

s/it's/its/

Idea for your next patch series: rename skl_pipe_wm_active_state()'s
"i" parameter to something more meaningful.

Reviewed-by: Paulo Zanoni 

> 
> (adding Maarten's reviewed-by since this is just a split-up version
> of one
> of the previous patches)
> 
> Signed-off-by: Lyude 
> Reviewed-by: Maarten Lankhorst 
> Cc: Ville Syrjälä 
> Cc: Paulo Zanoni 
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 52 +++--
> 
>  1 file changed, 14 insertions(+), 38 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 4c2ebcd..5dbaf12 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4267,46 +4267,22 @@ static void ilk_optimize_watermarks(struct
> intel_crtc_state *cstate)
>  static void skl_pipe_wm_active_state(uint32_t val,
>    struct skl_pipe_wm *active,
>    bool is_transwm,
> -  bool is_cursor,
>    int i,
>    int level)
>  {
> + struct skl_plane_wm *plane_wm = >planes[i];
>   bool is_enabled = (val & PLANE_WM_EN) != 0;
>  
>   if (!is_transwm) {
> - if (!is_cursor) {
> - active->planes[i].wm[level].plane_en =
> is_enabled;
> - active->planes[i].wm[level].plane_res_b =
> - val & PLANE_WM_BLOCKS_MASK;
> - active->planes[i].wm[level].plane_res_l =
> - (val >> PLANE_WM_LINES_SHIFT) &
> - PLANE_WM_LINES_MASK;
> - } else {
> - active-
> >planes[PLANE_CURSOR].wm[level].plane_en =
> - is_enabled;
> - active-
> >planes[PLANE_CURSOR].wm[level].plane_res_b =
> - val & PLANE_WM_BLOCKS_MASK;
> - active-
> >planes[PLANE_CURSOR].wm[level].plane_res_l =
> - (val >> PLANE_WM_LINES_SHIFT) &
> - PLANE_WM_LINES_MASK;
> - }
> + plane_wm->wm[level].plane_en = is_enabled;
> + plane_wm->wm[level].plane_res_b = val &
> PLANE_WM_BLOCKS_MASK;
> + plane_wm->wm[level].plane_res_l =
> + (val >> PLANE_WM_LINES_SHIFT) &
> PLANE_WM_LINES_MASK;
>   } else {
> - if (!is_cursor) {
> - active->planes[i].trans_wm.plane_en =
> is_enabled;
> - active->planes[i].trans_wm.plane_res_b =
> - val & PLANE_WM_BLOCKS_MASK;
> - active->planes[i].trans_wm.plane_res_l =
> - (val >> PLANE_WM_LINES_SHIFT) &
> - PLANE_WM_LINES_MASK;
> - } else {
> - active-
> >planes[PLANE_CURSOR].trans_wm.plane_en =
> - is_enabled;
> - active-
> >planes[PLANE_CURSOR].trans_wm.plane_res_b =
> - val & PLANE_WM_BLOCKS_MASK;
> - active-
> >planes[PLANE_CURSOR].trans_wm.plane_res_l =
> - (val >> PLANE_WM_LINES_SHIFT) &
> - PLANE_WM_LINES_MASK;
> - }
> + plane_wm->trans_wm.plane_en = is_enabled;
> + plane_wm->trans_wm.plane_res_b = val &
> PLANE_WM_BLOCKS_MASK;
> + plane_wm->trans_wm.plane_res_l =
> + (val >> PLANE_WM_LINES_SHIFT) &
> PLANE_WM_LINES_MASK;
>   }
>  }
>  
> @@ -4345,20 +4321,20 @@ static void skl_pipe_wm_get_hw_state(struct
> drm_crtc *crtc)
>   for (level = 0; level <= max_level; level++) {
>   for (i = 0; i < intel_num_planes(intel_crtc); i++) {
>   temp = hw->plane[pipe][i][level];
> - skl_pipe_wm_active_state(temp, active,
> false,
> - false, i, level);
> + skl_pipe_wm_active_state(temp, active,
> false, i, level);
>   }
>   temp = hw->plane[pipe][PLANE_CURSOR][level];
> - skl_pipe_wm_active_state(temp, active, false, true,
> i, level);
> + skl_pipe_wm_active_state(temp, active, false,
> PLANE_CURSOR,
> +  level);
>   }
>  
>   for (i = 0; i < intel_num_planes(intel_crtc); i++) {
>   temp = hw->plane_trans[pipe][i];
> - skl_pipe_wm_active_state(temp, active, true, false,
> i, 0);
> + skl_pipe_wm_active_state(temp, 

Re: [Intel-gfx] [PATCH v2 03/10] drm/i915/gen9: Make skl_wm_level per-plane

[Paulo Zanoni]

Em Sex, 2016-10-07 às 20:11 -0400, Lyude escreveu:
> Having skl_wm_level contain all of the watermarks for each plane is
> annoying since it prevents us from having any sort of object to
> represent a single watermark level, something we take advantage of in
> the next commit to cut down on all of the copy paste code in here.
> 
> Changes since v1:
> - Style nitpicks
> - Fix accidental usage of i vs. PLANE_CURSOR
> - Split out skl_pipe_wm_active_state simplification into separate
> patch
> 
> Signed-off-by: Lyude 

Reviewed-by: Paulo Zanoni 

> Reviewed-by: Maarten Lankhorst 
> Cc: Ville Syrjälä 
> Cc: Paulo Zanoni 
> ---
>  drivers/gpu/drm/i915/i915_drv.h  |   6 +-
>  drivers/gpu/drm/i915/intel_drv.h |   6 +-
>  drivers/gpu/drm/i915/intel_pm.c  | 207 +++
> 
>  3 files changed, 111 insertions(+), 108 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index e9d035ea..0287c93 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1649,9 +1649,9 @@ struct skl_wm_values {
>  };
>  
>  struct skl_wm_level {
> - bool plane_en[I915_MAX_PLANES];
> - uint16_t plane_res_b[I915_MAX_PLANES];
> - uint8_t plane_res_l[I915_MAX_PLANES];
> + bool plane_en;
> + uint16_t plane_res_b;
> + uint8_t plane_res_l;
>  };
>  
>  /*
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 35ba282..d684f4f 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -468,9 +468,13 @@ struct intel_pipe_wm {
>   bool sprites_scaled;
>  };
>  
> -struct skl_pipe_wm {
> +struct skl_plane_wm {
>   struct skl_wm_level wm[8];
>   struct skl_wm_level trans_wm;
> +};
> +
> +struct skl_pipe_wm {
> + struct skl_plane_wm planes[I915_MAX_PLANES];
>   uint32_t linetime;
>  };
>  
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index cc5d5e9..4c2ebcd 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3670,67 +3670,52 @@ static int
>  skl_compute_wm_level(const struct drm_i915_private *dev_priv,
>    struct skl_ddb_allocation *ddb,
>    struct intel_crtc_state *cstate,
> +  struct intel_plane *intel_plane,
>    int level,
>    struct skl_wm_level *result)
>  {
>   struct drm_atomic_state *state = cstate->base.state;
>   struct intel_crtc *intel_crtc = to_intel_crtc(cstate-
> >base.crtc);
> - struct drm_plane *plane;
> - struct intel_plane *intel_plane;
> - struct intel_plane_state *intel_pstate;
> + struct drm_plane *plane = _plane->base;
> + struct intel_plane_state *intel_pstate = NULL;
>   uint16_t ddb_blocks;
>   enum pipe pipe = intel_crtc->pipe;
>   int ret;
> + int i = skl_wm_plane_id(intel_plane);
> +
> + if (state)
> + intel_pstate =
> + intel_atomic_get_existing_plane_state(state,
> +   intel_
> plane);
>  
>   /*
> -  * We'll only calculate watermarks for planes that are
> actually
> -  * enabled, so make sure all other planes are set as
> disabled.
> +  * Note: If we start supporting multiple pending atomic
> commits against
> +  * the same planes/CRTC's in the future, plane->state will
> no longer be
> +  * the correct pre-state to use for the calculations here
> and we'll
> +  * need to change where we get the 'unchanged' plane data
> from.
> +  *
> +  * For now this is fine because we only allow one queued
> commit against
> +  * a CRTC.  Even if the plane isn't modified by this
> transaction and we
> +  * don't have a plane lock, we still have the CRTC's lock,
> so we know
> +  * that no other transactions are racing with us to update
> it.
>    */
> - memset(result, 0, sizeof(*result));
> + if (!intel_pstate)
> + intel_pstate = to_intel_plane_state(plane->state);
>  
> - for_each_intel_plane_mask(_priv->drm,
> -   intel_plane,
> -   cstate->base.plane_mask) {
> - int i = skl_wm_plane_id(intel_plane);
> -
> - plane = _plane->base;
> - intel_pstate = NULL;
> - if (state)
> - intel_pstate =
> - intel_atomic_get_existing_plane_stat
> e(state,
> - 
>   intel_plane);
> + WARN_ON(!intel_pstate->base.fb);
>  
> - /*
> -  * Note: If we start supporting multiple pending
> atomic commits
> -  * against the same planes/CRTC's in the future,
> plane->state
> -  

Re: [Intel-gfx] [PATCH v2 01/10] drm/i915/skl: Move per-pipe ddb allocations into crtc states

[Paulo Zanoni]

Em Sex, 2016-10-07 às 20:11 -0400, Lyude escreveu:
> First part of cleaning up all of the skl watermark code. This moves
> the
> structures for storing the ddb allocations of each pipe into
> intel_crtc_state, along with moving the structures for storing the
> current ddb allocations active on hardware into intel_crtc.
> 
> Changes since v1:
> - Don't replace alloc->start = alloc->end = 0;
> 
> Signed-off-by: Lyude 

Reviewed-by: Paulo Zanoni 

> Reviewed-by: Maarten Lankhorst 
> Cc: Ville Syrjälä 
> Cc: Paulo Zanoni 
> ---
>  drivers/gpu/drm/i915/i915_drv.h  |  1 -
>  drivers/gpu/drm/i915/intel_display.c | 16 ---
>  drivers/gpu/drm/i915/intel_drv.h |  8 +---
>  drivers/gpu/drm/i915/intel_pm.c  | 40 +++---
> --
>  4 files changed, 30 insertions(+), 35 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index a219a35..bb2de8d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1637,7 +1637,6 @@ static inline bool skl_ddb_entry_equal(const
> struct skl_ddb_entry *e1,
>  }
>  
>  struct skl_ddb_allocation {
> - struct skl_ddb_entry pipe[I915_MAX_PIPES];
>   struct skl_ddb_entry plane[I915_MAX_PIPES][I915_MAX_PLANES];
> /* packed/uv */
>   struct skl_ddb_entry
> y_plane[I915_MAX_PIPES][I915_MAX_PLANES];
>  };
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index a366656..17733af 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -14235,12 +14235,11 @@ static void skl_update_crtcs(struct
> drm_atomic_state *state,
>    unsigned int *crtc_vblank_mask)
>  {
>   struct drm_device *dev = state->dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
>   struct intel_atomic_state *intel_state =
> to_intel_atomic_state(state);
>   struct drm_crtc *crtc;
> + struct intel_crtc *intel_crtc;
>   struct drm_crtc_state *old_crtc_state;
> - struct skl_ddb_allocation *new_ddb = _state-
> >wm_results.ddb;
> - struct skl_ddb_allocation *cur_ddb = _priv-
> >wm.skl_hw.ddb;
> + struct intel_crtc_state *cstate;
>   unsigned int updated = 0;
>   bool progress;
>   enum pipe pipe;
> @@ -14258,12 +14257,14 @@ static void skl_update_crtcs(struct
> drm_atomic_state *state,
>   for_each_crtc_in_state(state, crtc, old_crtc_state,
> i) {
>   bool vbl_wait = false;
>   unsigned int cmask = drm_crtc_mask(crtc);
> - pipe = to_intel_crtc(crtc)->pipe;
> +
> + intel_crtc = to_intel_crtc(crtc);
> + cstate = to_intel_crtc_state(crtc->state);
> + pipe = intel_crtc->pipe;
>  
>   if (updated & cmask || !crtc->state->active)
>   continue;
> - if (skl_ddb_allocation_overlaps(state,
> cur_ddb, new_ddb,
> - pipe))
> + if (skl_ddb_allocation_overlaps(state,
> intel_crtc))
>   continue;
>  
>   updated |= cmask;
> @@ -14274,7 +14275,8 @@ static void skl_update_crtcs(struct
> drm_atomic_state *state,
>    * then we need to wait for a vblank to pass
> for the
>    * new ddb allocation to take effect.
>    */
> - if (!skl_ddb_allocation_equals(cur_ddb,
> new_ddb, pipe) &&
> + if (!skl_ddb_entry_equal(
> >wm.skl.ddb,
> +  _crtc-
> >hw_ddb) &&
>   !crtc->state->active_changed &&
>   intel_state->wm_results.dirty_pipes !=
> updated)
>   vbl_wait = true;
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index f48e79a..35ba282 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -496,6 +496,7 @@ struct intel_crtc_wm_state {
>   struct {
>   /* gen9+ only needs 1-step wm programming */
>   struct skl_pipe_wm optimal;
> + struct skl_ddb_entry ddb;
>  
>   /* cached plane data rate */
>   unsigned plane_data_rate[I915_MAX_PLANES];
> @@ -733,6 +734,9 @@ struct intel_crtc {
>   bool cxsr_allowed;
>   } wm;
>  
> + /* gen9+: ddb allocation currently being used */
> + struct skl_ddb_entry hw_ddb;
> +
>   int scanline_offset;
>  
>   struct {
> @@ -1755,9 +1759,7 @@ bool skl_ddb_allocation_equals(const struct
> skl_ddb_allocation *old,
>    

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915/gen9: unconditionally apply the memory bandwidth WA (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/gen9: unconditionally apply the 
memory bandwidth WA (rev2)
URL   : https://patchwork.freedesktop.org/series/13548/
State : warning

== Summary ==

Series 13548v2 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/13548/revisions/2/mbox/

Test kms_psr_sink_crc:
Subgroup psr_basic:
pass   -> DMESG-WARN (fi-skl-6700hq)
Test vgem_basic:
Subgroup unload:
pass   -> SKIP   (fi-ilk-650)
skip   -> PASS   (fi-skl-6700k)

fi-bdw-5557u total:248  pass:231  dwarn:0   dfail:0   fail:0   skip:17 
fi-bsw-n3050 total:248  pass:204  dwarn:0   dfail:0   fail:0   skip:44 
fi-bxt-t5700 total:248  pass:217  dwarn:0   dfail:0   fail:0   skip:31 
fi-byt-j1900 total:248  pass:214  dwarn:1   dfail:0   fail:1   skip:32 
fi-byt-n2820 total:248  pass:211  dwarn:0   dfail:0   fail:1   skip:36 
fi-hsw-4770  total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-hsw-4770r total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-ilk-650   total:248  pass:184  dwarn:0   dfail:0   fail:2   skip:62 
fi-ivb-3520m total:248  pass:221  dwarn:0   dfail:0   fail:0   skip:27 
fi-ivb-3770  total:248  pass:222  dwarn:0   dfail:0   fail:0   skip:26 
fi-kbl-7200u total:248  pass:222  dwarn:0   dfail:0   fail:0   skip:26 
fi-skl-6700hqtotal:248  pass:223  dwarn:1   dfail:0   fail:0   skip:24 
fi-skl-6700k total:248  pass:222  dwarn:1   dfail:0   fail:0   skip:25 
fi-snb-2520m total:248  pass:211  dwarn:0   dfail:0   fail:0   skip:37 
fi-snb-2600  total:248  pass:209  dwarn:0   dfail:0   fail:0   skip:39 

Results at /archive/results/CI_IGT_test/Patchwork_2677/

41409515b7b3365bcb2c2e9239fdfaa286a51333 drm-intel-nightly: 
2016y-10m-11d-17h-55m-34s UTC integration manifest
85ad389 drm/i915/gen9: look for adjusted_mode in the SAGV check for interlaced
604d41f drm/i915/gen9: unconditionally apply the memory bandwidth WA

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Re: [Intel-gfx] [PATCH] drm/i915: Add i915 perf infrastructure

[Robert Bragg]

On Fri, Oct 7, 2016 at 10:10 AM, Matthew Auld <
matthew.william.a...@gmail.com> wrote:

> On 14 September 2016 at 16:32, Robert Bragg  wrote:
>
> > +
> > +int i915_perf_open_ioctl_locked(struct drm_device *dev,
> > +   struct drm_i915_perf_open_param *param,
> > +   struct perf_open_properties *props,
> > +   struct drm_file *file)
> > +{
> This should be static and also let's just make it take dev_priv directly.
>

Ah, yep, done.


> > +   case DRM_I915_PERF_PROP_MAX:
> > +   BUG();
> We already handle this case above, but I guess we still need this in
> order to silence gcc...
>

right, and preferable to having a default: case, for the future compiler
warning to handle any new properties here.



> > diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> > index 03725fe..77fe79b 100644
> > --- a/include/uapi/drm/i915_drm.h
> > +++ b/include/uapi/drm/i915_drm.h
> > @@ -258,6 +258,7 @@ typedef struct _drm_i915_sarea {
> >  #define DRM_I915_GEM_USERPTR   0x33
> >  #define DRM_I915_GEM_CONTEXT_GETPARAM  0x34
> >  #define DRM_I915_GEM_CONTEXT_SETPARAM  0x35
> > +#define DRM_I915_PERF_OPEN 0x36
> >
> >  #define DRM_IOCTL_I915_INITDRM_IOW( DRM_COMMAND_BASE +
> DRM_I915_INIT, drm_i915_init_t)
> >  #define DRM_IOCTL_I915_FLUSH   DRM_IO ( DRM_COMMAND_BASE +
> DRM_I915_FLUSH)
> > @@ -311,6 +312,7 @@ typedef struct _drm_i915_sarea {
> >  #define DRM_IOCTL_I915_GEM_USERPTR DRM_IOWR
> (DRM_COMMAND_BASE + DRM_I915_GEM_USERPTR, struct drm_i915_gem_userptr)
> >  #define DRM_IOCTL_I915_GEM_CONTEXT_GETPARAMDRM_IOWR
> (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_GETPARAM, struct
> drm_i915_gem_context_param)
> >  #define DRM_IOCTL_I915_GEM_CONTEXT_SETPARAMDRM_IOWR
> (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_SETPARAM, struct
> drm_i915_gem_context_param)
> > +#define DRM_IOCTL_I915_PERF_OPEN   DRM_IOR(DRM_COMMAND_BASE +
> DRM_I915_PERF_OPEN, struct drm_i915_perf_open_param)
> As you already pointed out this will need to be IOW.
>

Yeah, changed locally after I realised the mistake here, just didn't get
around to posting the patch.


Also applied the notes to not redundantly init some vars, spurious new
line, redundant include.

Thanks,
- Robert
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[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Trust VBT aux/ddc information

[Patchwork]

== Series Details ==

Series: drm/i915: Trust VBT aux/ddc information
URL   : https://patchwork.freedesktop.org/series/13600/
State : warning

== Summary ==

Series 13600v1 drm/i915: Trust VBT aux/ddc information
https://patchwork.freedesktop.org/api/1.0/series/13600/revisions/1/mbox/

Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
dmesg-warn -> PASS   (fi-byt-j1900)
Subgroup suspend-read-crc-pipe-c:
pass   -> DMESG-WARN (fi-skl-6700k)
Test kms_psr_sink_crc:
Subgroup psr_basic:
pass   -> DMESG-WARN (fi-skl-6700hq)
Test pm_backlight:
Subgroup basic-brightness:
skip   -> PASS   (fi-skl-6700k)
Test vgem_basic:
Subgroup unload:
pass   -> SKIP   (fi-ivb-3770)
pass   -> SKIP   (fi-byt-n2820)
skip   -> PASS   (fi-bsw-n3050)
skip   -> PASS   (fi-skl-6700k)
skip   -> PASS   (fi-bdw-5557u)

fi-bdw-5557u total:248  pass:232  dwarn:0   dfail:0   fail:0   skip:16 
fi-bsw-n3050 total:248  pass:205  dwarn:0   dfail:0   fail:0   skip:43 
fi-bxt-t5700 total:248  pass:217  dwarn:0   dfail:0   fail:0   skip:31 
fi-byt-j1900 total:248  pass:215  dwarn:0   dfail:0   fail:1   skip:32 
fi-byt-n2820 total:248  pass:210  dwarn:0   dfail:0   fail:1   skip:37 
fi-hsw-4770  total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-hsw-4770r total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-ilk-650   total:248  pass:185  dwarn:0   dfail:0   fail:2   skip:61 
fi-ivb-3520m total:248  pass:221  dwarn:0   dfail:0   fail:0   skip:27 
fi-ivb-3770  total:248  pass:221  dwarn:0   dfail:0   fail:0   skip:27 
fi-kbl-7200u total:248  pass:222  dwarn:0   dfail:0   fail:0   skip:26 
fi-skl-6700hqtotal:248  pass:223  dwarn:1   dfail:0   fail:0   skip:24 
fi-skl-6700k total:248  pass:222  dwarn:2   dfail:0   fail:0   skip:24 
fi-snb-2520m total:248  pass:211  dwarn:0   dfail:0   fail:0   skip:37 
fi-snb-2600  total:248  pass:209  dwarn:0   dfail:0   fail:0   skip:39 

Results at /archive/results/CI_IGT_test/Patchwork_2676/

41409515b7b3365bcb2c2e9239fdfaa286a51333 drm-intel-nightly: 
2016y-10m-11d-17h-55m-34s UTC integration manifest
8e39dff drm/i915: Fix whitespace issues
536a3b5 drm/i915: Clean up DDI DDC/AUX CH sanitation
a01faf4 drm/i915: Respect alternate_ddc_pin for all DDI ports
8e81858 drm/i915: Respect alternate_aux_channel for all DDI ports

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[Intel-gfx] [PATCH 1/2] drm/i915/gen9: unconditionally apply the memory bandwidth WA

[Paulo Zanoni]

Mahesh Kumar is already working on a proper implementation for the
workaround, but while we still don't have it, let's just
unconditionally apply the workaround for everybody and we hope we can
close all those numerous bugzilla tickets. Also, I'm not sure how easy
it will be to backport the final implementation to the stable Kernels,
and this patch here is probably easier to backport.

At the present moment I still don't have confirmation that this patch
fixes any of the bugs listed below, but we should definitely try
testing all of them again.

v2: s/intel_needs_memory_bw_wa/skl_needs_memory_bw_wa/ (Lyude).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94337
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94605
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94884
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95010
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96226
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96828
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97450
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97830
Cc: sta...@vger.kernel.org
Cc: Mahesh Kumar 
Cc: Lyude 
Cc: Dhinakaran Pandiyan 
Signed-off-by: Paulo Zanoni 
---
 drivers/gpu/drm/i915/intel_pm.c | 49 ++---
 1 file changed, 41 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index fe6c1c6..13bd974 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2879,6 +2879,21 @@ skl_wm_plane_id(const struct intel_plane *plane)
}
 }
 
+/*
+ * FIXME: We still don't have the proper code detect if we need to apply the 
WA,
+ * so assume we'll always need it in order to avoid underruns.
+ */
+static bool skl_needs_memory_bw_wa(struct intel_atomic_state *state)
+{
+   struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+
+   if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) ||
+   IS_KABYLAKE(dev_priv))
+   return true;
+
+   return false;
+}
+
 static bool
 intel_has_sagv(struct drm_i915_private *dev_priv)
 {
@@ -2999,9 +3014,10 @@ bool intel_can_enable_sagv(struct drm_atomic_state 
*state)
struct drm_device *dev = state->dev;
struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
-   struct drm_crtc *crtc;
+   struct intel_crtc *crtc;
+   struct intel_plane *plane;
enum pipe pipe;
-   int level, plane;
+   int level, id, latency;
 
if (!intel_has_sagv(dev_priv))
return false;
@@ -3019,27 +3035,36 @@ bool intel_can_enable_sagv(struct drm_atomic_state 
*state)
 
/* Since we're now guaranteed to only have one active CRTC... */
pipe = ffs(intel_state->active_crtcs) - 1;
-   crtc = dev_priv->pipe_to_crtc_mapping[pipe];
+   crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
 
-   if (crtc->state->mode.flags & DRM_MODE_FLAG_INTERLACE)
+   if (crtc->base.state->mode.flags & DRM_MODE_FLAG_INTERLACE)
return false;
 
-   for_each_plane(dev_priv, pipe, plane) {
+   for_each_intel_plane_on_crtc(dev, crtc, plane) {
+   id = skl_wm_plane_id(plane);
+
/* Skip this plane if it's not enabled */
-   if (intel_state->wm_results.plane[pipe][plane][0] == 0)
+   if (intel_state->wm_results.plane[pipe][id][0] == 0)
continue;
 
/* Find the highest enabled wm level for this plane */
for (level = ilk_wm_max_level(dev);
-intel_state->wm_results.plane[pipe][plane][level] == 0; 
--level)
+intel_state->wm_results.plane[pipe][id][level] == 0; 
--level)
 { }
 
+   latency = dev_priv->wm.skl_latency[level];
+
+   if (skl_needs_memory_bw_wa(intel_state) &&
+   plane->base.state->fb->modifier[0] ==
+   I915_FORMAT_MOD_X_TILED)
+   latency += 15;
+
/*
 * If any of the planes on this pipe don't enable wm levels
 * that incur memory latencies higher then 30µs we can't enable
 * the SAGV
 */
-   if (dev_priv->wm.skl_latency[level] < SKL_SAGV_BLOCK_TIME)
+   if (latency < SKL_SAGV_BLOCK_TIME)
return false;
}
 
@@ -3555,12 +3580,18 @@ static int skl_compute_plane_wm(const struct 
drm_i915_private *dev_priv,
uint32_t width = 0, height = 0;
uint32_t plane_pixel_rate;
uint32_t y_tile_minimum, y_min_scanlines;
+   struct intel_atomic_state *state =
+   to_intel_atomic_state(cstate->base.state);
+   bool apply_memory_bw_wa = 

[Intel-gfx] [PATCH 2/4] drm/i915: Respect alternate_ddc_pin for all DDI ports

[ville . syrjala]

From: Ville Syrjälä 

The VBT provides the platform a way to mix and match the DDI ports vs.
GMBUS pins. Currently we only trust the VBT for DDI E, which I suppose
has no standard GMBUS pin assignment. However, there are machines out
there that use a non-standard mapping for the other ports as well.
Let's start trusting the VBT on this one for all ports on DDI platforms.

I've structured the code such that other platforms could easily start
using this as well, by simply filling in the ddi_port_info. IIRC there
may be CHV system that might actually need this.

v2: Include a commit message, include a debug message during init

Cc: sta...@vger.kernel.org
Cc: Maarten Maathuis 
Tested-by: Maarten Maatt show huis 
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97877
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_hdmi.c | 84 ++-
 1 file changed, 48 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c 
b/drivers/gpu/drm/i915/intel_hdmi.c
index 8d46f5836746..9ca86e901fc8 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1799,6 +1799,50 @@ intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, 
struct drm_connector *c
intel_hdmi->aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
 }
 
+static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
+enum port port)
+{
+   const struct ddi_vbt_port_info *info =
+   _priv->vbt.ddi_port_info[port];
+   u8 ddc_pin;
+
+   if (info->alternate_ddc_pin) {
+   DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (VBT)\n",
+ info->alternate_ddc_pin, port_name(port));
+   return info->alternate_ddc_pin;
+   }
+
+   switch (port) {
+   case PORT_B:
+   if (IS_BROXTON(dev_priv))
+   ddc_pin = GMBUS_PIN_1_BXT;
+   else
+   ddc_pin = GMBUS_PIN_DPB;
+   break;
+   case PORT_C:
+   if (IS_BROXTON(dev_priv))
+   ddc_pin = GMBUS_PIN_2_BXT;
+   else
+   ddc_pin = GMBUS_PIN_DPC;
+   break;
+   case PORT_D:
+   if (IS_CHERRYVIEW(dev_priv))
+   ddc_pin = GMBUS_PIN_DPD_CHV;
+   else
+   ddc_pin = GMBUS_PIN_DPD;
+   break;
+   default:
+   MISSING_CASE(port);
+   ddc_pin = GMBUS_PIN_DPB;
+   break;
+   }
+
+   DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (platform default)\n",
+ ddc_pin, port_name(port));
+
+   return ddc_pin;
+}
+
 void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
   struct intel_connector *intel_connector)
 {
@@ -1808,7 +1852,6 @@ void intel_hdmi_init_connector(struct intel_digital_port 
*intel_dig_port,
struct drm_device *dev = intel_encoder->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
enum port port = intel_dig_port->port;
-   uint8_t alternate_ddc_pin;
 
DRM_DEBUG_KMS("Adding HDMI connector on port %c\n",
  port_name(port));
@@ -1826,12 +1869,10 @@ void intel_hdmi_init_connector(struct 
intel_digital_port *intel_dig_port,
connector->doublescan_allowed = 0;
connector->stereo_allowed = 1;
 
+   intel_hdmi->ddc_bus = intel_hdmi_ddc_pin(dev_priv, port);
+
switch (port) {
case PORT_B:
-   if (IS_BROXTON(dev_priv))
-   intel_hdmi->ddc_bus = GMBUS_PIN_1_BXT;
-   else
-   intel_hdmi->ddc_bus = GMBUS_PIN_DPB;
/*
 * On BXT A0/A1, sw needs to activate DDIA HPD logic and
 * interrupts to check the external panel connection.
@@ -1842,46 +1883,17 @@ void intel_hdmi_init_connector(struct 
intel_digital_port *intel_dig_port,
intel_encoder->hpd_pin = HPD_PORT_B;
break;
case PORT_C:
-   if (IS_BROXTON(dev_priv))
-   intel_hdmi->ddc_bus = GMBUS_PIN_2_BXT;
-   else
-   intel_hdmi->ddc_bus = GMBUS_PIN_DPC;
intel_encoder->hpd_pin = HPD_PORT_C;
break;
case PORT_D:
-   if (WARN_ON(IS_BROXTON(dev_priv)))
-   intel_hdmi->ddc_bus = GMBUS_PIN_DISABLED;
-   else if (IS_CHERRYVIEW(dev_priv))
-   intel_hdmi->ddc_bus = GMBUS_PIN_DPD_CHV;
-   else
-   intel_hdmi->ddc_bus = GMBUS_PIN_DPD;
intel_encoder->hpd_pin = HPD_PORT_D;
break;
case PORT_E:
-   /* On SKL PORT E doesn't have seperate GMBUS pin
-  

[Intel-gfx] [PATCH 0/4] drm/i915: Trust VBT aux/ddc information

[ville . syrjala]

From: Ville Syrjälä 

So we have a bug or two ([1] at least) about using an incorrect gmbus pin for
a HDMI connector. So I cooked up some patches to expand our use of VBT for this
information. So far I've kept it limited to DDI platforms, but I think I've seen
another bug about CHV using the incorrect gmbus pin as well, not 100% sure 
though.

I slapped cc:stable on them since they do fix an actual issue. My track record
with this sort of firmware information hasn't been great as of late, so some
fallout might occur.


Anyways here's the entire series:
git://github.com/vsyrjala/linux.git trust_vbt_ddc_aux_pins_2

[1] https://bugs.freedesktop.org/show_bug.cgi?id=97877

Cc: Maarten Maathuis 

Ville Syrjälä (4):
  drm/i915: Respect alternate_aux_channel for all DDI ports
  drm/i915: Respect alternate_ddc_pin for all DDI ports
  drm/i915: Clean up DDI DDC/AUX CH sanitation
  drm/i915: Fix whitespace issues

 drivers/gpu/drm/i915/intel_bios.c | 116 +++---
 drivers/gpu/drm/i915/intel_dp.c   |  87 +++-
 drivers/gpu/drm/i915/intel_hdmi.c |  84 +++
 3 files changed, 167 insertions(+), 120 deletions(-)

-- 
2.7.4

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[Intel-gfx] [PATCH 4/4] drm/i915: Fix whitespace issues

[ville . syrjala]

From: Ville Syrjälä 

Fix the poorly indented port parameters to the aux ctl and data
reg functions. This was fallout from the s/i915_mmio_reg_t/i915_reg_t/
that happened during the review of commit f0f59a00a1c9 ("drm/i915:
Type safe register read/write")

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_dp.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index b0753b272101..25cde7356b59 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1147,7 +1147,7 @@ static enum port intel_aux_port(struct drm_i915_private 
*dev_priv,
 }
 
 static i915_reg_t g4x_aux_ctl_reg(struct drm_i915_private *dev_priv,
-  enum port port)
+ enum port port)
 {
switch (port) {
case PORT_B:
@@ -1161,7 +1161,7 @@ static i915_reg_t g4x_aux_ctl_reg(struct drm_i915_private 
*dev_priv,
 }
 
 static i915_reg_t g4x_aux_data_reg(struct drm_i915_private *dev_priv,
-   enum port port, int index)
+  enum port port, int index)
 {
switch (port) {
case PORT_B:
@@ -1175,7 +1175,7 @@ static i915_reg_t g4x_aux_data_reg(struct 
drm_i915_private *dev_priv,
 }
 
 static i915_reg_t ilk_aux_ctl_reg(struct drm_i915_private *dev_priv,
-  enum port port)
+ enum port port)
 {
switch (port) {
case PORT_A:
@@ -1191,7 +1191,7 @@ static i915_reg_t ilk_aux_ctl_reg(struct drm_i915_private 
*dev_priv,
 }
 
 static i915_reg_t ilk_aux_data_reg(struct drm_i915_private *dev_priv,
-   enum port port, int index)
+  enum port port, int index)
 {
switch (port) {
case PORT_A:
@@ -1207,7 +1207,7 @@ static i915_reg_t ilk_aux_data_reg(struct 
drm_i915_private *dev_priv,
 }
 
 static i915_reg_t skl_aux_ctl_reg(struct drm_i915_private *dev_priv,
-  enum port port)
+ enum port port)
 {
switch (port) {
case PORT_A:
@@ -1222,7 +1222,7 @@ static i915_reg_t skl_aux_ctl_reg(struct drm_i915_private 
*dev_priv,
 }
 
 static i915_reg_t skl_aux_data_reg(struct drm_i915_private *dev_priv,
-   enum port port, int index)
+  enum port port, int index)
 {
switch (port) {
case PORT_A:
@@ -1237,7 +1237,7 @@ static i915_reg_t skl_aux_data_reg(struct 
drm_i915_private *dev_priv,
 }
 
 static i915_reg_t intel_aux_ctl_reg(struct drm_i915_private *dev_priv,
-enum port port)
+   enum port port)
 {
if (INTEL_INFO(dev_priv)->gen >= 9)
return skl_aux_ctl_reg(dev_priv, port);
@@ -1248,7 +1248,7 @@ static i915_reg_t intel_aux_ctl_reg(struct 
drm_i915_private *dev_priv,
 }
 
 static i915_reg_t intel_aux_data_reg(struct drm_i915_private *dev_priv,
- enum port port, int index)
+enum port port, int index)
 {
if (INTEL_INFO(dev_priv)->gen >= 9)
return skl_aux_data_reg(dev_priv, port, index);
-- 
2.7.4

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[Intel-gfx] [PATCH 3/4] drm/i915: Clean up DDI DDC/AUX CH sanitation

[ville . syrjala]

From: Ville Syrjälä 

Now that we use the AUX and GMBUS assignment from VBT for all ports,
let's clean up the sanitization of the port information a bit.
Previosuly we only did this for port E, and only complained about a
non-standard assignment for the other ports. But as we know that
non-standard assignments are a fact of life, let's expand the
sanitization to all the ports.

v2: Include a commit message, fix up the comments a bit

Cc: sta...@vger.kernel.org
Cc: Maarten Maathuis 
Tested-by: Maarten Maathuis 
References: https://bugs.freedesktop.org/show_bug.cgi?id=97877
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_bios.c | 116 +++---
 1 file changed, 71 insertions(+), 45 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c 
b/drivers/gpu/drm/i915/intel_bios.c
index 83667e8cdd6b..6d1ffa815e97 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1035,6 +1035,71 @@ static u8 translate_iboost(u8 val)
return mapping[val];
 }
 
+static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
+enum port port)
+{
+   const struct ddi_vbt_port_info *info =
+   _priv->vbt.ddi_port_info[port];
+   enum port p;
+
+   for_each_port_masked(p, (1 << port) - 1) {
+   struct ddi_vbt_port_info *i = _priv->vbt.ddi_port_info[p];
+
+   if (info->alternate_ddc_pin != i->alternate_ddc_pin)
+   continue;
+
+   DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as 
port %c, "
+ "disabling port %c DVI/HDMI support\n",
+ port_name(p), i->alternate_ddc_pin,
+ port_name(port), port_name(p));
+
+   /*
+* If we have multiple ports supposedly sharing the
+* pin, then dvi/hdmi couldn't exist on the shared
+* port. Otherwise they share the same ddc bin and
+* system couldn't communicate with them separately.
+*
+* Due to parsing the ports in alphabetical order,
+* a higher port will always clobber a lower one.
+*/
+   i->supports_dvi = false;
+   i->supports_hdmi = false;
+   i->alternate_ddc_pin = 0;
+   }
+}
+
+static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
+   enum port port)
+{
+   const struct ddi_vbt_port_info *info =
+   _priv->vbt.ddi_port_info[port];
+   enum port p;
+
+   for_each_port_masked(p, (1 << port) - 1) {
+   struct ddi_vbt_port_info *i = _priv->vbt.ddi_port_info[p];
+
+   if (info->alternate_aux_channel != i->alternate_aux_channel)
+   continue;
+
+   DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as 
port %c, "
+ "disabling port %c DP support\n",
+ port_name(p), i->alternate_aux_channel,
+ port_name(port), port_name(p));
+
+   /*
+* If we have multiple ports supposedlt sharing the
+* aux channel, then DP couldn't exist on the shared
+* port. Otherwise they share the same aux channel
+* and system couldn't communicate with them separately.
+*
+* Due to parsing the ports in alphabetical order,
+* a higher port will always clobber a lower one.
+*/
+   i->supports_dp = false;
+   i->alternate_aux_channel = 0;
+   }
+}
+
 static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
   const struct bdb_header *bdb)
 {
@@ -1109,54 +1174,15 @@ static void parse_ddi_port(struct drm_i915_private 
*dev_priv, enum port port,
DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
 
if (is_dvi) {
-   if (port == PORT_E) {
-   info->alternate_ddc_pin = ddc_pin;
-   /* if DDIE share ddc pin with other port, then
-* dvi/hdmi couldn't exist on the shared port.
-* Otherwise they share the same ddc bin and system
-* couldn't communicate with them seperately. */
-   if (ddc_pin == DDC_PIN_B) {
-   
dev_priv->vbt.ddi_port_info[PORT_B].supports_dvi = 0;
-   
dev_priv->vbt.ddi_port_info[PORT_B].supports_hdmi = 0;
-   } else if (ddc_pin == DDC_PIN_C) {
-   
dev_priv->vbt.ddi_port_info[PORT_C].supports_dvi = 0;
-   

[Intel-gfx] [PATCH 1/4] drm/i915: Respect alternate_aux_channel for all DDI ports

[ville . syrjala]

From: Ville Syrjälä 

The VBT provides the platform a way to mix and match the DDI ports vs.
AUX channels. Currently we only trust the VBT for DDI E, which has no
corresponding AUX channel of its own. However it is possible that some
board might use some non-standard DDI vs. AUX port routing even for
the other ports. Perhaps for signal routing reasons or something,
So let's generalize this and trust the VBT for all ports.

For now we'll limit this to DDI platforms, as we trust the VBT a bit
more there anyway when it comes to the DDI ports. I've structured
the code in a way that would allow us to easily expand this to
other platforms as well, by simply filling in the ddi_port_info.

v2: Drop whitespace changes, keep MISSING_CASE() for unknown
aux ch assignment, include a commit message, include debug
message during init

Cc: sta...@vger.kernel.org
Cc: Maarten Maathuis 
Tested-by: Maarten Maathuis 
References: https://bugs.freedesktop.org/show_bug.cgi?id=97877
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_dp.c | 71 +++--
 1 file changed, 40 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 5992093e1814..b0753b272101 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1108,6 +1108,44 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct 
drm_dp_aux_msg *msg)
return ret;
 }
 
+static enum port intel_aux_port(struct drm_i915_private *dev_priv,
+   enum port port)
+{
+   const struct ddi_vbt_port_info *info =
+   _priv->vbt.ddi_port_info[port];
+   enum port aux_port;
+
+   if (!info->alternate_aux_channel) {
+   DRM_DEBUG_KMS("using AUX %c for port %c (platform default)\n",
+ port_name(port), port_name(port));
+   return port;
+   }
+
+   switch (info->alternate_aux_channel) {
+   case DP_AUX_A:
+   aux_port = PORT_A;
+   break;
+   case DP_AUX_B:
+   aux_port = PORT_B;
+   break;
+   case DP_AUX_C:
+   aux_port = PORT_C;
+   break;
+   case DP_AUX_D:
+   aux_port = PORT_D;
+   break;
+   default:
+   MISSING_CASE(info->alternate_aux_channel);
+   aux_port = PORT_A;
+   break;
+   }
+
+   DRM_DEBUG_KMS("using AUX %c for port %c (VBT)\n",
+ port_name(aux_port), port_name(port));
+
+   return aux_port;
+}
+
 static i915_reg_t g4x_aux_ctl_reg(struct drm_i915_private *dev_priv,
   enum port port)
 {
@@ -1168,36 +1206,9 @@ static i915_reg_t ilk_aux_data_reg(struct 
drm_i915_private *dev_priv,
}
 }
 
-/*
- * On SKL we don't have Aux for port E so we rely
- * on VBT to set a proper alternate aux channel.
- */
-static enum port skl_porte_aux_port(struct drm_i915_private *dev_priv)
-{
-   const struct ddi_vbt_port_info *info =
-   _priv->vbt.ddi_port_info[PORT_E];
-
-   switch (info->alternate_aux_channel) {
-   case DP_AUX_A:
-   return PORT_A;
-   case DP_AUX_B:
-   return PORT_B;
-   case DP_AUX_C:
-   return PORT_C;
-   case DP_AUX_D:
-   return PORT_D;
-   default:
-   MISSING_CASE(info->alternate_aux_channel);
-   return PORT_A;
-   }
-}
-
 static i915_reg_t skl_aux_ctl_reg(struct drm_i915_private *dev_priv,
   enum port port)
 {
-   if (port == PORT_E)
-   port = skl_porte_aux_port(dev_priv);
-
switch (port) {
case PORT_A:
case PORT_B:
@@ -1213,9 +1224,6 @@ static i915_reg_t skl_aux_ctl_reg(struct drm_i915_private 
*dev_priv,
 static i915_reg_t skl_aux_data_reg(struct drm_i915_private *dev_priv,
enum port port, int index)
 {
-   if (port == PORT_E)
-   port = skl_porte_aux_port(dev_priv);
-
switch (port) {
case PORT_A:
case PORT_B:
@@ -1253,7 +1261,8 @@ static i915_reg_t intel_aux_data_reg(struct 
drm_i915_private *dev_priv,
 static void intel_aux_reg_init(struct intel_dp *intel_dp)
 {
struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
-   enum port port = dp_to_dig_port(intel_dp)->port;
+   enum port port = intel_aux_port(dev_priv,
+   dp_to_dig_port(intel_dp)->port);
int i;
 
intel_dp->aux_ch_ctl_reg = intel_aux_ctl_reg(dev_priv, port);
-- 
2.7.4

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Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/3] drm/i915: Remove unused "valid" parameter from pte_encode

[Chris Wilson]

On Tue, Oct 11, 2016 at 03:26:18PM -, Patchwork wrote:
> == Series Details ==
> 
> Series: series starting with [CI,1/3] drm/i915: Remove unused "valid" 
> parameter from pte_encode
> URL   : https://patchwork.freedesktop.org/series/13586/
> State : failure
> 
> == Summary ==
> 
> Series 13586v1 Series without cover letter
> https://patchwork.freedesktop.org/api/1.0/series/13586/revisions/1/mbox/
> 
> Test core_auth:
> Subgroup basic-auth:
> pass   -> INCOMPLETE (fi-bsw-n3050)

gen8, it didn't boot, better retest just for safety.
-Chris

-- 
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[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/3] drm/i915: Remove unused "valid" parameter from pte_encode

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/3] drm/i915: Remove unused "valid" parameter 
from pte_encode
URL   : https://patchwork.freedesktop.org/series/13586/
State : failure

== Summary ==

Series 13586v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/13586/revisions/1/mbox/

Test core_auth:
Subgroup basic-auth:
pass   -> INCOMPLETE (fi-bsw-n3050)
Test drv_module_reload_basic:
skip   -> PASS   (fi-skl-6770hq)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass   -> DMESG-WARN (fi-ilk-650)
Subgroup suspend-read-crc-pipe-c:
pass   -> DMESG-WARN (fi-skl-6700k)
Test vgem_basic:
Subgroup unload:
skip   -> PASS   (fi-ilk-650)
pass   -> SKIP   (fi-skl-6700k)
skip   -> PASS   (fi-hsw-4770)

fi-bdw-5557u total:248  pass:231  dwarn:0   dfail:0   fail:0   skip:17 
fi-bsw-n3050 total:1pass:0dwarn:0   dfail:0   fail:0   skip:0  
fi-bxt-t5700 total:248  pass:217  dwarn:0   dfail:0   fail:0   skip:31 
fi-byt-j1900 total:248  pass:214  dwarn:1   dfail:0   fail:1   skip:32 
fi-byt-n2820 total:248  pass:211  dwarn:0   dfail:0   fail:1   skip:36 
fi-hsw-4770  total:248  pass:225  dwarn:0   dfail:0   fail:0   skip:23 
fi-hsw-4770r total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-ilk-650   total:248  pass:184  dwarn:1   dfail:0   fail:2   skip:61 
fi-ivb-3520m total:248  pass:221  dwarn:0   dfail:0   fail:0   skip:27 
fi-ivb-3770  total:248  pass:221  dwarn:0   dfail:0   fail:0   skip:27 
fi-kbl-7200u total:248  pass:222  dwarn:0   dfail:0   fail:0   skip:26 
fi-skl-6260u total:248  pass:232  dwarn:0   dfail:0   fail:0   skip:16 
fi-skl-6700hqtotal:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-skl-6700k total:248  pass:220  dwarn:2   dfail:0   fail:0   skip:26 
fi-skl-6770hqtotal:248  pass:231  dwarn:1   dfail:0   fail:1   skip:15 
fi-snb-2520m total:248  pass:211  dwarn:0   dfail:0   fail:0   skip:37 
fi-snb-2600  total:248  pass:209  dwarn:0   dfail:0   fail:0   skip:39 

Results at /archive/results/CI_IGT_test/Patchwork_2674/

aa35814948b49e91fbb1fc31735cbe706009273a drm-intel-nightly: 
2016y-10m-11d-14h-25m-04s UTC integration manifest
59d5d9a drm/i915/gtt: Free unused lower-level page tables
5c51ee7 drm/i915/gtt: Split gen8_ppgtt_clear_pte_range
804b6b0 drm/i915: Remove unused "valid" parameter from pte_encode

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[Intel-gfx] [PATCH 3/3] drm/i915: Remove superfluous locking around userfault_list

[Chris Wilson]

Now that we have reduced the access to the list to either (a) under the
struct_mutex whilst holding the RPM wakeref (so that concurrent writers to
the list are serialised by struct_mutex) and (b) under the atomic
runtime suspend (which cannot run concurrently with any other accessor due
to the atomic nature of the runtime suspend) we can remove the extra
locking around the list itself.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/i915_drv.h |  3 ---
 drivers/gpu/drm/i915/i915_gem.c | 21 -
 2 files changed, 4 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 72b3126c6c74..13ca968a760a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1359,9 +1359,6 @@ struct i915_gem_mm {
 */
struct list_head unbound_list;
 
-   /** Protects access to the userfault_list */
-   spinlock_t userfault_lock;
-
/** List of all objects in gtt_space, currently mmaped by userspace.
 * All objects within this list must also be on bound_list.
 */
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 587a91af5a3f..a268e804005c 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1853,9 +1853,7 @@ int i915_gem_fault(struct vm_area_struct *area, struct 
vm_fault *vmf)
goto err_unpin;
 
assert_rpm_wakelock_held(dev_priv);
-   spin_lock(_priv->mm.userfault_lock);
list_add(>userfault_link, _priv->mm.userfault_list);
-   spin_unlock(_priv->mm.userfault_lock);
 
 err_unpin:
__i915_vma_unpin(vma);
@@ -1925,7 +1923,6 @@ void
 i915_gem_release_mmap(struct drm_i915_gem_object *obj)
 {
struct drm_i915_private *i915 = to_i915(obj->base.dev);
-   bool zap = false;
 
/* Serialisation between user GTT access and our code depends upon
 * revoking the CPU's PTE whilst the mutex is held. The next user
@@ -1937,15 +1934,10 @@ i915_gem_release_mmap(struct drm_i915_gem_object *obj)
 */
assert_rpm_wakelock_held(i915);
 
-   spin_lock(>mm.userfault_lock);
-   if (!list_empty(>userfault_link)) {
-   list_del_init(>userfault_link);
-   zap = true;
-   }
-   spin_unlock(>mm.userfault_lock);
-   if (!zap)
+   if (list_empty(>userfault_link))
return;
 
+   list_del_init(>userfault_link);
drm_vma_node_unmap(>base.vma_node,
   obj->base.dev->anon_inode->i_mapping);
 
@@ -1963,13 +1955,9 @@ void
 i915_gem_release_all_mmaps(struct drm_i915_private *dev_priv)
 {
struct drm_i915_gem_object *obj, *on;
-   struct list_head userfault_list;
-
-   spin_lock(_priv->mm.userfault_lock);
-   list_replace_init(_priv->mm.userfault_list, _list);
-   spin_unlock(_priv->mm.userfault_lock);
 
-   list_for_each_entry_safe(obj, on, _list, userfault_link)
+   list_for_each_entry_safe(obj, on,
+_priv->mm.userfault_list, userfault_link)
i915_gem_release_mmap(obj);
 }
 
@@ -4457,7 +4445,6 @@ int i915_gem_init(struct drm_device *dev)
int ret;
 
mutex_lock(>struct_mutex);
-   spin_lock_init(_priv->mm.userfault_lock);
 
if (!i915.enable_execlists) {
dev_priv->gt.resume = intel_legacy_submission_resume;
-- 
2.9.3

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[Intel-gfx] [PATCH 2/3] drm/i915: Use RPM as the barrier for controlling user mmap access

[Chris Wilson]

We can remove the false coupling between RPM and struct mutex by the
observation that we can use the RPM wakeref as the barrier around user
mmap access. That is as we tear down the user's PTE atomically from
within rpm suspend and then to fault in new PTE requires the rpm
wakeref, means that no user access is possible through those PTE without
RPM being awake. Having made that observation, we can then remove the
presumption of having to take rpm outside of struct_mutex and so allow
fine grained acquisition of a wakeref around hw access rather than
having to remember to acquire the wakeref early on.

Signed-off-by: Chris Wilson 
Cc: Imre Deak 
Cc: Daniel Vetter 
Cc: Ville Syrjälä 
---
 drivers/gpu/drm/i915/i915_debugfs.c| 22 --
 drivers/gpu/drm/i915/i915_drv.c| 19 ---
 drivers/gpu/drm/i915/i915_gem.c| 14 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c| 17 +
 drivers/gpu/drm/i915/i915_gem_tiling.c |  4 
 drivers/gpu/drm/i915/intel_uncore.c|  6 +++---
 6 files changed, 21 insertions(+), 61 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index d4ecc5283c2a..d4779abd89e3 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1400,14 +1400,9 @@ static int i915_hangcheck_info(struct seq_file *m, void 
*unused)
 static int ironlake_drpc_info(struct seq_file *m)
 {
struct drm_i915_private *dev_priv = node_to_i915(m->private);
-   struct drm_device *dev = _priv->drm;
u32 rgvmodectl, rstdbyctl;
u16 crstandvid;
-   int ret;
 
-   ret = mutex_lock_interruptible(>struct_mutex);
-   if (ret)
-   return ret;
intel_runtime_pm_get(dev_priv);
 
rgvmodectl = I915_READ(MEMMODECTL);
@@ -1415,7 +1410,6 @@ static int ironlake_drpc_info(struct seq_file *m)
crstandvid = I915_READ16(CRSTANDVID);
 
intel_runtime_pm_put(dev_priv);
-   mutex_unlock(>struct_mutex);
 
seq_printf(m, "HD boost: %s\n", yesno(rgvmodectl & MEMMODE_BOOST_EN));
seq_printf(m, "Boost freq: %d\n",
@@ -2093,12 +2087,7 @@ static const char *swizzle_string(unsigned swizzle)
 static int i915_swizzle_info(struct seq_file *m, void *data)
 {
struct drm_i915_private *dev_priv = node_to_i915(m->private);
-   struct drm_device *dev = _priv->drm;
-   int ret;
 
-   ret = mutex_lock_interruptible(>struct_mutex);
-   if (ret)
-   return ret;
intel_runtime_pm_get(dev_priv);
 
seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
@@ -2138,7 +2127,6 @@ static int i915_swizzle_info(struct seq_file *m, void 
*data)
seq_puts(m, "L-shaped memory detected\n");
 
intel_runtime_pm_put(dev_priv);
-   mutex_unlock(>struct_mutex);
 
return 0;
 }
@@ -4797,13 +4785,9 @@ i915_wedged_set(void *data, u64 val)
if (i915_reset_in_progress(_priv->gpu_error))
return -EAGAIN;
 
-   intel_runtime_pm_get(dev_priv);
-
i915_handle_error(dev_priv, val,
  "Manually setting wedged to %llu", val);
 
-   intel_runtime_pm_put(dev_priv);
-
return 0;
 }
 
@@ -5038,22 +5022,16 @@ static int
 i915_cache_sharing_get(void *data, u64 *val)
 {
struct drm_i915_private *dev_priv = data;
-   struct drm_device *dev = _priv->drm;
u32 snpcr;
-   int ret;
 
if (!(IS_GEN6(dev_priv) || IS_GEN7(dev_priv)))
return -ENODEV;
 
-   ret = mutex_lock_interruptible(>struct_mutex);
-   if (ret)
-   return ret;
intel_runtime_pm_get(dev_priv);
 
snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
 
intel_runtime_pm_put(dev_priv);
-   mutex_unlock(>struct_mutex);
 
*val = (snpcr & GEN6_MBC_SNPCR_MASK) >> GEN6_MBC_SNPCR_SHIFT;
 
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 89d322215c84..31eee32fcf6d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2313,24 +2313,6 @@ static int intel_runtime_suspend(struct device *kdev)
 
DRM_DEBUG_KMS("Suspending device\n");
 
-   /*
-* We could deadlock here in case another thread holding struct_mutex
-* calls RPM suspend concurrently, since the RPM suspend will wait
-* first for this RPM suspend to finish. In this case the concurrent
-* RPM resume will be followed by its RPM suspend counterpart. Still
-* for consistency return -EAGAIN, which will reschedule this suspend.
-*/
-   if (!mutex_trylock(>struct_mutex)) {
-   DRM_DEBUG_KMS("device lock contention, deffering suspend\n");
-   /*
-* Bump the expiration timestamp, otherwise the suspend won't
-* be rescheduled.
-*/
-   

[Intel-gfx] [PATCH 1/3] drm/i915: Move user fault tracking to a separate list

[Chris Wilson]

We want to decouple RPM and struct_mutex, but currently RPM has to walk
the list of bound objects and remove userspace mmapping before we
suspend (otherwise userspace may continue to access the GTT whilst it is
powered down). This currently requires the struct_mutex to walk the
bound_list, but if we move that to a separate list and lock we can take
the first step towards removing the struct_mutex.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/i915_debugfs.c   |  4 ++--
 drivers/gpu/drm/i915/i915_drv.h   | 20 +++---
 drivers/gpu/drm/i915/i915_gem.c   | 39 +++
 drivers/gpu/drm/i915/i915_gem_evict.c |  2 +-
 4 files changed, 46 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 358663e833d6..d4ecc5283c2a 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -186,11 +186,11 @@ describe_obj(struct seq_file *m, struct 
drm_i915_gem_object *obj)
}
if (obj->stolen)
seq_printf(m, " (stolen: %08llx)", obj->stolen->start);
-   if (obj->pin_display || obj->fault_mappable) {
+   if (obj->pin_display || !list_empty(>userfault_link)) {
char s[3], *t = s;
if (obj->pin_display)
*t++ = 'p';
-   if (obj->fault_mappable)
+   if (!list_empty(>userfault_link))
*t++ = 'f';
*t = '\0';
seq_printf(m, " (%s mappable)", s);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index bf397b643cc0..72b3126c6c74 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1359,6 +1359,14 @@ struct i915_gem_mm {
 */
struct list_head unbound_list;
 
+   /** Protects access to the userfault_list */
+   spinlock_t userfault_lock;
+
+   /** List of all objects in gtt_space, currently mmaped by userspace.
+* All objects within this list must also be on bound_list.
+*/
+   struct list_head userfault_list;
+
/** Usable portion of the GTT for GEM */
unsigned long stolen_base; /* limited to low memory (32-bit) */
 
@@ -2215,6 +2223,11 @@ struct drm_i915_gem_object {
struct drm_mm_node *stolen;
struct list_head global_list;
 
+   /**
+* Whether the object is currently in the GGTT mmap.
+*/
+   struct list_head userfault_link;
+
/** Used in execbuf to temporarily hold a ref */
struct list_head obj_exec_link;
 
@@ -2242,13 +2255,6 @@ struct drm_i915_gem_object {
 */
unsigned int madv:2;
 
-   /**
-* Whether the current gtt mapping needs to be mappable (and isn't just
-* mappable by accident). Track pin and fault separate for a more
-* accurate mappable working set.
-*/
-   unsigned int fault_mappable:1;
-
/*
 * Is the object to be mapped as read-only to the GPU
 * Only honoured if hardware has relevant pte bit
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fdd496e6c081..91910ffe0964 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1850,7 +1850,10 @@ int i915_gem_fault(struct vm_area_struct *area, struct 
vm_fault *vmf)
if (ret)
goto err_unpin;
 
-   obj->fault_mappable = true;
+   spin_lock(_priv->mm.userfault_lock);
+   list_add(>userfault_link, _priv->mm.userfault_list);
+   spin_unlock(_priv->mm.userfault_lock);
+
 err_unpin:
__i915_vma_unpin(vma);
 err_unlock:
@@ -1918,36 +1921,52 @@ err:
 void
 i915_gem_release_mmap(struct drm_i915_gem_object *obj)
 {
+   struct drm_i915_private *i915 = to_i915(obj->base.dev);
+   bool zap = false;
+
/* Serialisation between user GTT access and our code depends upon
 * revoking the CPU's PTE whilst the mutex is held. The next user
 * pagefault then has to wait until we release the mutex.
+*
+* Note that RPM complicates somewhat by adding an additional
+* requirement that operations to the GGTT be made holding the RPM
+* wakeref.
 */
lockdep_assert_held(>base.dev->struct_mutex);
 
-   if (!obj->fault_mappable)
+   spin_lock(>mm.userfault_lock);
+   if (!list_empty(>userfault_link)) {
+   list_del_init(>userfault_link);
+   zap = true;
+   }
+   spin_unlock(>mm.userfault_lock);
+   if (!zap)
return;
 
drm_vma_node_unmap(>base.vma_node,
   obj->base.dev->anon_inode->i_mapping);
 
/* Ensure that the CPU's PTE are revoked and there are not outstanding
-* memory transactions from userspace before we return. The TLB
-* flushing implied above by changing the PTE above *should* be
+  

Re: [Intel-gfx] [PATCH RESEND 8/9] drm/i915/audio: rename N value getter to emphasize it's for hdmi

[Jani Nikula]

On Tue, 11 Oct 2016, "Yang, Libin"  wrote:
> Reviewed-by: Libin Yang 

Pushed patches 1-8 to drm-intel-next-queued, thanks for the review.

BR,
Jani.

>
> Regards,
> Libin
>
>
>> -Original Message-
>> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>> Jani Nikula
>> Sent: Monday, October 10, 2016 11:04 PM
>> To: intel-gfx@lists.freedesktop.org
>> Cc: Nikula, Jani ; libin.y...@linux.intel.com;
>> Pandiyan, Dhinakaran 
>> Subject: [Intel-gfx] [PATCH RESEND 8/9] drm/i915/audio: rename N value
>> getter to emphasize it's for hdmi
>> 
>> We'll be getting a function and a table for dp parameters soon enough, so
>> rename the function and table for hdmi. No functional changes.
>> 
>> Cc: Libin Yang 
>> Signed-off-by: Jani Nikula 
>> ---
>>  drivers/gpu/drm/i915/intel_audio.c | 16 
>>  1 file changed, 8 insertions(+), 8 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_audio.c
>> b/drivers/gpu/drm/i915/intel_audio.c
>> index d2c6227f72b8..81df29ca4947 100644
>> --- a/drivers/gpu/drm/i915/intel_audio.c
>> +++ b/drivers/gpu/drm/i915/intel_audio.c
>> @@ -81,7 +81,7 @@ static const struct {
>>  int clock;
>>  int n;
>>  int cts;
>> -} aud_ncts[] = {
>> +} hdmi_aud_ncts[] = {
>>  { 44100, TMDS_296M, 4459, 234375 },
>>  { 44100, TMDS_297M, 4704, 247500 },
>>  { 48000, TMDS_296M, 5824, 281250 },
>> @@ -121,15 +121,15 @@ static u32 audio_config_hdmi_pixel_clock(const
>> struct drm_display_mode *adjusted
>>  return hdmi_audio_clock[i].config;
>>  }
>> 
>> -static int audio_config_get_n(const struct drm_display_mode
>> *adjusted_mode,
>> -  int rate)
>> +static int audio_config_hdmi_get_n(const struct drm_display_mode
>> *adjusted_mode,
>> +   int rate)
>>  {
>>  int i;
>> 
>> -for (i = 0; i < ARRAY_SIZE(aud_ncts); i++) {
>> -if ((rate == aud_ncts[i].sample_rate) &&
>> -(adjusted_mode->crtc_clock == aud_ncts[i].clock)) {
>> -return aud_ncts[i].n;
>> +for (i = 0; i < ARRAY_SIZE(hdmi_aud_ncts); i++) {
>> +if (rate == hdmi_aud_ncts[i].sample_rate &&
>> +adjusted_mode->crtc_clock == hdmi_aud_ncts[i].clock) {
>> +return hdmi_aud_ncts[i].n;
>>  }
>>  }
>>  return 0;
>> @@ -256,7 +256,7 @@ hsw_hdmi_audio_config_update(struct intel_crtc
>> *intel_crtc, enum port port,
>> 
>>  if (adjusted_mode->crtc_clock == TMDS_296M ||
>>  adjusted_mode->crtc_clock == TMDS_297M) {
>> -n = audio_config_get_n(adjusted_mode, rate);
>> +n = audio_config_hdmi_get_n(adjusted_mode, rate);
>>  if (n != 0) {
>>  tmp &= ~AUD_CONFIG_N_MASK;
>>  tmp |= AUD_CONFIG_N(n);
>> --
>> 2.1.4
>> 
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>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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[Intel-gfx] [PULL] drm-intel-next-fixes

[Jani Nikula]

Hi Dave -

A big bunch of i915 fixes for drm-next / v4.9 merge window, with more
than half of them also cc: stable. We also continue to have more Fixes:
annotations for our fixes, which should help the backporters and
archeologists.

There's also a fix to your v4.8-rc8 backmerge to drm-next, which brought
back a few unwanted lines. Seemed to be a tricky diff in the
conflict. The fix is 105f1a65b04a ("drm/i915: Fix conflict resolution
from backmerge of v4.8-rc8 to drm-next").

BR,
Jani.

The following changes since commit b89857852656f016328d2d7ccec5fff57445fa85:

  Merge branch 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux into 
drm-next (2016-10-10 16:40:16 +1000)

are available in the git repository at:

  git://anongit.freedesktop.org/drm-intel tags/drm-intel-next-fixes-2016-10-11

for you to fetch changes up to 105f1a65b04a8f4f7abec11b200b1fb54f3d4b46:

  drm/i915: Fix conflict resolution from backmerge of v4.8-rc8 to drm-next 
(2016-10-10 16:12:21 +0300)


Chris Wilson (11):
  drm/i915: Restore current RPS state after reset
  drm/i915: Only shrink the unbound objects during freeze
  drm/i915: Just clear the mmiodebug before a register access
  drm/i915: Unalias obj->phys_handle and obj->userptr
  drm/i915: Use correct index for backtracking HUNG semaphores
  drm/i915/execlists: Reinitialise context image after GPU hang
  drm/i915: Distinguish last emitted request from last submitted request
  drm/i915: Force relocations via cpu if we run out of idle aperture
  drm/i915: Reset the breadcrumbs IRQ more carefully
  drm/i915/guc: Unwind GuC workqueue reservation if request construction 
fails
  drm/i915: Fix conflict resolution from backmerge of v4.8-rc8 to drm-next

Imre Deak (2):
  drm/i915: Unlock PPS registers after GPU reset
  drm/i915/bxt: Fix HDMI DPLL configuration

Jani Nikula (1):
  drm/i915/backlight: setup and cache pwm alternate increment value

Paulo Zanoni (9):
  drm/i915: don't forget to set intel_crtc->dspaddr_offset on SKL+
  drm/i915: SAGV is not SKL-only, so rename a few things
  drm/i915: introduce intel_has_sagv()
  drm/i915/kbl: KBL also needs to run the SAGV code
  drm/i915/gen9: fix the WaWmMemoryReadLatency implementation
  drm/i915/gen9: minimum scanlines for Y tile is not always 4
  drm/i915/gen9: fix plane_blocks_per_line on watermarks calculations
  drm/i915/gen9: fix the watermark res_blocks value
  drm/i915/gen9: only add the planes actually affected by ddb changes

Shawn Lee (1):
  drm/i915/backlight: setup backlight pwm alternate increment on backlight 
enable

Ville Syrjälä (3):
  drm/i915: Allow PCH DPLL sharing regardless of DPLL_SDVO_HIGH_SPEED
  drm/i915: Move long hpd handling into the hotplug work
  drm/i915: Allow DP to work w/o EDID

 drivers/gpu/drm/i915/i915_drv.c|  21 +--
 drivers/gpu/drm/i915/i915_drv.h|  35 +++--
 drivers/gpu/drm/i915/i915_gem.c|  27 +++-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   4 +-
 drivers/gpu/drm/i915/i915_gem_request.c|   5 +-
 drivers/gpu/drm/i915/i915_guc_submission.c |  12 ++
 drivers/gpu/drm/i915/i915_irq.c|  14 +-
 drivers/gpu/drm/i915/intel_breadcrumbs.c   |  33 -
 drivers/gpu/drm/i915/intel_display.c   |  30 +++-
 drivers/gpu/drm/i915/intel_dp.c|  70 +
 drivers/gpu/drm/i915/intel_dpll_mgr.c  |  21 ++-
 drivers/gpu/drm/i915/intel_drv.h   |   7 +-
 drivers/gpu/drm/i915/intel_engine_cs.c |  15 --
 drivers/gpu/drm/i915/intel_guc.h   |   1 +
 drivers/gpu/drm/i915/intel_lrc.c   | 122 +---
 drivers/gpu/drm/i915/intel_panel.c |  32 -
 drivers/gpu/drm/i915/intel_pm.c| 218 ++---
 drivers/gpu/drm/i915/intel_ringbuffer.c|   2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.h|   3 +-
 drivers/gpu/drm/i915/intel_uncore.c|   7 +-
 20 files changed, 432 insertions(+), 247 deletions(-)

-- 
Jani Nikula, Intel Open Source Technology Center
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[Intel-gfx] [CI 3/3] drm/i915/gtt: Free unused lower-level page tables

[Michał Winiarski]

Since "Dynamic page table allocations" were introduced, our page tables
can grow (being dynamically allocated) with address space range usage.
Unfortunately, their lifetime is bound to vm. This is not a huge problem
when we're not using softpin - drm_mm is creating an upper bound on used
range by causing addresses for our VMAs to eventually be reused.

With softpin, long lived contexts can drain the system out of memory
even with a single "small" object. For example:

bo = bo_alloc(size);
while(true)
offset += size;
exec(bo, offset);

Will cause us to create new allocations until all memory in the system
is used for tracking GPU pages (even though almost all PTEs in this vm
are pointing to scratch).

Let's free unused page tables in clear_range to prevent this - if no
entries are used, we can safely free it and return this information to
the caller (so that higher-level entry is pointing to scratch).

v2: Document return value and free semantics (Joonas)
v3: No newlines in vars block (Joonas)
v4: Drop redundant local 'reduce' variable

Cc: Michel Thierry 
Cc: Mika Kuoppala 
Reviewed-by: Chris Wilson 
Reviewed-by: Joonas Lahtinen 
Signed-off-by: Michał Winiarski 
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 75 +
 1 file changed, 67 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index adabf58..c58ae96 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -704,13 +704,14 @@ static int gen8_48b_mm_switch(struct i915_hw_ppgtt *ppgtt,
return gen8_write_pdp(req, 0, px_dma(>pml4));
 }
 
-static void gen8_ppgtt_clear_pt(struct i915_address_space *vm,
+/* Removes entries from a single page table, releasing it if it's empty.
+ * Caller can use the return value to update higher-level entries */
+static bool gen8_ppgtt_clear_pt(struct i915_address_space *vm,
struct i915_page_table *pt,
uint64_t start,
uint64_t length)
 {
struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
-
unsigned int pte_start = gen8_pte_index(start);
unsigned int num_entries = gen8_pte_count(start, length);
uint64_t pte;
@@ -719,63 +720,121 @@ static void gen8_ppgtt_clear_pt(struct 
i915_address_space *vm,
 I915_CACHE_LLC);
 
if (WARN_ON(!px_page(pt)))
-   return;
+   return false;
 
bitmap_clear(pt->used_ptes, pte_start, num_entries);
 
+   if (bitmap_empty(pt->used_ptes, GEN8_PTES)) {
+   free_pt(vm->dev, pt);
+   return true;
+   }
+
pt_vaddr = kmap_px(pt);
 
for (pte = pte_start; pte < num_entries; pte++)
pt_vaddr[pte] = scratch_pte;
 
kunmap_px(ppgtt, pt_vaddr);
+
+   return false;
 }
 
-static void gen8_ppgtt_clear_pd(struct i915_address_space *vm,
+/* Removes entries from a single page dir, releasing it if it's empty.
+ * Caller can use the return value to update higher-level entries
+ */
+static bool gen8_ppgtt_clear_pd(struct i915_address_space *vm,
struct i915_page_directory *pd,
uint64_t start,
uint64_t length)
 {
+   struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
struct i915_page_table *pt;
uint64_t pde;
+   gen8_pde_t *pde_vaddr;
+   gen8_pde_t scratch_pde = gen8_pde_encode(px_dma(vm->scratch_pt),
+I915_CACHE_LLC);
 
gen8_for_each_pde(pt, pd, start, length, pde) {
if (WARN_ON(!pd->page_table[pde]))
break;
 
-   gen8_ppgtt_clear_pt(vm, pt, start, length);
+   if (gen8_ppgtt_clear_pt(vm, pt, start, length)) {
+   __clear_bit(pde, pd->used_pdes);
+   pde_vaddr = kmap_px(pd);
+   pde_vaddr[pde] = scratch_pde;
+   kunmap_px(ppgtt, pde_vaddr);
+   }
}
+
+   if (bitmap_empty(pd->used_pdes, I915_PDES)) {
+   free_pd(vm->dev, pd);
+   return true;
+   }
+
+   return false;
 }
 
-static void gen8_ppgtt_clear_pdp(struct i915_address_space *vm,
+/* Removes entries from a single page dir pointer, releasing it if it's empty.
+ * Caller can use the return value to update higher-level entries
+ */
+static bool gen8_ppgtt_clear_pdp(struct i915_address_space *vm,
 struct i915_page_directory_pointer *pdp,
 uint64_t start,
 uint64_t length)
 {
+   struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);

[Intel-gfx] [CI 2/3] drm/i915/gtt: Split gen8_ppgtt_clear_pte_range

[Michał Winiarski]

Let's use more top-down approach, where each gen8_ppgtt_clear_* function
is responsible for clearing the struct passed as an argument and calling
relevant clear_range functions on lower-level tables.
Doing this rather than operating on PTE ranges makes the implementation
of shrinking page tables quite simple.

v2: Drop min when calculating num_entries, no negation in 48b ppgtt
check, no newlines in vars block (Joonas)

Cc: Chris Wilson 
Cc: Michel Thierry 
Reviewed-by: Joonas Lahtinen 
Reviewed-by: Mika Kuoppala 
Signed-off-by: Michał Winiarski 
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 107 +++-
 1 file changed, 58 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 08e2f35..adabf58 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -704,59 +704,78 @@ static int gen8_48b_mm_switch(struct i915_hw_ppgtt *ppgtt,
return gen8_write_pdp(req, 0, px_dma(>pml4));
 }
 
-static void gen8_ppgtt_clear_pte_range(struct i915_address_space *vm,
-  struct i915_page_directory_pointer *pdp,
-  uint64_t start,
-  uint64_t length,
-  gen8_pte_t scratch_pte)
+static void gen8_ppgtt_clear_pt(struct i915_address_space *vm,
+   struct i915_page_table *pt,
+   uint64_t start,
+   uint64_t length)
 {
struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
+
+   unsigned int pte_start = gen8_pte_index(start);
+   unsigned int num_entries = gen8_pte_count(start, length);
+   uint64_t pte;
gen8_pte_t *pt_vaddr;
-   unsigned pdpe = gen8_pdpe_index(start);
-   unsigned pde = gen8_pde_index(start);
-   unsigned pte = gen8_pte_index(start);
-   unsigned num_entries = length >> PAGE_SHIFT;
-   unsigned last_pte, i;
+   gen8_pte_t scratch_pte = gen8_pte_encode(vm->scratch_page.daddr,
+I915_CACHE_LLC);
 
-   if (WARN_ON(!pdp))
+   if (WARN_ON(!px_page(pt)))
return;
 
-   while (num_entries) {
-   struct i915_page_directory *pd;
-   struct i915_page_table *pt;
+   bitmap_clear(pt->used_ptes, pte_start, num_entries);
 
-   if (WARN_ON(!pdp->page_directory[pdpe]))
-   break;
+   pt_vaddr = kmap_px(pt);
+
+   for (pte = pte_start; pte < num_entries; pte++)
+   pt_vaddr[pte] = scratch_pte;
 
-   pd = pdp->page_directory[pdpe];
+   kunmap_px(ppgtt, pt_vaddr);
+}
+
+static void gen8_ppgtt_clear_pd(struct i915_address_space *vm,
+   struct i915_page_directory *pd,
+   uint64_t start,
+   uint64_t length)
+{
+   struct i915_page_table *pt;
+   uint64_t pde;
 
+   gen8_for_each_pde(pt, pd, start, length, pde) {
if (WARN_ON(!pd->page_table[pde]))
break;
 
-   pt = pd->page_table[pde];
+   gen8_ppgtt_clear_pt(vm, pt, start, length);
+   }
+}
 
-   if (WARN_ON(!px_page(pt)))
-   break;
+static void gen8_ppgtt_clear_pdp(struct i915_address_space *vm,
+struct i915_page_directory_pointer *pdp,
+uint64_t start,
+uint64_t length)
+{
+   struct i915_page_directory *pd;
+   uint64_t pdpe;
 
-   last_pte = pte + num_entries;
-   if (last_pte > GEN8_PTES)
-   last_pte = GEN8_PTES;
+   gen8_for_each_pdpe(pd, pdp, start, length, pdpe) {
+   if (WARN_ON(!pdp->page_directory[pdpe]))
+   break;
 
-   pt_vaddr = kmap_px(pt);
+   gen8_ppgtt_clear_pd(vm, pd, start, length);
+   }
+}
 
-   for (i = pte; i < last_pte; i++) {
-   pt_vaddr[i] = scratch_pte;
-   num_entries--;
-   }
+static void gen8_ppgtt_clear_pml4(struct i915_address_space *vm,
+ struct i915_pml4 *pml4,
+ uint64_t start,
+ uint64_t length)
+{
+   struct i915_page_directory_pointer *pdp;
+   uint64_t pml4e;
 
-   kunmap_px(ppgtt, pt_vaddr);
+   gen8_for_each_pml4e(pdp, pml4, start, length, pml4e) {
+   if (WARN_ON(!pml4->pdps[pml4e]))
+   break;
 
-   pte = 0;
-   if (++pde == I915_PDES) {
-   if (++pdpe == 

[Intel-gfx] [CI 1/3] drm/i915: Remove unused "valid" parameter from pte_encode

[Michał Winiarski]

We never used any invalid ptes, those were put in place for
a possibility of doing gpu faults. However our batchbuffers are not
restricted in length, so everything needs to be pointing to something
and thus out-of-bounds is pointing to scratch.

Remove the valid flag as it is always true.

v2: Expand commit msg, patch reorder (Mika)

Cc: Chris Wilson 
Cc: Michel Thierry 
Reviewed-by: Joonas Lahtinen 
Reviewed-by: Mika Kuoppala 
Signed-off-by: Michał Winiarski 
---
 drivers/gpu/drm/i915/i915_gem.c|  6 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |  3 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c| 98 --
 drivers/gpu/drm/i915/i915_gem_gtt.h|  5 +-
 4 files changed, 45 insertions(+), 67 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fdd496e..ec2335c 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -919,8 +919,7 @@ out_unpin:
if (node.allocated) {
wmb();
ggtt->base.clear_range(>base,
-  node.start, node.size,
-  true);
+  node.start, node.size);
i915_gem_object_unpin_pages(obj);
remove_mappable_node();
} else {
@@ -1228,8 +1227,7 @@ out_unpin:
if (node.allocated) {
wmb();
ggtt->base.clear_range(>base,
-  node.start, node.size,
-  true);
+  node.start, node.size);
i915_gem_object_unpin_pages(obj);
remove_mappable_node();
} else {
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 72c7c18..6835074 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -370,8 +370,7 @@ static void reloc_cache_fini(struct reloc_cache *cache)
 
ggtt->base.clear_range(>base,
   cache->node.start,
-  cache->node.size,
-  true);
+  cache->node.size);
drm_mm_remove_node(>node);
} else {
i915_vma_unpin((struct i915_vma *)cache->node.mm);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 0bb4232..08e2f35 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -191,15 +191,13 @@ static void ppgtt_unbind_vma(struct i915_vma *vma)
 {
vma->vm->clear_range(vma->vm,
 vma->node.start,
-vma->size,
-true);
+vma->size);
 }
 
 static gen8_pte_t gen8_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
- bool valid)
+ enum i915_cache_level level)
 {
-   gen8_pte_t pte = valid ? _PAGE_PRESENT | _PAGE_RW : 0;
+   gen8_pte_t pte = _PAGE_PRESENT | _PAGE_RW;
pte |= addr;
 
switch (level) {
@@ -234,9 +232,9 @@ static gen8_pde_t gen8_pde_encode(const dma_addr_t addr,
 
 static gen6_pte_t snb_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 unused)
+u32 unused)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
switch (level) {
@@ -256,9 +254,9 @@ static gen6_pte_t snb_pte_encode(dma_addr_t addr,
 
 static gen6_pte_t ivb_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 unused)
+u32 unused)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
switch (level) {
@@ -280,9 +278,9 @@ static gen6_pte_t ivb_pte_encode(dma_addr_t addr,
 
 static gen6_pte_t byt_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 flags)
+u32 flags)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
if (!(flags & PTE_READ_ONLY))
@@ -296,9 +294,9 @@ static gen6_pte_t byt_pte_encode(dma_addr_t addr,
 
 static 

Re: [Intel-gfx] [REGRESSION v4.7] i915 / drm crash when undocking from DP monitors

[Jani Nikula]

On Sat, 08 Oct 2016, Vadim Lobanov  wrote:
> I'm seeing a repeatable crash on my HP EliteBook 840 G2/2216 when
> booting it while in a docking station connected to two external
> DisplayPort monitors, undocking, and then either logging out or
> shutting down -- regardless of whether I've redocked it beforehand or
> not. Both logout and shutdown work great if I do not undock the laptop
> at all, so the badness correlates with the DP monitors going away.

Please file a bug at [1] with the info in this mail, add drm.debug=14
module parameter, and attach dmesg from boot to the problem into the
bug.

BR,
Jani.

[1] https://bugs.freedesktop.org/enter_bug.cgi?product=DRI=DRM/Intel

-- 
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[Intel-gfx] ✗ Fi.CI.BAT: warning for .rodata.str diet

[Patchwork]

== Series Details ==

Series: .rodata.str diet
URL   : https://patchwork.freedesktop.org/series/13583/
State : warning

== Summary ==

Series 13583v1 .rodata.str diet
https://patchwork.freedesktop.org/api/1.0/series/13583/revisions/1/mbox/

Test kms_cursor_legacy:
Subgroup basic-flip-after-cursor-varying-size:
dmesg-warn -> PASS   (fi-skl-6700k)
Test kms_pipe_crc_basic:
Subgroup read-crc-pipe-a:
dmesg-warn -> PASS   (fi-ivb-3770)
Subgroup suspend-read-crc-pipe-a:
pass   -> DMESG-WARN (fi-byt-j1900)
Test kms_psr_sink_crc:
Subgroup psr_basic:
pass   -> DMESG-WARN (fi-skl-6700hq)
Test vgem_basic:
Subgroup unload:
pass   -> SKIP   (fi-hsw-4770)
pass   -> SKIP   (fi-skl-6700k)
skip   -> PASS   (fi-ilk-650)

fi-bdw-5557u total:248  pass:231  dwarn:0   dfail:0   fail:0   skip:17 
fi-bsw-n3050 total:248  pass:204  dwarn:0   dfail:0   fail:0   skip:44 
fi-bxt-t5700 total:248  pass:217  dwarn:0   dfail:0   fail:0   skip:31 
fi-byt-j1900 total:248  pass:213  dwarn:2   dfail:0   fail:1   skip:32 
fi-hsw-4770  total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-hsw-4770r total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-ilk-650   total:248  pass:185  dwarn:0   dfail:0   fail:2   skip:61 
fi-ivb-3520m total:248  pass:221  dwarn:0   dfail:0   fail:0   skip:27 
fi-ivb-3770  total:248  pass:221  dwarn:0   dfail:0   fail:0   skip:27 
fi-kbl-7200u total:248  pass:222  dwarn:0   dfail:0   fail:0   skip:26 
fi-skl-6260u total:248  pass:232  dwarn:0   dfail:0   fail:0   skip:16 
fi-skl-6700hqtotal:248  pass:223  dwarn:1   dfail:0   fail:0   skip:24 
fi-skl-6700k total:248  pass:221  dwarn:1   dfail:0   fail:0   skip:26 
fi-skl-6770hqtotal:248  pass:231  dwarn:1   dfail:0   fail:1   skip:15 
fi-snb-2520m total:248  pass:211  dwarn:0   dfail:0   fail:0   skip:37 
fi-snb-2600  total:248  pass:209  dwarn:0   dfail:0   fail:0   skip:39 

Results at /archive/results/CI_IGT_test/Patchwork_2672/

660541d3c3f78795aa8bb7aa65747b0aa93cb463 drm-intel-nightly: 
2016y-10m-11d-11h-21m-29s UTC integration manifest
ad0d4d6 drm/i915: Make IS_GEN macros only take dev_priv
3213fb2 drm/i915: Make INTEL_GEN only take dev_priv
c7388ca drm/i915: Make IS_VALLEYVIEW only take dev_priv
88fa29c drm/i915: Make IS_CHERRYVIEW only take dev_priv
0854f48 drm/i915: Make IS_G4X only take dev_priv
ca1ea2a drm/i915: Make HAS_L3_DPF only take dev_priv
04c5f83 drm/i915: Make IS_BROXTON only take dev_priv
d0c32be drm/i915: Make IS_SKYLAKE only take dev_priv
d8b0b94 drm/i915: Make IS_KABYLAKE only take dev_priv
444c507 drm/i915: Make IS_HASWELL only take dev_priv
b3d3b09 drm/i915: Make IS_BROADWELL only take dev_priv
6eaf5ac drm/i915: Make IS_IVYBRIDGE only take dev_priv
7f5c6d5 drm/i915: Make INTEL_DEVID only take dev_priv
e3b1e00 drm/i915: Make IS_GEN-range macro only take dev_priv
3fd6060 drm/i915: Do not use INTEL_INFO(dev_priv)->ring_mask inside WARNs
980e918 drm/i915: Make HAS_RUNTIME_PM only take dev_priv
f7b32d6 drm/i915: Make HAS_GMCH_DISPLAY only take dev_priv
f7e3e43 drm/i915: Make INTEL_PCH_TYPE & co only take dev_priv
c18b0d8 drm/i915: Make HAS_DDI and HAS_PCH_LPT_LP only take dev_priv

___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 2/2] drm/i915: Allow disabling error capture

[Chris Wilson]

We currently capture the GPU state after we detect a hang. This is vital
for us to both triage and debug hangs in the wild (post-mortem
debugging). However, it comes at the cost of running some potentially
dangerous code (since it has to make very few assumption about the state
of the driver) that is quite resource intensive.

This patch introduces both a method to disable error capture at runtime
(for users who hit bugs at runtime and need a workaround) and to disable
error capture at compiletime (for realtime users who want to minimise
any possible latency, and never require error capture, saving ~30k of
code). The cost is that we know have to be wary of (and test!) a kconfig
flag and a module parameter. The effect of the module parameter is easy
to verify through code inspection and runtime testing, but a kconfig flag
needs regular compile checking.

Signed-off-by: Chris Wilson 
Reviewed-by: Joonas Lahtinen 
Acked-by: Jani Nikula 
Acked-by: Daniel Vetter 

[Intel-gfx] [PATCH 1/2] drm/i915: Move common code out of i915_gpu_error.c

[Chris Wilson]

In the next patch, I want to conditionally compile i915_gpu_error.c and
that requires moving the functions used by debug out of
i915_gpu_error.c!

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/i915_debugfs.c |   2 +-
 drivers/gpu/drm/i915/i915_drv.h |   3 -
 drivers/gpu/drm/i915/i915_gpu_error.c   | 106 +---
 drivers/gpu/drm/i915/i915_irq.c |   4 +-
 drivers/gpu/drm/i915/intel_engine_cs.c  | 104 +++
 drivers/gpu/drm/i915/intel_ringbuffer.h |   3 +
 6 files changed, 111 insertions(+), 111 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 20689f1cd719..f6762e00f872 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1339,7 +1339,7 @@ static int i915_hangcheck_info(struct seq_file *m, void 
*unused)
seqno[id] = intel_engine_get_seqno(engine);
}
 
-   i915_get_engine_instdone(dev_priv, RCS, );
+   intel_engine_get_instdone(_priv->engine[RCS], );
 
intel_runtime_pm_put(dev_priv);
 
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 54d860e1c0fc..4553a5372008 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3564,9 +3564,6 @@ void i915_error_state_get(struct drm_device *dev,
 void i915_error_state_put(struct i915_error_state_file_priv *error_priv);
 void i915_destroy_error_state(struct drm_device *dev);
 
-void i915_get_engine_instdone(struct drm_i915_private *dev_priv,
- enum intel_engine_id engine_id,
- struct intel_instdone *instdone);
 const char *i915_cache_level_str(struct drm_i915_private *i915, int type);
 
 /* i915_cmd_parser.c */
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index b5b58692ac5a..04205c82f0c9 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1038,7 +1038,7 @@ static void error_record_engine_registers(struct 
drm_i915_error_state *error,
ee->ipehr = I915_READ(IPEHR);
}
 
-   i915_get_engine_instdone(dev_priv, engine->id, >instdone);
+   intel_engine_get_instdone(engine, >instdone);
 
ee->waiting = intel_engine_has_waiter(engine);
ee->instpm = I915_READ(RING_INSTPM(engine->mmio_base));
@@ -1548,107 +1548,3 @@ void i915_destroy_error_state(struct drm_device *dev)
if (error)
kref_put(>ref, i915_error_state_free);
 }
-
-const char *i915_cache_level_str(struct drm_i915_private *i915, int type)
-{
-   switch (type) {
-   case I915_CACHE_NONE: return " uncached";
-   case I915_CACHE_LLC: return HAS_LLC(i915) ? " LLC" : " snooped";
-   case I915_CACHE_L3_LLC: return " L3+LLC";
-   case I915_CACHE_WT: return " WT";
-   default: return "";
-   }
-}
-
-static inline uint32_t
-read_subslice_reg(struct drm_i915_private *dev_priv, int slice,
- int subslice, i915_reg_t reg)
-{
-   uint32_t mcr;
-   uint32_t ret;
-   enum forcewake_domains fw_domains;
-
-   fw_domains = intel_uncore_forcewake_for_reg(dev_priv, reg,
-   FW_REG_READ);
-   fw_domains |= intel_uncore_forcewake_for_reg(dev_priv,
-GEN8_MCR_SELECTOR,
-FW_REG_READ | 
FW_REG_WRITE);
-
-   spin_lock_irq(_priv->uncore.lock);
-   intel_uncore_forcewake_get__locked(dev_priv, fw_domains);
-
-   mcr = I915_READ_FW(GEN8_MCR_SELECTOR);
-   /*
-* The HW expects the slice and sublice selectors to be reset to 0
-* after reading out the registers.
-*/
-   WARN_ON_ONCE(mcr & (GEN8_MCR_SLICE_MASK | GEN8_MCR_SUBSLICE_MASK));
-   mcr &= ~(GEN8_MCR_SLICE_MASK | GEN8_MCR_SUBSLICE_MASK);
-   mcr |= GEN8_MCR_SLICE(slice) | GEN8_MCR_SUBSLICE(subslice);
-   I915_WRITE_FW(GEN8_MCR_SELECTOR, mcr);
-
-   ret = I915_READ_FW(reg);
-
-   mcr &= ~(GEN8_MCR_SLICE_MASK | GEN8_MCR_SUBSLICE_MASK);
-   I915_WRITE_FW(GEN8_MCR_SELECTOR, mcr);
-
-   intel_uncore_forcewake_put__locked(dev_priv, fw_domains);
-   spin_unlock_irq(_priv->uncore.lock);
-
-   return ret;
-}
-
-/* NB: please notice the memset */
-void i915_get_engine_instdone(struct drm_i915_private *dev_priv,
- enum intel_engine_id engine_id,
- struct intel_instdone *instdone)
-{
-   u32 mmio_base = dev_priv->engine[engine_id].mmio_base;
-   int slice;
-   int subslice;
-
-   memset(instdone, 0, sizeof(*instdone));
-
-   switch (INTEL_GEN(dev_priv)) {
-   default:
-   instdone->instdone = I915_READ(RING_INSTDONE(mmio_base));
-
-   if (engine_id != RCS)
-   break;
-
- 

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Use RPM as the barrier for controlling user mmap access

[Daniel Vetter]

On Mon, Oct 10, 2016 at 10:58:40PM +0100, Chris Wilson wrote:
> We can remove the false coupling between RPM and struct mutex by the
> observation that we can use the RPM wakeref as the barrier around user
> mmap access. That is as we tear down the user's PTE atomically from
> within rpm suspend and then to fault in new PTE requires the rpm
> wakeref, means that no user access is possible through those PTE without
> RPM being awake. Having made that observation, we can then remove the
> presumption of having to take rpm outside of struct_mutex and so allow
> fine grained acquisition of a wakeref around hw access rather than
> having to remember to acquire the wakeref early on.
> 
> Signed-off-by: Chris Wilson 
> Cc: Imre Deak 
> Cc: Daniel Vetter 
> Cc: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c| 22 --
>  drivers/gpu/drm/i915/i915_drv.c| 19 ---
>  drivers/gpu/drm/i915/i915_gem.c| 29 ++---
>  drivers/gpu/drm/i915/i915_gem_gtt.c| 17 +
>  drivers/gpu/drm/i915/i915_gem_tiling.c |  4 
>  drivers/gpu/drm/i915/intel_drv.h   |  6 ++
>  drivers/gpu/drm/i915/intel_uncore.c|  6 +++---
>  7 files changed, 40 insertions(+), 63 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 20689f1cd719..793b1816f700 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1396,14 +1396,9 @@ static int i915_hangcheck_info(struct seq_file *m, 
> void *unused)
>  static int ironlake_drpc_info(struct seq_file *m)
>  {
>   struct drm_i915_private *dev_priv = node_to_i915(m->private);
> - struct drm_device *dev = _priv->drm;
>   u32 rgvmodectl, rstdbyctl;
>   u16 crstandvid;
> - int ret;
>  
> - ret = mutex_lock_interruptible(>struct_mutex);
> - if (ret)
> - return ret;
>   intel_runtime_pm_get(dev_priv);
>  
>   rgvmodectl = I915_READ(MEMMODECTL);
> @@ -1411,7 +1406,6 @@ static int ironlake_drpc_info(struct seq_file *m)
>   crstandvid = I915_READ16(CRSTANDVID);
>  
>   intel_runtime_pm_put(dev_priv);
> - mutex_unlock(>struct_mutex);
>  
>   seq_printf(m, "HD boost: %s\n", yesno(rgvmodectl & MEMMODE_BOOST_EN));
>   seq_printf(m, "Boost freq: %d\n",
> @@ -2089,12 +2083,7 @@ static const char *swizzle_string(unsigned swizzle)
>  static int i915_swizzle_info(struct seq_file *m, void *data)
>  {
>   struct drm_i915_private *dev_priv = node_to_i915(m->private);
> - struct drm_device *dev = _priv->drm;
> - int ret;
>  
> - ret = mutex_lock_interruptible(>struct_mutex);
> - if (ret)
> - return ret;
>   intel_runtime_pm_get(dev_priv);
>  
>   seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
> @@ -2134,7 +2123,6 @@ static int i915_swizzle_info(struct seq_file *m, void 
> *data)
>   seq_puts(m, "L-shaped memory detected\n");
>  
>   intel_runtime_pm_put(dev_priv);
> - mutex_unlock(>struct_mutex);
>  
>   return 0;
>  }
> @@ -4793,13 +4781,9 @@ i915_wedged_set(void *data, u64 val)
>   if (i915_reset_in_progress(_priv->gpu_error))
>   return -EAGAIN;
>  
> - intel_runtime_pm_get(dev_priv);
> -
>   i915_handle_error(dev_priv, val,
> "Manually setting wedged to %llu", val);
>  
> - intel_runtime_pm_put(dev_priv);
> -
>   return 0;
>  }
>  
> @@ -5034,22 +5018,16 @@ static int
>  i915_cache_sharing_get(void *data, u64 *val)
>  {
>   struct drm_i915_private *dev_priv = data;
> - struct drm_device *dev = _priv->drm;
>   u32 snpcr;
> - int ret;
>  
>   if (!(IS_GEN6(dev_priv) || IS_GEN7(dev_priv)))
>   return -ENODEV;
>  
> - ret = mutex_lock_interruptible(>struct_mutex);
> - if (ret)
> - return ret;
>   intel_runtime_pm_get(dev_priv);
>  
>   snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
>  
>   intel_runtime_pm_put(dev_priv);
> - mutex_unlock(>struct_mutex);
>  
>   *val = (snpcr & GEN6_MBC_SNPCR_MASK) >> GEN6_MBC_SNPCR_SHIFT;
>  
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 89d322215c84..31eee32fcf6d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -2313,24 +2313,6 @@ static int intel_runtime_suspend(struct device *kdev)
>  
>   DRM_DEBUG_KMS("Suspending device\n");
>  
> - /*
> -  * We could deadlock here in case another thread holding struct_mutex
> -  * calls RPM suspend concurrently, since the RPM suspend will wait
> -  * first for this RPM suspend to finish. In this case the concurrent
> -  * RPM resume will be followed by its RPM suspend counterpart. Still
> -  * for consistency return -EAGAIN, which will reschedule this suspend.
> -  */
> - if 

[Intel-gfx] [PATCH 19/19] drm/i915: Make IS_GEN macros only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Saves 1416 bytes of .rodata strings.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_debugfs.c|  4 +-
 drivers/gpu/drm/i915/i915_drv.c|  6 +--
 drivers/gpu/drm/i915/i915_drv.h| 16 +++---
 drivers/gpu/drm/i915/i915_gem.c|  8 +--
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |  4 +-
 drivers/gpu/drm/i915/i915_gem_fence.c  |  9 ++--
 drivers/gpu/drm/i915/i915_gem_gtt.c| 10 ++--
 drivers/gpu/drm/i915/i915_gem_stolen.c |  4 +-
 drivers/gpu/drm/i915/i915_gem_tiling.c |  4 +-
 drivers/gpu/drm/i915/i915_gpu_error.c  | 10 ++--
 drivers/gpu/drm/i915/i915_irq.c|  4 +-
 drivers/gpu/drm/i915/i915_suspend.c|  4 +-
 drivers/gpu/drm/i915/intel_crt.c   |  6 +--
 drivers/gpu/drm/i915/intel_display.c   | 41 ---
 drivers/gpu/drm/i915/intel_dp.c| 20 +++
 drivers/gpu/drm/i915/intel_drv.h   |  2 +-
 drivers/gpu/drm/i915/intel_fifo_underrun.c |  6 +--
 drivers/gpu/drm/i915/intel_guc_loader.c|  3 +-
 drivers/gpu/drm/i915/intel_lvds.c  |  2 +-
 drivers/gpu/drm/i915/intel_pm.c| 83 +++---
 drivers/gpu/drm/i915/intel_sprite.c|  4 +-
 21 files changed, 126 insertions(+), 124 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 20689f1cd719..3a42df3a29e5 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -4552,7 +4552,7 @@ static void wm_latency_show(struct seq_file *m, const 
uint16_t wm[8])
else if (IS_VALLEYVIEW(dev_priv))
num_levels = 1;
else
-   num_levels = ilk_wm_max_level(dev) + 1;
+   num_levels = ilk_wm_max_level(dev_priv) + 1;
 
drm_modeset_lock_all(dev);
 
@@ -4668,7 +4668,7 @@ static ssize_t wm_latency_write(struct file *file, const 
char __user *ubuf,
else if (IS_VALLEYVIEW(dev_priv))
num_levels = 1;
else
-   num_levels = ilk_wm_max_level(dev) + 1;
+   num_levels = ilk_wm_max_level(dev_priv) + 1;
 
if (len >= sizeof(tmp))
return -EINVAL;
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 5e7b6a1cb2c8..c1956855feb6 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -174,7 +174,7 @@ static void intel_detect_pch(struct drm_device *dev)
if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
dev_priv->pch_type = PCH_IBX;
DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
-   WARN_ON(!IS_GEN5(dev));
+   WARN_ON(!IS_GEN5(dev_priv));
} else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
dev_priv->pch_type = PCH_CPT;
DRM_DEBUG_KMS("Found CougarPoint PCH\n");
@@ -884,7 +884,7 @@ static int i915_mmio_setup(struct drm_device *dev)
int mmio_bar;
int mmio_size;
 
-   mmio_bar = IS_GEN2(dev) ? 1 : 0;
+   mmio_bar = IS_GEN2(dev_priv) ? 1 : 0;
/*
 * Before gen4, the registers and the GTT are behind different BARs.
 * However, from gen4 onwards, the registers and the GTT are shared
@@ -1037,7 +1037,7 @@ static int i915_driver_init_hw(struct drm_i915_private 
*dev_priv)
pci_set_master(pdev);
 
/* overlay on gen2 is broken and can't address above 1G */
-   if (IS_GEN2(dev)) {
+   if (IS_GEN2(dev_priv)) {
ret = dma_set_coherent_mask(>dev, DMA_BIT_MASK(30));
if (ret) {
DRM_ERROR("failed to set DMA mask\n");
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3f38b9755763..a05665af31be 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2742,14 +2742,14 @@ struct drm_i915_cmd_table {
  * have their own (e.g. HAS_PCH_SPLIT for ILK+ display, IS_foo for particular
  * chips, etc.).
  */
-#define IS_GEN2(dev)   (!!(INTEL_INFO(dev)->gen_mask & BIT(1)))
-#define IS_GEN3(dev)   (!!(INTEL_INFO(dev)->gen_mask & BIT(2)))
-#define IS_GEN4(dev)   (!!(INTEL_INFO(dev)->gen_mask & BIT(3)))
-#define IS_GEN5(dev)   (!!(INTEL_INFO(dev)->gen_mask & BIT(4)))
-#define IS_GEN6(dev)   (!!(INTEL_INFO(dev)->gen_mask & BIT(5)))
-#define IS_GEN7(dev)   (!!(INTEL_INFO(dev)->gen_mask & BIT(6)))
-#define IS_GEN8(dev)   (!!(INTEL_INFO(dev)->gen_mask & BIT(7)))
-#define IS_GEN9(dev)   (!!(INTEL_INFO(dev)->gen_mask & BIT(8)))
+#define IS_GEN2(dev_priv)  (!!((dev_priv)->info.gen_mask & BIT(1)))
+#define IS_GEN3(dev_priv)  (!!((dev_priv)->info.gen_mask & BIT(2)))
+#define IS_GEN4(dev_priv)  (!!((dev_priv)->info.gen_mask & BIT(3)))
+#define 

[Intel-gfx] [PATCH 13/19] drm/i915: Make IS_BROXTON only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Saves 1392 bytes of .rodata strings.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.c |  2 +-
 drivers/gpu/drm/i915/i915_drv.h |  5 +++--
 drivers/gpu/drm/i915/i915_gem_gtt.c | 40 +
 drivers/gpu/drm/i915/i915_irq.c |  2 +-
 drivers/gpu/drm/i915/intel_ddi.c|  4 ++--
 drivers/gpu/drm/i915/intel_display.c| 31 ++---
 drivers/gpu/drm/i915/intel_dp.c | 16 ++---
 drivers/gpu/drm/i915/intel_dpll_mgr.c   |  2 +-
 drivers/gpu/drm/i915/intel_dsi.c| 27 +++---
 drivers/gpu/drm/i915/intel_dsi_pll.c| 26 ++---
 drivers/gpu/drm/i915/intel_guc_loader.c |  8 +++
 drivers/gpu/drm/i915/intel_hdmi.c   |  6 ++---
 drivers/gpu/drm/i915/intel_runtime_pm.c |  2 +-
 13 files changed, 89 insertions(+), 82 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index d854ea4a7e92..18af6d1ccec9 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2437,7 +2437,7 @@ static int intel_runtime_resume(struct device *kdev)
if (IS_GEN6(dev_priv))
intel_init_pch_refclk(dev);
 
-   if (IS_BROXTON(dev)) {
+   if (IS_BROXTON(dev_priv)) {
bxt_disable_dc9(dev_priv);
bxt_display_core_init(dev_priv, true);
if (dev_priv->csr.dmc_payload &&
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9784e61400e5..ad9299196d13 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2664,7 +2664,7 @@ struct drm_i915_cmd_table {
 #define IS_HASWELL(dev_priv)   ((dev_priv)->info.is_haswell)
 #define IS_BROADWELL(dev_priv) ((dev_priv)->info.is_broadwell)
 #define IS_SKYLAKE(dev_priv)   ((dev_priv)->info.is_skylake)
-#define IS_BROXTON(dev)(INTEL_INFO(dev)->is_broxton)
+#define IS_BROXTON(dev_priv)   ((dev_priv)->info.is_broxton)
 #define IS_KABYLAKE(dev_priv)  ((dev_priv)->info.is_kabylake)
 #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile)
 #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
@@ -2724,7 +2724,8 @@ struct drm_i915_cmd_table {
 #define BXT_REVID_B0   0x3
 #define BXT_REVID_C0   0x9
 
-#define IS_BXT_REVID(p, since, until) (IS_BROXTON(p) && IS_REVID(p, since, 
until))
+#define IS_BXT_REVID(dev_priv, since, until) \
+   (IS_BROXTON(dev_priv) && IS_REVID(dev_priv, since, until))
 
 #define KBL_REVID_A0   0x0
 #define KBL_REVID_B0   0x1
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index cf43a5632961..e628691fe97e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -373,27 +373,29 @@ static void *kmap_page_dma(struct i915_page_dma *p)
 /* We use the flushing unmap only with ppgtt structures:
  * page directories, page tables and scratch pages.
  */
-static void kunmap_page_dma(struct drm_device *dev, void *vaddr)
+static void kunmap_page_dma(struct drm_i915_private *dev_priv, void *vaddr)
 {
/* There are only few exceptions for gen >=6. chv and bxt.
 * And we are not sure about the latter so play safe for now.
 */
-   if (IS_CHERRYVIEW(dev) || IS_BROXTON(dev))
+   if (IS_CHERRYVIEW(dev_priv) || IS_BROXTON(dev_priv))
drm_clflush_virt_range(vaddr, PAGE_SIZE);
 
kunmap_atomic(vaddr);
 }
 
 #define kmap_px(px) kmap_page_dma(px_base(px))
-#define kunmap_px(ppgtt, vaddr) kunmap_page_dma((ppgtt)->base.dev, (vaddr))
+#define kunmap_px(ppgtt, vaddr) \
+   kunmap_page_dma(to_i915((ppgtt)->base.dev), (vaddr))
 
 #define setup_px(dev, px) setup_page_dma((dev), px_base(px))
 #define cleanup_px(dev, px) cleanup_page_dma((dev), px_base(px))
-#define fill_px(dev, px, v) fill_page_dma((dev), px_base(px), (v))
-#define fill32_px(dev, px, v) fill_page_dma_32((dev), px_base(px), (v))
+#define fill_px(dev_priv, px, v) fill_page_dma((dev_priv), px_base(px), (v))
+#define fill32_px(dev_priv, px, v) \
+   fill_page_dma_32((dev_priv), px_base(px), (v))
 
-static void fill_page_dma(struct drm_device *dev, struct i915_page_dma *p,
- const uint64_t val)
+static void fill_page_dma(struct drm_i915_private *dev_priv,
+ struct i915_page_dma *p, const uint64_t val)
 {
int i;
uint64_t * const vaddr = kmap_page_dma(p);
@@ -401,17 +403,17 @@ static void fill_page_dma(struct drm_device *dev, struct 
i915_page_dma *p,
for (i = 0; i < 512; i++)
vaddr[i] = val;
 
-   kunmap_page_dma(dev, vaddr);
+   kunmap_page_dma(dev_priv, vaddr);
 }
 
-static void fill_page_dma_32(struct drm_device *dev, struct i915_page_dma *p,
-const 

[Intel-gfx] [PATCH 06/19] drm/i915: Make IS_GEN-range macro only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Saves 944 bytes of .rodata strings.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index aac9375cccb3..58045cd7a087 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2616,7 +2616,7 @@ struct drm_i915_cmd_table {
  *
  * Use GEN_FOREVER for unbound start and or end.
  */
-#define IS_GEN(p, s, e) ({ \
+#define IS_GEN(dev_priv, s, e) ({ \
unsigned int __s = (s), __e = (e); \
BUILD_BUG_ON(!__builtin_constant_p(s)); \
BUILD_BUG_ON(!__builtin_constant_p(e)); \
@@ -2626,7 +2626,7 @@ struct drm_i915_cmd_table {
__e = BITS_PER_LONG - 1; \
else \
__e = (e) - 1; \
-   !!(INTEL_INFO(p)->gen_mask & GENMASK((__e), (__s))); \
+   !!((dev_priv)->info.gen_mask & GENMASK((__e), (__s))); \
 })
 
 /*
-- 
2.7.4

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[Intel-gfx] [PATCH 17/19] drm/i915: Make IS_VALLEYVIEW only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Saves 944 bytes of .rodata strings and 128 bytes of .text.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.h | 2 +-
 drivers/gpu/drm/i915/i915_gem_fence.c   | 2 +-
 drivers/gpu/drm/i915/i915_gpu_error.c   | 4 ++--
 drivers/gpu/drm/i915/intel_crt.c| 6 +++---
 drivers/gpu/drm/i915/intel_display.c| 6 +++---
 drivers/gpu/drm/i915/intel_dp.c | 8 
 drivers/gpu/drm/i915/intel_hdmi.c   | 2 +-
 drivers/gpu/drm/i915/intel_pm.c | 2 +-
 drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +--
 9 files changed, 17 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 96846ecfc224..f9f9a218d5fe 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2659,7 +2659,7 @@ struct drm_i915_cmd_table {
 #define IS_IVB_GT1(dev_priv)   (INTEL_DEVID(dev_priv) == 0x0156 || \
 INTEL_DEVID(dev_priv) == 0x0152 || \
 INTEL_DEVID(dev_priv) == 0x015a)
-#define IS_VALLEYVIEW(dev) (INTEL_INFO(dev)->is_valleyview)
+#define IS_VALLEYVIEW(dev_priv)((dev_priv)->info.is_valleyview)
 #define IS_CHERRYVIEW(dev_priv)((dev_priv)->info.is_cherryview)
 #define IS_HASWELL(dev_priv)   ((dev_priv)->info.is_haswell)
 #define IS_BROADWELL(dev_priv) ((dev_priv)->info.is_broadwell)
diff --git a/drivers/gpu/drm/i915/i915_gem_fence.c 
b/drivers/gpu/drm/i915/i915_gem_fence.c
index 8df1fa7234e8..d26768567252 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence.c
@@ -448,7 +448,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
uint32_t swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN;
uint32_t swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN;
 
-   if (INTEL_INFO(dev)->gen >= 8 || IS_VALLEYVIEW(dev)) {
+   if (INTEL_GEN(dev_priv) >= 8 || IS_VALLEYVIEW(dev_priv)) {
/*
 * On BDW+, swizzling is not used. We leave the CPU memory
 * controller in charge of optimizing memory accesses without
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index d41517e11978..6eb11fd326fd 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1349,7 +1349,7 @@ static void i915_capture_reg_state(struct 
drm_i915_private *dev_priv,
 */
 
/* 1: Registers specific to a single generation */
-   if (IS_VALLEYVIEW(dev)) {
+   if (IS_VALLEYVIEW(dev_priv)) {
error->gtier[0] = I915_READ(GTIER);
error->ier = I915_READ(VLV_IER);
error->forcewake = I915_READ_FW(FORCEWAKE_VLV);
@@ -1398,7 +1398,7 @@ static void i915_capture_reg_state(struct 
drm_i915_private *dev_priv,
error->gtier[0] = I915_READ(GTIER);
} else if (IS_GEN2(dev)) {
error->ier = I915_READ16(IER);
-   } else if (!IS_VALLEYVIEW(dev)) {
+   } else if (!IS_VALLEYVIEW(dev_priv)) {
error->ier = I915_READ(IER);
}
error->eir = I915_READ(EIR);
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index d456786f5813..d92c3edf10ff 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -253,7 +253,7 @@ intel_crt_mode_valid(struct drm_connector *connector,
 
if (HAS_PCH_LPT(dev_priv))
max_clock = 18;
-   else if (IS_VALLEYVIEW(dev))
+   else if (IS_VALLEYVIEW(dev_priv))
/*
 * 270 MHz due to current DPLL limits,
 * DAC limit supposedly 355 MHz.
@@ -423,7 +423,7 @@ static bool intel_crt_detect_hotplug(struct drm_connector 
*connector)
if (HAS_PCH_SPLIT(dev_priv))
return intel_ironlake_crt_detect_hotplug(connector);
 
-   if (IS_VALLEYVIEW(dev))
+   if (IS_VALLEYVIEW(dev_priv))
return valleyview_crt_detect_hotplug(connector);
 
/*
@@ -850,7 +850,7 @@ void intel_crt_init(struct drm_device *dev)
 
if (HAS_PCH_SPLIT(dev_priv))
adpa_reg = PCH_ADPA;
-   else if (IS_VALLEYVIEW(dev))
+   else if (IS_VALLEYVIEW(dev_priv))
adpa_reg = VLV_ADPA;
else
adpa_reg = ADPA;
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index d61a12dbbd72..c3fb9f700c7a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5876,7 +5876,7 @@ static void intel_update_max_cdclk(struct drm_device *dev)
dev_priv->max_cdclk_freq = 675000;
} else if (IS_CHERRYVIEW(dev_priv)) {
dev_priv->max_cdclk_freq = 32;
-   } else if (IS_VALLEYVIEW(dev)) {
+   } else if (IS_VALLEYVIEW(dev_priv)) {
 

[Intel-gfx] [PATCH 05/19] drm/i915: Do not use INTEL_INFO(dev_priv)->ring_mask inside WARNs

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Saves 1520 bytes of .rodata strings.

Signed-off-by: Tvrtko Ursulin 
Reviewed-by: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/intel_engine_cs.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c 
b/drivers/gpu/drm/i915/intel_engine_cs.c
index 480584c09306..03e11348eb32 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -110,13 +110,14 @@ int intel_engines_init(struct drm_device *dev)
 {
struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_device_info *device_info = mkwrite_device_info(dev_priv);
+   unsigned int ring_mask = INTEL_INFO(dev_priv)->ring_mask;
unsigned int mask = 0;
int (*init)(struct intel_engine_cs *engine);
unsigned int i;
int ret;
 
-   WARN_ON(INTEL_INFO(dev_priv)->ring_mask == 0);
-   WARN_ON(INTEL_INFO(dev_priv)->ring_mask &
+   WARN_ON(ring_mask == 0);
+   WARN_ON(ring_mask &
GENMASK(sizeof(mask) * BITS_PER_BYTE - 1, I915_NUM_ENGINES));
 
for (i = 0; i < ARRAY_SIZE(intel_engines); i++) {
@@ -143,7 +144,7 @@ int intel_engines_init(struct drm_device *dev)
 * are added to the driver by a warning and disabling the forgotten
 * engines.
 */
-   if (WARN_ON(mask != INTEL_INFO(dev_priv)->ring_mask))
+   if (WARN_ON(mask != ring_mask))
device_info->ring_mask = mask;
 
device_info->num_rings = hweight32(mask);
-- 
2.7.4

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[Intel-gfx] [PATCH 16/19] drm/i915: Make IS_CHERRYVIEW only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Saves 864 bytes of .rodata strings and ~100 of .text.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.c |  2 +-
 drivers/gpu/drm/i915/i915_drv.h |  8 ++--
 drivers/gpu/drm/i915/i915_gem_gtt.c |  2 +-
 drivers/gpu/drm/i915/intel_audio.c  |  4 +-
 drivers/gpu/drm/i915/intel_color.c  |  2 +-
 drivers/gpu/drm/i915/intel_display.c| 67 +
 drivers/gpu/drm/i915/intel_dp.c | 55 ++-
 drivers/gpu/drm/i915/intel_dsi.c|  8 ++--
 drivers/gpu/drm/i915/intel_hdmi.c   | 10 ++---
 drivers/gpu/drm/i915/intel_i2c.c|  2 +-
 drivers/gpu/drm/i915/intel_pm.c |  4 +-
 drivers/gpu/drm/i915/intel_psr.c|  4 +-
 drivers/gpu/drm/i915/intel_runtime_pm.c |  2 +-
 drivers/gpu/drm/i915/intel_sprite.c | 10 +++--
 14 files changed, 93 insertions(+), 87 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 18af6d1ccec9..5e7b6a1cb2c8 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -424,7 +424,7 @@ intel_setup_mchbar(struct drm_device *dev)
u32 temp;
bool enabled;
 
-   if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
+   if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
return;
 
dev_priv->mchbar_need_disable = false;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f54465ea2f44..96846ecfc224 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2660,7 +2660,7 @@ struct drm_i915_cmd_table {
 INTEL_DEVID(dev_priv) == 0x0152 || \
 INTEL_DEVID(dev_priv) == 0x015a)
 #define IS_VALLEYVIEW(dev) (INTEL_INFO(dev)->is_valleyview)
-#define IS_CHERRYVIEW(dev) (INTEL_INFO(dev)->is_cherryview)
+#define IS_CHERRYVIEW(dev_priv)((dev_priv)->info.is_cherryview)
 #define IS_HASWELL(dev_priv)   ((dev_priv)->info.is_haswell)
 #define IS_BROADWELL(dev_priv) ((dev_priv)->info.is_broadwell)
 #define IS_SKYLAKE(dev_priv)   ((dev_priv)->info.is_skylake)
@@ -3838,11 +3838,11 @@ __raw_write(64, q)
 #define INTEL_BROADCAST_RGB_FULL 1
 #define INTEL_BROADCAST_RGB_LIMITED 2
 
-static inline i915_reg_t i915_vgacntrl_reg(struct drm_device *dev)
+static inline i915_reg_t i915_vgacntrl_reg(struct drm_i915_private *dev_priv)
 {
-   if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
+   if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
return VLV_VGACNTRL;
-   else if (INTEL_INFO(dev)->gen >= 5)
+   else if (INTEL_GEN(dev_priv) >= 5)
return CPU_VGACNTRL;
else
return VGACNTRL;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index e628691fe97e..4211b9a4a918 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2133,7 +2133,7 @@ static void gtt_write_workarounds(struct drm_device *dev)
/* WaIncreaseDefaultTLBEntries:chv,bdw,skl,bxt */
if (IS_BROADWELL(dev_priv))
I915_WRITE(GEN8_L3_LRA_1_GPGPU, 
GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW);
-   else if (IS_CHERRYVIEW(dev))
+   else if (IS_CHERRYVIEW(dev_priv))
I915_WRITE(GEN8_L3_LRA_1_GPGPU, 
GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_CHV);
else if (IS_SKYLAKE(dev_priv))
I915_WRITE(GEN8_L3_LRA_1_GPGPU, 
GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_SKL);
diff --git a/drivers/gpu/drm/i915/intel_audio.c 
b/drivers/gpu/drm/i915/intel_audio.c
index 13b726916f98..d1275cbd5905 100644
--- a/drivers/gpu/drm/i915/intel_audio.c
+++ b/drivers/gpu/drm/i915/intel_audio.c
@@ -428,8 +428,8 @@ static void ilk_audio_codec_enable(struct drm_connector 
*connector,
aud_config = IBX_AUD_CFG(pipe);
aud_cntl_st = IBX_AUD_CNTL_ST(pipe);
aud_cntrl_st2 = IBX_AUD_CNTL_ST2;
-   } else if (IS_VALLEYVIEW(connector->dev) ||
-  IS_CHERRYVIEW(connector->dev)) {
+   } else if (IS_VALLEYVIEW(dev_priv) ||
+  IS_CHERRYVIEW(dev_priv)) {
hdmiw_hdmiedid = VLV_HDMIW_HDMIEDID(pipe);
aud_config = VLV_AUD_CFG(pipe);
aud_cntl_st = VLV_AUD_CNTL_ST(pipe);
diff --git a/drivers/gpu/drm/i915/intel_color.c 
b/drivers/gpu/drm/i915/intel_color.c
index da76a799411a..445108855275 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -534,7 +534,7 @@ void intel_color_init(struct drm_crtc *crtc)
 
drm_mode_crtc_set_gamma_size(crtc, 256);
 
-   if (IS_CHERRYVIEW(dev)) {
+   if (IS_CHERRYVIEW(dev_priv)) {
dev_priv->display.load_csc_matrix = cherryview_load_csc_matrix;
dev_priv->display.load_luts = 

[Intel-gfx] [PATCH 12/19] drm/i915: Make IS_SKYLAKE only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Saves 1016 bytes of .rodata strings and couple hundred of .text.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.h | 2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
 drivers/gpu/drm/i915/intel_guc_loader.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3c72ed08a5d2..9784e61400e5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2663,7 +2663,7 @@ struct drm_i915_cmd_table {
 #define IS_CHERRYVIEW(dev) (INTEL_INFO(dev)->is_cherryview)
 #define IS_HASWELL(dev_priv)   ((dev_priv)->info.is_haswell)
 #define IS_BROADWELL(dev_priv) ((dev_priv)->info.is_broadwell)
-#define IS_SKYLAKE(dev)(INTEL_INFO(dev)->is_skylake)
+#define IS_SKYLAKE(dev_priv)   ((dev_priv)->info.is_skylake)
 #define IS_BROXTON(dev)(INTEL_INFO(dev)->is_broxton)
 #define IS_KABYLAKE(dev_priv)  ((dev_priv)->info.is_kabylake)
 #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 3246d51c7b8e..cf43a5632961 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2133,7 +2133,7 @@ static void gtt_write_workarounds(struct drm_device *dev)
I915_WRITE(GEN8_L3_LRA_1_GPGPU, 
GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW);
else if (IS_CHERRYVIEW(dev))
I915_WRITE(GEN8_L3_LRA_1_GPGPU, 
GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_CHV);
-   else if (IS_SKYLAKE(dev))
+   else if (IS_SKYLAKE(dev_priv))
I915_WRITE(GEN8_L3_LRA_1_GPGPU, 
GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_SKL);
else if (IS_BROXTON(dev))
I915_WRITE(GEN8_L3_LRA_1_GPGPU, 
GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_BXT);
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c 
b/drivers/gpu/drm/i915/intel_guc_loader.c
index 3c46605b58e7..182204373931 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -726,7 +726,7 @@ void intel_guc_init(struct drm_device *dev)
 
if (!HAS_GUC_UCODE(dev)) {
fw_path = NULL;
-   } else if (IS_SKYLAKE(dev)) {
+   } else if (IS_SKYLAKE(dev_priv)) {
fw_path = I915_SKL_GUC_UCODE;
guc_fw->guc_fw_major_wanted = SKL_FW_MAJOR;
guc_fw->guc_fw_minor_wanted = SKL_FW_MINOR;
-- 
2.7.4

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[Intel-gfx] [PATCH v2 00/19] .rodata.str diet

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Dynamic typing in __I915__ (INTEL_INFO) has and unfortuante consequence that
for every time it is called under a WARN it generates a very verbose string
placed into the appropriate .rodata section.

Each instance of that can can several hundred bytes to the binary. One example
of such strings found in the binary, not word-wrapped is:

WARN_ON(!((&({ struct drm_i915_private *__p; if 
(__builtin_types_compatible_p(typeof(*dev_priv), struct drm_i915_private)) __p 
= (struct drm_i915_private *)dev_priv; else if 
(__builtin_types_compatible_p(typeof(*dev_priv), struct drm_device)) __p = 
to_i915((struct drm_device *)dev_priv); else do { bool __cond = !(!(1)); extern 
void __compiletime_assert_1912(void) __attribute__((error("BUILD_BUG 
failed"))); if (__cond) __compiletime_assert_1912(); do { } while (0); } while 
(0); __p; })->info)->has_ddi) && (control & (0x << 16)) != (0xabcd << 16))

If we gradually remove dynamic typing abilities from individual macros we can
start bringing the size of the binary down.

For example after this series:

   textdata bss dec hex filename
1067727   23256 576 1091559  10a7e7 i915.ko.nightly
1038202   23256 576 1062034  103492 i915.ko.diet

Which is a ~29KiB saving.

This is disruptive of course, but perhaps it is time to bite the bullet since we
now have a situation that even new platforms like Kabylake are adding code which
uses the wrong thing in those macros (dev instead of dev_priv).

The way I have done it here makes it impossible to use the converted macros in
a wrong way going forward.

v2:
 * Rebase.
 * Review comments.
 * Split out the patches unrelated to INTEL_INFO.

Tvrtko Ursulin (19):
  drm/i915: Make HAS_DDI and HAS_PCH_LPT_LP only take dev_priv
  drm/i915: Make INTEL_PCH_TYPE & co only take dev_priv
  drm/i915: Make HAS_GMCH_DISPLAY only take dev_priv
  drm/i915: Make HAS_RUNTIME_PM only take dev_priv
  drm/i915: Do not use INTEL_INFO(dev_priv)->ring_mask inside WARNs
  drm/i915: Make IS_GEN-range macro only take dev_priv
  drm/i915: Make INTEL_DEVID only take dev_priv
  drm/i915: Make IS_IVYBRIDGE only take dev_priv
  drm/i915: Make IS_BROADWELL only take dev_priv
  drm/i915: Make IS_HASWELL only take dev_priv
  drm/i915: Make IS_KABYLAKE only take dev_priv
  drm/i915: Make IS_SKYLAKE only take dev_priv
  drm/i915: Make IS_BROXTON only take dev_priv
  drm/i915: Make HAS_L3_DPF only take dev_priv
  drm/i915: Make IS_G4X only take dev_priv
  drm/i915: Make IS_CHERRYVIEW only take dev_priv
  drm/i915: Make IS_VALLEYVIEW only take dev_priv
  drm/i915: Make INTEL_GEN only take dev_priv
  drm/i915: Make IS_GEN macros only take dev_priv

 drivers/gpu/drm/i915/i915_debugfs.c  |   4 +-
 drivers/gpu/drm/i915/i915_drv.c  |  63 ++--
 drivers/gpu/drm/i915/i915_drv.h  | 200 ++---
 drivers/gpu/drm/i915/i915_gem.c  |  55 ++--
 drivers/gpu/drm/i915/i915_gem_context.c  |   2 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |   4 +-
 drivers/gpu/drm/i915/i915_gem_fence.c|  11 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c  |  60 ++--
 drivers/gpu/drm/i915/i915_gem_render_state.c |   6 +-
 drivers/gpu/drm/i915/i915_gem_stolen.c   |  17 +-
 drivers/gpu/drm/i915/i915_gem_tiling.c   |   7 +-
 drivers/gpu/drm/i915/i915_gpu_error.c|  18 +-
 drivers/gpu/drm/i915/i915_irq.c  |  34 +--
 drivers/gpu/drm/i915/i915_reg.h  |   4 +-
 drivers/gpu/drm/i915/i915_suspend.c  |   8 +-
 drivers/gpu/drm/i915/intel_audio.c   |   6 +-
 drivers/gpu/drm/i915/intel_color.c   |  16 +-
 drivers/gpu/drm/i915/intel_crt.c |  53 ++--
 drivers/gpu/drm/i915/intel_ddi.c |  22 +-
 drivers/gpu/drm/i915/intel_display.c | 416 ++-
 drivers/gpu/drm/i915/intel_dp.c  | 165 +--
 drivers/gpu/drm/i915/intel_dpll_mgr.c|  10 +-
 drivers/gpu/drm/i915/intel_drv.h |   2 +-
 drivers/gpu/drm/i915/intel_dsi.c |  37 ++-
 drivers/gpu/drm/i915/intel_dsi_pll.c |  26 +-
 drivers/gpu/drm/i915/intel_engine_cs.c   |   7 +-
 drivers/gpu/drm/i915/intel_fifo_underrun.c   |   8 +-
 drivers/gpu/drm/i915/intel_guc_loader.c  |  15 +-
 drivers/gpu/drm/i915/intel_hdmi.c|  58 ++--
 drivers/gpu/drm/i915/intel_i2c.c |   9 +-
 drivers/gpu/drm/i915/intel_lvds.c|  29 +-
 drivers/gpu/drm/i915/intel_pm.c  | 158 +-
 drivers/gpu/drm/i915/intel_psr.c |  22 +-
 drivers/gpu/drm/i915/intel_runtime_pm.c  |  15 +-
 drivers/gpu/drm/i915/intel_sdvo.c|  23 +-
 drivers/gpu/drm/i915/intel_sprite.c  |  30 +-
 drivers/gpu/drm/i915/intel_tv.c  |   4 +-
 37 files changed, 834 insertions(+), 790 deletions(-)

-- 
2.7.4

___
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Intel-gfx@lists.freedesktop.org

[Intel-gfx] [PATCH 11/19] drm/i915: Make IS_KABYLAKE only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Saves 1320 bytes of .rodata strings.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.c | 10 +-
 drivers/gpu/drm/i915/i915_drv.h |  6 +++---
 drivers/gpu/drm/i915/i915_gem_stolen.c  |  2 +-
 drivers/gpu/drm/i915/intel_ddi.c| 16 
 drivers/gpu/drm/i915/intel_display.c| 10 +-
 drivers/gpu/drm/i915/intel_dpll_mgr.c   |  2 +-
 drivers/gpu/drm/i915/intel_guc_loader.c |  2 +-
 drivers/gpu/drm/i915/intel_runtime_pm.c |  2 +-
 8 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 8899835fffab..d854ea4a7e92 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -203,17 +203,17 @@ static void intel_detect_pch(struct drm_device *dev)
} else if (id == INTEL_PCH_SPT_DEVICE_ID_TYPE) {
dev_priv->pch_type = PCH_SPT;
DRM_DEBUG_KMS("Found SunrisePoint PCH\n");
-   WARN_ON(!IS_SKYLAKE(dev) &&
-   !IS_KABYLAKE(dev));
+   WARN_ON(!IS_SKYLAKE(dev_priv) &&
+   !IS_KABYLAKE(dev_priv));
} else if (id == INTEL_PCH_SPT_LP_DEVICE_ID_TYPE) {
dev_priv->pch_type = PCH_SPT;
DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n");
-   WARN_ON(!IS_SKYLAKE(dev) &&
-   !IS_KABYLAKE(dev));
+   WARN_ON(!IS_SKYLAKE(dev_priv) &&
+   !IS_KABYLAKE(dev_priv));
} else if (id == INTEL_PCH_KBP_DEVICE_ID_TYPE) {
dev_priv->pch_type = PCH_KBP;
DRM_DEBUG_KMS("Found KabyPoint PCH\n");
-   WARN_ON(!IS_KABYLAKE(dev));
+   WARN_ON(!IS_KABYLAKE(dev_priv));
} else if ((id == INTEL_PCH_P2X_DEVICE_ID_TYPE) ||
   (id == INTEL_PCH_P3X_DEVICE_ID_TYPE) ||
   ((id == INTEL_PCH_QEMU_DEVICE_ID_TYPE) &&
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d6c3a4bb29aa..3c72ed08a5d2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2665,7 +2665,7 @@ struct drm_i915_cmd_table {
 #define IS_BROADWELL(dev_priv) ((dev_priv)->info.is_broadwell)
 #define IS_SKYLAKE(dev)(INTEL_INFO(dev)->is_skylake)
 #define IS_BROXTON(dev)(INTEL_INFO(dev)->is_broxton)
-#define IS_KABYLAKE(dev)   (INTEL_INFO(dev)->is_kabylake)
+#define IS_KABYLAKE(dev_priv)  ((dev_priv)->info.is_kabylake)
 #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile)
 #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
@@ -2732,8 +2732,8 @@ struct drm_i915_cmd_table {
 #define KBL_REVID_D0   0x3
 #define KBL_REVID_E0   0x4
 
-#define IS_KBL_REVID(p, since, until) \
-   (IS_KABYLAKE(p) && IS_REVID(p, since, until))
+#define IS_KBL_REVID(dev_priv, since, until) \
+   (IS_KABYLAKE(dev_priv) && IS_REVID(dev_priv, since, until))
 
 /*
  * The genX designation typically refers to the render engine, so render
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c 
b/drivers/gpu/drm/i915/i915_gem_stolen.c
index cbea6fb83ce5..3508120b8c90 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -456,7 +456,7 @@ int i915_gem_init_stolen(struct drm_device *dev)
break;
default:
if (IS_BROADWELL(dev_priv) ||
-   IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev))
+   IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
bdw_get_stolen_reserved(dev_priv, _base,
_size);
else
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index cd7128b89b4d..07164e250adf 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1020,13 +1020,13 @@ static void bxt_ddi_clock_get(struct intel_encoder 
*encoder,
 void intel_ddi_clock_get(struct intel_encoder *encoder,
 struct intel_crtc_state *pipe_config)
 {
-   struct drm_device *dev = encoder->base.dev;
+   struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
-   if (INTEL_INFO(dev)->gen <= 8)
+   if (INTEL_GEN(dev_priv) <= 8)
hsw_ddi_clock_get(encoder, pipe_config);
-   else if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev))
+

[Intel-gfx] [PATCH 09/19] drm/i915: Make IS_BROADWELL only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Saves 1808 bytes of .rodata strings.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.c |  6 --
 drivers/gpu/drm/i915/i915_drv.h |  6 +++---
 drivers/gpu/drm/i915/i915_gem.c |  5 +++--
 drivers/gpu/drm/i915/i915_gem_gtt.c |  2 +-
 drivers/gpu/drm/i915/intel_color.c  |  4 ++--
 drivers/gpu/drm/i915/intel_display.c| 21 +++--
 drivers/gpu/drm/i915/intel_dp.c | 19 ++-
 drivers/gpu/drm/i915/intel_pm.c | 20 +++-
 drivers/gpu/drm/i915/intel_psr.c|  4 ++--
 drivers/gpu/drm/i915/intel_runtime_pm.c |  3 +--
 drivers/gpu/drm/i915/intel_sprite.c |  8 
 11 files changed, 52 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f6ba8f262238..8899835fffab 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -189,13 +189,15 @@ static void intel_detect_pch(struct drm_device *dev)
} else if (id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {
dev_priv->pch_type = PCH_LPT;
DRM_DEBUG_KMS("Found LynxPoint PCH\n");
-   WARN_ON(!IS_HASWELL(dev) && !IS_BROADWELL(dev));
+   WARN_ON(!IS_HASWELL(dev_priv) &&
+   !IS_BROADWELL(dev_priv));
WARN_ON(IS_HSW_ULT(dev_priv) ||
IS_BDW_ULT(dev_priv));
} else if (id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
dev_priv->pch_type = PCH_LPT;
DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
-   WARN_ON(!IS_HASWELL(dev) && !IS_BROADWELL(dev));
+   WARN_ON(!IS_HASWELL(dev_priv) &&
+   !IS_BROADWELL(dev_priv));
WARN_ON(!IS_HSW_ULT(dev_priv) &&
!IS_BDW_ULT(dev_priv));
} else if (id == INTEL_PCH_SPT_DEVICE_ID_TYPE) {
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3f321932d18a..13e409554fcc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2662,7 +2662,7 @@ struct drm_i915_cmd_table {
 #define IS_VALLEYVIEW(dev) (INTEL_INFO(dev)->is_valleyview)
 #define IS_CHERRYVIEW(dev) (INTEL_INFO(dev)->is_cherryview)
 #define IS_HASWELL(dev)(INTEL_INFO(dev)->is_haswell)
-#define IS_BROADWELL(dev)  (INTEL_INFO(dev)->is_broadwell)
+#define IS_BROADWELL(dev_priv) ((dev_priv)->info.is_broadwell)
 #define IS_SKYLAKE(dev)(INTEL_INFO(dev)->is_skylake)
 #define IS_BROXTON(dev)(INTEL_INFO(dev)->is_broxton)
 #define IS_KABYLAKE(dev)   (INTEL_INFO(dev)->is_kabylake)
@@ -2769,8 +2769,8 @@ struct drm_i915_cmd_table {
 #define HAS_LLC(dev)   (INTEL_INFO(dev)->has_llc)
 #define HAS_SNOOP(dev) (INTEL_INFO(dev)->has_snoop)
 #define HAS_EDRAM(dev) (!!(__I915__(dev)->edram_cap & EDRAM_ENABLED))
-#define HAS_WT(dev)((IS_HASWELL(dev) || IS_BROADWELL(dev)) && \
-HAS_EDRAM(dev))
+#define HAS_WT(dev_priv)   ((IS_HASWELL(dev_priv) || \
+IS_BROADWELL(dev_priv)) && HAS_EDRAM(dev_priv))
 #define HWS_NEEDS_PHYSICAL(dev)(INTEL_INFO(dev)->hws_needs_physical)
 
 #define HAS_HW_CONTEXTS(dev)   (INTEL_INFO(dev)->has_hw_contexts)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 6da841500510..aefb88f987b2 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3473,7 +3473,7 @@ int i915_gem_set_caching_ioctl(struct drm_device *dev, 
void *data,
level = I915_CACHE_LLC;
break;
case I915_CACHING_DISPLAY:
-   level = HAS_WT(dev) ? I915_CACHE_WT : I915_CACHE_NONE;
+   level = HAS_WT(dev_priv) ? I915_CACHE_WT : I915_CACHE_NONE;
break;
default:
return -EINVAL;
@@ -3531,7 +3531,8 @@ i915_gem_object_pin_to_display_plane(struct 
drm_i915_gem_object *obj,
 * with that bit in the PTE to main memory with just one PIPE_CONTROL.
 */
ret = i915_gem_object_set_cache_level(obj,
- HAS_WT(obj->base.dev) ? 
I915_CACHE_WT : I915_CACHE_NONE);
+ HAS_WT(to_i915(obj->base.dev)) ?
+ I915_CACHE_WT : I915_CACHE_NONE);
if (ret) {
vma = ERR_PTR(ret);
goto err_unpin_display;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 

[Intel-gfx] [PATCH 10/19] drm/i915: Make IS_HASWELL only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Saves 2432 bytes of .rodata strings.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.h  |  2 +-
 drivers/gpu/drm/i915/i915_gem.c  |  2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c  |  4 ++--
 drivers/gpu/drm/i915/i915_irq.c  |  4 ++--
 drivers/gpu/drm/i915/i915_reg.h  |  4 ++--
 drivers/gpu/drm/i915/intel_color.c   |  4 ++--
 drivers/gpu/drm/i915/intel_ddi.c |  2 +-
 drivers/gpu/drm/i915/intel_display.c | 23 ++-
 drivers/gpu/drm/i915/intel_psr.c |  6 +++---
 9 files changed, 24 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 13e409554fcc..d6c3a4bb29aa 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2661,7 +2661,7 @@ struct drm_i915_cmd_table {
 INTEL_DEVID(dev_priv) == 0x015a)
 #define IS_VALLEYVIEW(dev) (INTEL_INFO(dev)->is_valleyview)
 #define IS_CHERRYVIEW(dev) (INTEL_INFO(dev)->is_cherryview)
-#define IS_HASWELL(dev)(INTEL_INFO(dev)->is_haswell)
+#define IS_HASWELL(dev_priv)   ((dev_priv)->info.is_haswell)
 #define IS_BROADWELL(dev_priv) ((dev_priv)->info.is_broadwell)
 #define IS_SKYLAKE(dev)(INTEL_INFO(dev)->is_skylake)
 #define IS_BROXTON(dev)(INTEL_INFO(dev)->is_broxton)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index aefb88f987b2..8c362899674a 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4360,7 +4360,7 @@ i915_gem_init_hw(struct drm_device *dev)
if (HAS_EDRAM(dev) && INTEL_GEN(dev_priv) < 9)
I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
 
-   if (IS_HASWELL(dev))
+   if (IS_HASWELL(dev_priv))
I915_WRITE(MI_PREDICATE_RESULT_2, IS_HSW_GT3(dev_priv) ?
   LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 0f8f073c589c..3246d51c7b8e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1746,7 +1746,7 @@ static void gen7_ppgtt_enable(struct drm_device *dev)
I915_WRITE(GAC_ECO_BITS, ecobits | ECOBITS_PPGTT_CACHE64B);
 
ecochk = I915_READ(GAM_ECOCHK);
-   if (IS_HASWELL(dev)) {
+   if (IS_HASWELL(dev_priv)) {
ecochk |= ECOCHK_PPGTT_WB_HSW;
} else {
ecochk |= ECOCHK_PPGTT_LLC_IVB;
@@ -2058,7 +2058,7 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
ppgtt->base.pte_encode = ggtt->base.pte_encode;
if (intel_vgpu_active(dev_priv) || IS_GEN6(dev))
ppgtt->switch_mm = gen6_mm_switch;
-   else if (IS_HASWELL(dev))
+   else if (IS_HASWELL(dev_priv))
ppgtt->switch_mm = hsw_mm_switch;
else if (IS_GEN7(dev))
ppgtt->switch_mm = gen7_mm_switch;
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 5fb3b1c9a52c..47337aabc326 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3594,8 +3594,8 @@ static void gen5_gt_irq_postinstall(struct drm_device 
*dev)
dev_priv->gt_irq_mask = ~0;
if (HAS_L3_DPF(dev)) {
/* L3 parity interrupt is always unmasked. */
-   dev_priv->gt_irq_mask = ~GT_PARITY_ERROR(dev);
-   gt_irqs |= GT_PARITY_ERROR(dev);
+   dev_priv->gt_irq_mask = ~GT_PARITY_ERROR(dev_priv);
+   gt_irqs |= GT_PARITY_ERROR(dev_priv);
}
 
gt_irqs |= GT_RENDER_USER_INTERRUPT;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index acc767a52d8e..8b61669af628 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2094,9 +2094,9 @@ enum skl_disp_power_wells {
 #define PM_VEBOX_CS_ERROR_INTERRUPT(1 << 12) /* hsw+ */
 #define PM_VEBOX_USER_INTERRUPT(1 << 10) /* hsw+ */
 
-#define GT_PARITY_ERROR(dev) \
+#define GT_PARITY_ERROR(dev_priv) \
(GT_RENDER_L3_PARITY_ERROR_INTERRUPT | \
-(IS_HASWELL(dev) ? GT_RENDER_L3_PARITY_ERROR_INTERRUPT_S1 : 0))
+(IS_HASWELL(dev_priv) ? GT_RENDER_L3_PARITY_ERROR_INTERRUPT_S1 : 0))
 
 /* These are all the "old" interrupts */
 #define ILK_BSD_USER_INTERRUPT (1<<5)
diff --git a/drivers/gpu/drm/i915/intel_color.c 
b/drivers/gpu/drm/i915/intel_color.c
index be76ef88678c..da76a799411a 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -326,7 +326,7 @@ static void haswell_load_luts(struct drm_crtc_state 
*crtc_state)
 * Workaround : Do not read or write the pipe palette/gamma data while
 * GAMMA_MODE is configured for split gamma and IPS_CTL has 

[Intel-gfx] [PATCH 15/19] drm/i915: Make IS_G4X only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Saves 472 bytes of .rodata strings.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.h|  2 +-
 drivers/gpu/drm/i915/i915_gem_stolen.c |  5 +++--
 drivers/gpu/drm/i915/i915_suspend.c|  4 ++--
 drivers/gpu/drm/i915/intel_crt.c   |  2 +-
 drivers/gpu/drm/i915/intel_display.c   | 40 ++
 drivers/gpu/drm/i915/intel_dp.c|  2 +-
 drivers/gpu/drm/i915/intel_hdmi.c  |  4 ++--
 drivers/gpu/drm/i915/intel_pm.c|  4 ++--
 8 files changed, 33 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c264e703b686..f54465ea2f44 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2649,7 +2649,7 @@ struct drm_i915_cmd_table {
 #define IS_BROADWATER(dev) (INTEL_INFO(dev)->is_broadwater)
 #define IS_CRESTLINE(dev)  (INTEL_INFO(dev)->is_crestline)
 #define IS_GM45(dev_priv)  (INTEL_DEVID(dev_priv) == 0x2A42)
-#define IS_G4X(dev)(INTEL_INFO(dev)->is_g4x)
+#define IS_G4X(dev_priv)   ((dev_priv)->info.is_g4x)
 #define IS_PINEVIEW_G(dev_priv)(INTEL_DEVID(dev_priv) == 0xa001)
 #define IS_PINEVIEW_M(dev_priv)(INTEL_DEVID(dev_priv) == 0xa011)
 #define IS_PINEVIEW(dev)   (INTEL_INFO(dev)->is_pineview)
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c 
b/drivers/gpu/drm/i915/i915_gem_stolen.c
index 3508120b8c90..d1b40bce0249 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -204,7 +204,8 @@ static unsigned long i915_stolen_to_physical(struct 
drm_device *dev)
return 0;
 
/* make sure we don't clobber the GTT if it's within stolen memory */
-   if (INTEL_INFO(dev)->gen <= 4 && !IS_G33(dev) && !IS_G4X(dev)) {
+   if (INTEL_GEN(dev_priv) <= 4 && !IS_G33(dev_priv) &&
+   !IS_G4X(dev_priv)) {
struct {
u32 start, end;
} stolen[2] = {
@@ -437,7 +438,7 @@ int i915_gem_init_stolen(struct drm_device *dev)
case 3:
break;
case 4:
-   if (IS_G4X(dev))
+   if (IS_G4X(dev_priv))
g4x_get_stolen_reserved(dev_priv, _base,
_size);
break;
diff --git a/drivers/gpu/drm/i915/i915_suspend.c 
b/drivers/gpu/drm/i915/i915_suspend.c
index a0af170062b1..7870856fccd0 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -38,7 +38,7 @@ static void i915_save_display(struct drm_device *dev)
dev_priv->regfile.saveDSPARB = I915_READ(DSPARB);
 
/* save FBC interval */
-   if (HAS_FBC(dev) && INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev))
+   if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))
dev_priv->regfile.saveFBC_CONTROL = I915_READ(FBC_CONTROL);
 }
 
@@ -54,7 +54,7 @@ static void i915_restore_display(struct drm_device *dev)
intel_fbc_global_disable(dev_priv);
 
/* restore FBC interval */
-   if (HAS_FBC(dev) && INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev))
+   if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))
I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL);
 
i915_redisable_vga(dev);
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index d4388c03b4da..d456786f5813 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -771,7 +771,7 @@ static int intel_crt_get_modes(struct drm_connector 
*connector)
 
i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
ret = intel_crt_ddc_get_modes(connector, i2c);
-   if (ret || !IS_G4X(dev))
+   if (ret || !IS_G4X(dev_priv))
goto out;
 
/* Try to probe digital port for output in DVI-I -> VGA mode. */
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 636e5572b996..bf871b565549 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3071,7 +3071,7 @@ static void i9xx_update_primary_plane(struct drm_plane 
*primary,
fb->modifier[0] == I915_FORMAT_MOD_X_TILED)
dspcntr |= DISPPLANE_TILED;
 
-   if (IS_G4X(dev))
+   if (IS_G4X(dev_priv))
dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;
 
intel_add_fb_offsets(, , plane_state, 0);
@@ -7226,7 +7226,7 @@ static int intel_crtc_compute_config(struct intel_crtc 
*crtc,
/* Cantiga+ cannot handle modes with a hsync front porch of 0.
 * WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.
 */
-   if ((INTEL_INFO(dev)->gen > 4 || IS_G4X(dev)) &&
+   if ((INTEL_GEN(dev_priv) 

[Intel-gfx] [PATCH 14/19] drm/i915: Make HAS_L3_DPF only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Saves 472 bytes of .rodata strings.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.h | 2 +-
 drivers/gpu/drm/i915/i915_irq.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ad9299196d13..c264e703b686 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2869,7 +2869,7 @@ struct drm_i915_cmd_table {
 #define HAS_GMCH_DISPLAY(dev_priv) ((dev_priv)->info.has_gmch_display)
 
 /* DPF == dynamic parity feature */
-#define HAS_L3_DPF(dev) (INTEL_INFO(dev)->has_l3_dpf)
+#define HAS_L3_DPF(dev_priv) ((dev_priv)->info.has_l3_dpf)
 #define NUM_L3_SLICES(dev_priv) (IS_HSW_GT3(dev_priv) ? \
 2 : HAS_L3_DPF(dev_priv))
 
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 75f4ba935ebc..079ba7cfc971 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3592,7 +3592,7 @@ static void gen5_gt_irq_postinstall(struct drm_device 
*dev)
pm_irqs = gt_irqs = 0;
 
dev_priv->gt_irq_mask = ~0;
-   if (HAS_L3_DPF(dev)) {
+   if (HAS_L3_DPF(dev_priv)) {
/* L3 parity interrupt is always unmasked. */
dev_priv->gt_irq_mask = ~GT_PARITY_ERROR(dev_priv);
gt_irqs |= GT_PARITY_ERROR(dev_priv);
-- 
2.7.4

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[Intel-gfx] [PATCH 01/19] drm/i915: Make HAS_DDI and HAS_PCH_LPT_LP only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

This saves 3248 bytes of .rodata strings.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.h   |  8 +++---
 drivers/gpu/drm/i915/intel_crt.c  | 10 +++
 drivers/gpu/drm/i915/intel_display.c  | 49 ++-
 drivers/gpu/drm/i915/intel_dp.c   | 16 ++--
 drivers/gpu/drm/i915/intel_dpll_mgr.c |  4 +--
 drivers/gpu/drm/i915/intel_hdmi.c | 10 +++
 drivers/gpu/drm/i915/intel_pm.c   |  4 +--
 drivers/gpu/drm/i915/intel_psr.c  |  8 +++---
 8 files changed, 56 insertions(+), 53 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 54d860e1c0fc..51dd10f25f59 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2815,7 +2815,7 @@ struct drm_i915_cmd_table {
 
 #define HAS_DP_MST(dev)(INTEL_INFO(dev)->has_dp_mst)
 
-#define HAS_DDI(dev)   (INTEL_INFO(dev)->has_ddi)
+#define HAS_DDI(dev_priv)  ((dev_priv)->info.has_ddi)
 #define HAS_FPGA_DBG_UNCLAIMED(dev)(INTEL_INFO(dev)->has_fpga_dbg)
 #define HAS_PSR(dev)   (INTEL_INFO(dev)->has_psr)
 #define HAS_RUNTIME_PM(dev)(INTEL_INFO(dev)->has_runtime_pm)
@@ -2854,8 +2854,10 @@ struct drm_i915_cmd_table {
 #define HAS_PCH_KBP(dev) (INTEL_PCH_TYPE(dev) == PCH_KBP)
 #define HAS_PCH_SPT(dev) (INTEL_PCH_TYPE(dev) == PCH_SPT)
 #define HAS_PCH_LPT(dev) (INTEL_PCH_TYPE(dev) == PCH_LPT)
-#define HAS_PCH_LPT_LP(dev) (__I915__(dev)->pch_id == 
INTEL_PCH_LPT_LP_DEVICE_ID_TYPE)
-#define HAS_PCH_LPT_H(dev) (__I915__(dev)->pch_id == 
INTEL_PCH_LPT_DEVICE_ID_TYPE)
+#define HAS_PCH_LPT_LP(dev_priv) \
+   ((dev_priv)->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE)
+#define HAS_PCH_LPT_H(dev_priv) \
+   ((dev_priv)->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE)
 #define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)
 #define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX)
 #define HAS_PCH_NOP(dev) (INTEL_PCH_TYPE(dev) == PCH_NOP)
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 4a7b6c595ec2..d4b9b166de5d 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -280,13 +280,13 @@ static bool intel_crt_compute_config(struct intel_encoder 
*encoder,
 struct intel_crtc_state *pipe_config,
 struct drm_connector_state *conn_state)
 {
-   struct drm_device *dev = encoder->base.dev;
+   struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
-   if (HAS_PCH_SPLIT(dev))
+   if (HAS_PCH_SPLIT(dev_priv))
pipe_config->has_pch_encoder = true;
 
/* LPT FDI RX only supports 8bpc. */
-   if (HAS_PCH_LPT(dev)) {
+   if (HAS_PCH_LPT(dev_priv)) {
if (pipe_config->bw_constrained && pipe_config->pipe_bpp < 24) {
DRM_DEBUG_KMS("LPT only supports 24bpp\n");
return false;
@@ -296,7 +296,7 @@ static bool intel_crt_compute_config(struct intel_encoder 
*encoder,
}
 
/* FDI must always be 2.7 GHz */
-   if (HAS_DDI(dev))
+   if (HAS_DDI(dev_priv))
pipe_config->port_clock = 135000 * 2;
 
return true;
@@ -917,7 +917,7 @@ void intel_crt_init(struct drm_device *dev)
if (I915_HAS_HOTPLUG(dev) &&
!dmi_check_system(intel_spurious_crt_detect))
crt->base.hpd_pin = HPD_CRT;
-   if (HAS_DDI(dev)) {
+   if (HAS_DDI(dev_priv)) {
crt->base.port = PORT_E;
crt->base.get_config = hsw_crt_get_config;
crt->base.get_hw_state = intel_ddi_get_hw_state;
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 23a6c7213eca..6e447b575413 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1187,19 +1187,17 @@ void assert_fdi_rx_pll(struct drm_i915_private 
*dev_priv,
onoff(state), onoff(cur_state));
 }
 
-void assert_panel_unlocked(struct drm_i915_private *dev_priv,
-  enum pipe pipe)
+void assert_panel_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
 {
-   struct drm_device *dev = _priv->drm;
i915_reg_t pp_reg;
u32 val;
enum pipe panel_pipe = PIPE_A;
bool locked = true;
 
-   if (WARN_ON(HAS_DDI(dev)))
+   if (WARN_ON(HAS_DDI(dev_priv)))
return;
 
-   if (HAS_PCH_SPLIT(dev)) {
+   if (HAS_PCH_SPLIT(dev_priv)) {
u32 port_sel;
 
pp_reg = PP_CONTROL(0);
@@ -1209,7 +1207,7 @@ void assert_panel_unlocked(struct drm_i915_private 
*dev_priv,
I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT)
panel_pipe = PIPE_B;
/* XXX: else fix for eDP */
-   

[Intel-gfx] [PATCH 03/19] drm/i915: Make HAS_GMCH_DISPLAY only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

More .rodata string saving by avoid __I915__ magic inside WARNs.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.h| 2 +-
 drivers/gpu/drm/i915/intel_color.c | 6 +++---
 drivers/gpu/drm/i915/intel_display.c   | 8 
 drivers/gpu/drm/i915/intel_dp.c| 2 +-
 drivers/gpu/drm/i915/intel_dsi.c   | 2 +-
 drivers/gpu/drm/i915/intel_fifo_underrun.c | 2 +-
 drivers/gpu/drm/i915/intel_hdmi.c  | 5 +++--
 7 files changed, 14 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3caa1c767512..1a4698e665be 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2863,7 +2863,7 @@ struct drm_i915_cmd_table {
 #define HAS_PCH_NOP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_NOP)
 #define HAS_PCH_SPLIT(dev_priv) (INTEL_PCH_TYPE(dev_priv) != PCH_NONE)
 
-#define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->has_gmch_display)
+#define HAS_GMCH_DISPLAY(dev_priv) ((dev_priv)->info.has_gmch_display)
 
 /* DPF == dynamic parity feature */
 #define HAS_L3_DPF(dev) (INTEL_INFO(dev)->has_l3_dpf)
diff --git a/drivers/gpu/drm/i915/intel_color.c 
b/drivers/gpu/drm/i915/intel_color.c
index 95a72771eea6..5362c07932d3 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -273,7 +273,7 @@ static void i9xx_load_luts_internal(struct drm_crtc *crtc,
enum pipe pipe = intel_crtc->pipe;
int i;
 
-   if (HAS_GMCH_DISPLAY(dev)) {
+   if (HAS_GMCH_DISPLAY(dev_priv)) {
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
assert_dsi_pll_enabled(dev_priv);
else
@@ -288,7 +288,7 @@ static void i9xx_load_luts_internal(struct drm_crtc *crtc,
(drm_color_lut_extract(lut[i].green, 8) << 8) |
drm_color_lut_extract(lut[i].blue, 8);
 
-   if (HAS_GMCH_DISPLAY(dev))
+   if (HAS_GMCH_DISPLAY(dev_priv))
I915_WRITE(PALETTE(pipe, i), word);
else
I915_WRITE(LGC_PALETTE(pipe, i), word);
@@ -297,7 +297,7 @@ static void i9xx_load_luts_internal(struct drm_crtc *crtc,
for (i = 0; i < 256; i++) {
uint32_t word = (i << 16) | (i << 8) | i;
 
-   if (HAS_GMCH_DISPLAY(dev))
+   if (HAS_GMCH_DISPLAY(dev_priv))
I915_WRITE(PALETTE(pipe, i), word);
else
I915_WRITE(LGC_PALETTE(pipe, i), word);
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 0a69e80821ee..b7685936d324 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5036,7 +5036,7 @@ intel_pre_disable_primary_noatomic(struct drm_crtc *crtc)
 * event which is after the vblank start event, so we need to have a
 * wait-for-vblank between disabling the plane and the pipe.
 */
-   if (HAS_GMCH_DISPLAY(dev)) {
+   if (HAS_GMCH_DISPLAY(dev_priv)) {
intel_set_memory_cxsr(dev_priv, false);
dev_priv->wm.vlv.cxsr = false;
intel_wait_for_vblank(dev, pipe);
@@ -5101,7 +5101,7 @@ static void intel_pre_plane_update(struct 
intel_crtc_state *old_crtc_state)
intel_pre_disable_primary(>base);
}
 
-   if (pipe_config->disable_cxsr && HAS_GMCH_DISPLAY(dev)) {
+   if (pipe_config->disable_cxsr && HAS_GMCH_DISPLAY(dev_priv)) {
crtc->wm.cxsr_allowed = false;
 
/*
@@ -10895,7 +10895,7 @@ static void intel_crtc_update_cursor(struct drm_crtc 
*crtc,
pos |= y << CURSOR_Y_SHIFT;
 
/* ILK+ do this automagically */
-   if (HAS_GMCH_DISPLAY(dev) &&
+   if (HAS_GMCH_DISPLAY(dev_priv) &&
plane_state->base.rotation == DRM_ROTATE_180) {
base += (plane_state->base.crtc_h *
 plane_state->base.crtc_w - 1) * 4;
@@ -16593,7 +16593,7 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc)
if (crtc->active && !intel_crtc_has_encoders(crtc))
intel_crtc_disable_noatomic(>base);
 
-   if (crtc->active || HAS_GMCH_DISPLAY(dev)) {
+   if (crtc->active || HAS_GMCH_DISPLAY(dev_priv)) {
/*
 * We start out with underrun reporting disabled to avoid races.
 * For correct bookkeeping mark this on active crtcs.
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 0b6f1bab671d..51d92a9c6cb1 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ 

[Intel-gfx] [PATCH 04/19] drm/i915: Make HAS_RUNTIME_PM only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Saves 960 bytes of .rodata strings.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.c | 4 ++--
 drivers/gpu/drm/i915/i915_drv.h | 2 +-
 drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +--
 3 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 89d322215c84..fbb4e2e0d124 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2308,7 +2308,7 @@ static int intel_runtime_suspend(struct device *kdev)
if (WARN_ON_ONCE(!(dev_priv->rps.enabled && intel_enable_rc6(
return -ENODEV;
 
-   if (WARN_ON_ONCE(!HAS_RUNTIME_PM(dev)))
+   if (WARN_ON_ONCE(!HAS_RUNTIME_PM(dev_priv)))
return -ENODEV;
 
DRM_DEBUG_KMS("Suspending device\n");
@@ -2412,7 +2412,7 @@ static int intel_runtime_resume(struct device *kdev)
struct drm_i915_private *dev_priv = to_i915(dev);
int ret = 0;
 
-   if (WARN_ON_ONCE(!HAS_RUNTIME_PM(dev)))
+   if (WARN_ON_ONCE(!HAS_RUNTIME_PM(dev_priv)))
return -ENODEV;
 
DRM_DEBUG_KMS("Resuming device\n");
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1a4698e665be..aac9375cccb3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2818,12 +2818,12 @@ struct drm_i915_cmd_table {
 #define HAS_DDI(dev_priv)  ((dev_priv)->info.has_ddi)
 #define HAS_FPGA_DBG_UNCLAIMED(dev)(INTEL_INFO(dev)->has_fpga_dbg)
 #define HAS_PSR(dev)   (INTEL_INFO(dev)->has_psr)
-#define HAS_RUNTIME_PM(dev)(INTEL_INFO(dev)->has_runtime_pm)
 #define HAS_RC6(dev)   (INTEL_INFO(dev)->has_rc6)
 #define HAS_RC6p(dev)  (INTEL_INFO(dev)->has_rc6p)
 
 #define HAS_CSR(dev)   (INTEL_INFO(dev)->has_csr)
 
+#define HAS_RUNTIME_PM(dev_priv) ((dev_priv)->info.has_runtime_pm)
 /*
  * For now, anything with a GuC requires uCode loading, and then supports
  * command submission once loaded. But these are logically independent
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 6c11168facd6..ed1faf14f777 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -2758,7 +2758,6 @@ void intel_runtime_pm_put(struct drm_i915_private 
*dev_priv)
 void intel_runtime_pm_enable(struct drm_i915_private *dev_priv)
 {
struct pci_dev *pdev = dev_priv->drm.pdev;
-   struct drm_device *dev = _priv->drm;
struct device *kdev = >dev;
 
pm_runtime_set_autosuspend_delay(kdev, 1); /* 10s */
@@ -2770,7 +2769,7 @@ void intel_runtime_pm_enable(struct drm_i915_private 
*dev_priv)
 * so the driver's own RPM reference tracking asserts also work on
 * platforms without RPM support.
 */
-   if (!HAS_RUNTIME_PM(dev)) {
+   if (!HAS_RUNTIME_PM(dev_priv)) {
pm_runtime_dont_use_autosuspend(kdev);
pm_runtime_get_sync(kdev);
} else {
-- 
2.7.4

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[Intel-gfx] [PATCH 08/19] drm/i915: Make IS_IVYBRIDGE only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Saves 848 bytes of .rodata strings.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.c | 19 +++
 drivers/gpu/drm/i915/i915_drv.h |  2 +-
 drivers/gpu/drm/i915/i915_gem.c |  2 +-
 drivers/gpu/drm/i915/i915_gem_context.c |  2 +-
 drivers/gpu/drm/i915/intel_display.c| 12 ++--
 drivers/gpu/drm/i915/intel_pm.c | 13 +++--
 drivers/gpu/drm/i915/intel_sprite.c |  2 +-
 7 files changed, 28 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index bfdbbb745939..f6ba8f262238 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -114,7 +114,7 @@ static bool i915_error_injected(struct drm_i915_private 
*dev_priv)
  fmt, ##__VA_ARGS__)
 
 
-static enum intel_pch intel_virt_detect_pch(struct drm_device *dev)
+static enum intel_pch intel_virt_detect_pch(struct drm_i915_private *dev_priv)
 {
enum intel_pch ret = PCH_NOP;
 
@@ -125,16 +125,16 @@ static enum intel_pch intel_virt_detect_pch(struct 
drm_device *dev)
 * make an educated guess as to which PCH is really there.
 */
 
-   if (IS_GEN5(dev)) {
+   if (IS_GEN5(dev_priv)) {
ret = PCH_IBX;
DRM_DEBUG_KMS("Assuming Ibex Peak PCH\n");
-   } else if (IS_GEN6(dev) || IS_IVYBRIDGE(dev)) {
+   } else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv)) {
ret = PCH_CPT;
DRM_DEBUG_KMS("Assuming CouarPoint PCH\n");
-   } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
+   } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
ret = PCH_LPT;
DRM_DEBUG_KMS("Assuming LynxPoint PCH\n");
-   } else if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) {
+   } else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
ret = PCH_SPT;
DRM_DEBUG_KMS("Assuming SunrisePoint PCH\n");
}
@@ -178,12 +178,14 @@ static void intel_detect_pch(struct drm_device *dev)
} else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
dev_priv->pch_type = PCH_CPT;
DRM_DEBUG_KMS("Found CougarPoint PCH\n");
-   WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev)));
+   WARN_ON(!(IS_GEN6(dev_priv) ||
+   IS_IVYBRIDGE(dev_priv)));
} else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
/* PantherPoint is CPT compatible */
dev_priv->pch_type = PCH_CPT;
DRM_DEBUG_KMS("Found PantherPoint PCH\n");
-   WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev)));
+   WARN_ON(!(IS_GEN6(dev_priv) ||
+   IS_IVYBRIDGE(dev_priv)));
} else if (id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {
dev_priv->pch_type = PCH_LPT;
DRM_DEBUG_KMS("Found LynxPoint PCH\n");
@@ -217,7 +219,8 @@ static void intel_detect_pch(struct drm_device *dev)
PCI_SUBVENDOR_ID_REDHAT_QUMRANET &&
pch->subsystem_device ==
PCI_SUBDEVICE_ID_QEMU)) {
-   dev_priv->pch_type = intel_virt_detect_pch(dev);
+   dev_priv->pch_type =
+   intel_virt_detect_pch(dev_priv);
} else
continue;
 
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7a40dfa830e7..3f321932d18a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2655,7 +2655,7 @@ struct drm_i915_cmd_table {
 #define IS_PINEVIEW(dev)   (INTEL_INFO(dev)->is_pineview)
 #define IS_G33(dev)(INTEL_INFO(dev)->is_g33)
 #define IS_IRONLAKE_M(dev_priv)(INTEL_DEVID(dev_priv) == 0x0046)
-#define IS_IVYBRIDGE(dev)  (INTEL_INFO(dev)->is_ivybridge)
+#define IS_IVYBRIDGE(dev_priv) ((dev_priv)->info.is_ivybridge)
 #define IS_IVB_GT1(dev_priv)   (INTEL_DEVID(dev_priv) == 0x0156 || \
 INTEL_DEVID(dev_priv) == 0x0152 || \
 INTEL_DEVID(dev_priv) == 0x015a)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index afaa49946042..6da841500510 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4364,7 +4364,7 @@ i915_gem_init_hw(struct drm_device *dev)
   LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);
 
  

[Intel-gfx] [PATCH 07/19] drm/i915: Make INTEL_DEVID only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Saves 4472 bytes of .rodata strings.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.c|  14 +++--
 drivers/gpu/drm/i915/i915_drv.h| 111 +
 drivers/gpu/drm/i915/i915_gem.c|  36 +--
 drivers/gpu/drm/i915/i915_gem_stolen.c |   6 +-
 drivers/gpu/drm/i915/i915_gem_tiling.c |   3 +-
 drivers/gpu/drm/i915/i915_irq.c|   2 +-
 drivers/gpu/drm/i915/intel_crt.c   |   4 +-
 drivers/gpu/drm/i915/intel_display.c   |  58 +
 drivers/gpu/drm/i915/intel_dp.c|   2 +-
 drivers/gpu/drm/i915/intel_hdmi.c  |   2 +-
 drivers/gpu/drm/i915/intel_i2c.c   |   5 +-
 drivers/gpu/drm/i915/intel_lvds.c  |   9 ++-
 drivers/gpu/drm/i915/intel_pm.c|  26 
 drivers/gpu/drm/i915/intel_sdvo.c  |  11 ++--
 drivers/gpu/drm/i915/intel_tv.c|   4 +-
 15 files changed, 151 insertions(+), 142 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index fbb4e2e0d124..bfdbbb745939 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -188,12 +188,14 @@ static void intel_detect_pch(struct drm_device *dev)
dev_priv->pch_type = PCH_LPT;
DRM_DEBUG_KMS("Found LynxPoint PCH\n");
WARN_ON(!IS_HASWELL(dev) && !IS_BROADWELL(dev));
-   WARN_ON(IS_HSW_ULT(dev) || IS_BDW_ULT(dev));
+   WARN_ON(IS_HSW_ULT(dev_priv) ||
+   IS_BDW_ULT(dev_priv));
} else if (id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
dev_priv->pch_type = PCH_LPT;
DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
WARN_ON(!IS_HASWELL(dev) && !IS_BROADWELL(dev));
-   WARN_ON(!IS_HSW_ULT(dev) && !IS_BDW_ULT(dev));
+   WARN_ON(!IS_HSW_ULT(dev_priv) &&
+   !IS_BDW_ULT(dev_priv));
} else if (id == INTEL_PCH_SPT_DEVICE_ID_TYPE) {
dev_priv->pch_type = PCH_SPT;
DRM_DEBUG_KMS("Found SunrisePoint PCH\n");
@@ -422,7 +424,7 @@ intel_setup_mchbar(struct drm_device *dev)
 
dev_priv->mchbar_need_disable = false;
 
-   if (IS_I915G(dev) || IS_I915GM(dev)) {
+   if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
pci_read_config_dword(dev_priv->bridge_dev, DEVEN, );
enabled = !!(temp & DEVEN_MCHBAR_EN);
} else {
@@ -440,7 +442,7 @@ intel_setup_mchbar(struct drm_device *dev)
dev_priv->mchbar_need_disable = true;
 
/* Space is allocated or reserved, so enable it. */
-   if (IS_I915G(dev) || IS_I915GM(dev)) {
+   if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
pci_write_config_dword(dev_priv->bridge_dev, DEVEN,
   temp | DEVEN_MCHBAR_EN);
} else {
@@ -456,7 +458,7 @@ intel_teardown_mchbar(struct drm_device *dev)
int mchbar_reg = INTEL_INFO(dev)->gen >= 4 ? MCHBAR_I965 : MCHBAR_I915;
 
if (dev_priv->mchbar_need_disable) {
-   if (IS_I915G(dev) || IS_I915GM(dev)) {
+   if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
u32 deven_val;
 
pci_read_config_dword(dev_priv->bridge_dev, DEVEN,
@@ -1077,7 +1079,7 @@ static int i915_driver_init_hw(struct drm_i915_private 
*dev_priv)
 * be lost or delayed, but we use them anyways to avoid
 * stuck interrupts on some machines.
 */
-   if (!IS_I945G(dev) && !IS_I945GM(dev)) {
+   if (!IS_I945G(dev_priv) && !IS_I945GM(dev_priv)) {
if (pci_enable_msi(pdev) < 0)
DRM_DEBUG_DRIVER("can't enable MSI");
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 58045cd7a087..7a40dfa830e7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2605,7 +2605,8 @@ struct drm_i915_cmd_table {
 })
 #define INTEL_INFO(p)  (&__I915__(p)->info)
 #define INTEL_GEN(p)   (INTEL_INFO(p)->gen)
-#define INTEL_DEVID(p) (INTEL_INFO(p)->device_id)
+
+#define INTEL_DEVID(dev_priv)  ((dev_priv)->info.device_id)
 
 #define REVID_FOREVER  0xff
 #define INTEL_REVID(p) (__I915__(p)->drm.pdev->revision)
@@ -2637,27 +2638,27 @@ struct drm_i915_cmd_table {
 #define IS_REVID(p, since, until) \
(INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until))
 
-#define IS_I830(dev)   (INTEL_DEVID(dev) == 0x3577)
-#define IS_845G(dev)   (INTEL_DEVID(dev) == 0x2562)
+#define IS_I830(dev_priv)  (INTEL_DEVID(dev_priv) == 

[Intel-gfx] [PATCH 02/19] drm/i915: Make INTEL_PCH_TYPE & co only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

This saves 1872 bytes of .rodata strings.

v2:
 * Rebase.
 * Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.h   | 16 ++--
 drivers/gpu/drm/i915/i915_gem.c   |  2 +-
 drivers/gpu/drm/i915/i915_gpu_error.c |  4 +--
 drivers/gpu/drm/i915/i915_irq.c   | 20 +++
 drivers/gpu/drm/i915/intel_audio.c|  2 +-
 drivers/gpu/drm/i915/intel_crt.c  | 25 +-
 drivers/gpu/drm/i915/intel_display.c  | 48 ++-
 drivers/gpu/drm/i915/intel_dp.c   | 27 ++--
 drivers/gpu/drm/i915/intel_dpll_mgr.c |  2 +-
 drivers/gpu/drm/i915/intel_hdmi.c | 19 +++---
 drivers/gpu/drm/i915/intel_i2c.c  |  2 +-
 drivers/gpu/drm/i915/intel_lvds.c | 22 
 drivers/gpu/drm/i915/intel_pm.c   |  6 ++---
 drivers/gpu/drm/i915/intel_sdvo.c | 12 -
 14 files changed, 107 insertions(+), 100 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 51dd10f25f59..3caa1c767512 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2850,18 +2850,18 @@ struct drm_i915_cmd_table {
 #define INTEL_PCH_P3X_DEVICE_ID_TYPE   0x7000
 #define INTEL_PCH_QEMU_DEVICE_ID_TYPE  0x2900 /* qemu q35 has 2918 */
 
-#define INTEL_PCH_TYPE(dev) (__I915__(dev)->pch_type)
-#define HAS_PCH_KBP(dev) (INTEL_PCH_TYPE(dev) == PCH_KBP)
-#define HAS_PCH_SPT(dev) (INTEL_PCH_TYPE(dev) == PCH_SPT)
-#define HAS_PCH_LPT(dev) (INTEL_PCH_TYPE(dev) == PCH_LPT)
+#define INTEL_PCH_TYPE(dev_priv) ((dev_priv)->pch_type)
+#define HAS_PCH_KBP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_KBP)
+#define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT)
+#define HAS_PCH_LPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_LPT)
 #define HAS_PCH_LPT_LP(dev_priv) \
((dev_priv)->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE)
 #define HAS_PCH_LPT_H(dev_priv) \
((dev_priv)->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE)
-#define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)
-#define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX)
-#define HAS_PCH_NOP(dev) (INTEL_PCH_TYPE(dev) == PCH_NOP)
-#define HAS_PCH_SPLIT(dev) (INTEL_PCH_TYPE(dev) != PCH_NONE)
+#define HAS_PCH_CPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CPT)
+#define HAS_PCH_IBX(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_IBX)
+#define HAS_PCH_NOP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_NOP)
+#define HAS_PCH_SPLIT(dev_priv) (INTEL_PCH_TYPE(dev_priv) != PCH_NONE)
 
 #define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->has_gmch_display)
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fdd496e6c081..6b099f0198cc 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4365,7 +4365,7 @@ i915_gem_init_hw(struct drm_device *dev)
I915_WRITE(MI_PREDICATE_RESULT_2, IS_HSW_GT3(dev) ?
   LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);
 
-   if (HAS_PCH_NOP(dev)) {
+   if (HAS_PCH_NOP(dev_priv)) {
if (IS_IVYBRIDGE(dev)) {
u32 temp = I915_READ(GEN7_MSG_CTL);
temp &= ~(WAIT_FOR_PCH_FLR_ACK | 
WAIT_FOR_PCH_RESET_ACK);
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index b5b58692ac5a..d41517e11978 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -421,7 +421,7 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf 
*m,
for (i = 0; i < 4; i++)
err_printf(m, "GTIER gt %d: 0x%08x\n", i,
   error->gtier[i]);
-   } else if (HAS_PCH_SPLIT(dev) || IS_VALLEYVIEW(dev))
+   } else if (HAS_PCH_SPLIT(dev_priv) || IS_VALLEYVIEW(dev_priv))
err_printf(m, "GTIER: 0x%08x\n", error->gtier[0]);
err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
@@ -1393,7 +1393,7 @@ static void i915_capture_reg_state(struct 
drm_i915_private *dev_priv,
error->ier = I915_READ(GEN8_DE_MISC_IER);
for (i = 0; i < 4; i++)
error->gtier[i] = I915_READ(GEN8_GT_IER(i));
-   } else if (HAS_PCH_SPLIT(dev)) {
+   } else if (HAS_PCH_SPLIT(dev_priv)) {
error->ier = I915_READ(DEIER);
error->gtier[0] = I915_READ(GTIER);
} else if (IS_GEN2(dev)) {
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index bd6c8b0eeaef..883474411aee 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3237,12 +3237,12 @@ static void ibx_irq_reset(struct drm_device *dev)
 {
struct drm_i915_private *dev_priv = to_i915(dev);
 
-   if 

[Intel-gfx] [PATCH 18/19] drm/i915: Make INTEL_GEN only take dev_priv

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Saves 968 bytes of .rodata strings.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.h  | 2 +-
 drivers/gpu/drm/i915/i915_gem_render_state.c | 6 +++---
 drivers/gpu/drm/i915/intel_display.c | 2 +-
 drivers/gpu/drm/i915/intel_sprite.c  | 8 
 4 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f9f9a218d5fe..3f38b9755763 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2604,8 +2604,8 @@ struct drm_i915_cmd_table {
__p; \
 })
 #define INTEL_INFO(p)  (&__I915__(p)->info)
-#define INTEL_GEN(p)   (INTEL_INFO(p)->gen)
 
+#define INTEL_GEN(dev_priv)((dev_priv)->info.gen)
 #define INTEL_DEVID(dev_priv)  ((dev_priv)->info.device_id)
 
 #define REVID_FOREVER  0xff
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c 
b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 95b7e9afd5f8..a98c0f42badd 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -72,9 +72,9 @@ render_state_get_rodata(const struct drm_i915_gem_request 
*req)
 
 static int render_state_setup(struct render_state *so)
 {
-   struct drm_device *dev = so->vma->vm->dev;
+   struct drm_i915_private *dev_priv = to_i915(so->vma->vm->dev);
const struct intel_renderstate_rodata *rodata = so->rodata;
-   const bool has_64bit_reloc = INTEL_GEN(dev) >= 8;
+   const bool has_64bit_reloc = INTEL_GEN(dev_priv) >= 8;
unsigned int i = 0, reloc_index = 0;
struct page *page;
u32 *d;
@@ -115,7 +115,7 @@ static int render_state_setup(struct render_state *so)
 
so->aux_batch_offset = i * sizeof(u32);
 
-   if (HAS_POOLED_EU(dev)) {
+   if (HAS_POOLED_EU(dev_priv)) {
/*
 * We always program 3x6 pool config but depending upon which
 * subslice is disabled HW drops down to appropriate config
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index c3fb9f700c7a..eda38e53f68a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12452,7 +12452,7 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
struct drm_framebuffer *fb = plane_state->fb;
int ret;
 
-   if (INTEL_GEN(dev) >= 9 && plane->type != DRM_PLANE_TYPE_CURSOR) {
+   if (INTEL_GEN(dev_priv) >= 9 && plane->type != DRM_PLANE_TYPE_CURSOR) {
ret = skl_update_scaler_plane(
to_intel_crtc_state(crtc_state),
to_intel_plane_state(plane_state));
diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
b/drivers/gpu/drm/i915/intel_sprite.c
index f760d5fcbe48..8b4748839c07 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -753,7 +753,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
 struct intel_crtc_state *crtc_state,
 struct intel_plane_state *state)
 {
-   struct drm_device *dev = plane->dev;
+   struct drm_i915_private *dev_priv = to_i915(plane->dev);
struct drm_crtc *crtc = state->base.crtc;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_plane *intel_plane = to_intel_plane(plane);
@@ -797,7 +797,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
}
 
/* setup can_scale, min_scale, max_scale */
-   if (INTEL_INFO(dev)->gen >= 9) {
+   if (INTEL_GEN(dev_priv) >= 9) {
/* use scaler when colorkey is not required */
if (state->ckey.flags == I915_SET_COLORKEY_NONE) {
can_scale = 1;
@@ -913,7 +913,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
 
width_bytes = ((src_x * cpp) & 63) + src_w * cpp;
 
-   if (INTEL_INFO(dev)->gen < 9 && (src_w > 2048 || src_h > 2048 ||
+   if (INTEL_GEN(dev_priv) < 9 && (src_w > 2048 || src_h > 2048 ||
width_bytes > 4096 || fb->pitches[0] > 4096)) {
DRM_DEBUG_KMS("Source dimensions exceed hardware 
limits\n");
return -EINVAL;
@@ -932,7 +932,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
dst->y1 = crtc_y;
dst->y2 = crtc_y + crtc_h;
 
-   if (INTEL_GEN(dev) >= 9) {
+   if (INTEL_GEN(dev_priv) >= 9) {
ret = skl_check_plane_surface(state);
if (ret)
return ret;
-- 
2.7.4

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Re: [Intel-gfx] [PATCH 00/22] .rodata diet

[Tvrtko Ursulin]

On 11/10/2016 13:17, David Weinehall wrote:

On Wed, Oct 05, 2016 at 01:33:27PM +0100, Tvrtko Ursulin wrote:

From: Tvrtko Ursulin 

Dynamic typing in __I915__ (INTEL_INFO) has and unfortuante consequence that
for every time it is called under a WARN it generates a very verbose string
placed into the appropriate .rodata section.

Each instance of that can can several hundred bytes to the binary. One example
of such strings found in the binary, not word-wrapped is:

WARN_ON(!((&({ struct drm_i915_private *__p; if (__builtin_types_compatible_p(typeof(*dev_priv), struct 
drm_i915_private)) __p = (struct drm_i915_private *)dev_priv; else if (__builtin_types_compatible_p(typeof(*dev_priv), 
struct drm_device)) __p = to_i915((struct drm_device *)dev_priv); else do { bool __cond = !(!(1)); extern void 
__compiletime_assert_1912(void) __attribute__((error("BUILD_BUG failed"))); if (__cond) 
__compiletime_assert_1912(); do { } while (0); } while (0); __p; })->info)->has_ddi) && (control & 
(0x << 16)) != (0xabcd << 16))

If we gradually remove dynamic typing abilities from individual macros we can
start bringing the size of the binary down.

For example after this series:

textdata bss dec hex filename
1067727   23256 576 1091559  10a7e7 i915.ko.nightly
1038202   23256 576 1062034  103492 i915.ko.diet

Which is a ~29KiB saving.

This is disruptive of course, but perhaps it is time to bite the bullet since we
now have a situation that even new platforms like Kabylake are adding code which
uses the wrong thing in those macros (dev instead of dev_priv).

The way I have done it here makes it impossible to use the converted macros in
a wrong way going forward.

Amen, hallelujah!

I'll happily review the entire series (I've done this same job once
already). Is this still the latest version, or do you have an update?

I've also got a patch series for the remaining INTEL_INFO() fixes;
once your patches are merged I can submit those.



I have an updated version with some review comments incorporated and 
from which I have split out the unrelated const table shrinks.


Good news is that now both Daniel and Jani are in favour so we just need 
to agree on merging dynamics.


I will send the updated series out today. Thanks for reviewing!

Regards,

Tvrtko

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Re: [Intel-gfx] [maintainer-tools PATCH 6/6] dim: add command to check for dim updates

[Jani Nikula]

On Tue, 11 Oct 2016, Daniel Vetter  wrote:
> On Tue, Oct 11, 2016 at 11:47:32AM +0300, Jani Nikula wrote:
>> Add a command to check if the user is running an up-to-date version of
>> dim.
>> 
>> Signed-off-by: Jani Nikula 
>> ---
>>  dim | 21 +
>>  dim.rst |  4 
>>  2 files changed, 25 insertions(+)
>> 
>> diff --git a/dim b/dim
>> index bef7bb6c401b..5fb3a0fee7ff 100755
>> --- a/dim
>> +++ b/dim
>> @@ -179,6 +179,27 @@ if [ "$subcommand" != "setup" -a "$subcommand" != 
>> "help" -a "$subcommand" != "us
>>  xargs -n 1 echo | grep '^origin' | sed -e 's/^origin\///'`
>>  fi
>>  
>> +function dim_uptodate
>> +{
>> +local using="${BASH_SOURCE[0]}"
>> +
>> +if [[ ! -e "$using" ]]; then
>> +echo "$dim: could not figure out the version being used 
>> ($using)." >&2
>> +exit 1
>> +fi
>> +
>> +if [[ ! -e "$DIM_PREFIX/maintainer-tools/.git" ]]; then
>> +echo "$dim: could not find the upstream repo for $dim." >&2
>> +exit 1
>> +fi
>> +
>> +if ! git --git-dir=$DIM_PREFIX/maintainer-tools/.git show 
>> origin/maintainer-tools:dim |\
>> +diff "$using" - >& /dev/null; then
>> +echo "$dim: not running upstream version of the script." >&2
>> +exit 1
>> +fi
>> +}
>
> Should we run this at startup every once in a while? Something like
>
> if [[ "$((`date +%s` % 100))" -eq "0" ]] ; then
>   dim_uptodate
> fi
>
> at the top? date-based rng tested, otherwise not ...

I had something like that in mind at first, but decided to be less
obnoxious for starters. ;)

> With or without these bikesheds Acked-by: me on the entire series.

I'll get back to the bikesheds later, pushed as-is now. Thanks.

BR,
Jani.


> -Daniel
>
>> +
>>  # get message id from file
>>  # $1 = file
>>  message_get_id ()
>> diff --git a/dim.rst b/dim.rst
>> index 7244052dea03..85de95796611 100644
>> --- a/dim.rst
>> +++ b/dim.rst
>> @@ -317,6 +317,10 @@ list-upstreams
>>  List of all upstreams commonly used for pull requests. Useful for 
>> autocompletion
>>  scripts.
>>  
>> +uptodate
>> +
>> +Try to check if you're running an up-to-date version of **dim**.
>> +
>>  help
>>  
>>  Show this help. Install **rst2man(1)** for best results.
>> -- 
>> 2.1.4
>> 

-- 
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Re: [Intel-gfx] [PATCH 00/22] .rodata diet

[Daniel Vetter]

On Wed, Oct 5, 2016 at 3:01 PM, Jani Nikula  wrote:
> On Wed, 05 Oct 2016, Tvrtko Ursulin  wrote:
>> Dynamic typing in __I915__ (INTEL_INFO) has and unfortuante consequence that
>> for every time it is called under a WARN it generates a very verbose string
>> placed into the appropriate .rodata section.
>
> AFAIK the idea all along was to use this "dynamic typing" for a
> transition period. I'm in favor of moving towards only accepting
> dev_priv. I'm a bit hesitant to make the change in one go, though.

+1 on transitioning away from me too. I'll leave it up to the people
involved whether staging this is required or not. Fixing up the
fallout (in internal, in-flight patches or wherever) should at least
be simple.
-Daniel
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Re: [Intel-gfx] [PATCH] drm/i915/guc: Sanitory checks for platform that dont have GuC

[Paulo Zanoni]

Em Ter, 2016-10-11 às 10:36 +0300, Jani Nikula escreveu:
> On Tue, 11 Oct 2016, Anusha Srivatsa 
> wrote:
> > 
> > i915.enable_guc_loading/submission=2 forces the usage of GuC.
> > For platforms that do not have a GuC, asking the kernel to
> > use a GuC should not result in an error state. Do extra checks
> > to see if the platform even has a GuC or not, regardless of the
> > kernel parameter.
> > 
> > Based on Rodriogo's  patch.
> > Have considered Paulo Zanoni's
> > suggestions on the implementation.

The correct way to give credit to reviewers is by adding a patch
version changelog, and later including any reviewed-by tags that the
reviewer may give. No need for a sentence like the one above. Just take
a small look at the git log and see how people do the changelogs. Yours
would be something like:

v2: change indentation, add back blank lines (Paulo)

(but I do have to add that the way you changed it was not the way I had
in mind, please see below)

> 
> There's a bug for this, please find it and reference it.
> 
> > 
> > take on the implemenation.
> > Cc: Paulo Zanoni 
> > Signed-off-by: Anusha Srivatsa 
> > ---
> >  drivers/gpu/drm/i915/intel_guc_loader.c | 5 +
> >  1 file changed, 5 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c
> > b/drivers/gpu/drm/i915/intel_guc_loader.c
> > index 7ace96b..98718db 100644
> > --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> > +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> > @@ -718,12 +718,17 @@ void intel_guc_init(struct drm_device *dev)
> >     struct intel_guc_fw *guc_fw = _priv->guc.guc_fw;
> >     const char *fw_path;
> >  
> > +   if (!HAS_GUC(dev)) {
> > +   i915.enable_guc_loading = 0;
> > +   i915.enable_guc_submission = 0;
> > +} else {
> >     /* A negative value means "use platform default" */
> >     if (i915.enable_guc_loading < 0)
> >     i915.enable_guc_loading = HAS_GUC_UCODE(dev);
> >     if (i915.enable_guc_submission < 0)
> >     i915.enable_guc_submission = HAS_GUC_SCHED(dev);
> >  
> > +   }

The blank line is usually inserted _after_ the line containing the
closing bracket char. Please see the many examples in the rest of our
code.


> 
> Indentation?

I had already complained about indentation before. It's different now,
but it's still not exactly what I was expecting... The idea was indeed
to align the comment indentation with the rest of the "else" case, but
not the way it was done here. Please see the many examples in the rest
of our code...



> 
> BR,
> Jani.
> 
> > 
> >     if (!HAS_GUC_UCODE(dev)) {
> >     fw_path = NULL;
> >     } else if (IS_SKYLAKE(dev)) {
> 
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Re: [Intel-gfx] [maintainer-tools PATCH 6/6] dim: add command to check for dim updates

[Daniel Vetter]

On Tue, Oct 11, 2016 at 11:47:32AM +0300, Jani Nikula wrote:
> Add a command to check if the user is running an up-to-date version of
> dim.
> 
> Signed-off-by: Jani Nikula 
> ---
>  dim | 21 +
>  dim.rst |  4 
>  2 files changed, 25 insertions(+)
> 
> diff --git a/dim b/dim
> index bef7bb6c401b..5fb3a0fee7ff 100755
> --- a/dim
> +++ b/dim
> @@ -179,6 +179,27 @@ if [ "$subcommand" != "setup" -a "$subcommand" != "help" 
> -a "$subcommand" != "us
>   xargs -n 1 echo | grep '^origin' | sed -e 's/^origin\///'`
>  fi
>  
> +function dim_uptodate
> +{
> + local using="${BASH_SOURCE[0]}"
> +
> + if [[ ! -e "$using" ]]; then
> + echo "$dim: could not figure out the version being used 
> ($using)." >&2
> + exit 1
> + fi
> +
> + if [[ ! -e "$DIM_PREFIX/maintainer-tools/.git" ]]; then
> + echo "$dim: could not find the upstream repo for $dim." >&2
> + exit 1
> + fi
> +
> + if ! git --git-dir=$DIM_PREFIX/maintainer-tools/.git show 
> origin/maintainer-tools:dim |\
> + diff "$using" - >& /dev/null; then
> + echo "$dim: not running upstream version of the script." >&2
> + exit 1
> + fi
> +}

Should we run this at startup every once in a while? Something like

if [[ "$((`date +%s` % 100))" -eq "0" ]] ; then
dim_uptodate
fi

at the top? date-based rng tested, otherwise not ...

With or without these bikesheds Acked-by: me on the entire series.
-Daniel

> +
>  # get message id from file
>  # $1 = file
>  message_get_id ()
> diff --git a/dim.rst b/dim.rst
> index 7244052dea03..85de95796611 100644
> --- a/dim.rst
> +++ b/dim.rst
> @@ -317,6 +317,10 @@ list-upstreams
>  List of all upstreams commonly used for pull requests. Useful for 
> autocompletion
>  scripts.
>  
> +uptodate
> +
> +Try to check if you're running an up-to-date version of **dim**.
> +
>  help
>  
>  Show this help. Install **rst2man(1)** for best results.
> -- 
> 2.1.4
> 

-- 
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Re: [Intel-gfx] [maintainer-tools PATCH 5/6] dim: add dim sparse subcommand to run sparse on a commit range

[Daniel Vetter]

On Tue, Oct 11, 2016 at 11:47:31AM +0300, Jani Nikula wrote:
> Run sparse only on files that have changed in the range.
> 
> Signed-off-by: Jani Nikula 
> ---
>  dim |  9 +
>  dim.rst | 22 +++---
>  2 files changed, 24 insertions(+), 7 deletions(-)
> 
> diff --git a/dim b/dim
> index e3ef4365e85f..bef7bb6c401b 100755
> --- a/dim
> +++ b/dim
> @@ -731,6 +731,15 @@ function dim_checkpatch
>   done
>  }
>  
> +function dim_sparse
> +{
> + local range=$(rangeish "$1")
> +
> + make $DIM_MAKE_OPTIONS
> + touch --no-create `git diff --name-only $range` `git diff --name-only`
> + make C=1
> +}
> +
>  function dim_checker
>  {
>   rm -f drivers/gpu/drm/i915/*.o drivers/gpu/drm/i915/*.ko
> diff --git a/dim.rst b/dim.rst
> index 58e222a7d590..7244052dea03 100644
> --- a/dim.rst
> +++ b/dim.rst
> @@ -186,12 +186,6 @@ fixes *commit-ish*
>  Print the Fixes: and Cc: lines for the supplied *commit-ish* in the linux 
> kernel
>  CodingStyle approved format.
>  
> -check-patch|cp [*commit-ish* [.. *commit-ish*]]
> 
> -Runs the given commit range commit-ish..commit-ish through the check tools. 
> If
> -no commit-ish is passed, defaults to HEAD^..HEAD. If one commit-ish is passed
> -instead of a range, the range commit-ish..HEAD is used.
> -
>  cherry-pick *commit-ish* [*git cherry-pick arguments*]
>  --
>  
> @@ -259,9 +253,23 @@ remote is up-to-date. Useful if drm-intel-next has been 
> changed since the last
>  run of the update-next command (e.g. to apply a hotfix before sending out the
>  pull request).
>  
> +checkpatch|check-patch|cp [*commit-ish* [.. *commit-ish*]]
> +--
> +Runs the given commit range commit-ish..commit-ish through the check tools.
> +
> +If no commit-ish is passed, defaults to HEAD^..HEAD. If one commit-ish is 
> passed
> +instead of a range, the range commit-ish..HEAD is used.
> +
> +sparse [*commit-ish* [.. *commit-ish*]]
> +---

Since we have this nice rangeish helper, should we change the synopsis to
[rangeish], with a separate section explaining what a dim rangeish is?
Just a drive-by bikeshed really, ok as-is.
-Daniel

> +Run sparse on the files changed by the given commit range.
> +
> +If no commit-ish is passed, defaults to HEAD^..HEAD. If one commit-ish is 
> passed
> +instead of a range, the range commit-ish..HEAD is used.
> +
>  checker
>  ---
> -Run sparse on the kernel.
> +Run sparse on drm/i915.
>  
>  create-branch *branch* [*commit-ish*]
>  -
> -- 
> 2.1.4
> 

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Re: [Intel-gfx] [PATCH 00/22] .rodata diet

[David Weinehall]

On Wed, Oct 05, 2016 at 01:33:27PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin 
> 
> Dynamic typing in __I915__ (INTEL_INFO) has and unfortuante consequence that
> for every time it is called under a WARN it generates a very verbose string
> placed into the appropriate .rodata section.
> 
> Each instance of that can can several hundred bytes to the binary. One example
> of such strings found in the binary, not word-wrapped is:
> 
> WARN_ON(!((&({ struct drm_i915_private *__p; if 
> (__builtin_types_compatible_p(typeof(*dev_priv), struct drm_i915_private)) 
> __p = (struct drm_i915_private *)dev_priv; else if 
> (__builtin_types_compatible_p(typeof(*dev_priv), struct drm_device)) __p = 
> to_i915((struct drm_device *)dev_priv); else do { bool __cond = !(!(1)); 
> extern void __compiletime_assert_1912(void) __attribute__((error("BUILD_BUG 
> failed"))); if (__cond) __compiletime_assert_1912(); do { } while (0); } 
> while (0); __p; })->info)->has_ddi) && (control & (0x << 16)) != (0xabcd 
> << 16))
> 
> If we gradually remove dynamic typing abilities from individual macros we can
> start bringing the size of the binary down.
> 
> For example after this series:
> 
>textdata bss dec hex filename
> 1067727   23256 576 1091559  10a7e7 i915.ko.nightly
> 1038202   23256 576 1062034  103492 i915.ko.diet
> 
> Which is a ~29KiB saving.
> 
> This is disruptive of course, but perhaps it is time to bite the bullet since 
> we
> now have a situation that even new platforms like Kabylake are adding code 
> which
> uses the wrong thing in those macros (dev instead of dev_priv).
> 
> The way I have done it here makes it impossible to use the converted macros in
> a wrong way going forward.

Amen, hallelujah!

I'll happily review the entire series (I've done this same job once
already). Is this still the latest version, or do you have an update?

I've also got a patch series for the remaining INTEL_INFO() fixes;
once your patches are merged I can submit those.


Kind regards, David
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Re: [Intel-gfx] [CI 1/5] drm/i915: Allow disabling error capture

[Daniel Vetter]

On Tue, Oct 11, 2016 at 12:56 PM, Jani Nikula
 wrote:
> Fair enough. Please copy-paste some of the elaboration to the commit
> message. Ack from me, but it wouldn't hurt to get an ack from Daniel as
> well.

Would be nice if we can trade in some of the #ifdefry with a
conditional compiliation of i915_gpu_error.c (and shuffle some parts
around, or maybe intel_display_error.c extraction to make that
feasible). Besides that wishlist item, ack.
-Daniel
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Re: [Intel-gfx] [PATCH i-g-t] lib/chipset: Properly skip on non-Intel

[Petri Latvala]

On Tue, Oct 11, 2016 at 11:36:08AM +0200, Daniel Vetter wrote:
> Random drive-by I noticed while hacking on piglit.
> 
> Signed-off-by: Daniel Vetter 
> ---
>  lib/intel_chipset.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/lib/intel_chipset.c b/lib/intel_chipset.c
> index 777dfa73da80..ab35fa70c167 100644
> --- a/lib/intel_chipset.c
> +++ b/lib/intel_chipset.c
> @@ -100,8 +100,7 @@ intel_get_pci_device(void)
>   pci_dev = pci_device_next(iter);
>   pci_iterator_destroy(iter);
>   }
> - if (pci_dev == NULL)
> - errx(1, "Couldn't find graphics card");
> + igt_require_f(pci_dev, "Couldn't find Intel graphics card\n");
>  
>   error = pci_device_probe(pci_dev);
>   igt_fail_on_f(error != 0,


Reviewed-by: Petri Latvala 

There's a check for vendor_id equaling 0x8086 some lines below, and I
debated on IRC for changing it to igt_require as well. Then again it's
quite impossible to reach, so might as well leave it as a noisy
failure. I'll change it to igt_fail_on_f later.


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Re: [Intel-gfx] [PATCH 16/42] drm/i915: Refactor object page API

[Tvrtko Ursulin]

On 07/10/2016 10:46, Chris Wilson wrote:

The plan is to make obtaining the backing storage for the object avoid
struct_mutex (i.e. use its own locking). The first step is to update the
API so that normal users only call pin/unpin whilst working on the
backing storage.

Signed-off-by: Chris Wilson 
---
  drivers/gpu/drm/i915/i915_cmd_parser.c   |   2 +-
  drivers/gpu/drm/i915/i915_debugfs.c  |  17 +--
  drivers/gpu/drm/i915/i915_drv.h  |  89 
  drivers/gpu/drm/i915/i915_gem.c  | 207 +--
  drivers/gpu/drm/i915/i915_gem_batch_pool.c   |   3 +-
  drivers/gpu/drm/i915/i915_gem_dmabuf.c   |  14 +-
  drivers/gpu/drm/i915/i915_gem_execbuffer.c   |   2 +-
  drivers/gpu/drm/i915/i915_gem_fence.c|   4 +-
  drivers/gpu/drm/i915/i915_gem_gtt.c  |  10 +-
  drivers/gpu/drm/i915/i915_gem_internal.c |  19 +--
  drivers/gpu/drm/i915/i915_gem_render_state.c |   2 +-
  drivers/gpu/drm/i915/i915_gem_shrinker.c |  10 +-
  drivers/gpu/drm/i915/i915_gem_stolen.c   |  24 ++--
  drivers/gpu/drm/i915/i915_gem_tiling.c   |   8 +-
  drivers/gpu/drm/i915/i915_gem_userptr.c  |  30 ++--
  drivers/gpu/drm/i915/i915_gpu_error.c|   4 +-
  drivers/gpu/drm/i915/intel_lrc.c |   6 +-
  17 files changed, 234 insertions(+), 217 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c 
b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 70980f82a15b..8d20020cb9f9 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -1290,7 +1290,7 @@ int intel_engine_cmd_parser(struct intel_engine_cs 
*engine,
}
  
  	if (ret == 0 && needs_clflush_after)

-   drm_clflush_virt_range(shadow_batch_obj->mapping, batch_len);
+   drm_clflush_virt_range(shadow_batch_obj->mm.mapping, batch_len);
i915_gem_object_unpin_map(shadow_batch_obj);
  
  	return ret;

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index e4b5ba771bea..b807ddf65e04 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -112,7 +112,7 @@ static char get_global_flag(struct drm_i915_gem_object *obj)
  
  static char get_pin_mapped_flag(struct drm_i915_gem_object *obj)

  {
-   return obj->mapping ? 'M' : ' ';
+   return obj->mm.mapping ? 'M' : ' ';
  }
  
  static u64 i915_gem_obj_total_ggtt_size(struct drm_i915_gem_object *obj)

@@ -158,8 +158,8 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object 
*obj)
   i915_gem_active_get_seqno(>last_write,
 >base.dev->struct_mutex),
   i915_cache_level_str(dev_priv, obj->cache_level),
-  obj->dirty ? " dirty" : "",
-  obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
+  obj->mm.dirty ? " dirty" : "",
+  obj->mm.madv == I915_MADV_DONTNEED ? " purgeable" : "");
if (obj->base.name)
seq_printf(m, " (name: %d)", obj->base.name);
list_for_each_entry(vma, >vma_list, obj_link) {
@@ -411,12 +411,12 @@ static int i915_gem_object_info(struct seq_file *m, void 
*data)
size += obj->base.size;
++count;
  
-		if (obj->madv == I915_MADV_DONTNEED) {

+   if (obj->mm.madv == I915_MADV_DONTNEED) {
purgeable_size += obj->base.size;
++purgeable_count;
}
  
-		if (obj->mapping) {

+   if (obj->mm.mapping) {
mapped_count++;
mapped_size += obj->base.size;
}
@@ -433,12 +433,12 @@ static int i915_gem_object_info(struct seq_file *m, void 
*data)
++dpy_count;
}
  
-		if (obj->madv == I915_MADV_DONTNEED) {

+   if (obj->mm.madv == I915_MADV_DONTNEED) {
purgeable_size += obj->base.size;
++purgeable_count;
}
  
-		if (obj->mapping) {

+   if (obj->mm.mapping) {
mapped_count++;
mapped_size += obj->base.size;
}
@@ -2018,7 +2018,7 @@ static void i915_dump_lrc_obj(struct seq_file *m,
seq_printf(m, "\tBound in GGTT at 0x%08x\n",
   i915_ggtt_offset(vma));
  
-	if (i915_gem_object_get_pages(vma->obj)) {

+   if (i915_gem_object_pin_pages(vma->obj)) {
seq_puts(m, "\tFailed to get pages for context object\n\n");
return;
}
@@ -2037,6 +2037,7 @@ static void i915_dump_lrc_obj(struct seq_file *m,
kunmap_atomic(reg_state);
}
  
+	i915_gem_object_unpin_pages(vma->obj);

seq_putc(m, '\n');
  }
  
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h

index a96b446d8db4..3c22d49005fe 

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [CI,1/5] drm/i915: Allow disabling error capture

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/5] drm/i915: Allow disabling error capture
URL   : https://patchwork.freedesktop.org/series/13576/
State : warning

== Summary ==

Series 13576v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/13576/revisions/1/mbox/

Test drv_module_reload_basic:
skip   -> PASS   (fi-skl-6260u)
Test kms_pipe_crc_basic:
Subgroup read-crc-pipe-a-frame-sequence:
pass   -> DMESG-WARN (fi-ivb-3770)
Test kms_psr_sink_crc:
Subgroup psr_basic:
dmesg-warn -> PASS   (fi-skl-6700hq)
Test vgem_basic:
Subgroup unload:
skip   -> PASS   (fi-skl-6700k)
skip   -> PASS   (fi-bxt-t5700)
skip   -> PASS   (fi-skl-6700hq)
pass   -> SKIP   (fi-ivb-3770)
pass   -> SKIP   (fi-bsw-n3050)

fi-bdw-5557u total:248  pass:231  dwarn:0   dfail:0   fail:0   skip:17 
fi-bsw-n3050 total:248  pass:204  dwarn:0   dfail:0   fail:0   skip:44 
fi-bxt-t5700 total:248  pass:217  dwarn:0   dfail:0   fail:0   skip:31 
fi-byt-j1900 total:248  pass:214  dwarn:1   dfail:0   fail:1   skip:32 
fi-byt-n2820 total:248  pass:211  dwarn:0   dfail:0   fail:1   skip:36 
fi-hsw-4770  total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-hsw-4770r total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-ilk-650   total:248  pass:184  dwarn:0   dfail:0   fail:2   skip:62 
fi-ivb-3520m total:248  pass:221  dwarn:0   dfail:0   fail:0   skip:27 
fi-ivb-3770  total:248  pass:220  dwarn:1   dfail:0   fail:0   skip:27 
fi-kbl-7200u total:248  pass:222  dwarn:0   dfail:0   fail:0   skip:26 
fi-skl-6260u total:248  pass:232  dwarn:0   dfail:0   fail:0   skip:16 
fi-skl-6700hqtotal:248  pass:225  dwarn:0   dfail:0   fail:0   skip:23 
fi-skl-6700k total:248  pass:222  dwarn:1   dfail:0   fail:0   skip:25 
fi-skl-6770hqtotal:248  pass:231  dwarn:1   dfail:0   fail:1   skip:15 
fi-snb-2520m total:248  pass:211  dwarn:0   dfail:0   fail:0   skip:37 
fi-snb-2600  total:248  pass:209  dwarn:0   dfail:0   fail:0   skip:39 

Results at /archive/results/CI_IGT_test/Patchwork_2671/

f79322df75bf6193458ec601a345ba6bd86befca drm-intel-nightly: 
2016y-10m-11d-09h-16m-03s UTC integration manifest
d6d2da1 drm/i915: Compress GPU objects in error state
ab626fb drm/i915: Consolidate error object printing
57cb589 drm/i915: Always use the GTT for error capture
1083247 drm/i915: Stop the machine whilst capturing the GPU crash dump
8a5c841 drm/i915: Allow disabling error capture

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Re: [Intel-gfx] [PATCH 1/2] drm/i915/gen9: unconditionally apply the memory bandwidth WA

[Greg KH]

On Tue, Oct 11, 2016 at 01:54:09PM +0300, Jani Nikula wrote:
> On Tue, 11 Oct 2016, Greg KH  wrote:
> > On Tue, Oct 11, 2016 at 10:34:14AM +0300, Jani Nikula wrote:
> >> On Mon, 10 Oct 2016, Paulo Zanoni  wrote:
> >> The patch is a bit on the large side for stable. 100 lines with context
> >> is the rule.
> >
> > Huh?  It's only 49 line of changes:
> >
> >> >  drivers/gpu/drm/i915/intel_pm.c | 49 
> >> > ++---
> >> >  1 file changed, 41 insertions(+), 8 deletions(-)
> >
> > That's fine for stable, we take i915 stable patches much bigger than
> > that all the time :)
> 
> Oh, I thought the rule was "100 lines, with context", but I certainly
> won't argue! Never mind! ;)

It's the "official" rule, yes, but really, context of the patch itself
(i.e. what it does), is the key thing.

thanks,

greg k-h
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Re: [Intel-gfx] [CI 1/5] drm/i915: Allow disabling error capture

[Jani Nikula]

On Tue, 11 Oct 2016, Chris Wilson  wrote:
> On Tue, Oct 11, 2016 at 01:16:42PM +0300, Jani Nikula wrote:
>> On Tue, 11 Oct 2016, Chris Wilson  wrote:
>> > On Tue, Oct 11, 2016 at 12:52:00PM +0300, Jani Nikula wrote:
>> >> On Tue, 11 Oct 2016, Chris Wilson  wrote:
>> >> > We currently capture the GPU state after we detect a hang. This is vital
>> >> > for us to both triage and debug hangs in the wild (post-mortem
>> >> > debugging). However, it comes at the cost of running some potentially
>> >> > dangerous code (since it has to make very few assumption about the state
>> >> > of the driver) that is quite resource intensive.
>> >> >
>> >> > Signed-off-by: Chris Wilson 
>> >> > Reviewed-by: Joonas Lahtinen 
>> >> > ---
>> >> >  drivers/gpu/drm/i915/Kconfig  | 10 ++
>> >> >  drivers/gpu/drm/i915/i915_debugfs.c   |  6 ++
>> >> >  drivers/gpu/drm/i915/i915_drv.h   | 16 
>> >> >  drivers/gpu/drm/i915/i915_gpu_error.c |  7 +++
>> >> >  drivers/gpu/drm/i915/i915_params.c|  9 +
>> >> >  drivers/gpu/drm/i915/i915_params.h|  1 +
>> >> >  drivers/gpu/drm/i915/i915_sysfs.c |  8 
>> >> >  drivers/gpu/drm/i915/intel_display.c  |  4 
>> >> >  drivers/gpu/drm/i915/intel_overlay.c  |  4 
>> >> >  9 files changed, 65 insertions(+)
>> >> >
>> >> > diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
>> >> > index 7769e469118f..10a6ac11b6a9 100644
>> >> > --- a/drivers/gpu/drm/i915/Kconfig
>> >> > +++ b/drivers/gpu/drm/i915/Kconfig
>> >> > @@ -46,6 +46,16 @@ config DRM_I915_PRELIMINARY_HW_SUPPORT
>> >> >  
>> >> >   If in doubt, say "N".
>> >> >  
>> >> > +config DRM_I915_CAPTURE_ERROR
>> >> > +   bool "Enable capturing GPU state following a hang"
>> >> > +   depends on DRM_I915
>> >> > +   default y
>> >> > +   help
>> >> > + This option enables capturing the GPU state when a hang is 
>> >> > detected.
>> >> > + This information is vital for triaging hangs and assists in 
>> >> > debugging.
>> >> > +
>> >> > + If in doubt, say "Y".
>> >> > +
>> >> >  config DRM_I915_USERPTR
>> >> > bool "Always enable userptr support"
>> >> > depends on DRM_I915
>> >> > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
>> >> > b/drivers/gpu/drm/i915/i915_debugfs.c
>> >> > index 20689f1cd719..e4b5ba771bea 100644
>> >> > --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> >> > +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> >> > @@ -960,6 +960,8 @@ static int i915_hws_info(struct seq_file *m, void 
>> >> > *data)
>> >> > return 0;
>> >> >  }
>> >> >  
>> >> > +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
>> >> > +
>> >> >  static ssize_t
>> >> >  i915_error_state_write(struct file *filp,
>> >> >const char __user *ubuf,
>> >> > @@ -1042,6 +1044,8 @@ static const struct file_operations 
>> >> > i915_error_state_fops = {
>> >> > .release = i915_error_state_release,
>> >> >  };
>> >> >  
>> >> > +#endif
>> >> > +
>> >> >  static int
>> >> >  i915_next_seqno_get(void *data, u64 *val)
>> >> >  {
>> >> > @@ -5398,7 +5402,9 @@ static const struct i915_debugfs_files {
>> >> > {"i915_ring_missed_irq", _ring_missed_irq_fops},
>> >> > {"i915_ring_test_irq", _ring_test_irq_fops},
>> >> > {"i915_gem_drop_caches", _drop_caches_fops},
>> >> > +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
>> >> > {"i915_error_state", _error_state_fops},
>> >> > +#endif
>> >> > {"i915_next_seqno", _next_seqno_fops},
>> >> > {"i915_display_crc_ctl", _display_crc_ctl_fops},
>> >> > {"i915_pri_wm_latency", _pri_wm_latency_fops},
>> >> > diff --git a/drivers/gpu/drm/i915/i915_drv.h 
>> >> > b/drivers/gpu/drm/i915/i915_drv.h
>> >> > index 54d860e1c0fc..4570c4fa0287 100644
>> >> > --- a/drivers/gpu/drm/i915/i915_drv.h
>> >> > +++ b/drivers/gpu/drm/i915/i915_drv.h
>> >> > @@ -3544,6 +3544,8 @@ static inline void intel_display_crc_init(struct 
>> >> > drm_i915_private *dev_priv) {}
>> >> >  #endif
>> >> >  
>> >> >  /* i915_gpu_error.c */
>> >> > +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
>> >> > +
>> >> >  __printf(2, 3)
>> >> >  void i915_error_printf(struct drm_i915_error_state_buf *e, const char 
>> >> > *f, ...);
>> >> >  int i915_error_state_to_str(struct drm_i915_error_state_buf *estr,
>> >> > @@ -3564,6 +3566,20 @@ void i915_error_state_get(struct drm_device *dev,
>> >> >  void i915_error_state_put(struct i915_error_state_file_priv 
>> >> > *error_priv);
>> >> >  void i915_destroy_error_state(struct drm_device *dev);
>> >> >  
>> >> > +#else
>> >> > +
>> >> > +static inline void i915_capture_error_state(struct drm_i915_private 
>> >> > *dev_priv,
>> >> > +   u32 engine_mask,
>> >> > +   const char *error_msg)
>> >> > +{
>> >> > +}
>> >> > +

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gen9: unconditionally apply the memory bandwidth WA

[Jani Nikula]

On Tue, 11 Oct 2016, Greg KH  wrote:
> On Tue, Oct 11, 2016 at 10:34:14AM +0300, Jani Nikula wrote:
>> On Mon, 10 Oct 2016, Paulo Zanoni  wrote:
>> The patch is a bit on the large side for stable. 100 lines with context
>> is the rule.
>
> Huh?  It's only 49 line of changes:
>
>> >  drivers/gpu/drm/i915/intel_pm.c | 49 
>> > ++---
>> >  1 file changed, 41 insertions(+), 8 deletions(-)
>
> That's fine for stable, we take i915 stable patches much bigger than
> that all the time :)

Oh, I thought the rule was "100 lines, with context", but I certainly
won't argue! Never mind! ;)

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Technology Center
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[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Convert open-coded use of vma_pages()

[Patchwork]

== Series Details ==

Series: drm/i915: Convert open-coded use of vma_pages()
URL   : https://patchwork.freedesktop.org/series/13575/
State : warning

== Summary ==

Series 13575v1 drm/i915: Convert open-coded use of vma_pages()
https://patchwork.freedesktop.org/api/1.0/series/13575/revisions/1/mbox/

Test drv_module_reload_basic:
skip   -> PASS   (fi-skl-6260u)
Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-b:
pass   -> DMESG-WARN (fi-ilk-650)
Subgroup nonblocking-crc-pipe-b-frame-sequence:
pass   -> DMESG-WARN (fi-ilk-650)
Subgroup suspend-read-crc-pipe-a:
pass   -> DMESG-WARN (fi-byt-j1900)
Test kms_psr_sink_crc:
Subgroup psr_basic:
dmesg-warn -> PASS   (fi-skl-6700hq)
Test vgem_basic:
Subgroup unload:
pass   -> SKIP   (fi-ivb-3770)
skip   -> PASS   (fi-ilk-650)
pass   -> SKIP   (fi-skl-6770hq)
pass   -> SKIP   (fi-bsw-n3050)
skip   -> PASS   (fi-bxt-t5700)

fi-bdw-5557u total:248  pass:231  dwarn:0   dfail:0   fail:0   skip:17 
fi-bsw-n3050 total:248  pass:204  dwarn:0   dfail:0   fail:0   skip:44 
fi-bxt-t5700 total:248  pass:217  dwarn:0   dfail:0   fail:0   skip:31 
fi-byt-j1900 total:248  pass:213  dwarn:2   dfail:0   fail:1   skip:32 
fi-byt-n2820 total:248  pass:211  dwarn:0   dfail:0   fail:1   skip:36 
fi-hsw-4770  total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-hsw-4770r total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-ilk-650   total:248  pass:183  dwarn:2   dfail:0   fail:2   skip:61 
fi-ivb-3520m total:248  pass:221  dwarn:0   dfail:0   fail:0   skip:27 
fi-ivb-3770  total:248  pass:221  dwarn:0   dfail:0   fail:0   skip:27 
fi-kbl-7200u total:248  pass:222  dwarn:0   dfail:0   fail:0   skip:26 
fi-skl-6260u total:248  pass:232  dwarn:0   dfail:0   fail:0   skip:16 
fi-skl-6700hqtotal:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-skl-6700k total:248  pass:221  dwarn:1   dfail:0   fail:0   skip:26 
fi-skl-6770hqtotal:248  pass:230  dwarn:1   dfail:0   fail:1   skip:16 
fi-snb-2520m total:248  pass:211  dwarn:0   dfail:0   fail:0   skip:37 
fi-snb-2600  total:248  pass:209  dwarn:0   dfail:0   fail:0   skip:39 

Results at /archive/results/CI_IGT_test/Patchwork_2670/

f79322df75bf6193458ec601a345ba6bd86befca drm-intel-nightly: 
2016y-10m-11d-09h-16m-03s UTC integration manifest
56763195 drm/i915: Convert open-coded use of vma_pages()

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Re: [Intel-gfx] [PATCH 1/2] drm/i915/gen9: unconditionally apply the memory bandwidth WA

[Greg KH]

On Tue, Oct 11, 2016 at 10:34:14AM +0300, Jani Nikula wrote:
> On Mon, 10 Oct 2016, Paulo Zanoni  wrote:
> > Mahesh Kumar is already working on a proper implementation for the
> > workaround, but while we still don't have it, let's just
> > unconditionally apply the workaround for everybody and we hope we can
> > close all those numerous bugzilla tickets. Also, I'm not sure how easy
> > it will be to backport the final implementation to the stable Kernels,
> > and this patch here is probably easier to backport.
> >
> > At the present moment I still don't have confirmation that this patch
> > fixes any of the bugs listed below, but we should definitely try
> > testing all of them again.
> >
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94337
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94605
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94884
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95010
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96226
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96828
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97450
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97830
> > Cc: sta...@vger.kernel.org
> 
> The patch is a bit on the large side for stable. 100 lines with context
> is the rule.

Huh?  It's only 49 line of changes:

> >  drivers/gpu/drm/i915/intel_pm.c | 49 
> > ++---
> >  1 file changed, 41 insertions(+), 8 deletions(-)

That's fine for stable, we take i915 stable patches much bigger than
that all the time :)

thanks,

greg k-h
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Re: [Intel-gfx] [CI 1/5] drm/i915: Allow disabling error capture

[Chris Wilson]

On Tue, Oct 11, 2016 at 01:16:42PM +0300, Jani Nikula wrote:
> On Tue, 11 Oct 2016, Chris Wilson  wrote:
> > On Tue, Oct 11, 2016 at 12:52:00PM +0300, Jani Nikula wrote:
> >> On Tue, 11 Oct 2016, Chris Wilson  wrote:
> >> > We currently capture the GPU state after we detect a hang. This is vital
> >> > for us to both triage and debug hangs in the wild (post-mortem
> >> > debugging). However, it comes at the cost of running some potentially
> >> > dangerous code (since it has to make very few assumption about the state
> >> > of the driver) that is quite resource intensive.
> >> >
> >> > Signed-off-by: Chris Wilson 
> >> > Reviewed-by: Joonas Lahtinen 
> >> > ---
> >> >  drivers/gpu/drm/i915/Kconfig  | 10 ++
> >> >  drivers/gpu/drm/i915/i915_debugfs.c   |  6 ++
> >> >  drivers/gpu/drm/i915/i915_drv.h   | 16 
> >> >  drivers/gpu/drm/i915/i915_gpu_error.c |  7 +++
> >> >  drivers/gpu/drm/i915/i915_params.c|  9 +
> >> >  drivers/gpu/drm/i915/i915_params.h|  1 +
> >> >  drivers/gpu/drm/i915/i915_sysfs.c |  8 
> >> >  drivers/gpu/drm/i915/intel_display.c  |  4 
> >> >  drivers/gpu/drm/i915/intel_overlay.c  |  4 
> >> >  9 files changed, 65 insertions(+)
> >> >
> >> > diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
> >> > index 7769e469118f..10a6ac11b6a9 100644
> >> > --- a/drivers/gpu/drm/i915/Kconfig
> >> > +++ b/drivers/gpu/drm/i915/Kconfig
> >> > @@ -46,6 +46,16 @@ config DRM_I915_PRELIMINARY_HW_SUPPORT
> >> >  
> >> >If in doubt, say "N".
> >> >  
> >> > +config DRM_I915_CAPTURE_ERROR
> >> > +bool "Enable capturing GPU state following a hang"
> >> > +depends on DRM_I915
> >> > +default y
> >> > +help
> >> > +  This option enables capturing the GPU state when a hang is 
> >> > detected.
> >> > +  This information is vital for triaging hangs and assists in 
> >> > debugging.
> >> > +
> >> > +  If in doubt, say "Y".
> >> > +
> >> >  config DRM_I915_USERPTR
> >> >  bool "Always enable userptr support"
> >> >  depends on DRM_I915
> >> > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
> >> > b/drivers/gpu/drm/i915/i915_debugfs.c
> >> > index 20689f1cd719..e4b5ba771bea 100644
> >> > --- a/drivers/gpu/drm/i915/i915_debugfs.c
> >> > +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> >> > @@ -960,6 +960,8 @@ static int i915_hws_info(struct seq_file *m, void 
> >> > *data)
> >> >  return 0;
> >> >  }
> >> >  
> >> > +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
> >> > +
> >> >  static ssize_t
> >> >  i915_error_state_write(struct file *filp,
> >> > const char __user *ubuf,
> >> > @@ -1042,6 +1044,8 @@ static const struct file_operations 
> >> > i915_error_state_fops = {
> >> >  .release = i915_error_state_release,
> >> >  };
> >> >  
> >> > +#endif
> >> > +
> >> >  static int
> >> >  i915_next_seqno_get(void *data, u64 *val)
> >> >  {
> >> > @@ -5398,7 +5402,9 @@ static const struct i915_debugfs_files {
> >> >  {"i915_ring_missed_irq", _ring_missed_irq_fops},
> >> >  {"i915_ring_test_irq", _ring_test_irq_fops},
> >> >  {"i915_gem_drop_caches", _drop_caches_fops},
> >> > +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
> >> >  {"i915_error_state", _error_state_fops},
> >> > +#endif
> >> >  {"i915_next_seqno", _next_seqno_fops},
> >> >  {"i915_display_crc_ctl", _display_crc_ctl_fops},
> >> >  {"i915_pri_wm_latency", _pri_wm_latency_fops},
> >> > diff --git a/drivers/gpu/drm/i915/i915_drv.h 
> >> > b/drivers/gpu/drm/i915/i915_drv.h
> >> > index 54d860e1c0fc..4570c4fa0287 100644
> >> > --- a/drivers/gpu/drm/i915/i915_drv.h
> >> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> >> > @@ -3544,6 +3544,8 @@ static inline void intel_display_crc_init(struct 
> >> > drm_i915_private *dev_priv) {}
> >> >  #endif
> >> >  
> >> >  /* i915_gpu_error.c */
> >> > +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
> >> > +
> >> >  __printf(2, 3)
> >> >  void i915_error_printf(struct drm_i915_error_state_buf *e, const char 
> >> > *f, ...);
> >> >  int i915_error_state_to_str(struct drm_i915_error_state_buf *estr,
> >> > @@ -3564,6 +3566,20 @@ void i915_error_state_get(struct drm_device *dev,
> >> >  void i915_error_state_put(struct i915_error_state_file_priv 
> >> > *error_priv);
> >> >  void i915_destroy_error_state(struct drm_device *dev);
> >> >  
> >> > +#else
> >> > +
> >> > +static inline void i915_capture_error_state(struct drm_i915_private 
> >> > *dev_priv,
> >> > +u32 engine_mask,
> >> > +const char *error_msg)
> >> > +{
> >> > +}
> >> > +
> >> > +static inline void i915_destroy_error_state(struct drm_device *dev)
> >> > +{
> >> > +}
> >> > +
> >> > +#endif
> >> > +
> >> >  void 

Re: [Intel-gfx] [CI 1/5] drm/i915: Allow disabling error capture

[Jani Nikula]

On Tue, 11 Oct 2016, Chris Wilson  wrote:
> On Tue, Oct 11, 2016 at 12:52:00PM +0300, Jani Nikula wrote:
>> On Tue, 11 Oct 2016, Chris Wilson  wrote:
>> > We currently capture the GPU state after we detect a hang. This is vital
>> > for us to both triage and debug hangs in the wild (post-mortem
>> > debugging). However, it comes at the cost of running some potentially
>> > dangerous code (since it has to make very few assumption about the state
>> > of the driver) that is quite resource intensive.
>> >
>> > Signed-off-by: Chris Wilson 
>> > Reviewed-by: Joonas Lahtinen 
>> > ---
>> >  drivers/gpu/drm/i915/Kconfig  | 10 ++
>> >  drivers/gpu/drm/i915/i915_debugfs.c   |  6 ++
>> >  drivers/gpu/drm/i915/i915_drv.h   | 16 
>> >  drivers/gpu/drm/i915/i915_gpu_error.c |  7 +++
>> >  drivers/gpu/drm/i915/i915_params.c|  9 +
>> >  drivers/gpu/drm/i915/i915_params.h|  1 +
>> >  drivers/gpu/drm/i915/i915_sysfs.c |  8 
>> >  drivers/gpu/drm/i915/intel_display.c  |  4 
>> >  drivers/gpu/drm/i915/intel_overlay.c  |  4 
>> >  9 files changed, 65 insertions(+)
>> >
>> > diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
>> > index 7769e469118f..10a6ac11b6a9 100644
>> > --- a/drivers/gpu/drm/i915/Kconfig
>> > +++ b/drivers/gpu/drm/i915/Kconfig
>> > @@ -46,6 +46,16 @@ config DRM_I915_PRELIMINARY_HW_SUPPORT
>> >  
>> >  If in doubt, say "N".
>> >  
>> > +config DRM_I915_CAPTURE_ERROR
>> > +  bool "Enable capturing GPU state following a hang"
>> > +  depends on DRM_I915
>> > +  default y
>> > +  help
>> > +This option enables capturing the GPU state when a hang is detected.
>> > +This information is vital for triaging hangs and assists in debugging.
>> > +
>> > +If in doubt, say "Y".
>> > +
>> >  config DRM_I915_USERPTR
>> >bool "Always enable userptr support"
>> >depends on DRM_I915
>> > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
>> > b/drivers/gpu/drm/i915/i915_debugfs.c
>> > index 20689f1cd719..e4b5ba771bea 100644
>> > --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> > +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> > @@ -960,6 +960,8 @@ static int i915_hws_info(struct seq_file *m, void 
>> > *data)
>> >return 0;
>> >  }
>> >  
>> > +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
>> > +
>> >  static ssize_t
>> >  i915_error_state_write(struct file *filp,
>> >   const char __user *ubuf,
>> > @@ -1042,6 +1044,8 @@ static const struct file_operations 
>> > i915_error_state_fops = {
>> >.release = i915_error_state_release,
>> >  };
>> >  
>> > +#endif
>> > +
>> >  static int
>> >  i915_next_seqno_get(void *data, u64 *val)
>> >  {
>> > @@ -5398,7 +5402,9 @@ static const struct i915_debugfs_files {
>> >{"i915_ring_missed_irq", _ring_missed_irq_fops},
>> >{"i915_ring_test_irq", _ring_test_irq_fops},
>> >{"i915_gem_drop_caches", _drop_caches_fops},
>> > +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
>> >{"i915_error_state", _error_state_fops},
>> > +#endif
>> >{"i915_next_seqno", _next_seqno_fops},
>> >{"i915_display_crc_ctl", _display_crc_ctl_fops},
>> >{"i915_pri_wm_latency", _pri_wm_latency_fops},
>> > diff --git a/drivers/gpu/drm/i915/i915_drv.h 
>> > b/drivers/gpu/drm/i915/i915_drv.h
>> > index 54d860e1c0fc..4570c4fa0287 100644
>> > --- a/drivers/gpu/drm/i915/i915_drv.h
>> > +++ b/drivers/gpu/drm/i915/i915_drv.h
>> > @@ -3544,6 +3544,8 @@ static inline void intel_display_crc_init(struct 
>> > drm_i915_private *dev_priv) {}
>> >  #endif
>> >  
>> >  /* i915_gpu_error.c */
>> > +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
>> > +
>> >  __printf(2, 3)
>> >  void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, 
>> > ...);
>> >  int i915_error_state_to_str(struct drm_i915_error_state_buf *estr,
>> > @@ -3564,6 +3566,20 @@ void i915_error_state_get(struct drm_device *dev,
>> >  void i915_error_state_put(struct i915_error_state_file_priv *error_priv);
>> >  void i915_destroy_error_state(struct drm_device *dev);
>> >  
>> > +#else
>> > +
>> > +static inline void i915_capture_error_state(struct drm_i915_private 
>> > *dev_priv,
>> > +  u32 engine_mask,
>> > +  const char *error_msg)
>> > +{
>> > +}
>> > +
>> > +static inline void i915_destroy_error_state(struct drm_device *dev)
>> > +{
>> > +}
>> > +
>> > +#endif
>> > +
>> >  void i915_get_engine_instdone(struct drm_i915_private *dev_priv,
>> >  enum intel_engine_id engine_id,
>> >  struct intel_instdone *instdone);
>> > diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
>> > b/drivers/gpu/drm/i915/i915_gpu_error.c
>> > index b5b58692ac5a..9b395ffa3b6a 100644
>> > --- a/drivers/gpu/drm/i915/i915_gpu_error.c
>> > +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
>> > @@ -30,6 +30,8 @@
>> >  

Re: [Intel-gfx] [PATCH 14/42] drm/i915: Use a radixtree for random access to the object's backing storage

[John Harrison]

On 11/10/2016 10:32, Tvrtko Ursulin wrote:


On 07/10/2016 10:46, Chris Wilson wrote:

A while ago we switched from a contiguous array of pages into an sglist,
for that was both more convenient for mapping to hardware and avoided
the requirement for a vmalloc array of pages on every object. However,
certain GEM API calls (like pwrite, pread as well as performing
relocations) do desire access to individual struct pages. A quick hack
was to introduce a cache of the last access such that finding the
following page was quick - this works so long as the caller desired
sequential access. Walking backwards, or multiple callers, still hits a
slow linear search for each page. One solution is to store each
successful lookup in a radix tree.

Signed-off-by: Chris Wilson 
---
  drivers/gpu/drm/i915/i915_drv.h |  57 
  drivers/gpu/drm/i915/i915_gem.c | 149 


  drivers/gpu/drm/i915/i915_gem_stolen.c  |   4 +-
  drivers/gpu/drm/i915/i915_gem_userptr.c |   4 +-
  4 files changed, 154 insertions(+), 60 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h 
b/drivers/gpu/drm/i915/i915_drv.h

index bad97f1e5265..a96b446d8db4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2278,9 +2278,12 @@ struct drm_i915_gem_object {
struct sg_table *pages;
  int pages_pin_count;
-struct get_page {
-struct scatterlist *sg;
-int last;
+struct i915_gem_object_page_iter {
+struct scatterlist *sg_pos;
+unsigned long sg_idx;
+
+struct radix_tree_root radix;
+struct mutex lock;
  } get_page;
  void *mapping;
  @@ -3168,45 +3171,21 @@ static inline int __sg_page_count(struct 
scatterlist *sg)

  return sg->length >> PAGE_SHIFT;
  }
  -struct page *
-i915_gem_object_get_dirty_page(struct drm_i915_gem_object *obj, int n);
-
-static inline dma_addr_t
-i915_gem_object_get_dma_address(struct drm_i915_gem_object *obj, int n)
-{
-if (n < obj->get_page.last) {
-obj->get_page.sg = obj->pages->sgl;
-obj->get_page.last = 0;
-}
-
-while (obj->get_page.last + __sg_page_count(obj->get_page.sg) <= 
n) {

-obj->get_page.last += __sg_page_count(obj->get_page.sg++);
-if (unlikely(sg_is_chain(obj->get_page.sg)))
-obj->get_page.sg = sg_chain_ptr(obj->get_page.sg);
-}
-
-return sg_dma_address(obj->get_page.sg) + ((n - 
obj->get_page.last) << PAGE_SHIFT);

-}
-
-static inline struct page *
-i915_gem_object_get_page(struct drm_i915_gem_object *obj, int n)
-{
-if (WARN_ON(n >= obj->base.size >> PAGE_SHIFT))
-return NULL;
+struct scatterlist *
+i915_gem_object_get_sg(struct drm_i915_gem_object *obj,
+   unsigned long n, unsigned int *offset);
  -if (n < obj->get_page.last) {
-obj->get_page.sg = obj->pages->sgl;
-obj->get_page.last = 0;
-}
+struct page *
+i915_gem_object_get_page(struct drm_i915_gem_object *obj,
+ unsigned long n);
  -while (obj->get_page.last + __sg_page_count(obj->get_page.sg) 
<= n) {

-obj->get_page.last += __sg_page_count(obj->get_page.sg++);
-if (unlikely(sg_is_chain(obj->get_page.sg)))
-obj->get_page.sg = sg_chain_ptr(obj->get_page.sg);
-}
+struct page *
+i915_gem_object_get_dirty_page(struct drm_i915_gem_object *obj,
+   unsigned long n);
  -return nth_page(sg_page(obj->get_page.sg), n - 
obj->get_page.last);

-}
+dma_addr_t
+i915_gem_object_get_dma_address(struct drm_i915_gem_object *obj,
+unsigned long n);
static inline void i915_gem_object_pin_pages(struct 
drm_i915_gem_object *obj)

  {
diff --git a/drivers/gpu/drm/i915/i915_gem.c 
b/drivers/gpu/drm/i915/i915_gem.c

index ada837e393a7..af7d51f16658 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2292,6 +2292,15 @@ i915_gem_object_put_pages_gtt(struct 
drm_i915_gem_object *obj)

  kfree(obj->pages);
  }
  +static void __i915_gem_object_reset_page_iter(struct 
drm_i915_gem_object *obj)

+{
+struct radix_tree_iter iter;
+void **slot;
+
+radix_tree_for_each_slot(slot, >get_page.radix, , 0)
+radix_tree_delete(>get_page.radix, iter.index);
+}
+
  int
  i915_gem_object_put_pages(struct drm_i915_gem_object *obj)
  {
@@ -2324,6 +2333,8 @@ i915_gem_object_put_pages(struct 
drm_i915_gem_object *obj)

  obj->mapping = NULL;
  }
  +__i915_gem_object_reset_page_iter(obj);
+
  ops->put_pages(obj);
  obj->pages = NULL;
  @@ -2488,8 +2499,8 @@ i915_gem_object_get_pages(struct 
drm_i915_gem_object *obj)

list_add_tail(>global_list, _priv->mm.unbound_list);
  -obj->get_page.sg = obj->pages->sgl;
-obj->get_page.last = 0;
+obj->get_page.sg_pos = obj->pages->sgl;
+obj->get_page.sg_idx = 0;
return 0;
  }
@@ -4242,6 +4253,8 @@ void i915_gem_object_init(struct 
drm_i915_gem_object *obj,

Re: [Intel-gfx] [CI 1/5] drm/i915: Allow disabling error capture

[Chris Wilson]

On Tue, Oct 11, 2016 at 12:52:00PM +0300, Jani Nikula wrote:
> On Tue, 11 Oct 2016, Chris Wilson  wrote:
> > We currently capture the GPU state after we detect a hang. This is vital
> > for us to both triage and debug hangs in the wild (post-mortem
> > debugging). However, it comes at the cost of running some potentially
> > dangerous code (since it has to make very few assumption about the state
> > of the driver) that is quite resource intensive.
> >
> > Signed-off-by: Chris Wilson 
> > Reviewed-by: Joonas Lahtinen 
> > ---
> >  drivers/gpu/drm/i915/Kconfig  | 10 ++
> >  drivers/gpu/drm/i915/i915_debugfs.c   |  6 ++
> >  drivers/gpu/drm/i915/i915_drv.h   | 16 
> >  drivers/gpu/drm/i915/i915_gpu_error.c |  7 +++
> >  drivers/gpu/drm/i915/i915_params.c|  9 +
> >  drivers/gpu/drm/i915/i915_params.h|  1 +
> >  drivers/gpu/drm/i915/i915_sysfs.c |  8 
> >  drivers/gpu/drm/i915/intel_display.c  |  4 
> >  drivers/gpu/drm/i915/intel_overlay.c  |  4 
> >  9 files changed, 65 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
> > index 7769e469118f..10a6ac11b6a9 100644
> > --- a/drivers/gpu/drm/i915/Kconfig
> > +++ b/drivers/gpu/drm/i915/Kconfig
> > @@ -46,6 +46,16 @@ config DRM_I915_PRELIMINARY_HW_SUPPORT
> >  
> >   If in doubt, say "N".
> >  
> > +config DRM_I915_CAPTURE_ERROR
> > +   bool "Enable capturing GPU state following a hang"
> > +   depends on DRM_I915
> > +   default y
> > +   help
> > + This option enables capturing the GPU state when a hang is detected.
> > + This information is vital for triaging hangs and assists in debugging.
> > +
> > + If in doubt, say "Y".
> > +
> >  config DRM_I915_USERPTR
> > bool "Always enable userptr support"
> > depends on DRM_I915
> > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
> > b/drivers/gpu/drm/i915/i915_debugfs.c
> > index 20689f1cd719..e4b5ba771bea 100644
> > --- a/drivers/gpu/drm/i915/i915_debugfs.c
> > +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> > @@ -960,6 +960,8 @@ static int i915_hws_info(struct seq_file *m, void *data)
> > return 0;
> >  }
> >  
> > +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
> > +
> >  static ssize_t
> >  i915_error_state_write(struct file *filp,
> >const char __user *ubuf,
> > @@ -1042,6 +1044,8 @@ static const struct file_operations 
> > i915_error_state_fops = {
> > .release = i915_error_state_release,
> >  };
> >  
> > +#endif
> > +
> >  static int
> >  i915_next_seqno_get(void *data, u64 *val)
> >  {
> > @@ -5398,7 +5402,9 @@ static const struct i915_debugfs_files {
> > {"i915_ring_missed_irq", _ring_missed_irq_fops},
> > {"i915_ring_test_irq", _ring_test_irq_fops},
> > {"i915_gem_drop_caches", _drop_caches_fops},
> > +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
> > {"i915_error_state", _error_state_fops},
> > +#endif
> > {"i915_next_seqno", _next_seqno_fops},
> > {"i915_display_crc_ctl", _display_crc_ctl_fops},
> > {"i915_pri_wm_latency", _pri_wm_latency_fops},
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h 
> > b/drivers/gpu/drm/i915/i915_drv.h
> > index 54d860e1c0fc..4570c4fa0287 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -3544,6 +3544,8 @@ static inline void intel_display_crc_init(struct 
> > drm_i915_private *dev_priv) {}
> >  #endif
> >  
> >  /* i915_gpu_error.c */
> > +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
> > +
> >  __printf(2, 3)
> >  void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, 
> > ...);
> >  int i915_error_state_to_str(struct drm_i915_error_state_buf *estr,
> > @@ -3564,6 +3566,20 @@ void i915_error_state_get(struct drm_device *dev,
> >  void i915_error_state_put(struct i915_error_state_file_priv *error_priv);
> >  void i915_destroy_error_state(struct drm_device *dev);
> >  
> > +#else
> > +
> > +static inline void i915_capture_error_state(struct drm_i915_private 
> > *dev_priv,
> > +   u32 engine_mask,
> > +   const char *error_msg)
> > +{
> > +}
> > +
> > +static inline void i915_destroy_error_state(struct drm_device *dev)
> > +{
> > +}
> > +
> > +#endif
> > +
> >  void i915_get_engine_instdone(struct drm_i915_private *dev_priv,
> >   enum intel_engine_id engine_id,
> >   struct intel_instdone *instdone);
> > diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
> > b/drivers/gpu/drm/i915/i915_gpu_error.c
> > index b5b58692ac5a..9b395ffa3b6a 100644
> > --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> > +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> > @@ -30,6 +30,8 @@
> >  #include 
> >  #include "i915_drv.h"
> >  
> > +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
> > +
> >  static const char *engine_str(int engine)
> >  {
> > switch (engine) {
> > 

Re: [Intel-gfx] [PATCH 25/42] drm/i915: Use lockless object free

[John Harrison]

Needs a description?

On 07/10/2016 10:46, Chris Wilson wrote:

Signed-off-by: Chris Wilson 
---
  drivers/gpu/drm/i915/i915_drv.c |  2 +-
  drivers/gpu/drm/i915/i915_drv.h | 10 +-
  drivers/gpu/drm/i915/i915_gem.c | 20 ++--
  drivers/gpu/drm/i915/i915_gem_tiling.c  |  2 +-
  drivers/gpu/drm/i915/i915_gem_userptr.c |  4 ++--
  drivers/gpu/drm/i915/intel_display.c|  6 +++---
  drivers/gpu/drm/i915/intel_overlay.c|  4 ++--
  drivers/gpu/drm/i915/intel_pm.c |  2 +-
  8 files changed, 21 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f7d48f97993d..2e29eedd21b2 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2606,7 +2606,7 @@ static struct drm_driver driver = {
.set_busid = drm_pci_set_busid,
  
  	.gem_close_object = i915_gem_close_object,

-   .gem_free_object = i915_gem_free_object,
+   .gem_free_object_unlocked = i915_gem_free_object,
.gem_vm_ops = _gem_vm_ops,
  
  	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e79a5cb78b5d..89d3b5a16826 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2396,19 +2396,12 @@ __attribute__((nonnull))
  static inline void
  i915_gem_object_put(struct drm_i915_gem_object *obj)
  {
-   drm_gem_object_unreference(>base);
+   __drm_gem_object_unreference(>base);
  }
  
  __deprecated

  extern void drm_gem_object_unreference(struct drm_gem_object *);
  
-__attribute__((nonnull))

-static inline void
-i915_gem_object_put_unlocked(struct drm_i915_gem_object *obj)
-{
-   drm_gem_object_unreference_unlocked(>base);
-}
-
  __deprecated
  extern void drm_gem_object_unreference_unlocked(struct drm_gem_object *);
  
@@ -2510,7 +2503,6 @@ static inline struct i915_vma *i915_vma_get(struct i915_vma *vma)
  
  static inline void i915_vma_put(struct i915_vma *vma)

  {
-   lockdep_assert_held(>vm->dev->struct_mutex);
i915_gem_object_put(vma->obj);
  }
  
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c

index 7cd49dd1d3f8..28e1064baad5 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -616,7 +616,7 @@ i915_gem_create(struct drm_file *file,
  
  	ret = drm_gem_handle_create(file, >base, );

/* drop reference from allocate - handle holds it now */
-   i915_gem_object_put_unlocked(obj);
+   i915_gem_object_put(obj);
if (ret)
return ret;
  
@@ -1115,7 +1115,7 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,
  
  	i915_gem_object_unpin_pages(obj);

  out:
-   i915_gem_object_put_unlocked(obj);
+   i915_gem_object_put(obj);
return ret;
  }
  
@@ -1450,7 +1450,7 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
  
  	i915_gem_object_unpin_pages(obj);

  err:
-   i915_gem_object_put_unlocked(obj);
+   i915_gem_object_put(obj);
return ret;
  }
  
@@ -1560,7 +1560,7 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,

  err_pages:
i915_gem_object_unpin_pages(obj);
  err_unlocked:
-   i915_gem_object_put_unlocked(obj);
+   i915_gem_object_put(obj);
return ret;
  }
  
@@ -1591,7 +1591,7 @@ i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,

}
}
  
-	i915_gem_object_put_unlocked(obj);

+   i915_gem_object_put(obj);
return err;
  }
  
@@ -1637,7 +1637,7 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data,

 * pages from.
 */
if (!obj->base.filp) {
-   i915_gem_object_put_unlocked(obj);
+   i915_gem_object_put(obj);
return -EINVAL;
}
  
@@ -1649,7 +1649,7 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data,

struct vm_area_struct *vma;
  
  		if (down_write_killable(>mmap_sem)) {

-   i915_gem_object_put_unlocked(obj);
+   i915_gem_object_put(obj);
return -EINTR;
}
vma = find_vma(mm, addr);
@@ -1663,7 +1663,7 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
/* This may race, but that's ok, it only gets set */
WRITE_ONCE(obj->frontbuffer_ggtt_origin, ORIGIN_CPU);
}
-   i915_gem_object_put_unlocked(obj);
+   i915_gem_object_put(obj);
if (IS_ERR((void *)addr))
return addr;
  
@@ -2073,7 +2073,7 @@ i915_gem_mmap_gtt(struct drm_file *file,

if (ret == 0)
*offset = drm_vma_node_offset_addr(>base.vma_node);
  
-	i915_gem_object_put_unlocked(obj);

+   i915_gem_object_put(obj);
return ret;
  }
  
@@ -2881,7 +2881,7 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file)

Re: [Intel-gfx] [PATCH 24/42] drm/i915: Treat a framebuffer reference as an active reference whilst shrinking

[John Harrison]

On 07/10/2016 10:46, Chris Wilson wrote:

Treat a framebuffer reference with the same priority as an active
reference whilst shrinking. Framebuffers are likely to be reused and
typically cost more to migrate to and from GPU memory (on LLC
architectures we need to clflush), so defer the temptation to purge them
during a kswapd run until we have run out of cheap buffers.

Signed-off-by: Chris Wilson 
---
  drivers/gpu/drm/i915/i915_gem_shrinker.c | 5 +++--
  1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_shrinker.c 
b/drivers/gpu/drm/i915/i915_gem_shrinker.c
index fa72473dc7f5..0241658af16b 100644
--- a/drivers/gpu/drm/i915/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/i915_gem_shrinker.c
@@ -214,8 +214,9 @@ i915_gem_shrink(struct drm_i915_private *dev_priv,
!is_vmalloc_addr(obj->mm.mapping))
continue;
  
-			if ((flags & I915_SHRINK_ACTIVE) == 0 &&

-   i915_gem_object_is_active(obj))
+   if (!(flags & I915_SHRINK_ACTIVE) &&
+   (i915_gem_object_is_active(obj) ||
+obj->framebuffer_references))
continue;
  
  			if (!can_release_pages(obj))


Reviewed-by: John Harrison 

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Re: [Intel-gfx] [CI 1/5] drm/i915: Allow disabling error capture

[Jani Nikula]

On Tue, 11 Oct 2016, Chris Wilson  wrote:
> We currently capture the GPU state after we detect a hang. This is vital
> for us to both triage and debug hangs in the wild (post-mortem
> debugging). However, it comes at the cost of running some potentially
> dangerous code (since it has to make very few assumption about the state
> of the driver) that is quite resource intensive.
>
> Signed-off-by: Chris Wilson 
> Reviewed-by: Joonas Lahtinen 
> ---
>  drivers/gpu/drm/i915/Kconfig  | 10 ++
>  drivers/gpu/drm/i915/i915_debugfs.c   |  6 ++
>  drivers/gpu/drm/i915/i915_drv.h   | 16 
>  drivers/gpu/drm/i915/i915_gpu_error.c |  7 +++
>  drivers/gpu/drm/i915/i915_params.c|  9 +
>  drivers/gpu/drm/i915/i915_params.h|  1 +
>  drivers/gpu/drm/i915/i915_sysfs.c |  8 
>  drivers/gpu/drm/i915/intel_display.c  |  4 
>  drivers/gpu/drm/i915/intel_overlay.c  |  4 
>  9 files changed, 65 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
> index 7769e469118f..10a6ac11b6a9 100644
> --- a/drivers/gpu/drm/i915/Kconfig
> +++ b/drivers/gpu/drm/i915/Kconfig
> @@ -46,6 +46,16 @@ config DRM_I915_PRELIMINARY_HW_SUPPORT
>  
> If in doubt, say "N".
>  
> +config DRM_I915_CAPTURE_ERROR
> + bool "Enable capturing GPU state following a hang"
> + depends on DRM_I915
> + default y
> + help
> +   This option enables capturing the GPU state when a hang is detected.
> +   This information is vital for triaging hangs and assists in debugging.
> +
> +   If in doubt, say "Y".
> +
>  config DRM_I915_USERPTR
>   bool "Always enable userptr support"
>   depends on DRM_I915
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 20689f1cd719..e4b5ba771bea 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -960,6 +960,8 @@ static int i915_hws_info(struct seq_file *m, void *data)
>   return 0;
>  }
>  
> +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
> +
>  static ssize_t
>  i915_error_state_write(struct file *filp,
>  const char __user *ubuf,
> @@ -1042,6 +1044,8 @@ static const struct file_operations 
> i915_error_state_fops = {
>   .release = i915_error_state_release,
>  };
>  
> +#endif
> +
>  static int
>  i915_next_seqno_get(void *data, u64 *val)
>  {
> @@ -5398,7 +5402,9 @@ static const struct i915_debugfs_files {
>   {"i915_ring_missed_irq", _ring_missed_irq_fops},
>   {"i915_ring_test_irq", _ring_test_irq_fops},
>   {"i915_gem_drop_caches", _drop_caches_fops},
> +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
>   {"i915_error_state", _error_state_fops},
> +#endif
>   {"i915_next_seqno", _next_seqno_fops},
>   {"i915_display_crc_ctl", _display_crc_ctl_fops},
>   {"i915_pri_wm_latency", _pri_wm_latency_fops},
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 54d860e1c0fc..4570c4fa0287 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -3544,6 +3544,8 @@ static inline void intel_display_crc_init(struct 
> drm_i915_private *dev_priv) {}
>  #endif
>  
>  /* i915_gpu_error.c */
> +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
> +
>  __printf(2, 3)
>  void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, 
> ...);
>  int i915_error_state_to_str(struct drm_i915_error_state_buf *estr,
> @@ -3564,6 +3566,20 @@ void i915_error_state_get(struct drm_device *dev,
>  void i915_error_state_put(struct i915_error_state_file_priv *error_priv);
>  void i915_destroy_error_state(struct drm_device *dev);
>  
> +#else
> +
> +static inline void i915_capture_error_state(struct drm_i915_private 
> *dev_priv,
> + u32 engine_mask,
> + const char *error_msg)
> +{
> +}
> +
> +static inline void i915_destroy_error_state(struct drm_device *dev)
> +{
> +}
> +
> +#endif
> +
>  void i915_get_engine_instdone(struct drm_i915_private *dev_priv,
> enum intel_engine_id engine_id,
> struct intel_instdone *instdone);
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
> b/drivers/gpu/drm/i915/i915_gpu_error.c
> index b5b58692ac5a..9b395ffa3b6a 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -30,6 +30,8 @@
>  #include 
>  #include "i915_drv.h"
>  
> +#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
> +
>  static const char *engine_str(int engine)
>  {
>   switch (engine) {
> @@ -1464,6 +1466,9 @@ void i915_capture_error_state(struct drm_i915_private 
> *dev_priv,
>   struct drm_i915_error_state *error;
>   unsigned long flags;
>  
> + if (!i915.error_capture)
> + return;
> +
>   if 

Re: [Intel-gfx] [PATCH 23/42] drm/i915: Move object release to a freelist + worker

[John Harrison]

On 07/10/2016 10:46, Chris Wilson wrote:

We want to hide the latency of releasing objects and their backing
storage from the submission, so we move the actual free to a worker.
This allows us to switch to struct_mutex freeing of the object in the
next patch.

Furthermore, if we know that the object we are dereferencing remains valid
for the duration of our access, we can forgo the usual synchronisation
barriers and atomic reference counting. To ensure this we defer freeing
an object til after an RCU grace period, such that any lookup of the
object within an RCU read critical section will remain valid until
after we exit that critical section. We also employ this delay for
rate-limiting the serialisation on reallocation - we have to slow down
object creation in order to prevent resource starvation (in particular,
files).

Signed-off-by: Chris Wilson 
---
  drivers/gpu/drm/i915/i915_debugfs.c  |  15 ++-
  drivers/gpu/drm/i915/i915_drv.c  |   3 +
  drivers/gpu/drm/i915/i915_drv.h  |  44 +++-
  drivers/gpu/drm/i915/i915_gem.c  | 166 +--
  drivers/gpu/drm/i915/i915_gem_shrinker.c |  14 ++-
  drivers/gpu/drm/i915/i915_gem_tiling.c   |  21 ++--
  6 files changed, 193 insertions(+), 70 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index b807ddf65e04..144013875513 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -4872,10 +4872,12 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_ring_test_irq_fops,
  #define DROP_BOUND 0x2
  #define DROP_RETIRE 0x4
  #define DROP_ACTIVE 0x8
-#define DROP_ALL (DROP_UNBOUND | \
- DROP_BOUND | \
- DROP_RETIRE | \
- DROP_ACTIVE)
+#define DROP_FREED 0x10
+#define DROP_ALL (DROP_UNBOUND | \
+ DROP_BOUND| \
+ DROP_RETIRE   | \
+ DROP_ACTIVE   | \
+ DROP_FREED)
  static int
  i915_drop_caches_get(void *data, u64 *val)
  {
@@ -4919,6 +4921,11 @@ i915_drop_caches_set(void *data, u64 val)
  unlock:
mutex_unlock(>struct_mutex);
  
+	if (val & DROP_FREED) {

+   synchronize_rcu();
+   flush_work(_priv->mm.free_work);
+   }
+
return ret;
  }
  
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c

index 89d322215c84..f7d48f97993d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -563,6 +563,9 @@ static void i915_gem_fini(struct drm_device *dev)
i915_gem_context_fini(dev);
mutex_unlock(>struct_mutex);
  
+	synchronize_rcu();

+   flush_work(_priv->mm.free_work);
+
WARN_ON(!list_empty(_i915(dev)->context_list));
  }
  
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h

index 7e9df190c891..e79a5cb78b5d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1354,11 +1354,17 @@ struct i915_gem_mm {
struct list_head bound_list;
/**
 * List of objects which are not bound to the GTT (thus
-* are idle and not used by the GPU) but still have
-* (presumably uncached) pages still attached.
+* are idle and not used by the GPU). These objects may or may
+* not actually have any pages attached.
 */
struct list_head unbound_list;
  
+	/**

+* List of objects which are pending destruction.
+*/
+   struct llist_head free_list;
+   struct work_struct free_work;
+
/** Usable portion of the GTT for GEM */
unsigned long stolen_base; /* limited to low memory (32-bit) */
  
@@ -2214,6 +2220,10 @@ struct drm_i915_gem_object {

/** Stolen memory for this object, instead of being backed by shmem. */
struct drm_mm_node *stolen;
struct list_head global_list;
+   union {
+   struct rcu_head rcu;
+   struct llist_node freed;
+   };
  
  	/** Used in execbuf to temporarily hold a ref */

struct list_head obj_exec_link;
@@ -2333,10 +2343,38 @@ to_intel_bo(struct drm_gem_object *gem)
return container_of(gem, struct drm_i915_gem_object, base);
  }
  
+/**

+ * i915_gem_object_lookup_rcu - look up a temporary GEM object from its handle
+ * @filp: DRM file private date
+ * @handle: userspace handle
+ *
+ * Returns:
+ *
+ * A pointer to the object named by the handle if such exists on @filp, NULL
+ * otherwise. This object is only valid whilst under the RCU read lock, and
+ * note carefully the object may be in the process of being destroyed.
+ */
+static inline struct drm_i915_gem_object *
+i915_gem_object_lookup_rcu(struct drm_file *file, u32 handle)
+{
+#ifdef CONFIG_LOCKDEP
+   WARN_ON(!lock_is_held(_lock_map));
+#endif
+   return idr_find(>object_idr, handle);
+}
+
  static inline struct drm_i915_gem_object *
  i915_gem_object_lookup(struct drm_file *file, u32 

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Use fence_write() from rpm resume

[Joonas Lahtinen]

On ma, 2016-10-10 at 22:58 +0100, Chris Wilson wrote:
> During rpm resume we restore the fences, but we do not have the
> protection of struct_mutex. This rules out updating the activity
> tracking on the fences, and requires us to rely on the rpm as the
> serialisation barrier instead.
> 
> [  350.298052] [drm:intel_runtime_resume [i915]] Resuming device
> [  350.308606]
> [  350.310520] ===
> [  350.315560] [ INFO: suspicious RCU usage. ]
> [  350.320554] 4.8.0-rc8-bsw-rapl+ #3133 Tainted: G U  W
> [  350.327208] ---
> [  350.331977] ../drivers/gpu/drm/i915/i915_gem_request.h:371 suspicious 
> rcu_dereference_protected() usage!
> [  350.342619]
> [  350.342619] other info that might help us debug this:
> [  350.342619]
> [  350.351593]
> [  350.351593] rcu_scheduler_active = 1, debug_locks = 0
> [  350.358952] 3 locks held by Xorg/320:
> [  350.363077]  #0:  (>mode_config.mutex){+.+.+.}, at: 
> [] drm_modeset_lock_all+0x3c/0xd0 [drm]
> [  350.375162]  #1:  (crtc_ww_class_acquire){+.+.+.}, at: 
> [] drm_modeset_lock_all+0x46/0xd0 [drm]
> [  350.387022]  #2:  (crtc_ww_class_mutex){+.+.+.}, at: [] 
> drm_modeset_lock+0x36/0x110 [drm]
> [  350.398236]
> [  350.398236] stack backtrace:
> [  350.403196] CPU: 1 PID: 320 Comm: Xorg Tainted: G U  W   
> 4.8.0-rc8-bsw-rapl+ #3133
> [  350.412457] Hardware name: Intel Corporation CHERRYVIEW C0 
> PLATFORM/Braswell CRB, BIOS BRAS.X64.X088.R00.1510270350 10/27/2015
> [  350.425212]   8801680a78c8 81332187 
> 88016c5c5000
> [  350.433611]  0001 8801680a78f8 810ca6da 
> 88016cc8b0f0
> [  350.442012]  88016cc8 88016cc8 880177ad 
> 8801680a7948
> [  350.450409] Call Trace:
> [  350.453165]  [] dump_stack+0x67/0x90
> [  350.458931]  [] lockdep_rcu_suspicious+0xea/0x120
> [  350.466002]  [] fence_update+0xbd/0x670 [i915]
> [  350.472766]  [] i915_gem_restore_fences+0x52/0x70 [i915]
> [  350.480496]  [] vlv_resume_prepare+0x72/0x570 [i915]
> [  350.487839]  [] intel_runtime_resume+0x102/0x210 [i915]
> [  350.495442]  [] pci_pm_runtime_resume+0x7f/0xb0
> [  350.502274]  [] ? pci_restore_standard_config+0x40/0x40
> [  350.509883]  [] __rpm_callback+0x35/0x70
> [  350.516037]  [] ? pci_restore_standard_config+0x40/0x40
> [  350.523646]  [] rpm_callback+0x24/0x80
> [  350.529604]  [] ? pci_restore_standard_config+0x40/0x40
> [  350.537212]  [] rpm_resume+0x4ad/0x740
> [  350.543161]  [] __pm_runtime_resume+0x51/0x80
> [  350.549824]  [] intel_runtime_pm_get+0x28/0x90 [i915]
> [  350.557265]  [] intel_display_power_get+0x23/0x50 [i915]
> [  350.565001]  [] intel_atomic_commit_tail+0xdfd/0x10b0 
> [i915]
> [  350.573106]  [] ? 
> drm_atomic_helper_swap_state+0x159/0x300 [drm_kms_helper]
> [  350.582659]  [] ? _raw_spin_unlock+0x31/0x50
> [  350.589205]  [] ? 
> drm_atomic_helper_swap_state+0x159/0x300 [drm_kms_helper]
> [  350.598787]  [] intel_atomic_commit+0x3b5/0x500 [i915]
> [  350.606319]  [] ? 
> drm_atomic_set_crtc_for_connector+0xcc/0x100 [drm]
> [  350.615209]  [] drm_atomic_commit+0x49/0x50 [drm]
> [  350.622242]  [] drm_atomic_helper_set_config+0x88/0xc0 
> [drm_kms_helper]
> [  350.631419]  [] drm_mode_set_config_internal+0x6c/0x120 
> [drm]
> [  350.639623]  [] drm_mode_setcrtc+0x22c/0x4d0 [drm]
> [  350.646760]  [] drm_ioctl+0x209/0x460 [drm]
> [  350.653217]  [] ? drm_mode_getcrtc+0x150/0x150 [drm]
> [  350.660536]  [] ? __lock_is_held+0x4a/0x70
> [  350.666885]  [] do_vfs_ioctl+0x93/0x6b0
> [  350.672939]  [] ? __fget+0x113/0x200
> [  350.678797]  [] ? __fget+0x5/0x200
> [  350.684361]  [] SyS_ioctl+0x44/0x80
> [  350.690030]  [] do_syscall_64+0x5b/0x120
> [  350.696184]  [] entry_SYSCALL64_slow_path+0x25/0x25
> 
> Note we also have to remember the lesson from commit 4fc788f5ee3d
> ("drm/i915: Flush delayed fence releases after reset") where we have to
> flush any changes to the fence on restore.
> 
> v2: Replace call to release user mmaps with an assertion that they have
> already been zapped.
> 
> Fixes: 49ef5294cda2 ("drm/i915: Move fence tracking from object to vma")
> Reported-by: Ville Syrjälä 
> Signed-off-by: Chris Wilson 
> Cc: Ville Syrjälä 
> Cc: Joonas Lahtinen 
> Cc: Mika Kuoppala 

Reviewed-by: Joonas Lahtinen 

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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[Intel-gfx] [REGRESSION v4.7] i915 / drm crash when undocking from DP monitors

[Vadim Lobanov]

Hi folks,

I'm seeing a repeatable crash on my HP EliteBook 840 G2/2216 when
booting it while in a docking station connected to two external
DisplayPort monitors, undocking, and then either logging out or
shutting down -- regardless of whether I've redocked it beforehand or
not. Both logout and shutdown work great if I do not undock the laptop
at all, so the badness correlates with the DP monitors going away.

This is a regression introduced somewhere in the v4.6 -> v4.7
development timeframe: 4.6.0 works, 4.7.0 fails as described, and
4.8.0 crashes earlier still when undocking.

The graphics hardware involved is:

00:02.0 VGA compatible controller: Intel Corporation HD Graphics 5500
(rev 09) (prog-if 00 [VGA controller])
Subsystem: Hewlett-Packard Company ZBook 15u G2 Mobile Workstation
Flags: bus master, fast devsel, latency 0, IRQ 49
Memory at c000 (64-bit, non-prefetchable) [size=16M]
Memory at b000 (64-bit, prefetchable) [size=256M]
I/O ports at 5000 [size=64]
[virtual] Expansion ROM at 000c [disabled] [size=128K]
Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit-
Capabilities: [d0] Power Management version 2
Capabilities: [a4] PCI Advanced Features
Kernel driver in use: i915
Kernel modules: i915

And the crash that I see is similar to this:

Oct 07 17:47:16 localhost.localdomain kernel: BUG: unable to handle
kernel paging request at 00018c70
Oct 07 17:47:16 localhost.localdomain kernel: IP: []
queued_spin_lock_slowpath+0x108/0x190
Oct 07 17:47:16 localhost.localdomain kernel: PGD 0
Oct 07 17:47:16 localhost.localdomain kernel: Oops: 0002 [#1] SMP
Oct 07 17:47:16 localhost.localdomain kernel: Modules linked in:
rfcomm ccm xt_CHECKSUM tun ipt_MASQUERADE nf_nat_masquerade_ipv4
xt_addrtype nf_conntrack_netbios_ns nf_conntrack_broadcast ip6t_REJECT
nf_reject_
Oct 07 17:47:16 localhost.localdomain kernel:  sparse_keymap ppdev
irqbypass crct10dif_pclmul crc32_pclmul ghash_clmulni_intel iwlwifi
intel_cstate intel_uncore intel_rapl_perf cfg80211 joydev uvcvideo
lpc_ich r
Oct 07 17:47:16 localhost.localdomain kernel: CPU: 2 PID: 855 Comm:
systemd-logind Not tainted 4.7.5-200.fc24.x86_64 #1
Oct 07 17:47:16 localhost.localdomain kernel: Hardware name:
Hewlett-Packard HP EliteBook 840 G2/2216, BIOS M71 Ver. 01.04
02/24/2015
Oct 07 17:47:16 localhost.localdomain kernel: task: 88043a12
ti: 880035d5 task.ti: 880035d5
Oct 07 17:47:16 localhost.localdomain kernel: RIP:
0010:[]  []
queued_spin_lock_slowpath+0x108/0x190
Oct 07 17:47:16 localhost.localdomain kernel: RSP:
0018:880035d53908  EFLAGS: 00010202
Oct 07 17:47:16 localhost.localdomain kernel: RAX: 00018c70
RBX: 880438716a50 RCX: 88044f498c40
Oct 07 17:47:16 localhost.localdomain kernel: RDX: 1b9a
RSI: 6e6f746f RDI: 880438716a54
Oct 07 17:47:16 localhost.localdomain kernel: RBP: 880035d53908
R08: 000c R09: 
Oct 07 17:47:16 localhost.localdomain kernel: R10: 880096e4e780
R11: 0898 R12: 88043ab3ec40
Oct 07 17:47:16 localhost.localdomain kernel: R13: 880438716a58
R14: 880427ebd800 R15: 8804396bd000
Oct 07 17:47:16 localhost.localdomain kernel: FS:
7f22e2cb5900() GS:88044f48()
knlGS:
Oct 07 17:47:16 localhost.localdomain kernel: CS:  0010 DS:  ES:
 CR0: 80050033
Oct 07 17:47:16 localhost.localdomain kernel: CR2: 00018c70
CR3: 00043a095000 CR4: 003406e0
Oct 07 17:47:16 localhost.localdomain kernel: DR0: 
DR1:  DR2: 
Oct 07 17:47:16 localhost.localdomain kernel: DR3: 
DR6: fffe0ff0 DR7: 0400
Oct 07 17:47:16 localhost.localdomain kernel: Stack:
Oct 07 17:47:16 localhost.localdomain kernel:  880035d53918
967ec350 880035d53940 967e9f2f
Oct 07 17:47:16 localhost.localdomain kernel:  88043ab3ec40
880438716a50 880438714800 880035d53970
Oct 07 17:47:16 localhost.localdomain kernel:  c00a155e
880427e49800 880438716800 880427ebd800
Oct 07 17:47:16 localhost.localdomain kernel: Call Trace:
Oct 07 17:47:16 localhost.localdomain kernel:  []
_raw_spin_lock+0x20/0x30
Oct 07 17:47:16 localhost.localdomain kernel:  []
__ww_mutex_lock+0x6f/0xa0
Oct 07 17:47:16 localhost.localdomain kernel:  []
drm_modeset_lock+0x4e/0xd0 [drm]
Oct 07 17:47:16 localhost.localdomain kernel:  []
drm_atomic_get_connector_state+0x34/0x1c0 [drm]
Oct 07 17:47:16 localhost.localdomain kernel:  []
__drm_atomic_helper_set_config+0x2a0/0x360 [drm_kms_helper]
Oct 07 17:47:16 localhost.localdomain kernel:  []
restore_fbdev_mode+0x22a/0x260 [drm_kms_helper]
Oct 07 17:47:16 localhost.localdomain kernel:  []
drm_fb_helper_restore_fbdev_mode_unlocked+0x34/0x80 [drm_kms_helper]
Oct 07 17:47:16 localhost.localdomain kernel:  []
drm_fb_helper_set_par+0x2d/0x50 [drm_kms_helper]
Oct 07 17:47:16 localhost.localdomain kernel:  []

[Intel-gfx] [PATCH i-g-t] lib/chipset: Properly skip on non-Intel

[Daniel Vetter]

Random drive-by I noticed while hacking on piglit.

Signed-off-by: Daniel Vetter 
---
 lib/intel_chipset.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/lib/intel_chipset.c b/lib/intel_chipset.c
index 777dfa73da80..ab35fa70c167 100644
--- a/lib/intel_chipset.c
+++ b/lib/intel_chipset.c
@@ -100,8 +100,7 @@ intel_get_pci_device(void)
pci_dev = pci_device_next(iter);
pci_iterator_destroy(iter);
}
-   if (pci_dev == NULL)
-   errx(1, "Couldn't find graphics card");
+   igt_require_f(pci_dev, "Couldn't find Intel graphics card\n");
 
error = pci_device_probe(pci_dev);
igt_fail_on_f(error != 0,
-- 
2.9.3

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Re: [Intel-gfx] [PATCH 14/42] drm/i915: Use a radixtree for random access to the object's backing storage

[Tvrtko Ursulin]

On 07/10/2016 10:46, Chris Wilson wrote:

A while ago we switched from a contiguous array of pages into an sglist,
for that was both more convenient for mapping to hardware and avoided
the requirement for a vmalloc array of pages on every object. However,
certain GEM API calls (like pwrite, pread as well as performing
relocations) do desire access to individual struct pages. A quick hack
was to introduce a cache of the last access such that finding the
following page was quick - this works so long as the caller desired
sequential access. Walking backwards, or multiple callers, still hits a
slow linear search for each page. One solution is to store each
successful lookup in a radix tree.

Signed-off-by: Chris Wilson 
---
  drivers/gpu/drm/i915/i915_drv.h |  57 
  drivers/gpu/drm/i915/i915_gem.c | 149 
  drivers/gpu/drm/i915/i915_gem_stolen.c  |   4 +-
  drivers/gpu/drm/i915/i915_gem_userptr.c |   4 +-
  4 files changed, 154 insertions(+), 60 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index bad97f1e5265..a96b446d8db4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2278,9 +2278,12 @@ struct drm_i915_gem_object {
  
  	struct sg_table *pages;

int pages_pin_count;
-   struct get_page {
-   struct scatterlist *sg;
-   int last;
+   struct i915_gem_object_page_iter {
+   struct scatterlist *sg_pos;
+   unsigned long sg_idx;
+
+   struct radix_tree_root radix;
+   struct mutex lock;
} get_page;
void *mapping;
  
@@ -3168,45 +3171,21 @@ static inline int __sg_page_count(struct scatterlist *sg)

return sg->length >> PAGE_SHIFT;
  }
  
-struct page *

-i915_gem_object_get_dirty_page(struct drm_i915_gem_object *obj, int n);
-
-static inline dma_addr_t
-i915_gem_object_get_dma_address(struct drm_i915_gem_object *obj, int n)
-{
-   if (n < obj->get_page.last) {
-   obj->get_page.sg = obj->pages->sgl;
-   obj->get_page.last = 0;
-   }
-
-   while (obj->get_page.last + __sg_page_count(obj->get_page.sg) <= n) {
-   obj->get_page.last += __sg_page_count(obj->get_page.sg++);
-   if (unlikely(sg_is_chain(obj->get_page.sg)))
-   obj->get_page.sg = sg_chain_ptr(obj->get_page.sg);
-   }
-
-   return sg_dma_address(obj->get_page.sg) + ((n - obj->get_page.last) << 
PAGE_SHIFT);
-}
-
-static inline struct page *
-i915_gem_object_get_page(struct drm_i915_gem_object *obj, int n)
-{
-   if (WARN_ON(n >= obj->base.size >> PAGE_SHIFT))
-   return NULL;
+struct scatterlist *
+i915_gem_object_get_sg(struct drm_i915_gem_object *obj,
+  unsigned long n, unsigned int *offset);
  
-	if (n < obj->get_page.last) {

-   obj->get_page.sg = obj->pages->sgl;
-   obj->get_page.last = 0;
-   }
+struct page *
+i915_gem_object_get_page(struct drm_i915_gem_object *obj,
+unsigned long n);
  
-	while (obj->get_page.last + __sg_page_count(obj->get_page.sg) <= n) {

-   obj->get_page.last += __sg_page_count(obj->get_page.sg++);
-   if (unlikely(sg_is_chain(obj->get_page.sg)))
-   obj->get_page.sg = sg_chain_ptr(obj->get_page.sg);
-   }
+struct page *
+i915_gem_object_get_dirty_page(struct drm_i915_gem_object *obj,
+  unsigned long n);
  
-	return nth_page(sg_page(obj->get_page.sg), n - obj->get_page.last);

-}
+dma_addr_t
+i915_gem_object_get_dma_address(struct drm_i915_gem_object *obj,
+   unsigned long n);
  
  static inline void i915_gem_object_pin_pages(struct drm_i915_gem_object *obj)

  {
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ada837e393a7..af7d51f16658 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2292,6 +2292,15 @@ i915_gem_object_put_pages_gtt(struct drm_i915_gem_object 
*obj)
kfree(obj->pages);
  }
  
+static void __i915_gem_object_reset_page_iter(struct drm_i915_gem_object *obj)

+{
+   struct radix_tree_iter iter;
+   void **slot;
+
+   radix_tree_for_each_slot(slot, >get_page.radix, , 0)
+   radix_tree_delete(>get_page.radix, iter.index);
+}
+
  int
  i915_gem_object_put_pages(struct drm_i915_gem_object *obj)
  {
@@ -2324,6 +2333,8 @@ i915_gem_object_put_pages(struct drm_i915_gem_object *obj)
obj->mapping = NULL;
}
  
+	__i915_gem_object_reset_page_iter(obj);

+
ops->put_pages(obj);
obj->pages = NULL;
  
@@ -2488,8 +2499,8 @@ i915_gem_object_get_pages(struct drm_i915_gem_object *obj)
  
  	list_add_tail(>global_list, _priv->mm.unbound_list);
  
-	obj->get_page.sg = obj->pages->sgl;

-   obj->get_page.last = 0;
+   

[Intel-gfx] [CI 5/5] drm/i915: Compress GPU objects in error state

[Chris Wilson]

Our error states are quickly growing, pinning kernel memory with them.
The majority of the space is taken up by the error objects. These
compress well using zlib and without decode are mostly meaningless, so
encoding them does not hinder quickly parsing the error state for
familiarity.

v2: Make the zlib dependency optional

Signed-off-by: Chris Wilson 
Reviewed-by: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/Kconfig  |  12 +++
 drivers/gpu/drm/i915/i915_drv.h   |   3 +-
 drivers/gpu/drm/i915/i915_gpu_error.c | 176 ++
 3 files changed, 169 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index 0f46a9c04c0e..92ecced1bc8f 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -57,6 +57,18 @@ config DRM_I915_CAPTURE_ERROR
 
  If in doubt, say "Y".
 
+config DRM_I915_COMPRESS_ERROR
+   bool "Compress GPU error state"
+   depends on DRM_I915_CAPTURE_ERROR
+   select ZLIB_DEFLATE
+   default y
+   help
+ This option selects ZLIB_DEFLATE if it isn't already
+ selected and causes any error state captured upon a GPU hang
+ to be compressed using zlib.
+
+ If in doubt, say "Y".
+
 config DRM_I915_USERPTR
bool "Always enable userptr support"
depends on DRM_I915
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 97203da3a08d..3d46f57eed3f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -820,9 +820,10 @@ struct drm_i915_error_state {
struct intel_instdone instdone;
 
struct drm_i915_error_object {
-   int page_count;
u64 gtt_offset;
u64 gtt_size;
+   int page_count;
+   int unused;
u32 *pages[0];
} *ringbuffer, *batchbuffer, *wa_batchbuffer, *ctx, *hws_page;
 
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index bf2498297341..6c22be28ba01 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -29,6 +29,7 @@
 
 #include 
 #include 
+#include 
 #include "i915_drv.h"
 
 #ifdef CONFIG_DRM_I915_CAPTURE_ERROR
@@ -175,6 +176,110 @@ static void i915_error_puts(struct 
drm_i915_error_state_buf *e,
 #define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__)
 #define err_puts(e, s) i915_error_puts(e, s)
 
+#ifdef CONFIG_DRM_I915_COMPRESS_ERROR
+
+static bool compress_init(struct z_stream_s *zstream)
+{
+   memset(zstream, 0, sizeof(*zstream));
+
+   zstream->workspace =
+   kmalloc(zlib_deflate_workspacesize(MAX_WBITS, MAX_MEM_LEVEL),
+   GFP_ATOMIC | __GFP_NOWARN);
+   if (!zstream->workspace)
+   return false;
+
+   if (zlib_deflateInit(zstream, Z_DEFAULT_COMPRESSION) != Z_OK) {
+   kfree(zstream->workspace);
+   return false;
+   }
+
+   return true;
+}
+
+static int compress_page(struct z_stream_s *zstream,
+void *src,
+struct drm_i915_error_object *dst)
+{
+   zstream->next_in = src;
+   zstream->avail_in = PAGE_SIZE;
+
+   do {
+   if (zstream->avail_out == 0) {
+   unsigned long page;
+
+   page = __get_free_page(GFP_ATOMIC | __GFP_NOWARN);
+   if (!page)
+   return -ENOMEM;
+
+   dst->pages[dst->page_count++] = (void *)page;
+
+   zstream->next_out = (void *)page;
+   zstream->avail_out = PAGE_SIZE;
+   }
+
+   if (zlib_deflate(zstream, Z_SYNC_FLUSH) != Z_OK)
+   return -EIO;
+   } while (zstream->avail_in);
+
+   /* Fallback to uncompressed if we increase size? */
+   if (0 && zstream->total_out > zstream->total_in)
+   return -E2BIG;
+
+   return 0;
+}
+
+static void compress_fini(struct z_stream_s *zstream,
+ struct drm_i915_error_object *dst)
+{
+   if (dst) {
+   zlib_deflate(zstream, Z_FINISH);
+   dst->unused = zstream->avail_out;
+   }
+
+   zlib_deflateEnd(zstream);
+   kfree(zstream->workspace);
+}
+
+static void err_compression_marker(struct drm_i915_error_state_buf *m)
+{
+   err_puts(m, ":");
+}
+
+#else
+
+static bool compress_init(struct z_stream_s *zstream)
+{
+   return true;
+}
+
+static int compress_page(struct z_stream_s *zstream,
+void *src,
+struct drm_i915_error_object *dst)
+{
+   unsigned long page;
+
+   page = __get_free_page(GFP_ATOMIC | __GFP_NOWARN);
+   if (!page)
+   return -ENOMEM;

[Intel-gfx] [CI 1/5] drm/i915: Allow disabling error capture

[Chris Wilson]

We currently capture the GPU state after we detect a hang. This is vital
for us to both triage and debug hangs in the wild (post-mortem
debugging). However, it comes at the cost of running some potentially
dangerous code (since it has to make very few assumption about the state
of the driver) that is quite resource intensive.

Signed-off-by: Chris Wilson 
Reviewed-by: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/Kconfig  | 10 ++
 drivers/gpu/drm/i915/i915_debugfs.c   |  6 ++
 drivers/gpu/drm/i915/i915_drv.h   | 16 
 drivers/gpu/drm/i915/i915_gpu_error.c |  7 +++
 drivers/gpu/drm/i915/i915_params.c|  9 +
 drivers/gpu/drm/i915/i915_params.h|  1 +
 drivers/gpu/drm/i915/i915_sysfs.c |  8 
 drivers/gpu/drm/i915/intel_display.c  |  4 
 drivers/gpu/drm/i915/intel_overlay.c  |  4 
 9 files changed, 65 insertions(+)

diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index 7769e469118f..10a6ac11b6a9 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -46,6 +46,16 @@ config DRM_I915_PRELIMINARY_HW_SUPPORT
 
  If in doubt, say "N".
 
+config DRM_I915_CAPTURE_ERROR
+   bool "Enable capturing GPU state following a hang"
+   depends on DRM_I915
+   default y
+   help
+ This option enables capturing the GPU state when a hang is detected.
+ This information is vital for triaging hangs and assists in debugging.
+
+ If in doubt, say "Y".
+
 config DRM_I915_USERPTR
bool "Always enable userptr support"
depends on DRM_I915
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 20689f1cd719..e4b5ba771bea 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -960,6 +960,8 @@ static int i915_hws_info(struct seq_file *m, void *data)
return 0;
 }
 
+#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
+
 static ssize_t
 i915_error_state_write(struct file *filp,
   const char __user *ubuf,
@@ -1042,6 +1044,8 @@ static const struct file_operations i915_error_state_fops 
= {
.release = i915_error_state_release,
 };
 
+#endif
+
 static int
 i915_next_seqno_get(void *data, u64 *val)
 {
@@ -5398,7 +5402,9 @@ static const struct i915_debugfs_files {
{"i915_ring_missed_irq", _ring_missed_irq_fops},
{"i915_ring_test_irq", _ring_test_irq_fops},
{"i915_gem_drop_caches", _drop_caches_fops},
+#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
{"i915_error_state", _error_state_fops},
+#endif
{"i915_next_seqno", _next_seqno_fops},
{"i915_display_crc_ctl", _display_crc_ctl_fops},
{"i915_pri_wm_latency", _pri_wm_latency_fops},
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 54d860e1c0fc..4570c4fa0287 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3544,6 +3544,8 @@ static inline void intel_display_crc_init(struct 
drm_i915_private *dev_priv) {}
 #endif
 
 /* i915_gpu_error.c */
+#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
+
 __printf(2, 3)
 void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...);
 int i915_error_state_to_str(struct drm_i915_error_state_buf *estr,
@@ -3564,6 +3566,20 @@ void i915_error_state_get(struct drm_device *dev,
 void i915_error_state_put(struct i915_error_state_file_priv *error_priv);
 void i915_destroy_error_state(struct drm_device *dev);
 
+#else
+
+static inline void i915_capture_error_state(struct drm_i915_private *dev_priv,
+   u32 engine_mask,
+   const char *error_msg)
+{
+}
+
+static inline void i915_destroy_error_state(struct drm_device *dev)
+{
+}
+
+#endif
+
 void i915_get_engine_instdone(struct drm_i915_private *dev_priv,
  enum intel_engine_id engine_id,
  struct intel_instdone *instdone);
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index b5b58692ac5a..9b395ffa3b6a 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -30,6 +30,8 @@
 #include 
 #include "i915_drv.h"
 
+#ifdef CONFIG_DRM_I915_CAPTURE_ERROR
+
 static const char *engine_str(int engine)
 {
switch (engine) {
@@ -1464,6 +1466,9 @@ void i915_capture_error_state(struct drm_i915_private 
*dev_priv,
struct drm_i915_error_state *error;
unsigned long flags;
 
+   if (!i915.error_capture)
+   return;
+
if (READ_ONCE(dev_priv->gpu_error.first_error))
return;
 
@@ -1549,6 +1554,8 @@ void i915_destroy_error_state(struct drm_device *dev)
kref_put(>ref, i915_error_state_free);
 }
 
+#endif
+
 const char *i915_cache_level_str(struct drm_i915_private *i915, int type)
 {
switch 

[Intel-gfx] [CI 3/5] drm/i915: Always use the GTT for error capture

[Chris Wilson]

Since the GTT provides universal access to any GPU page, we can use it
to reduce our plethora of read methods to just one. It also has the
important characteristic of being exactly what the GPU sees - if there
are incoherency problems, seeing the batch as executed (rather than as
trapped inside the cpu cache) is important.

Signed-off-by: Chris Wilson 
Reviewed-by: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/i915_gem_gtt.c   |  43 
 drivers/gpu/drm/i915/i915_gem_gtt.h   |   2 +
 drivers/gpu/drm/i915/i915_gpu_error.c | 120 --
 3 files changed, 74 insertions(+), 91 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 0bb4232f66bc..2d846aa39ca5 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2717,6 +2717,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
 */
struct i915_ggtt *ggtt = _priv->ggtt;
unsigned long hole_start, hole_end;
+   struct i915_hw_ppgtt *ppgtt;
struct drm_mm_node *entry;
int ret;
 
@@ -2724,6 +2725,15 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
if (ret)
return ret;
 
+   /* Reserve a mappable slot for our lockless error capture */
+   ret = drm_mm_insert_node_in_range_generic(>base.mm,
+ >error_capture,
+ 4096, 0, -1,
+ 0, ggtt->mappable_end,
+ 0, 0);
+   if (ret)
+   return ret;
+
/* Clear any non-preallocated blocks */
drm_mm_for_each_hole(entry, >base.mm, hole_start, hole_end) {
DRM_DEBUG_KMS("clearing unused GTT space: [%lx, %lx]\n",
@@ -2738,25 +2748,21 @@ int i915_gem_init_ggtt(struct drm_i915_private 
*dev_priv)
   true);
 
if (USES_PPGTT(dev_priv) && !USES_FULL_PPGTT(dev_priv)) {
-   struct i915_hw_ppgtt *ppgtt;
-
ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
-   if (!ppgtt)
-   return -ENOMEM;
+   if (!ppgtt) {
+   ret = -ENOMEM;
+   goto err;
+   }
 
ret = __hw_ppgtt_init(ppgtt, dev_priv);
-   if (ret) {
-   kfree(ppgtt);
-   return ret;
-   }
+   if (ret)
+   goto err_ppgtt;
 
-   if (ppgtt->base.allocate_va_range)
+   if (ppgtt->base.allocate_va_range) {
ret = ppgtt->base.allocate_va_range(>base, 0,
ppgtt->base.total);
-   if (ret) {
-   ppgtt->base.cleanup(>base);
-   kfree(ppgtt);
-   return ret;
+   if (ret)
+   goto err_ppgtt_cleanup;
}
 
ppgtt->base.clear_range(>base,
@@ -2770,6 +2776,14 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
}
 
return 0;
+
+err_ppgtt_cleanup:
+   ppgtt->base.cleanup(>base);
+err_ppgtt:
+   kfree(ppgtt);
+err:
+   drm_mm_remove_node(>error_capture);
+   return ret;
 }
 
 /**
@@ -2788,6 +2802,9 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private 
*dev_priv)
 
i915_gem_cleanup_stolen(_priv->drm);
 
+   if (drm_mm_node_allocated(>error_capture))
+   drm_mm_remove_node(>error_capture);
+
if (drm_mm_initialized(>base.mm)) {
intel_vgt_deballoon(dev_priv);
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h 
b/drivers/gpu/drm/i915/i915_gem_gtt.h
index ec78be2f8c77..bd93fb8f99d2 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -450,6 +450,8 @@ struct i915_ggtt {
bool do_idle_maps;
 
int mtrr;
+
+   struct drm_mm_node error_capture;
 };
 
 struct i915_hw_ppgtt {
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 69d4cffe4a32..be82eadac9bb 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -658,7 +658,7 @@ static void i915_error_object_free(struct 
drm_i915_error_object *obj)
return;
 
for (page = 0; page < obj->page_count; page++)
-   kfree(obj->pages[page]);
+   free_page((unsigned long)obj->pages[page]);
 
kfree(obj);
 }
@@ -695,98 +695,69 @@ static void i915_error_state_free(struct kref *error_ref)
kfree(error);
 }
 
+static int compress_page(void *src, struct drm_i915_error_object *dst)
+{
+   unsigned long page;
+
+   page = __get_free_page(GFP_ATOMIC | __GFP_NOWARN);
+ 

[Intel-gfx] [CI 2/5] drm/i915: Stop the machine whilst capturing the GPU crash dump

[Chris Wilson]

The error state is purposefully racy as we expect it to be called at any
time and so have avoided any locking whilst capturing the crash dump.
However, with multi-engine GPUs and multiple CPUs, those races can
manifest into OOPSes as we attempt to chase dangling pointers freed on
other CPUs. Under discussion are lots of ways to slow down normal
operation in order to protect the post-mortem error capture, but what it
we take the opposite approach and freeze the machine whilst the error
capture runs (note the GPU may still running, but as long as we don't
process any of the results the driver's bookkeeping will be static).

Note that by of itself, this is not a complete fix. It also depends on
the compiler barriers in list_add/list_del to prevent traversing the
lists into the void. We also depend that we only require state from
carefully controlled sources - i.e. all the state we require for
post-mortem debugging should be reachable from the request itself so
that we only have to worry about retrieving the request carefully. Once
we have the request, we know that all pointers from it are intact.

v2: Avoid drm_clflush_pages() inside stop_machine() as it may use
stop_machine() itself for its wbinvd fallback.

Signed-off-by: Chris Wilson 
Acked-by: Daniel Vetter 
---
 drivers/gpu/drm/i915/Kconfig  |  1 +
 drivers/gpu/drm/i915/i915_drv.h   |  2 ++
 drivers/gpu/drm/i915/i915_gpu_error.c | 46 +--
 3 files changed, 31 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index 10a6ac11b6a9..0f46a9c04c0e 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -4,6 +4,7 @@ config DRM_I915
depends on X86 && PCI
select INTEL_GTT
select INTERVAL_TREE
+   select STOP_MACHINE
# we need shmfs for the swappable backing store, and in particular
# the shmem_readpage() which depends upon tmpfs
select SHMEM
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4570c4fa0287..97203da3a08d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -746,6 +746,8 @@ struct drm_i915_error_state {
struct kref ref;
struct timeval time;
 
+   struct drm_i915_private *i915;
+
char error_msg[128];
bool simulated;
int iommu;
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 9b395ffa3b6a..69d4cffe4a32 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -28,6 +28,7 @@
  */
 
 #include 
+#include 
 #include "i915_drv.h"
 
 #ifdef CONFIG_DRM_I915_CAPTURE_ERROR
@@ -746,14 +747,12 @@ i915_error_object_create(struct drm_i915_private 
*dev_priv,
 
dst->page_count = num_pages;
while (num_pages--) {
-   unsigned long flags;
void *d;
 
d = kmalloc(PAGE_SIZE, GFP_ATOMIC);
if (d == NULL)
goto unwind;
 
-   local_irq_save(flags);
if (use_ggtt) {
void __iomem *s;
 
@@ -772,15 +771,10 @@ i915_error_object_create(struct drm_i915_private 
*dev_priv,
 
page = i915_gem_object_get_page(src, i);
 
-   drm_clflush_pages(, 1);
-
s = kmap_atomic(page);
memcpy(d, s, PAGE_SIZE);
kunmap_atomic(s);
-
-   drm_clflush_pages(, 1);
}
-   local_irq_restore(flags);
 
dst->pages[i++] = d;
reloc_offset += PAGE_SIZE;
@@ -1449,6 +1443,31 @@ static void i915_capture_gen_state(struct 
drm_i915_private *dev_priv,
   sizeof(error->device_info));
 }
 
+static int capture(void *data)
+{
+   struct drm_i915_error_state *error = data;
+
+   /* Ensure that what we readback from memory matches what the GPU sees */
+   wbinvd();
+
+   i915_capture_gen_state(error->i915, error);
+   i915_capture_reg_state(error->i915, error);
+   i915_gem_record_fences(error->i915, error);
+   i915_gem_record_rings(error->i915, error);
+   i915_capture_active_buffers(error->i915, error);
+   i915_capture_pinned_buffers(error->i915, error);
+
+   do_gettimeofday(>time);
+
+   error->overlay = intel_overlay_capture_error_state(error->i915);
+   error->display = intel_display_capture_error_state(error->i915);
+
+   /* And make sure we don't leave trash in the CPU cache */
+   wbinvd();
+
+   return 0;
+}
+
 /**
  * i915_capture_error_state - capture an error record for later analysis
  * @dev: drm device
@@ -1480,18 +1499,9 @@ void i915_capture_error_state(struct drm_i915_private 
*dev_priv,
}
 
kref_init(>ref);
+   error->i915 = dev_priv;
 
-   

Re: [Intel-gfx] [PATCH] drm/i915: Convert open-coded use of vma_pages()

[Matthew Auld]

On 11 October 2016 at 10:06, Chris Wilson  wrote:
> If we want to know how many pages a VMA spans, we can use vma_pages() to
> find out. We have one such invocation inside our faulthandler, so
> convert it. (We have two other that want the size in bytes rather than
> pages, food for future thought.)
>
> Signed-off-by: Chris Wilson 
Reviewed-by: Matthew Auld 
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[Intel-gfx] [CI 4/5] drm/i915: Consolidate error object printing

[Chris Wilson]

Leave all the pretty printing to userspace and simplify the error
capture to only have a single common object printer. It makes the kernel
code more compact, and the refactoring allows us to apply more complex
transformations like compressing the output.

Signed-off-by: Chris Wilson 
Reviewed-by: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/i915_gpu_error.c | 100 +-
 1 file changed, 25 insertions(+), 75 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index be82eadac9bb..bf2498297341 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -343,10 +343,22 @@ void i915_error_printf(struct drm_i915_error_state_buf 
*e, const char *f, ...)
 }
 
 static void print_error_obj(struct drm_i915_error_state_buf *m,
+   struct intel_engine_cs *engine,
+   const char *name,
struct drm_i915_error_object *obj)
 {
int page, offset, elt;
 
+   if (!obj)
+   return;
+
+   if (name) {
+   err_printf(m, "%s --- %s = 0x%08x %08x\n",
+  engine ? engine->name : "global", name,
+  upper_32_bits(obj->gtt_offset),
+  lower_32_bits(obj->gtt_offset));
+   }
+
for (page = offset = 0; page < obj->page_count; page++) {
for (elt = 0; elt < PAGE_SIZE/4; elt++) {
err_printf(m, "%08x :  %08x\n", offset,
@@ -372,8 +384,8 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf 
*m,
struct pci_dev *pdev = dev_priv->drm.pdev;
struct drm_i915_error_state *error = error_priv->error;
struct drm_i915_error_object *obj;
-   int i, j, offset, elt;
int max_hangcheck_score;
+   int i, j;
 
if (!error) {
err_printf(m, "no error state collected\n");
@@ -493,15 +505,7 @@ int i915_error_state_to_str(struct 
drm_i915_error_state_buf *m,
err_printf(m, " --- gtt_offset = 0x%08x %08x\n",
   upper_32_bits(obj->gtt_offset),
   lower_32_bits(obj->gtt_offset));
-   print_error_obj(m, obj);
-   }
-
-   obj = ee->wa_batchbuffer;
-   if (obj) {
-   err_printf(m, "%s (w/a) --- gtt_offset = 0x%08x\n",
-  dev_priv->engine[i].name,
-  lower_32_bits(obj->gtt_offset));
-   print_error_obj(m, obj);
+   print_error_obj(m, _priv->engine[i], NULL, obj);
}
 
if (ee->num_requests) {
@@ -533,77 +537,23 @@ int i915_error_state_to_str(struct 
drm_i915_error_state_buf *m,
}
}
 
-   if ((obj = ee->ringbuffer)) {
-   err_printf(m, "%s --- ringbuffer = 0x%08x\n",
-  dev_priv->engine[i].name,
-  lower_32_bits(obj->gtt_offset));
-   print_error_obj(m, obj);
-   }
+   print_error_obj(m, _priv->engine[i],
+   "ringbuffer", ee->ringbuffer);
 
-   if ((obj = ee->hws_page)) {
-   u64 hws_offset = obj->gtt_offset;
-   u32 *hws_page = >pages[0][0];
+   print_error_obj(m, _priv->engine[i],
+   "HW Status", ee->hws_page);
 
-   if (i915.enable_execlists) {
-   hws_offset += LRC_PPHWSP_PN * PAGE_SIZE;
-   hws_page = >pages[LRC_PPHWSP_PN][0];
-   }
-   err_printf(m, "%s --- HW Status = 0x%08llx\n",
-  dev_priv->engine[i].name, hws_offset);
-   offset = 0;
-   for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
-   err_printf(m, "[%04x] %08x %08x %08x %08x\n",
-  offset,
-  hws_page[elt],
-  hws_page[elt+1],
-  hws_page[elt+2],
-  hws_page[elt+3]);
-   offset += 16;
-   }
-   }
+   print_error_obj(m, _priv->engine[i],
+   "HW context", ee->ctx);
 
-   obj = ee->wa_ctx;
-   if (obj) {
-   u64 wa_ctx_offset = obj->gtt_offset;
-   u32 *wa_ctx_page = >pages[0][0];
-   struct intel_engine_cs *engine = _priv->engine[RCS];
-  

Re: [Intel-gfx] [RFC PATCH v2 4/8] drm/i915: Add support for enabling/disabling hdmi audio interrupts

[Ville Syrjälä]

On Sat, Oct 01, 2016 at 05:52:38AM +0530, Jerome Anand wrote:
> API definitions for enabling/disabling hdmi audio interrupts in
> different hdmi pipes are implemented.
> 
> Signed-off-by: Jerome Anand 
> ---
>  drivers/gpu/drm/i915/i915_irq.c  | 69 
> 
>  drivers/gpu/drm/i915/intel_drv.h |  2 ++
>  2 files changed, 71 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index d8f515f..1e3663f 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2867,6 +2867,67 @@ static void gen8_disable_vblank(struct drm_device 
> *dev, unsigned int pipe)
>   spin_unlock_irqrestore(_priv->irq_lock, irqflags);
>  }
>  
> +/* Added for HDMI Audio */
> +int i915_enable_hdmi_audio_int(struct drm_i915_private *dev_priv)
> +{
> + unsigned long irqflags;
> + u32 imr, int_bit;
> + int pipe = -1;
> +
> + spin_lock_irqsave(_priv->irq_lock, irqflags);
> +
> + imr = I915_READ(VLV_IMR);
> +
> + if (IS_CHERRYVIEW(_priv->drm)) {
> + pipe = PIPE_C;
> + int_bit = (pipe ? (I915_LPE_PIPE_B_INTERRUPT >>
> + ((pipe - 1) * 9)) :
> + I915_LPE_PIPE_A_INTERRUPT);

Either parametrize the I915_LPE_PIPE_INTERRUPT macro, or just have eg. a
switch here.

But the bigger issue here is the mess with selecting the right bit. I
assume it should either depend on the pipe or port. I can't figure out
what is going on here.

And actually I don't understand why we even need this function. The
irqchip should take care to unmask all the interrupts when the audio
device does its request_irq.

> + imr &= ~int_bit;
> + } else {
> + /* Audio is on Stream A but uses HDMI PIPE B */
> + pipe = PIPE_B;
> + imr &= ~I915_LPE_PIPE_B_INTERRUPT;
> + }
> +
> + I915_WRITE(VLV_IMR, imr);
> + I915_WRITE(VLV_IER, ~imr);
> + POSTING_READ(VLV_IER);
> + spin_unlock_irqrestore(_priv->irq_lock, irqflags);
> +
> + return 0;
> +}
> +
> +/* Added for HDMI Audio */
> +int i915_disable_hdmi_audio_int(struct drm_i915_private *dev_priv)
> +{
> + unsigned long irqflags;
> + u32 imr, int_bit;
> + int pipe = -1;
> +
> + spin_lock_irqsave(_priv->irq_lock, irqflags);
> + imr = I915_READ(VLV_IMR);
> +
> + if (IS_CHERRYVIEW(_priv->drm)) {
> + pipe = PIPE_C;
> + int_bit = (pipe ? (I915_LPE_PIPE_B_INTERRUPT >>
> + ((pipe - 1) * 9)) :
> + I915_LPE_PIPE_A_INTERRUPT);
> + imr |= int_bit;
> + } else {
> + pipe = PIPE_B;
> + imr |= I915_LPE_PIPE_B_INTERRUPT;
> + }
> +
> + I915_WRITE(VLV_IER, ~imr);
> + I915_WRITE(VLV_IMR, imr);
> + POSTING_READ(VLV_IMR);
> +
> + spin_unlock_irqrestore(_priv->irq_lock, irqflags);
> +
> + return 0;
> +}
> +
>  static bool
>  ipehr_is_semaphore_wait(struct intel_engine_cs *engine, u32 ipehr)
>  {
> @@ -3364,6 +3425,14 @@ static void vlv_display_irq_postinstall(struct 
> drm_i915_private *dev_priv)
>  
>   WARN_ON(dev_priv->irq_mask != ~0);
>  
> + if (IS_LPE_AUDIO_ENABLED(dev_priv)) {
> + u32 val = (I915_LPE_PIPE_A_INTERRUPT |
> + I915_LPE_PIPE_B_INTERRUPT |
> + I915_LPE_PIPE_C_INTERRUPT);

'val' seems like a rather pointless local variable.

> +
> + enable_mask |= val;
> + }
> +
>   dev_priv->irq_mask = ~enable_mask;
>  
>   GEN5_IRQ_INIT(VLV_, dev_priv->irq_mask, enable_mask);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> b/drivers/gpu/drm/i915/intel_drv.h
> index 30e3f49..e6504ea 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1116,6 +1116,8 @@ void gen6_disable_rps_interrupts(struct 
> drm_i915_private *dev_priv);
>  u32 gen6_sanitize_rps_pm_mask(struct drm_i915_private *dev_priv, u32 mask);
>  void intel_runtime_pm_disable_interrupts(struct drm_i915_private *dev_priv);
>  void intel_runtime_pm_enable_interrupts(struct drm_i915_private *dev_priv);
> +int i915_enable_hdmi_audio_int(struct drm_i915_private *dev_priv);
> +int i915_disable_hdmi_audio_int(struct drm_i915_private *dev_priv);
>  static inline bool intel_irqs_enabled(struct drm_i915_private *dev_priv)
>  {
>   /*
> -- 
> 2.9.3

-- 
Ville Syrjälä
Intel OTC
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Re: [Intel-gfx] [RFC PATCH v2 1/8] drm/i915: setup bridge for HDMI LPE audio driver

[Ville Syrjälä]

On Sat, Oct 01, 2016 at 05:52:35AM +0530, Jerome Anand wrote:
> Enable support for HDMI LPE audio mode on Baytrail and
> Cherrytrail when HDaudio controller is not detected
> 
> Setup minimum required resources during i915_driver_load:
> 1. Create a platform device to share MMIO/IRQ resources
> 2. Make the platform device child of i915 device for runtime PM.
> 3. Create IRQ chip to forward HDMI LPE audio irqs.
> 
> HDMI LPE audio driver (a standalone sound driver) probes the
> LPE audio device and creates a new sound card.
> 
> Signed-off-by: Pierre-Louis Bossart 
> Signed-off-by: Jerome Anand 
> ---
>  drivers/gpu/drm/i915/Makefile  |   3 +
>  drivers/gpu/drm/i915/i915_drv.c|  13 +-
>  drivers/gpu/drm/i915/i915_drv.h|  19 ++
>  drivers/gpu/drm/i915/i915_irq.c|  14 ++
>  drivers/gpu/drm/i915/i915_reg.h|   3 +
>  drivers/gpu/drm/i915/intel_lpe_audio.c | 357 
> +
>  include/drm/intel_lpe_audio.h  |  45 +
>  7 files changed, 452 insertions(+), 2 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/intel_lpe_audio.c
>  create mode 100644 include/drm/intel_lpe_audio.h
> 
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index e6fe004..11f9741 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -115,6 +115,9 @@ i915-y += intel_gvt.o
>  include $(src)/gvt/Makefile
>  endif
>  
> +# LPE Audio for VLV and CHT
> +i915-y += intel_lpe_audio.o
> +
>  obj-$(CONFIG_DRM_I915) += i915.o
>  
>  CFLAGS_i915_trace_points.o := -I$(src)
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 31b2b63..ab1e4768 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1141,7 +1141,13 @@ static void i915_driver_register(struct 
> drm_i915_private *dev_priv)
>   if (IS_GEN5(dev_priv))
>   intel_gpu_ips_init(dev_priv);
>  
> - i915_audio_component_init(dev_priv);
> + if (intel_lpe_audio_detect(dev_priv)) {
> + if (intel_lpe_audio_setup(dev_priv) < 0)
> + DRM_ERROR("failed to setup LPE Audio bridge\n");
> + }

I'd move all that into the lpe audio code. No need to have anything here
but a single function call IMO.

> +
> + if (!IS_LPE_AUDIO_ENABLED(dev_priv))

I don't like that too much. I think I would just make
that HAS_LPE_AUDIO(). The current IS_VLV||IS_CHV check can just be
inlined into the init function.

> + i915_audio_component_init(dev_priv);
>  
>   /*
>* Some ports require correctly set-up hpd registers for detection to
> @@ -1159,7 +1165,10 @@ static void i915_driver_register(struct 
> drm_i915_private *dev_priv)
>   */
>  static void i915_driver_unregister(struct drm_i915_private *dev_priv)
>  {
> - i915_audio_component_cleanup(dev_priv);
> + if (IS_LPE_AUDIO_ENABLED(dev_priv))
> + intel_lpe_audio_teardown(dev_priv);
> + else
> + i915_audio_component_cleanup(dev_priv);
>  
>   intel_gpu_ips_teardown();
>   acpi_video_unregister();
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 91ff3d7..399a8ee 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2087,6 +2087,12 @@ struct drm_i915_private {
>   /* Used to save the pipe-to-encoder mapping for audio */
>   struct intel_encoder *av_enc_map[I915_MAX_PIPES];
>  
> + /* necessary resource sharing with HDMI LPE audio driver. */
> + struct {
> + struct platform_device *platdev;
> + int irq;
> + } lpe_audio;
> +
>   /*
>* NOTE: This is the dri1/ums dungeon, don't add stuff here. Your patch
>* will be rejected. Instead look for a better place.
> @@ -2827,6 +2833,13 @@ struct drm_i915_cmd_table {
>  
>  #define HAS_POOLED_EU(dev)   (INTEL_INFO(dev)->has_pooled_eu)
>  
> +#define HAS_LPE_AUDIO(dev)   (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
> +#define IS_LPE_AUDIO_ENABLED(dev_priv) \
> + (__I915__(dev_priv)->lpe_audio.platdev != NULL)
> +#define IS_LPE_AUDIO_IRQ_VALID(dev_priv) \
> + (__I915__(dev_priv)->lpe_audio.irq >= 0)

Seems useless. We should just not register the lpe audio thing if we
have no irq.

> +
> +
>  #define INTEL_PCH_DEVICE_ID_MASK 0xff00
>  #define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00
>  #define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00
> @@ -3579,6 +3592,12 @@ extern int i915_restore_state(struct drm_device *dev);
>  void i915_setup_sysfs(struct drm_i915_private *dev_priv);
>  void i915_teardown_sysfs(struct drm_i915_private *dev_priv);
>  
> +/* i915_lpe_audio.c */
> +int  intel_lpe_audio_setup(struct drm_i915_private *dev_priv);
> +void intel_lpe_audio_teardown(struct drm_i915_private *dev_priv);
> +void 

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [CI,1/2] drm/i915: Remove self-harming shrink_all on get_pages_gtt fail

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/2] drm/i915: Remove self-harming shrink_all 
on get_pages_gtt fail
URL   : https://patchwork.freedesktop.org/series/13571/
State : warning

== Summary ==

Series 13571v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/13571/revisions/1/mbox/

Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-c:
pass   -> DMESG-WARN (fi-skl-6770hq)
Test vgem_basic:
Subgroup unload:
skip   -> PASS   (fi-skl-6700hq)
pass   -> SKIP   (fi-ilk-650)
pass   -> SKIP   (fi-byt-n2820)
skip   -> PASS   (fi-bdw-5557u)
skip   -> PASS   (fi-ivb-3520m)

fi-bdw-5557u total:248  pass:232  dwarn:0   dfail:0   fail:0   skip:16 
fi-bsw-n3050 total:248  pass:204  dwarn:0   dfail:0   fail:0   skip:44 
fi-bxt-t5700 total:248  pass:217  dwarn:0   dfail:0   fail:0   skip:31 
fi-byt-j1900 total:248  pass:214  dwarn:1   dfail:0   fail:1   skip:32 
fi-byt-n2820 total:248  pass:210  dwarn:0   dfail:0   fail:1   skip:37 
fi-hsw-4770  total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-hsw-4770r total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-ilk-650   total:248  pass:184  dwarn:0   dfail:0   fail:2   skip:62 
fi-ivb-3520m total:248  pass:222  dwarn:0   dfail:0   fail:0   skip:26 
fi-ivb-3770  total:248  pass:221  dwarn:0   dfail:0   fail:0   skip:27 
fi-kbl-7200u total:248  pass:222  dwarn:0   dfail:0   fail:0   skip:26 
fi-skl-6260u total:248  pass:232  dwarn:0   dfail:0   fail:0   skip:16 
fi-skl-6700hqtotal:248  pass:225  dwarn:0   dfail:0   fail:0   skip:23 
fi-skl-6700k total:248  pass:221  dwarn:1   dfail:0   fail:0   skip:26 
fi-skl-6770hqtotal:248  pass:230  dwarn:2   dfail:0   fail:1   skip:15 
fi-snb-2520m total:248  pass:211  dwarn:0   dfail:0   fail:0   skip:37 
fi-snb-2600  total:248  pass:209  dwarn:0   dfail:0   fail:0   skip:39 

Results at /archive/results/CI_IGT_test/Patchwork_2669/

e37a15c8d775e79dddc8345a0f6afdcfe1f607d9 drm-intel-nightly: 
2016y-10m-10d-14h-33m-29s UTC integration manifest
1ee23d7 drm/i915: Allow compaction upto SWIOTLB max segment size
b945519 drm/i915: Remove self-harming shrink_all on get_pages_gtt fail

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[Intel-gfx] [PATCH] drm/i915: Convert open-coded use of vma_pages()

[Chris Wilson]

If we want to know how many pages a VMA spans, we can use vma_pages() to
find out. We have one such invocation inside our faulthandler, so
convert it. (We have two other that want the size in bytes rather than
pages, food for future thought.)

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/i915_gem.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 84f4953c7408..7a210c3a6d10 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1794,8 +1794,7 @@ int i915_gem_fault(struct vm_area_struct *area, struct 
vm_fault *vmf)
view.params.partial.offset = rounddown(page_offset, chunk_size);
view.params.partial.size =
min_t(unsigned int, chunk_size,
- (area->vm_end - area->vm_start) / PAGE_SIZE -
- view.params.partial.offset);
+ vma_pages(area) - view.params.partial.offset);
 
/* If the partial covers the entire object, just create a
 * normal VMA.
-- 
2.9.3

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[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [CI,1/2] drm/i915: Remove self-harming shrink_all on get_pages_gtt fail

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/2] drm/i915: Remove self-harming shrink_all 
on get_pages_gtt fail
URL   : https://patchwork.freedesktop.org/series/13571/
State : warning

== Summary ==

Series 13571v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/13571/revisions/1/mbox/

Test kms_busy:
Subgroup basic-flip-default-a:
skip   -> PASS   (fi-ivb-3770)
Subgroup basic-flip-default-b:
skip   -> PASS   (fi-ivb-3770)
Subgroup basic-flip-default-c:
skip   -> PASS   (fi-ivb-3770)
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
skip   -> PASS   (fi-ivb-3770)
Subgroup basic-busy-flip-before-cursor-varying-size:
skip   -> PASS   (fi-ivb-3770)
Subgroup basic-flip-after-cursor-legacy:
skip   -> PASS   (fi-ivb-3770)
Subgroup basic-flip-after-cursor-varying-size:
skip   -> PASS   (fi-ivb-3770)
Subgroup basic-flip-before-cursor-legacy:
skip   -> PASS   (fi-ivb-3770)
Subgroup basic-flip-before-cursor-varying-size:
skip   -> PASS   (fi-ivb-3770)
Test kms_frontbuffer_tracking:
Subgroup basic:
skip   -> PASS   (fi-ivb-3770)
Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-c:
pass   -> DMESG-WARN (fi-skl-6770hq)
Subgroup suspend-read-crc-pipe-a:
skip   -> PASS   (fi-ivb-3770)
Subgroup suspend-read-crc-pipe-b:
skip   -> PASS   (fi-ivb-3770)
Subgroup suspend-read-crc-pipe-c:
skip   -> PASS   (fi-ivb-3770)
Test prime_vgem:
Subgroup basic-fence-flip:
skip   -> PASS   (fi-ivb-3770)
Test vgem_basic:
Subgroup unload:
skip   -> PASS   (fi-ivb-3520m)
skip   -> PASS   (fi-bdw-5557u)
pass   -> SKIP   (fi-ilk-650)
pass   -> SKIP   (fi-byt-n2820)
skip   -> PASS   (fi-skl-6700hq)

fi-bdw-5557u total:248  pass:232  dwarn:0   dfail:0   fail:0   skip:16 
fi-bsw-n3050 total:248  pass:204  dwarn:0   dfail:0   fail:0   skip:44 
fi-bxt-t5700 total:248  pass:217  dwarn:0   dfail:0   fail:0   skip:31 
fi-byt-j1900 total:248  pass:214  dwarn:1   dfail:0   fail:1   skip:32 
fi-byt-n2820 total:248  pass:210  dwarn:0   dfail:0   fail:1   skip:37 
fi-hsw-4770  total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-hsw-4770r total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-ilk-650   total:248  pass:184  dwarn:0   dfail:0   fail:2   skip:62 
fi-ivb-3520m total:248  pass:222  dwarn:0   dfail:0   fail:0   skip:26 
fi-ivb-3770  total:248  pass:221  dwarn:0   dfail:0   fail:0   skip:27 
fi-kbl-7200u total:248  pass:222  dwarn:0   dfail:0   fail:0   skip:26 
fi-skl-6260u total:248  pass:232  dwarn:0   dfail:0   fail:0   skip:16 
fi-skl-6700hqtotal:248  pass:225  dwarn:0   dfail:0   fail:0   skip:23 
fi-skl-6700k total:248  pass:221  dwarn:1   dfail:0   fail:0   skip:26 
fi-skl-6770hqtotal:248  pass:230  dwarn:2   dfail:0   fail:1   skip:15 
fi-snb-2520m total:248  pass:211  dwarn:0   dfail:0   fail:0   skip:37 
fi-snb-2600  total:248  pass:209  dwarn:0   dfail:0   fail:0   skip:39 

Results at /archive/results/CI_IGT_test/Patchwork_2669/

e37a15c8d775e79dddc8345a0f6afdcfe1f607d9 drm-intel-nightly: 
2016y-10m-10d-14h-33m-29s UTC integration manifest
1ee23d7 drm/i915: Allow compaction upto SWIOTLB max segment size
b945519 drm/i915: Remove self-harming shrink_all on get_pages_gtt fail

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[Intel-gfx] [maintainer-tools PATCH 6/6] dim: add command to check for dim updates

[Jani Nikula]

Add a command to check if the user is running an up-to-date version of
dim.

Signed-off-by: Jani Nikula 
---
 dim | 21 +
 dim.rst |  4 
 2 files changed, 25 insertions(+)

diff --git a/dim b/dim
index bef7bb6c401b..5fb3a0fee7ff 100755
--- a/dim
+++ b/dim
@@ -179,6 +179,27 @@ if [ "$subcommand" != "setup" -a "$subcommand" != "help" 
-a "$subcommand" != "us
xargs -n 1 echo | grep '^origin' | sed -e 's/^origin\///'`
 fi
 
+function dim_uptodate
+{
+   local using="${BASH_SOURCE[0]}"
+
+   if [[ ! -e "$using" ]]; then
+   echo "$dim: could not figure out the version being used 
($using)." >&2
+   exit 1
+   fi
+
+   if [[ ! -e "$DIM_PREFIX/maintainer-tools/.git" ]]; then
+   echo "$dim: could not find the upstream repo for $dim." >&2
+   exit 1
+   fi
+
+   if ! git --git-dir=$DIM_PREFIX/maintainer-tools/.git show 
origin/maintainer-tools:dim |\
+   diff "$using" - >& /dev/null; then
+   echo "$dim: not running upstream version of the script." >&2
+   exit 1
+   fi
+}
+
 # get message id from file
 # $1 = file
 message_get_id ()
diff --git a/dim.rst b/dim.rst
index 7244052dea03..85de95796611 100644
--- a/dim.rst
+++ b/dim.rst
@@ -317,6 +317,10 @@ list-upstreams
 List of all upstreams commonly used for pull requests. Useful for 
autocompletion
 scripts.
 
+uptodate
+
+Try to check if you're running an up-to-date version of **dim**.
+
 help
 
 Show this help. Install **rst2man(1)** for best results.
-- 
2.1.4

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[Intel-gfx] [maintainer-tools PATCH 1/6] dim: refer to the script itself by basename without path

[Jani Nikula]

Add $dim for the basename of the script and use it.

Signed-off-by: Jani Nikula 
---
 dim | 24 +---
 1 file changed, 13 insertions(+), 11 deletions(-)

diff --git a/dim b/dim
index 126d79aea624..5b105743cd65 100755
--- a/dim
+++ b/dim
@@ -87,6 +87,8 @@ 
DIM_TEMPLATE_SIGNATURE=${DIM_TEMPLATE_SIGNATURE:-$HOME/.dim.template.signature}
 # Internal configuration.
 #
 
+dim=$(basename $0)
+
 today=`date +%Y-%m-%d`
 
 drm_intel_ssh=ssh://git.freedesktop.org/git/drm-intel
@@ -140,7 +142,7 @@ while getopts hdfi opt; do
HELP=1
;;
*)
-   echo "See '$0 help' for more information." >&2
+   echo "See '$dim help' for more information." >&2
exit
esac
 done
@@ -373,7 +375,7 @@ function dim_nightly_forget
 function dim_push_branch
 {
if [[ "x$1" = "x" ]]; then
-   echo "usage: $0 $subcommand branch"
+   echo "usage: $dim $subcommand branch"
exit 1
fi
 
@@ -463,7 +465,7 @@ function dim_apply_next_fixes
 function dim_cherry_pick
 {
if [[ "x$1" = "x" ]]; then
-   echo "usage: $0 $subcommand commit-ish"
+   echo "usage: $dim $subcommand commit-ish"
exit 1
fi
sha=`git rev-parse $1`
@@ -583,7 +585,7 @@ function dim_magic_patch
 function dim_create_branch
 {
if [[ "x$1" = "x" ]]; then
-   echo "usage: $0 $subcommand branch [commit-ish]"
+   echo "usage: $dim $subcommand branch [commit-ish]"
exit 1
fi
branch=$1
@@ -607,7 +609,7 @@ function dim_create_branch
 function dim_remove_branch
 {
if [[ "x$1" = "x" ]]; then
-   echo "usage: $0 $subcommand branch"
+   echo "usage: $dim $subcommand branch"
exit 1
fi
branch=$1
@@ -650,7 +652,7 @@ dim_alias_co=checkout
 function dim_checkout
 {
if [[ "x$1" = "x" ]]; then
-   echo "usage: $0 $subcommand branch"
+   echo "usage: $dim $subcommand branch"
exit 1
fi
 
@@ -791,7 +793,7 @@ function dim_create_workdir
local branches
 
if [[ "x$1" = "x" ]]; then
-   echo "usage: $0 $subcommand branch|all"
+   echo "usage: $dim $subcommand branch|all"
exit 1
elif [[ "$1" = "all" ]] ; then
branches=$dim_branches
@@ -923,7 +925,7 @@ function dim_tag_next
 function dim_pull_request
 {
if [[ "x$1" = "x" || "x$2" = "x" ]]; then
-   echo "usage: $0 $subcommand branch upstream"
+   echo "usage: $dim $subcommand branch upstream"
exit 1
fi
 
@@ -1236,12 +1238,12 @@ function dim_help
 
 function dim_usage
 {
-   echo "usage: $0 [OPTIONS] SUBCOMMAND [ARGUMENTS]"
+   echo "usage: $dim [OPTIONS] SUBCOMMAND [ARGUMENTS]"
echo
echo "The available subcommands are:"
dim_list_commands | sed 's/^/\t/'
echo
-   echo "See '$0 help' for more information."
+   echo "See '$dim help' for more information."
 }
 
 # dim subcommand aliases
@@ -1255,6 +1257,6 @@ subcmd_func=dim_${subcmd//-/_}
 if declare -f $subcmd_func >/dev/null; then
$subcmd_func "$@"
 else
-   echo "$0: '$subcommand' is not a dim command." >&2
+   echo "$dim: '$subcommand' is not a dim command." >&2
dim_usage
 fi
-- 
2.1.4

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[Intel-gfx] [maintainer-tools PATCH 4/6] dim: add DIM_MAKE_OPTIONS configuration

[Jani Nikula]

Defaults to -j20.

Signed-off-by: Jani Nikula 
---
 dim | 7 +--
 dim.rst | 4 
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/dim b/dim
index 76da7e347a6e..e3ef4365e85f 100755
--- a/dim
+++ b/dim
@@ -74,6 +74,9 @@ DIM_DRM_UPSTREAM_REMOTE=${DIM_DRM_UPSTREAM_REMOTE:-airlied}
 # usage: $DIM_MUA [-s subject] [-i file] [-c cc-addr] to-addr [...]
 DIM_MUA=${DIM_MUA:-mutt}
 
+# make options (not used for C=1)
+DIM_MAKE_OPTIONS=${DIM_MAKE_OPTIONS:--j20}
+
 # command to run after dim apply
 DIM_POST_APPLY_ACTION=${DIM_POST_APPLY_ACTION:-}
 
@@ -539,7 +542,7 @@ function dim_cherry_pick_next_fixes
 dim_alias_ar=apply-resolved
 function dim_apply_resolved
 {
-   make -j 20 && git add -u && git am --resolved
+   make $DIM_MAKE_OPTIONS && git add -u && git am --resolved
checkpatch_commit HEAD
git commit --amend &
 }
@@ -549,7 +552,7 @@ function dim_magic_rebase_resolve
 {
git diff HEAD | patch -p1 -R
cat .git/rebase-merge/patch | dim mp
-   make -j 20
+   make $DIM_MAKE_OPTIONS
git add -u
git rebase --continue
 }
diff --git a/dim.rst b/dim.rst
index 0b436f212539..58e222a7d590 100644
--- a/dim.rst
+++ b/dim.rst
@@ -348,6 +348,10 @@ DIM_MUA
 Mail user agent. Must support the following subset of **mutt(1)** command line
 options: \$DIM_MUA [-s subject] [-i file] [-c cc-addr] to-addr [...]
 
+DIM_MAKE_OPTIONS
+
+Additional options to pass to **make(1)**. Defaults to "-j20".
+
 DIM_TEMPLATE_HELLO
 --
 Path to a file containing a greeting template for pull request mails.
-- 
2.1.4

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[Intel-gfx] [maintainer-tools PATCH 2/6] dim: columnize usage output if column(1) is available

[Jani Nikula]

The usage has become a bit unwieldy with the command list.

Signed-off-by: Jani Nikula 
---
 dim | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/dim b/dim
index 5b105743cd65..79245550b6b2 100755
--- a/dim
+++ b/dim
@@ -1241,7 +1241,11 @@ function dim_usage
echo "usage: $dim [OPTIONS] SUBCOMMAND [ARGUMENTS]"
echo
echo "The available subcommands are:"
-   dim_list_commands | sed 's/^/\t/'
+   if hash column 2>/dev/null; then
+   dim_list_commands | column -c 72 | sed 's/^/\t/'
+   else
+   dim_list_commands | sed 's/^/\t/'
+   fi
echo
echo "See '$dim help' for more information."
 }
-- 
2.1.4

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[Intel-gfx] [maintainer-tools PATCH 3/6] dim: clean up the rm's in dim checker

[Jani Nikula]

The -f option does what the doctor orders.

Signed-off-by: Jani Nikula 
---
 dim | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/dim b/dim
index 79245550b6b2..76da7e347a6e 100755
--- a/dim
+++ b/dim
@@ -730,8 +730,7 @@ function dim_checkpatch
 
 function dim_checker
 {
-   rm drivers/gpu/drm/i915/*.o &> /dev/null || true
-   rm drivers/gpu/drm/i915/*.ko &> /dev/null || true
+   rm -f drivers/gpu/drm/i915/*.o drivers/gpu/drm/i915/*.ko
make C=1 drivers/gpu/drm/i915/i915.ko
 }
 
-- 
2.1.4

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[Intel-gfx] [maintainer-tools PATCH 5/6] dim: add dim sparse subcommand to run sparse on a commit range

[Jani Nikula]

Run sparse only on files that have changed in the range.

Signed-off-by: Jani Nikula 
---
 dim |  9 +
 dim.rst | 22 +++---
 2 files changed, 24 insertions(+), 7 deletions(-)

diff --git a/dim b/dim
index e3ef4365e85f..bef7bb6c401b 100755
--- a/dim
+++ b/dim
@@ -731,6 +731,15 @@ function dim_checkpatch
done
 }
 
+function dim_sparse
+{
+   local range=$(rangeish "$1")
+
+   make $DIM_MAKE_OPTIONS
+   touch --no-create `git diff --name-only $range` `git diff --name-only`
+   make C=1
+}
+
 function dim_checker
 {
rm -f drivers/gpu/drm/i915/*.o drivers/gpu/drm/i915/*.ko
diff --git a/dim.rst b/dim.rst
index 58e222a7d590..7244052dea03 100644
--- a/dim.rst
+++ b/dim.rst
@@ -186,12 +186,6 @@ fixes *commit-ish*
 Print the Fixes: and Cc: lines for the supplied *commit-ish* in the linux 
kernel
 CodingStyle approved format.
 
-check-patch|cp [*commit-ish* [.. *commit-ish*]]

-Runs the given commit range commit-ish..commit-ish through the check tools. If
-no commit-ish is passed, defaults to HEAD^..HEAD. If one commit-ish is passed
-instead of a range, the range commit-ish..HEAD is used.
-
 cherry-pick *commit-ish* [*git cherry-pick arguments*]
 --
 
@@ -259,9 +253,23 @@ remote is up-to-date. Useful if drm-intel-next has been 
changed since the last
 run of the update-next command (e.g. to apply a hotfix before sending out the
 pull request).
 
+checkpatch|check-patch|cp [*commit-ish* [.. *commit-ish*]]
+--
+Runs the given commit range commit-ish..commit-ish through the check tools.
+
+If no commit-ish is passed, defaults to HEAD^..HEAD. If one commit-ish is 
passed
+instead of a range, the range commit-ish..HEAD is used.
+
+sparse [*commit-ish* [.. *commit-ish*]]
+---
+Run sparse on the files changed by the given commit range.
+
+If no commit-ish is passed, defaults to HEAD^..HEAD. If one commit-ish is 
passed
+instead of a range, the range commit-ish..HEAD is used.
+
 checker
 ---
-Run sparse on the kernel.
+Run sparse on drm/i915.
 
 create-branch *branch* [*commit-ish*]
 -
-- 
2.1.4

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Re: [Intel-gfx] [PATCH] drm/i915: Assert we hold the CRTC powerwell for generating vblank interrupts

[Ville Syrjälä]

On Tue, Oct 11, 2016 at 09:45:45AM +0200, Maarten Lankhorst wrote:
> Op 11-10-16 om 08:55 schreef Ville Syrjälä:
> > On Tue, Oct 11, 2016 at 08:17:22AM +0200, Maarten Lankhorst wrote:
> >> Op 10-10-16 om 13:56 schreef Ville Syrjälä:
> >>> On Mon, Oct 10, 2016 at 12:46:32PM +0100, Chris Wilson wrote:
>  On Mon, Oct 10, 2016 at 02:42:01PM +0300, Ville Syrjälä wrote:
> > On Mon, Oct 10, 2016 at 12:34:54PM +0100, Chris Wilson wrote:
> >> To enable the vblank itself, we need to have an RPM wakeref for the 
> >> mmio
> >> access, and whilst generating the vblank interrupts we continue to
> >> require the rpm wakeref. The assumption is that the RPM wakeref is held
> >> by the display powerwell held by the active pipe. As this chain was not
> >> obvious to me chasing the drm_wait_vblank ioctl, document it with a 
> >> WARN
> >> during *_vblank_enable().
> >>
> >> v2: Check the display power well rather than digging inside the atomic
> >> CRTC state.
> >>
> >> Signed-off-by: Chris Wilson 
> >> Cc: Ville Syrjälä 
> >> Cc: Maarten Lankhorst 
> >> ---
> >>  drivers/gpu/drm/i915/i915_irq.c | 20 
> >>  1 file changed, 20 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/i915/i915_irq.c 
> >> b/drivers/gpu/drm/i915/i915_irq.c
> >> index 1e43fe30da11..f0f17055dbb9 100644
> >> --- a/drivers/gpu/drm/i915/i915_irq.c
> >> +++ b/drivers/gpu/drm/i915/i915_irq.c
> >> @@ -2715,6 +2715,14 @@ void i915_handle_error(struct drm_i915_private 
> >> *dev_priv,
> >>i915_reset_and_wakeup(dev_priv);
> >>  }
> >>  
> >> +static void assert_pipe_is_awake(struct drm_i915_private *dev_priv,
> >> +   enum pipe pipe)
> >> +{
> >> +  WARN_ON(IS_ENABLED(CONFIG_DRM_I915_DEBUG) &&
> >> +  !intel_display_power_is_enabled(dev_priv,
> >> +  
> >> POWER_DOMAIN_PIPE(pipe)));
> > Uses a mutex. And having a power well enabled doesn't mean much. It
> > doesn't guarantee that vblanks work.
>  Impasse. :|
> 
>  There should be no point in an explicit assert_rpm_wakeref here as the
>  register access should catch an error there. Is there no safe way we can
>  assert the current state of the CRTC is correct for enabling vblanks?
> >>> crtc->active might be the closest thing, if we just ignore any locking.
> >>> Though it looks like that has gone a bit mad these days, what with being
> >>> set from the .crtc_enable() hooks but getting cleared outside the
> >>> .crtc_disable() hooks.
> >>>
> >> I'm trying to kill crtc->active.
> > Because it's evil? I still don't see much problem in having a thing to
> > track the state of each pipe fairly accurately.
> >
> >> Maybe you'd want to use dev_priv->active_crtcs, but that won't save you if 
> >> you enable interrupts in between atomic commit and .crtc_disable
> > Nothing atomic based will work well because the state is not flipped at
> > the same time as the actual hardware state changes.
> >
> >> Safest bet is to look at the power state I think.
> > I don't know which power state you mean, but I already shot down the
> > power domain thing.
> >
> >
> I would say use assert_pipe_enabled then.

Nope. That one frobs with power domains too these days.

-- 
Ville Syrjälä
Intel OTC
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[Intel-gfx] [CI 1/2] drm/i915: Remove self-harming shrink_all on get_pages_gtt fail

[Chris Wilson]

When we notice the system under memory pressure, we try to evict some
driver pages before asking the VM to shrink all caches. As a final step
in that process, we tried to evict everything, including active buffers.
This is harming ourselves, and we can mix shrinking all caches as well
as our residual buffers (after the first pass of trying to shrink just
our own buffers).

Signed-off-by: Chris Wilson 
Reviewed-by: Michał Winiarski 
---
 drivers/gpu/drm/i915/i915_gem.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index a89a88922448..ec0a3149baeb 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2264,7 +2264,6 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object 
*obj)
 * our own buffer, now let the real VM do its job and
 * go down in flames if truly OOM.
 */
-   i915_gem_shrink_all(dev_priv);
page = shmem_read_mapping_page(mapping, i);
if (IS_ERR(page)) {
ret = PTR_ERR(page);
-- 
2.9.3

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[Intel-gfx] [CI 2/2] drm/i915: Allow compaction upto SWIOTLB max segment size

[Chris Wilson]

commit 1625e7e549c5 ("drm/i915: make compact dma scatter lists creation
work with SWIOTLB backend") took a heavy handed approach to undo the
scatterlist compaction in the face of SWIOTLB. (The compaction hit a bug
whereby we tried to pass a segment larger than SWIOTLB could handle.) We
can be a little more intelligent and try compacting the scatterlist up
to the maximum SWIOTLB segment size (when using SWIOTLB).

v2: Tidy sg_mark_end() and cpp

Signed-off-by: Chris Wilson 
CC: Imre Deak 
CC: Daniel Vetter 
Cc: Konrad Rzeszutek Wilk 
Cc: Tvrtko Ursulin 
Reviewed-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_gem.c | 30 ++
 1 file changed, 18 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ec0a3149baeb..9eb9ccdd8c8d 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2208,6 +2208,15 @@ i915_gem_object_put_pages(struct drm_i915_gem_object 
*obj)
return 0;
 }
 
+static unsigned long swiotlb_max_size(void)
+{
+#if IS_ENABLED(CONFIG_SWIOTLB)
+   return rounddown(swiotlb_nr_tbl() << IO_TLB_SHIFT, PAGE_SIZE);
+#else
+   return 0;
+#endif
+}
+
 static int
 i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj)
 {
@@ -2219,6 +2228,7 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object 
*obj)
struct sgt_iter sgt_iter;
struct page *page;
unsigned long last_pfn = 0; /* suppress gcc warning */
+   unsigned long max_segment;
int ret;
gfp_t gfp;
 
@@ -2229,6 +2239,10 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object 
*obj)
BUG_ON(obj->base.read_domains & I915_GEM_GPU_DOMAINS);
BUG_ON(obj->base.write_domain & I915_GEM_GPU_DOMAINS);
 
+   max_segment = swiotlb_max_size();
+   if (!max_segment)
+   max_segment = obj->base.size;
+
st = kmalloc(sizeof(*st), GFP_KERNEL);
if (st == NULL)
return -ENOMEM;
@@ -2270,15 +2284,9 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object 
*obj)
goto err_pages;
}
}
-#ifdef CONFIG_SWIOTLB
-   if (swiotlb_nr_tbl()) {
-   st->nents++;
-   sg_set_page(sg, page, PAGE_SIZE, 0);
-   sg = sg_next(sg);
-   continue;
-   }
-#endif
-   if (!i || page_to_pfn(page) != last_pfn + 1) {
+   if (!i ||
+   sg->length >= max_segment ||
+   page_to_pfn(page) != last_pfn + 1) {
if (i)
sg = sg_next(sg);
st->nents++;
@@ -2291,9 +2299,7 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object 
*obj)
/* Check that the i965g/gm workaround works. */
WARN_ON((gfp & __GFP_DMA32) && (last_pfn >= 0x0010UL));
}
-#ifdef CONFIG_SWIOTLB
-   if (!swiotlb_nr_tbl())
-#endif
+   if (sg) /* loop terminated early; short sg table */
sg_mark_end(sg);
obj->pages = st;
 
-- 
2.9.3

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