date:20170319

Re: [Intel-gfx] [PATCH] drm/i915/scheduler: add gvt notification for guc submission

2017-03-19 Thread Dong, Chuanxiao



> -Original Message-
> From: Zheng, Xiao
> Sent: Monday, March 20, 2017 10:46 AM
> To: Dong, Chuanxiao ; intel-
> g...@lists.freedesktop.org
> Cc: intel-gvt-...@lists.freedesktop.org
> Subject: RE: [Intel-gfx] [PATCH] drm/i915/scheduler: add gvt notification for
> guc submission
> 
> It may consider to change the function name:
> execlists_context_status_change to context_status_change_notify () instead.
> Otherwise confusing GUC submission path.
> Thanks.

Hi Xiao, I was considering to use the name of context_status_change_notify, but 
considering the guc submission is actually has an emulation of execlists on 
top, so back to use the original function name to align with execlists 
submission, as well as making the code change less. Is this explanation clear 
enough to use the original function name?

Thanks
Chuanxiao

> 
> > -Original Message-
> > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On
> > Behalf Of Chuanxiao Dong
> > Sent: Monday, March 20, 2017 9:49 AM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: intel-gvt-...@lists.freedesktop.org
> > Subject: [Intel-gfx] [PATCH] drm/i915/scheduler: add gvt notification
> > for guc submission
> >
> > GVT request needs a manual mmio load/restore. Before GuC submit a
> > request, send notification to gvt for mmio loading. And after the GuC
> > finished this GVT request, notify gvt again for mmio restore. This
> > follows the usage when using execlists submission.
> >
> > Signed-off-by: Chuanxiao Dong 
> > ---
> >  drivers/gpu/drm/i915/i915_guc_submission.c | 13 +
> >  drivers/gpu/drm/i915/intel_lrc.c   | 15 ---
> >  drivers/gpu/drm/i915/intel_lrc.h   | 14 ++
> >  3 files changed, 27 insertions(+), 15 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c
> > b/drivers/gpu/drm/i915/i915_guc_submission.c
> > index a3636b3..328b11c 100644
> > --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> > +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> > @@ -520,6 +520,12 @@ static void __i915_guc_submit(struct
> > drm_i915_gem_request *rq)
> > unsigned long flags;
> > int b_ret;
> >
> > +   /* Notify for the context status change schedule in
> > +* Currently only GVT care this notification for manually
> > +* context switch, like when using execlist mode submission
> > +*/
> > +   execlists_context_status_change(rq,
> > INTEL_CONTEXT_SCHEDULE_IN);
> > +
> > /* WA to flush out the pending GMADR writes to ring buffer. */
> > if (i915_vma_is_map_and_fenceable(rq->ring->vma))
> > POSTING_READ_FW(GUC_STATUS);
> > @@ -623,6 +629,13 @@ static void i915_guc_irq_handler(unsigned long
> data)
> > rq = port[0].request;
> > while (rq && i915_gem_request_completed(rq)) {
> > trace_i915_gem_request_out(rq);
> > +   /* Notify for the context status change schedule
> > +* out. Currently only GVT care this notification
> > +* for manually context switch, like when using
> > +* execlist mode submission
> > +*/
> > +   execlists_context_status_change(rq,
> > +
> > INTEL_CONTEXT_SCHEDULE_OUT);
> > i915_gem_request_put(rq);
> > port[0].request = port[1].request;
> > port[1].request = NULL;
> > diff --git a/drivers/gpu/drm/i915/intel_lrc.c
> > b/drivers/gpu/drm/i915/intel_lrc.c
> > index becde55..4f5906b 100644
> > --- a/drivers/gpu/drm/i915/intel_lrc.c
> > +++ b/drivers/gpu/drm/i915/intel_lrc.c
> > @@ -295,21 +295,6 @@ uint64_t intel_lr_context_descriptor(struct
> > i915_gem_context *ctx,
> > return ctx->engine[engine->id].lrc_desc;  }
> >
> > -static inline void
> > -execlists_context_status_change(struct drm_i915_gem_request *rq,
> > -   unsigned long status)
> > -{
> > -   /*
> > -* Only used when GVT-g is enabled now. When GVT-g is disabled,
> > -* The compiler should eliminate this function as dead-code.
> > -*/
> > -   if (!IS_ENABLED(CONFIG_DRM_I915_GVT))
> > -   return;
> > -
> > -   atomic_notifier_call_chain(>engine->context_status_notifier,
> > -  status, rq);
> > -}
> > -
> >  static void
> >  execlists_update_context_pdps(struct i915_hw_ppgtt *ppgtt, u32
> > *reg_state)  { diff --git a/drivers/gpu/drm/i915/intel_lrc.h
> > b/drivers/gpu/drm/i915/intel_lrc.h
> > index e8015e7..d3aa108 100644
> > --- a/drivers/gpu/drm/i915/intel_lrc.h
> > +++ b/drivers/gpu/drm/i915/intel_lrc.h
> > @@ -87,5 +87,19 @@ uint64_t intel_lr_context_descriptor(struct
> > i915_gem_context *ctx,
> >  /* Execlists */
> >  int intel_sanitize_enable_execlists(struct drm_i915_private *dev_priv,
> > int enable_execlists);
> > +static inline void
> >

Re: [Intel-gfx] [PATCH] drm/i915/scheduler: add gvt notification for guc submission

2017-03-19 Thread Zheng, Xiao

It may consider to change the function name:  execlists_context_status_change 
to context_status_change_notify () instead. Otherwise confusing GUC submission 
path. 
Thanks. 

> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Chuanxiao Dong
> Sent: Monday, March 20, 2017 9:49 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-gvt-...@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH] drm/i915/scheduler: add gvt notification for guc
> submission
> 
> GVT request needs a manual mmio load/restore. Before GuC submit a
> request, send notification to gvt for mmio loading. And after the GuC
> finished this GVT request, notify gvt again for mmio restore. This follows the
> usage when using execlists submission.
> 
> Signed-off-by: Chuanxiao Dong 
> ---
>  drivers/gpu/drm/i915/i915_guc_submission.c | 13 +
>  drivers/gpu/drm/i915/intel_lrc.c   | 15 ---
>  drivers/gpu/drm/i915/intel_lrc.h   | 14 ++
>  3 files changed, 27 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c
> b/drivers/gpu/drm/i915/i915_guc_submission.c
> index a3636b3..328b11c 100644
> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> @@ -520,6 +520,12 @@ static void __i915_guc_submit(struct
> drm_i915_gem_request *rq)
>   unsigned long flags;
>   int b_ret;
> 
> + /* Notify for the context status change schedule in
> +  * Currently only GVT care this notification for manually
> +  * context switch, like when using execlist mode submission
> +  */
> + execlists_context_status_change(rq,
> INTEL_CONTEXT_SCHEDULE_IN);
> +
>   /* WA to flush out the pending GMADR writes to ring buffer. */
>   if (i915_vma_is_map_and_fenceable(rq->ring->vma))
>   POSTING_READ_FW(GUC_STATUS);
> @@ -623,6 +629,13 @@ static void i915_guc_irq_handler(unsigned long data)
>   rq = port[0].request;
>   while (rq && i915_gem_request_completed(rq)) {
>   trace_i915_gem_request_out(rq);
> + /* Notify for the context status change schedule
> +  * out. Currently only GVT care this notification
> +  * for manually context switch, like when using
> +  * execlist mode submission
> +  */
> + execlists_context_status_change(rq,
> +
>   INTEL_CONTEXT_SCHEDULE_OUT);
>   i915_gem_request_put(rq);
>   port[0].request = port[1].request;
>   port[1].request = NULL;
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c
> b/drivers/gpu/drm/i915/intel_lrc.c
> index becde55..4f5906b 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -295,21 +295,6 @@ uint64_t intel_lr_context_descriptor(struct
> i915_gem_context *ctx,
>   return ctx->engine[engine->id].lrc_desc;  }
> 
> -static inline void
> -execlists_context_status_change(struct drm_i915_gem_request *rq,
> - unsigned long status)
> -{
> - /*
> -  * Only used when GVT-g is enabled now. When GVT-g is disabled,
> -  * The compiler should eliminate this function as dead-code.
> -  */
> - if (!IS_ENABLED(CONFIG_DRM_I915_GVT))
> - return;
> -
> - atomic_notifier_call_chain(>engine->context_status_notifier,
> -status, rq);
> -}
> -
>  static void
>  execlists_update_context_pdps(struct i915_hw_ppgtt *ppgtt, u32
> *reg_state)  { diff --git a/drivers/gpu/drm/i915/intel_lrc.h
> b/drivers/gpu/drm/i915/intel_lrc.h
> index e8015e7..d3aa108 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/intel_lrc.h
> @@ -87,5 +87,19 @@ uint64_t intel_lr_context_descriptor(struct
> i915_gem_context *ctx,
>  /* Execlists */
>  int intel_sanitize_enable_execlists(struct drm_i915_private *dev_priv,
>   int enable_execlists);
> +static inline void
> +execlists_context_status_change(struct drm_i915_gem_request *rq,
> + unsigned long status)
> +{
> + /*
> +  * Only used when GVT-g is enabled now. When GVT-g is disabled,
> +  * The compiler should eliminate this function as dead-code.
> +  */
> + if (!IS_ENABLED(CONFIG_DRM_I915_GVT))
> + return;
> +
> + atomic_notifier_call_chain(>engine->context_status_notifier,
> +status, rq);
> +}
> 
>  #endif /* _INTEL_LRC_H_ */
> --
> 2.7.4
> 
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[Intel-gfx] [PATCH] drm/i915/scheduler: add gvt notification for guc submission

2017-03-19 Thread Chuanxiao Dong

GVT request needs a manual mmio load/restore. Before GuC submit
a request, send notification to gvt for mmio loading. And after
the GuC finished this GVT request, notify gvt again for mmio
restore. This follows the usage when using execlists submission.

Signed-off-by: Chuanxiao Dong 
---
 drivers/gpu/drm/i915/i915_guc_submission.c | 13 +
 drivers/gpu/drm/i915/intel_lrc.c   | 15 ---
 drivers/gpu/drm/i915/intel_lrc.h   | 14 ++
 3 files changed, 27 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
b/drivers/gpu/drm/i915/i915_guc_submission.c
index a3636b3..328b11c 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -520,6 +520,12 @@ static void __i915_guc_submit(struct drm_i915_gem_request 
*rq)
unsigned long flags;
int b_ret;
 
+   /* Notify for the context status change schedule in
+* Currently only GVT care this notification for manually
+* context switch, like when using execlist mode submission
+*/
+   execlists_context_status_change(rq, INTEL_CONTEXT_SCHEDULE_IN);
+
/* WA to flush out the pending GMADR writes to ring buffer. */
if (i915_vma_is_map_and_fenceable(rq->ring->vma))
POSTING_READ_FW(GUC_STATUS);
@@ -623,6 +629,13 @@ static void i915_guc_irq_handler(unsigned long data)
rq = port[0].request;
while (rq && i915_gem_request_completed(rq)) {
trace_i915_gem_request_out(rq);
+   /* Notify for the context status change schedule
+* out. Currently only GVT care this notification
+* for manually context switch, like when using
+* execlist mode submission
+*/
+   execlists_context_status_change(rq,
+   INTEL_CONTEXT_SCHEDULE_OUT);
i915_gem_request_put(rq);
port[0].request = port[1].request;
port[1].request = NULL;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index becde55..4f5906b 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -295,21 +295,6 @@ uint64_t intel_lr_context_descriptor(struct 
i915_gem_context *ctx,
return ctx->engine[engine->id].lrc_desc;
 }
 
-static inline void
-execlists_context_status_change(struct drm_i915_gem_request *rq,
-   unsigned long status)
-{
-   /*
-* Only used when GVT-g is enabled now. When GVT-g is disabled,
-* The compiler should eliminate this function as dead-code.
-*/
-   if (!IS_ENABLED(CONFIG_DRM_I915_GVT))
-   return;
-
-   atomic_notifier_call_chain(>engine->context_status_notifier,
-  status, rq);
-}
-
 static void
 execlists_update_context_pdps(struct i915_hw_ppgtt *ppgtt, u32 *reg_state)
 {
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index e8015e7..d3aa108 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -87,5 +87,19 @@ uint64_t intel_lr_context_descriptor(struct i915_gem_context 
*ctx,
 /* Execlists */
 int intel_sanitize_enable_execlists(struct drm_i915_private *dev_priv,
int enable_execlists);
+static inline void
+execlists_context_status_change(struct drm_i915_gem_request *rq,
+   unsigned long status)
+{
+   /*
+* Only used when GVT-g is enabled now. When GVT-g is disabled,
+* The compiler should eliminate this function as dead-code.
+*/
+   if (!IS_ENABLED(CONFIG_DRM_I915_GVT))
+   return;
+
+   atomic_notifier_call_chain(>engine->context_status_notifier,
+  status, rq);
+}
 
 #endif /* _INTEL_LRC_H_ */
-- 
2.7.4

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[Intel-gfx] linux-next: build failure after merge of the drm tree

2017-03-19 Thread Stephen Rothwell

Hi Dave,

After merging the drm tree, today's linux-next build (x86_64 allmodconfig)
failed like this:

drivers/gpu/drm/i915/i915_irq.c: In function 'gen6_rps_reset_ei':
drivers/gpu/drm/i915/i915_irq.c:1115:38: error: 'struct intel_gen6_power_mgmt' 
has no member named 'down_ei'
  vlv_c0_read(dev_priv, _priv->rps.down_ei);
  ^
drivers/gpu/drm/i915/i915_irq.c:1116:15: error: 'struct intel_gen6_power_mgmt' 
has no member named 'up_ei'
  dev_priv->rps.up_ei = dev_priv->rps.down_ei;
   ^
drivers/gpu/drm/i915/i915_irq.c:1116:37: error: 'struct intel_gen6_power_mgmt' 
has no member named 'down_ei'
  dev_priv->rps.up_ei = dev_priv->rps.down_ei;
 ^
drivers/gpu/drm/i915/i915_irq.c: In function 'vlv_wa_c0_ei':
drivers/gpu/drm/i915/i915_irq.c:1133:21: error: 'struct intel_gen6_power_mgmt' 
has no member named 'down_ei'
   _priv->rps.down_ei, ,
 ^
drivers/gpu/drm/i915/i915_irq.c:1136:16: error: 'struct intel_gen6_power_mgmt' 
has no member named 'down_ei'
   dev_priv->rps.down_ei = now;
^
drivers/gpu/drm/i915/i915_irq.c:1141:20: error: 'struct intel_gen6_power_mgmt' 
has no member named 'up_ei'
  _priv->rps.up_ei, ,
^
drivers/gpu/drm/i915/i915_irq.c:1144:16: error: 'struct intel_gen6_power_mgmt' 
has no member named 'up_ei'
   dev_priv->rps.up_ei = now;
^
Caused by commit

  8f68d591d476 ("drm/i915: Stop using RP_DOWN_EI on Baytrail")

from the drm-intel-fixes tree and a bad merge resolution on my part.

I reapplied that commit by hand.  It would be nice if this conflict was
resolved in the drm tree.

This cherry picking of fixes from new development back to Linus' tree
can be a real pain when so many other changes happen in the same files.

-- 
Cheers,
Stephen Rothwell
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Re: [Intel-gfx] [PATCH] drm/i915: Reset tasklet back to execlists after disabling guc

2017-03-19 Thread Michał Winiarski

On Sat, Mar 18, 2017 at 10:28:59AM +, Chris Wilson wrote:
> When switching back to execlists, we also now need to restore the
> tasklet handler.
> 
> Reported-by: Oscar Mateo 
> Fixes: 31de73501ac9 ("drm/i915/scheduler: emulate a scheduler for guc")
> Signed-off-by: Chris Wilson 
> Cc: Tvrtko Ursulin 
> Cc: Joonas Lahtinen 
> Cc: Michał Winiarski 
> Cc: Oscar Mateo 

Reviewed-by: Michał Winiarski 

-Michał

> ---
>  drivers/gpu/drm/i915/intel_lrc.c | 1 +
>  1 file changed, 1 insertion(+)
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Re: [Intel-gfx] [PATCH] drm/i915/scheduler: add gvt notification for guc submission

Re: [Intel-gfx] [PATCH] drm/i915/scheduler: add gvt notification for guc submission

[Intel-gfx] [PATCH] drm/i915/scheduler: add gvt notification for guc submission

[Intel-gfx] linux-next: build failure after merge of the drm tree

Re: [Intel-gfx] [PATCH] drm/i915: Reset tasklet back to execlists after disabling guc

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