Re: [Intel-gfx] [PATCH 02/13] drm/i915: Copy user requested buffers into the error state
On Wed, Mar 29, 2017 at 8:56 AM, Chris Wilsonwrote: > Introduce a new execobject.flag (EXEC_OBJECT_CAPTURE) that userspace may > use to indicate that it wants the contents of this buffer preserved in > the error state (/sys/class/drm/cardN/error) following a GPU hang > involving this batch. > > Use this at your discretion, the contents of the error state. although > compressed, are allocated with GFP_ATOMIC (i.e. limited) and kept for all > eternity (until the error state is destroyed). > > Based on an earlier patch by Ben Widawsky > Signed-off-by: Chris Wilson > Cc: Ben Widawsky > Cc: Matt Turner > Acked-by: Ben Widawsky > Reviewed-by: Joonas Lahtinen > --- Thank you, Chris. With this in place (and a few patches from Ben rebased for libdrm and Mesa) I can disassemble the shader program from an error state. In this case, I turned off the end-of-thread bit on the sendc in order to cause a hang: render ring --- user = 0x fff75000 pln(8) g124<1>Fg4<0,1,0>F g2<8,8,1>F { align1 1Q compacted }; pln(8) g125<1>Fg4.4<0,1,0>Fg2<8,8,1>F { align1 1Q compacted }; pln(8) g126<1>Fg5<0,1,0>F g2<8,8,1>F { align1 1Q compacted }; pln(8) g127<1>Fg5.4<0,1,0>Fg2<8,8,1>F { align1 1Q compacted }; sendc(8)null<1>UW g124<8,8,1>F render RT write SIMD8 LastRT Surface = 0 mlen 4 rlen 0 { align1 1Q }; nop ; pln(16) g120<1>Fg6<0,1,0>F g2<8,8,1>F { align1 1H compacted }; pln(16) g122<1>Fg6.4<0,1,0>Fg2<8,8,1>F { align1 1H compacted }; pln(16) g124<1>Fg7<0,1,0>F g2<8,8,1>F { align1 1H compacted }; pln(16) g126<1>Fg7.4<0,1,0>Fg2<8,8,1>F { align1 1H compacted }; sendc(16) null<1>UW g120<8,8,1>F render RT write SIMD16 LastRT Surface = 0 mlen 8 rlen 0 { align1 1H }; illegal(1) { align1 1N }; Presumably we would like to save more than just instruction buffers. Do we have a good way of discerning what each blob of data in the error state is? ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: intel_ring.engine is unused
== Series Details == Series: drm/i915: intel_ring.engine is unused URL : https://patchwork.freedesktop.org/series/22310/ State : success == Summary == Series 22310v1 drm/i915: intel_ring.engine is unused https://patchwork.freedesktop.org/api/1.0/series/22310/revisions/1/mbox/ fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time: 428s fi-bdw-gvtdvmtotal:278 pass:256 dwarn:8 dfail:0 fail:0 skip:14 time: 424s fi-bsw-n3050 total:278 pass:239 dwarn:0 dfail:0 fail:0 skip:39 time: 574s fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time: 510s fi-bxt-t5700 total:278 pass:258 dwarn:0 dfail:0 fail:0 skip:20 time: 546s fi-byt-j1900 total:278 pass:251 dwarn:0 dfail:0 fail:0 skip:27 time: 481s fi-byt-n2820 total:278 pass:247 dwarn:0 dfail:0 fail:0 skip:31 time: 487s fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 412s fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 411s fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time: 417s fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 489s fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 482s fi-kbl-7500u total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 456s fi-kbl-7560u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 568s fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 454s fi-skl-6700hqtotal:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time: 573s fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time: 463s fi-skl-6770hqtotal:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 488s fi-skl-gvtdvmtotal:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time: 432s fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time: 530s fi-snb-2600 total:278 pass:249 dwarn:0 dfail:0 fail:0 skip:29 time: 403s 19ceec7d516a7c4614833ba7a3724a4bea0c59d3 drm-tip: 2017y-03m-31d-20h-10m-03s UTC integration manifest 17aa0bd drm/i915: intel_ring.engine is unused == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4379/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: intel_ring.engine is unused
Or rather it is used only by intel_ring_pin() to extract the drm_i915_private which we can easily pass in. As this is a relatively rare operation, save the space in the struct, and as such it is even break even in the extra code for passing around the parameter: add/remove: 0/0 grow/shrink: 2/3 up/down: 15/-15 (0) function old new delta intel_init_ring_buffer 906 918 +12 execlists_context_pin 13081311 +3 mock_engine 407 403 -4 intel_engine_create_ring 367 363 -4 intel_ring_pin 326 319 -7 Total: Before=1261794, After=1261794, chg +0.00% v2: Reorder intel_init_ring_buffer to keep the ring setup together: add/remove: 0/0 grow/shrink: 2/3 up/down: 9/-15 (-6) function old new delta intel_init_ring_buffer 906 912 +6 execlists_context_pin 13081311 +3 mock_engine 407 403 -4 intel_engine_create_ring 367 363 -4 intel_ring_pin 326 319 -7 Total: Before=1261794, After=1261788, chg -0.00% Signed-off-by: Chris Wilson--- drivers/gpu/drm/i915/intel_lrc.c | 2 +- drivers/gpu/drm/i915/intel_ringbuffer.c | 28 +--- drivers/gpu/drm/i915/intel_ringbuffer.h | 6 +++--- drivers/gpu/drm/i915/selftests/mock_engine.c | 1 - 4 files changed, 17 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index c8f7c631fc1f..0dc1cc4ad6e7 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -771,7 +771,7 @@ static int execlists_context_pin(struct intel_engine_cs *engine, goto unpin_vma; } - ret = intel_ring_pin(ce->ring, ctx->ggtt_offset_bias); + ret = intel_ring_pin(ce->ring, ctx->i915, ctx->ggtt_offset_bias); if (ret) goto unpin_map; diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 66a2b8b83972..5e7634c00cbd 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -1270,17 +1270,18 @@ static int init_phys_status_page(struct intel_engine_cs *engine) return 0; } -int intel_ring_pin(struct intel_ring *ring, unsigned int offset_bias) +int intel_ring_pin(struct intel_ring *ring, + struct drm_i915_private *i915, + unsigned int offset_bias) { - unsigned int flags; - enum i915_map_type map; + enum i915_map_type map = HAS_LLC(i915) ? I915_MAP_WB : I915_MAP_WC; struct i915_vma *vma = ring->vma; + unsigned int flags; void *addr; int ret; GEM_BUG_ON(ring->vaddr); - map = HAS_LLC(ring->engine->i915) ? I915_MAP_WB : I915_MAP_WC; flags = PIN_GLOBAL; if (offset_bias) @@ -1369,8 +1370,6 @@ intel_engine_create_ring(struct intel_engine_cs *engine, int size) if (!ring) return ERR_PTR(-ENOMEM); - ring->engine = engine; - INIT_LIST_HEAD(>request_list); ring->size = size; @@ -1481,7 +1480,6 @@ static void intel_ring_context_unpin(struct intel_engine_cs *engine, static int intel_init_ring_buffer(struct intel_engine_cs *engine) { - struct drm_i915_private *dev_priv = engine->i915; struct intel_ring *ring; int ret; @@ -1493,13 +1491,7 @@ static int intel_init_ring_buffer(struct intel_engine_cs *engine) if (ret) goto error; - ring = intel_engine_create_ring(engine, 32 * PAGE_SIZE); - if (IS_ERR(ring)) { - ret = PTR_ERR(ring); - goto error; - } - - if (HWS_NEEDS_PHYSICAL(dev_priv)) { + if (HWS_NEEDS_PHYSICAL(engine->i915)) { WARN_ON(engine->id != RCS); ret = init_phys_status_page(engine); if (ret) @@ -1510,8 +1502,14 @@ static int intel_init_ring_buffer(struct intel_engine_cs *engine) goto error; } + ring = intel_engine_create_ring(engine, 32 * PAGE_SIZE); + if (IS_ERR(ring)) { + ret = PTR_ERR(ring); + goto error; + } + /* Ring wraparound at offset 0 sometimes hangs. No idea why. */ - ret = intel_ring_pin(ring, I915_GTT_PAGE_SIZE); + ret = intel_ring_pin(ring, engine->i915, I915_GTT_PAGE_SIZE); if (ret) { intel_ring_free(ring); goto error; diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index a82a0807f64d..cbe61d3f31da 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++
[Intel-gfx] [GIT PULL] GVT-g fixes for 4.11-rc6
Hi, Here's left gvt fixes for 4.11. p.s It's working day for us really, so we can be out for next three days. ;) Thanks -- The following changes since commit bc2d4b62db67f817b09c782219996630e9c2f5e2: drm/i915/gvt: Use force single submit flag to distinguish gvt request from i915 request (2017-03-22 13:18:56 +0800) are available in the git repository at: https://github.com/01org/gvt-linux.git tags/gvt-fixes-2017-04-01 for you to fetch changes up to aa4ce4493c88dc324911152d1ccd25469366dba3: drm/i915/gvt: Fix firmware loading interface for GVT-g golden HW state (2017-04-01 13:13:27 +0800) gvt-fixes-2017-04-01 - Fix cfg space in failsafe (Changbin) - Fix a race for irq inject with vgpu release (Zhi) - Fix golden state firmware load (Zhi) Changbin Du (1): drm/i915/gvt: exclude cfg space from failsafe mode Zhi Wang (2): drm/i915/gvt: Activate/de-activate vGPU in mdev ops. drm/i915/gvt: Fix firmware loading interface for GVT-g golden HW state drivers/gpu/drm/i915/gvt/cfg_space.c | 3 --- drivers/gpu/drm/i915/gvt/firmware.c | 9 +--- drivers/gpu/drm/i915/gvt/gvt.c | 2 ++ drivers/gpu/drm/i915/gvt/gvt.h | 5 - drivers/gpu/drm/i915/gvt/kvmgt.c | 4 drivers/gpu/drm/i915/gvt/vgpu.c | 43 +++- 6 files changed, 54 insertions(+), 12 deletions(-) -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 signature.asc Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx