Re: [Intel-gfx] [RFC] drm/i915/guc: Rename i915_guc_reg.h to intel_guc_reg.h

[Sagar Arun Kamble]

On 11/23/2017 11:39 PM, Michal Wajdeczko wrote:

We are using intel_ prefix for all filenames with hardware related
definitions. GuC registers also fall into this category.

Signed-off-by: Michal Wajdeczko 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Sagar Arun Kamble 

Reviewed-by: Sagar Arun Kamble 
Could you make minor change to keep #include "intel_guc_reg.h" with 
other guc includes in intel_guc.h

---
  drivers/gpu/drm/i915/i915_guc_reg.h  | 119 ---
  drivers/gpu/drm/i915/intel_guc.h |   2 +-
  drivers/gpu/drm/i915/intel_guc_reg.h | 119 +++
  3 files changed, 120 insertions(+), 120 deletions(-)
  delete mode 100644 drivers/gpu/drm/i915/i915_guc_reg.h
  create mode 100644 drivers/gpu/drm/i915/intel_guc_reg.h

diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h 
b/drivers/gpu/drm/i915/i915_guc_reg.h
deleted file mode 100644
index bc1ae7d..000
--- a/drivers/gpu/drm/i915/i915_guc_reg.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- * Copyright © 2014 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- */
-#ifndef _I915_GUC_REG_H_
-#define _I915_GUC_REG_H_
-
-/* Definitions of GuC H/W registers, bits, etc */
-
-#define GUC_STATUS _MMIO(0xc000)
-#define   GS_RESET_SHIFT   0
-#define   GS_MIA_IN_RESET(0x01 << GS_RESET_SHIFT)
-#define   GS_BOOTROM_SHIFT 1
-#define   GS_BOOTROM_MASK(0x7F << GS_BOOTROM_SHIFT)
-#define   GS_BOOTROM_RSA_FAILED  (0x50 << GS_BOOTROM_SHIFT)
-#define   GS_BOOTROM_JUMP_PASSED (0x76 << GS_BOOTROM_SHIFT)
-#define   GS_UKERNEL_SHIFT 8
-#define   GS_UKERNEL_MASK(0xFF << GS_UKERNEL_SHIFT)
-#define   GS_UKERNEL_LAPIC_DONE  (0x30 << GS_UKERNEL_SHIFT)
-#define   GS_UKERNEL_DPC_ERROR   (0x60 << GS_UKERNEL_SHIFT)
-#define   GS_UKERNEL_READY   (0xF0 << GS_UKERNEL_SHIFT)
-#define   GS_MIA_SHIFT 16
-#define   GS_MIA_MASK(0x07 << GS_MIA_SHIFT)
-#define   GS_MIA_CORE_STATE  (0x01 << GS_MIA_SHIFT)
-#define   GS_MIA_HALT_REQUESTED  (0x02 << GS_MIA_SHIFT)
-#define   GS_MIA_ISR_ENTRY   (0x04 << GS_MIA_SHIFT)
-#define   GS_AUTH_STATUS_SHIFT 30
-#define   GS_AUTH_STATUS_MASK(0x03 << GS_AUTH_STATUS_SHIFT)
-#define   GS_AUTH_STATUS_BAD (0x01 << GS_AUTH_STATUS_SHIFT)
-#define   GS_AUTH_STATUS_GOOD(0x02 << GS_AUTH_STATUS_SHIFT)
-
-#define SOFT_SCRATCH(n)_MMIO(0xc180 + (n) * 4)
-#define SOFT_SCRATCH_COUNT 16
-
-#define UOS_RSA_SCRATCH(i) _MMIO(0xc200 + (i) * 4)
-#define   UOS_RSA_SCRATCH_MAX_COUNT  64
-#define DMA_ADDR_0_LOW _MMIO(0xc300)
-#define DMA_ADDR_0_HIGH_MMIO(0xc304)
-#define DMA_ADDR_1_LOW _MMIO(0xc308)
-#define DMA_ADDR_1_HIGH_MMIO(0xc30c)
-#define   DMA_ADDRESS_SPACE_WOPCM(7 << 16)
-#define   DMA_ADDRESS_SPACE_GTT  (8 << 16)
-#define DMA_COPY_SIZE  _MMIO(0xc310)
-#define DMA_CTRL   _MMIO(0xc314)
-#define   HUC_UKERNEL(1<<9)
-#define   UOS_MOVE   (1<<4)
-#define   START_DMA  (1<<0)
-#define DMA_GUC_WOPCM_OFFSET   _MMIO(0xc340)
-#define   HUC_LOADING_AGENT_VCR  (0<<1)
-#define   HUC_LOADING_AGENT_GUC  (1<<1)
-#define   GUC_WOPCM_OFFSET_VALUE 0x8   /* 512KB */
-#define GUC_MAX_IDLE_COUNT _MMIO(0xC3E4)
-
-#define HUC_STATUS2 _MMIO(0xD3B0)
-#define   HUC_FW_VERIFIED   (1<<7)
-
-/* Defines WOPCM space available to GuC 

Re: [Intel-gfx] [PATCH 1/6] drm/i915: export the stolen region as a resource

[Joonas Lahtinen]

+ Ville to comment if the removed code loses some meaningful comments
or not. I already went through the code doing consolidations, about a
year ago, so I may be blind to it.

On Wed, 2017-11-22 at 21:19 +, Matthew Auld wrote:
> We duplicate the stolen discovery code in early-quirks and in i915,
> however if we just export the region as a resource from early-quirks we
> can nuke the duplication.
> 
> Suggested-by: Joonas Lahtinen 
> Suggested-by: Chris Wilson 
> Signed-off-by: Matthew Auld 
> Cc: Joonas Lahtinen 
> Cc: Chris Wilson 
> Cc: Paulo Zanoni 
> Cc: Ingo Molnar 
> Cc: H. Peter Anvin 
> Cc: dri-de...@lists.freedesktop.org
> Cc: x...@kernel.org



> @@ -548,6 +551,9 @@ intel_graphics_stolen(int num, int slot, int func,
>   printk(KERN_INFO "Reserving Intel graphics memory at %pa-%pa\n",
>  , );
>  
> + intel_graphics_stolen_res.start = base;
> + intel_graphics_stolen_res.end = end;

You can take advantage of the newly establisted resource by using %pR
in the printk.

I sent a patch to convert the function signatures to resource_size_t
for a less painful future.

Maybe squash just the early quirks/header change portion of this patch
to that patch, then we can iterate on the i915 changes on a reminder of
the series on top of that. 

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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[Intel-gfx] ✗ Fi.CI.BAT: warning for x86/early-quirks: Extend Intel graphics stolen memory placement to 64bit

[Patchwork]

== Series Details ==

Series: x86/early-quirks: Extend Intel graphics stolen memory placement to 64bit
URL   : https://patchwork.freedesktop.org/series/34342/
State : warning

== Summary ==

Series 34342v1 x86/early-quirks: Extend Intel graphics stolen memory placement 
to 64bit
https://patchwork.freedesktop.org/api/1.0/series/34342/revisions/1/mbox/

Test kms_force_connector_basic:
Subgroup prune-stale-modes:
pass   -> SKIP   (fi-snb-2600)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-c:
incomplete -> PASS   (fi-cfl-s2) fdo#103878

fdo#103878 https://bugs.freedesktop.org/show_bug.cgi?id=103878

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:449s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:463s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:382s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:548s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:278s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:507s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:501s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:507s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:491s
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:604s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:427s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:270s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:541s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:431s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:436s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:432s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:491s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:464s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:589s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:454s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:547s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:566s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:522s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:495s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:464s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:568s
fi-snb-2600  total:289  pass:248  dwarn:0   dfail:0   fail:0   skip:41  
time:432s
Blacklisted hosts:
fi-cnl-y total:245  pass:220  dwarn:0   dfail:0   fail:0   skip:24 
fi-glk-dsi   total:289  pass:258  dwarn:1   dfail:0   fail:0   skip:30  
time:501s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:486s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:528s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:478s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:535s

b407e5f38397c0c22b5056a1664753287993b152 drm-tip: 2017y-11m-23d-16h-14m-59s UTC 
integration manifest
c4c774243f36 x86/early-quirks: Extend Intel graphics stolen memory placement to 
64bit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7272/
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Re: [Intel-gfx] [PATCH] x86/early-quirks: Extend Intel graphics stolen memory placement to 64bit

[Ingo Molnar]

* Joonas Lahtinen  wrote:

> In preparation for upcoming SKUs, allow more freedom in placement
> of the Intel graphics stolen memory by BIOS to full 64bit range.
> 
> Signed-off-by: Joonas Lahtinen 
> Cc: Matthew Auld 
> Cc: Chris Wilson 
> Cc: Paulo Zanoni 
> Cc: Ingo Molnar 
> Cc: H. Peter Anvin 
> Cc: x...@kernel.org
> ---
>  arch/x86/kernel/early-quirks.c | 75 
> +-
>  1 file changed, 38 insertions(+), 37 deletions(-)

So I'm wondering how this interacts with:

  drm/i915: export the stolen region as a resource

?

Thanks,

Ingo
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Re: [Intel-gfx] [PATCH igt 3/3] igt/perf_pmu: Idle the GPU before starting to measure busyness

[Tvrtko Ursulin]

On 23/11/17 16:07, Chris Wilson wrote:
> Quoting Chris Wilson (2017-11-23 16:02:20)
>> Quoting Tvrtko Ursulin (2017-11-23 13:37:30)
>>>
>>> On 23/11/2017 08:22, Chris Wilson wrote:
 Make sure the HW is idle before we start sampling the GPU for busyness.
 If we do not rest for long enough between tests, we may carry the
 sampling over.
>>>
>>> I'd rather not have this since as I said yesterday each opened PMU event
>>> is supposed to record the initial counter value as reference. If that is
>>> failing or not good enough on some tests/platforms I would rather first
>>> understand why and how.
>>
>> All legacy sampling fails... :| I'm putting it back!
> 
> So presumably it is coupling with the parking.

Or more precisely averaging with the previous sample. Every time one PMU
client signals the timer to self-disarm, but the new PMU client enables
the timer again in this window, the previous sample value does not get
cleared.

I tried this for instance:

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 650089b30d46..a5ca27eeef40 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -147,9 +147,26 @@ void i915_pmu_gt_parked(struct drm_i915_private *i915)
spin_unlock_irq(>pmu.lock);
 }
 
+static void pmu_init_previous_samples(struct drm_i915_private *i915)
+{
+   struct intel_engine_cs *engine;
+   enum intel_engine_id id;
+   unsigned int i;
+
+   for_each_engine(engine, i915, id) {
+   for (i = 0; i < ARRAY_SIZE(engine->pmu.sample); i++)
+   engine->pmu.sample[i].prev = 0;
+   }
+
+   for (i = 0; i < ARRAY_SIZE(i915->pmu.sample); i++)
+   i915->pmu.sample[i].prev = i915->gt_pm.rps.idle_freq;
+}
+
 static void __i915_pmu_maybe_start_timer(struct drm_i915_private *i915)
 {
if (!i915->pmu.timer_enabled && pmu_needs_timer(i915, true)) {
+   hrtimer_cancel(>pmu.timer);
+   pmu_init_previous_samples(i915);
i915->pmu.timer_enabled = true;
hrtimer_start_range_ns(>pmu.timer,
   ns_to_ktime(PERIOD), 0,
@@ -262,31 +279,13 @@ static void frequency_sample(struct drm_i915_private 
*dev_priv)
}
 }
 
-static void pmu_init_previous_samples(struct drm_i915_private *i915)
-{
-   struct intel_engine_cs *engine;
-   enum intel_engine_id id;
-   unsigned int i;
-
-   for_each_engine(engine, i915, id) {
-   for (i = 0; i < ARRAY_SIZE(engine->pmu.sample); i++)
-   engine->pmu.sample[i].prev = 0;
-   }
-
-   for (i = 0; i < ARRAY_SIZE(i915->pmu.sample); i++)
-   i915->pmu.sample[i].prev = i915->gt_pm.rps.idle_freq;
-}
-
 static enum hrtimer_restart i915_sample(struct hrtimer *hrtimer)
 {
struct drm_i915_private *i915 =
container_of(hrtimer, struct drm_i915_private, pmu.timer);
 
-   if (!READ_ONCE(i915->pmu.timer_enabled)) {
-   pmu_init_previous_samples(i915);
-
+   if (!READ_ONCE(i915->pmu.timer_enabled))
return HRTIMER_NORESTART;
-   }
 
engines_sample(i915);
frequency_sample(i915);
@@ -847,8 +846,6 @@ void i915_pmu_register(struct drm_i915_private *i915)
hrtimer_init(>pmu.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
i915->pmu.timer.function = i915_sample;
 
-   pmu_init_previous_samples(i915);
-
for_each_engine(engine, i915, id)
INIT_DELAYED_WORK(>pmu.disable_busy_stats,
  __disable_busy_stats);
---

But it is too evil to wait for the sampling timer in case of MMIO in the
irq disabled section. Even though it would happen only on disable-enable
transitions quicker than sampling period. It is not an use case, but still..

Or we could drop sample averaging.. ?

Regards,

Tvrtko


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[Intel-gfx] [PATCH] x86/early-quirks: Extend Intel graphics stolen memory placement to 64bit

[Joonas Lahtinen]

In preparation for upcoming SKUs, allow more freedom in placement
of the Intel graphics stolen memory by BIOS to full 64bit range.

Signed-off-by: Joonas Lahtinen 
Cc: Matthew Auld 
Cc: Chris Wilson 
Cc: Paulo Zanoni 
Cc: Ingo Molnar 
Cc: H. Peter Anvin 
Cc: x...@kernel.org
---
 arch/x86/kernel/early-quirks.c | 75 +-
 1 file changed, 38 insertions(+), 37 deletions(-)

diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 1e82f787c160..7b775f9afa16 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -243,7 +243,7 @@ static void __init intel_remapping_check(int num, int slot, 
int func)
 #define KB(x)  ((x) * 1024UL)
 #define MB(x)  (KB (KB (x)))
 
-static size_t __init i830_tseg_size(void)
+static resource_size_t __init i830_tseg_size(void)
 {
u8 esmramc = read_pci_config_byte(0, 0, 0, I830_ESMRAMC);
 
@@ -256,7 +256,7 @@ static size_t __init i830_tseg_size(void)
return KB(512);
 }
 
-static size_t __init i845_tseg_size(void)
+static resource_size_t __init i845_tseg_size(void)
 {
u8 esmramc = read_pci_config_byte(0, 0, 0, I845_ESMRAMC);
u8 tseg_size = esmramc & I845_TSEG_SIZE_MASK;
@@ -273,7 +273,7 @@ static size_t __init i845_tseg_size(void)
return 0;
 }
 
-static size_t __init i85x_tseg_size(void)
+static resource_size_t __init i85x_tseg_size(void)
 {
u8 esmramc = read_pci_config_byte(0, 0, 0, I85X_ESMRAMC);
 
@@ -283,12 +283,12 @@ static size_t __init i85x_tseg_size(void)
return MB(1);
 }
 
-static size_t __init i830_mem_size(void)
+static resource_size_t __init i830_mem_size(void)
 {
return read_pci_config_byte(0, 0, 0, I830_DRB3) * MB(32);
 }
 
-static size_t __init i85x_mem_size(void)
+static resource_size_t __init i85x_mem_size(void)
 {
return read_pci_config_byte(0, 0, 1, I85X_DRB3) * MB(32);
 }
@@ -297,36 +297,36 @@ static size_t __init i85x_mem_size(void)
  * On 830/845/85x the stolen memory base isn't available in any
  * register. We need to calculate it as TOM-TSEG_SIZE-stolen_size.
  */
-static phys_addr_t __init i830_stolen_base(int num, int slot, int func,
-  size_t stolen_size)
+static resource_size_t __init i830_stolen_base(int num, int slot, int func,
+  resource_size_t stolen_size)
 {
-   return (phys_addr_t)i830_mem_size() - i830_tseg_size() - stolen_size;
+   return i830_mem_size() - i830_tseg_size() - stolen_size;
 }
 
-static phys_addr_t __init i845_stolen_base(int num, int slot, int func,
-  size_t stolen_size)
+static resource_size_t __init i845_stolen_base(int num, int slot, int func,
+  resource_size_t stolen_size)
 {
-   return (phys_addr_t)i830_mem_size() - i845_tseg_size() - stolen_size;
+   return i830_mem_size() - i845_tseg_size() - stolen_size;
 }
 
-static phys_addr_t __init i85x_stolen_base(int num, int slot, int func,
-  size_t stolen_size)
+static resource_size_t __init i85x_stolen_base(int num, int slot, int func,
+  resource_size_t stolen_size)
 {
-   return (phys_addr_t)i85x_mem_size() - i85x_tseg_size() - stolen_size;
+   return i85x_mem_size() - i85x_tseg_size() - stolen_size;
 }
 
-static phys_addr_t __init i865_stolen_base(int num, int slot, int func,
-  size_t stolen_size)
+static resource_size_t __init i865_stolen_base(int num, int slot, int func,
+  resource_size_t stolen_size)
 {
u16 toud = 0;
 
toud = read_pci_config_16(0, 0, 0, I865_TOUD);
 
-   return (phys_addr_t)(toud << 16) + i845_tseg_size();
+   return (toud << 16) + i845_tseg_size();
 }
 
-static phys_addr_t __init gen3_stolen_base(int num, int slot, int func,
-  size_t stolen_size)
+static resource_size_t __init gen3_stolen_base(int num, int slot, int func,
+  resource_size_t stolen_size)
 {
u32 bsm;
 
@@ -337,10 +337,10 @@ static phys_addr_t __init gen3_stolen_base(int num, int 
slot, int func,
 */
bsm = read_pci_config(num, slot, func, INTEL_BSM);
 
-   return (phys_addr_t)bsm & INTEL_BSM_MASK;
+   return bsm & INTEL_BSM_MASK;
 }
 
-static size_t __init i830_stolen_size(int num, int slot, int func)
+static resource_size_t __init i830_stolen_size(int num, int slot, int func)
 {
u16 gmch_ctrl;
u16 gms;
@@ -361,7 +361,7 @@ static size_t __init i830_stolen_size(int num, int slot, 
int func)
return 0;
 }
 
-static size_t __init gen3_stolen_size(int num, int slot, int 

[Intel-gfx] [GIT PULL] git fixes for 4.15

[Zhenyu Wang]

Hi,

Here's current gvt fixes for 4.15. One is backport from
f2880e04f3a5 ("drm/i915/gvt: Move request alloc to dispatch_workload path 
only").
And other two regression fixes.

thanks
--
The following changes since commit 3572f04c69ed4369da5d3c65d84fb18774aa60b6:

  drm/i915: Fix init_clock_gating for resume (2017-11-21 11:40:12 +0200)

are available in the Git repository at:

  https://github.com/intel/gvt-linux.git tags/gvt-next-fixes-2017-11-24

for you to fetch changes up to e0d1ffe5a86326fb769cce03e726d2f1fca0725c:

  drm/i915/gvt: Move request alloc to dispatch_workload path only (2017-11-22 
14:52:07 +0800)


gvt-next-fixes-2017-11-24

- regression fixes for safe lock, compression workaround
  and sane request allocation order.


Changbin Du (1):
  drm/i915/gvt: Fix unsafe locking caused by spin_unlock_bh

Weinan Li (1):
  drm/i915/gvt: remove skl_misc_ctl_write handler

fred gao (1):
  drm/i915/gvt: Move request alloc to dispatch_workload path only

 drivers/gpu/drm/i915/gvt/execlist.c  |  6 +
 drivers/gpu/drm/i915/gvt/handlers.c  | 45 
 drivers/gpu/drm/i915/gvt/scheduler.c | 33 +++---
 drivers/gpu/drm/i915/gvt/scheduler.h |  3 +++
 4 files changed, 39 insertions(+), 48 deletions(-)

-- 
Open Source Technology Center, Intel ltd.

$gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827


signature.asc
Description: PGP signature
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Re: [Intel-gfx] 4.9.62: intermittent flicker after upgrade from 4.9.61

[Rainer Fiebig]

Greg KH wrote:
> On Thu, Nov 23, 2017 at 10:09:25PM +0100, Rainer Fiebig wrote:
>> Rainer Fiebig wrote:
>>> Maarten Lankhorst wrote:
 Op 20-11-17 om 09:51 schreef Rainer Fiebig:
> Jani Nikula wrote:
>> On Sun, 19 Nov 2017, Greg KH  wrote:
>>> On Sun, Nov 19, 2017 at 01:44:06PM +0100, Rainer Fiebig wrote:
 Greg KH wrote:
> On Sun, Nov 19, 2017 at 12:56:26PM +0100, Rainer Fiebig wrote:
>> Greg KH wrote:
>>> On Sat, Nov 18, 2017 at 05:08:20PM +0100, Rainer Fiebig wrote:
 Greg KH wrote:
> On Sat, Nov 18, 2017 at 01:47:32PM +0100, Rainer Fiebig wrote:
>> Hi!
>>
>> Hopefully the right addressee.
>>
>> Encountered two bad backports which cause screen-flicker.
>> dmesg shows:
>>
>> ...
>> [drm:ironlake_irq_handler [i915]] *ERROR* CPU pipe A FIFO 
>> underrun
>> [drm:ironlake_irq_handler [i915]] *ERROR* PCH transcoder A FIFO 
>> underrun
>> [drm:ironlake_irq_handler [i915]] *ERROR* CPU pipe B FIFO 
>> underrun
>> [drm:ironlake_irq_handler [i915]] *ERROR* PCH transcoder B FIFO 
>> underrun
>> ...
>>
>> CPU: Intel Core i3 (Clarkdale/Ironlake)
>>
>> The backports are:
>>
>> - diff --git a/drivers/gpu/drm/i915/intel_pm.c
>> b/drivers/gpu/drm/i915/intel_pm.c
>> index 49de476..277a802 100644
>> - diff --git a/drivers/gpu/drm/i915/intel_drv.h
>> b/drivers/gpu/drm/i915/intel_drv.h
>> index a19ec06..3ce9ba3 100644
>>
>> After reversing them the flicker is gone, no more messages in 
>> dmesg. All
>> else OK so far.
> So which commit was the one that caused the problem?  I will be 
> glad to
> revert it.
>
> thanks,
>
> greg k-h
>
>
 I started by reverting the more complex one first ("index
 49de476..277a802100644"). But the kernel wouldn't compile then.
>>> What git commit id is that?  I don't see those ids in the 4.9-stable
>>> tree.
>>>
 So I also reverted "index a19ec06..3ce9ba3 100644". After that the
 kernel compiled just fine and the problems were gone (still are).
>>> Same here, what git commit id was this?
>>>
>>> thanks,
>>>
>>> greg k-h
>>>
>> OK, no mistake. IIRC, I took the patches (and the IDs) from the
>> changelog for patch-4.9.62. I've attached both, so you can check 
>> yourself.
>>
>> I've also applied a freshly downloaded patch-4.9.62 to a freshly
>> expanded 4.9 and re-compiled. The flicker is there. I haven't yet
>> reverted the two patches but I'm confident that after having done so 
>> the
>> flicker will be gone. If not I'll let you know.
>>
>> As a good news: 4.14 is *not* affected. So to me it seems those two
>> patches are part of sort of a package and can not be backported 
>> alone.
>>
>> So long!
>> Rainer Fiebig
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c 
>> b/drivers/gpu/drm/i915/intel_pm.c
>> index 49de476..277a802 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -27,6 +27,7 @@
>>  
>>  #include 
>>  #include 
>> +#include 
>>  #include "i915_drv.h"
>>  #include "intel_drv.h"
>>  #include "../../../platform/x86/intel_ips.h"
>> @@ -2017,9 +2018,9 @@ static void ilk_compute_wm_level(const struct 
>> drm_i915_private *dev_priv,
>>   const struct intel_crtc *intel_crtc,
>>   int level,
>>   struct intel_crtc_state *cstate,
>> - struct intel_plane_state *pristate,
>> - struct intel_plane_state *sprstate,
>> - struct intel_plane_state *curstate,
>> + const struct intel_plane_state 
>> *pristate,
>> + const struct intel_plane_state 
>> *sprstate,
>> + const struct intel_plane_state 
>> *curstate,
>>   struct intel_wm_level *result)
>>  {
>>  uint16_t pri_latency = dev_priv->wm.pri_latency[level];
>> @@ -2341,28 +2342,24 @@ static int ilk_compute_pipe_wm(struct 
>> intel_crtc_state 

Re: [Intel-gfx] 4.9.62: intermittent flicker after upgrade from 4.9.61

[Rainer Fiebig]

Greg KH wrote:
> On Thu, Nov 23, 2017 at 10:09:25PM +0100, Rainer Fiebig wrote:
>> Rainer Fiebig wrote:
>>> Maarten Lankhorst wrote:
 Op 20-11-17 om 09:51 schreef Rainer Fiebig:
> Jani Nikula wrote:
>> On Sun, 19 Nov 2017, Greg KH  wrote:
>>> On Sun, Nov 19, 2017 at 01:44:06PM +0100, Rainer Fiebig wrote:
 Greg KH wrote:
> On Sun, Nov 19, 2017 at 12:56:26PM +0100, Rainer Fiebig wrote:
>> Greg KH wrote:
>>> On Sat, Nov 18, 2017 at 05:08:20PM +0100, Rainer Fiebig wrote:
 Greg KH wrote:
> On Sat, Nov 18, 2017 at 01:47:32PM +0100, Rainer Fiebig wrote:
>> Hi!
>>
>> Hopefully the right addressee.
>>
>> Encountered two bad backports which cause screen-flicker.
>> dmesg shows:
>>
>> ...
>> [drm:ironlake_irq_handler [i915]] *ERROR* CPU pipe A FIFO 
>> underrun
>> [drm:ironlake_irq_handler [i915]] *ERROR* PCH transcoder A FIFO 
>> underrun
>> [drm:ironlake_irq_handler [i915]] *ERROR* CPU pipe B FIFO 
>> underrun
>> [drm:ironlake_irq_handler [i915]] *ERROR* PCH transcoder B FIFO 
>> underrun
>> ...
>>
>> CPU: Intel Core i3 (Clarkdale/Ironlake)
>>
>> The backports are:
>>
>> - diff --git a/drivers/gpu/drm/i915/intel_pm.c
>> b/drivers/gpu/drm/i915/intel_pm.c
>> index 49de476..277a802 100644
>> - diff --git a/drivers/gpu/drm/i915/intel_drv.h
>> b/drivers/gpu/drm/i915/intel_drv.h
>> index a19ec06..3ce9ba3 100644
>>
>> After reversing them the flicker is gone, no more messages in 
>> dmesg. All
>> else OK so far.
> So which commit was the one that caused the problem?  I will be 
> glad to
> revert it.
>
> thanks,
>
> greg k-h
>
>
 I started by reverting the more complex one first ("index
 49de476..277a802100644"). But the kernel wouldn't compile then.
>>> What git commit id is that?  I don't see those ids in the 4.9-stable
>>> tree.
>>>
 So I also reverted "index a19ec06..3ce9ba3 100644". After that the
 kernel compiled just fine and the problems were gone (still are).
>>> Same here, what git commit id was this?
>>>
>>> thanks,
>>>
>>> greg k-h
>>>
>> OK, no mistake. IIRC, I took the patches (and the IDs) from the
>> changelog for patch-4.9.62. I've attached both, so you can check 
>> yourself.
>>
>> I've also applied a freshly downloaded patch-4.9.62 to a freshly
>> expanded 4.9 and re-compiled. The flicker is there. I haven't yet
>> reverted the two patches but I'm confident that after having done so 
>> the
>> flicker will be gone. If not I'll let you know.
>>
>> As a good news: 4.14 is *not* affected. So to me it seems those two
>> patches are part of sort of a package and can not be backported 
>> alone.
>>
>> So long!
>> Rainer Fiebig
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c 
>> b/drivers/gpu/drm/i915/intel_pm.c
>> index 49de476..277a802 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -27,6 +27,7 @@
>>  
>>  #include 
>>  #include 
>> +#include 
>>  #include "i915_drv.h"
>>  #include "intel_drv.h"
>>  #include "../../../platform/x86/intel_ips.h"
>> @@ -2017,9 +2018,9 @@ static void ilk_compute_wm_level(const struct 
>> drm_i915_private *dev_priv,
>>   const struct intel_crtc *intel_crtc,
>>   int level,
>>   struct intel_crtc_state *cstate,
>> - struct intel_plane_state *pristate,
>> - struct intel_plane_state *sprstate,
>> - struct intel_plane_state *curstate,
>> + const struct intel_plane_state 
>> *pristate,
>> + const struct intel_plane_state 
>> *sprstate,
>> + const struct intel_plane_state 
>> *curstate,
>>   struct intel_wm_level *result)
>>  {
>>  uint16_t pri_latency = dev_priv->wm.pri_latency[level];
>> @@ -2341,28 +2342,24 @@ static int ilk_compute_pipe_wm(struct 
>> intel_crtc_state 

Re: [Intel-gfx] 4.9.62: intermittent flicker after upgrade from 4.9.61

[Greg KH]

On Thu, Nov 23, 2017 at 10:09:25PM +0100, Rainer Fiebig wrote:
> Rainer Fiebig wrote:
> > Maarten Lankhorst wrote:
> >> Op 20-11-17 om 09:51 schreef Rainer Fiebig:
> >>> Jani Nikula wrote:
>  On Sun, 19 Nov 2017, Greg KH  wrote:
> > On Sun, Nov 19, 2017 at 01:44:06PM +0100, Rainer Fiebig wrote:
> >> Greg KH wrote:
> >>> On Sun, Nov 19, 2017 at 12:56:26PM +0100, Rainer Fiebig wrote:
>  Greg KH wrote:
> > On Sat, Nov 18, 2017 at 05:08:20PM +0100, Rainer Fiebig wrote:
> >> Greg KH wrote:
> >>> On Sat, Nov 18, 2017 at 01:47:32PM +0100, Rainer Fiebig wrote:
>  Hi!
> 
>  Hopefully the right addressee.
> 
>  Encountered two bad backports which cause screen-flicker.
>  dmesg shows:
> 
>  ...
>  [drm:ironlake_irq_handler [i915]] *ERROR* CPU pipe A FIFO 
>  underrun
>  [drm:ironlake_irq_handler [i915]] *ERROR* PCH transcoder A FIFO 
>  underrun
>  [drm:ironlake_irq_handler [i915]] *ERROR* CPU pipe B FIFO 
>  underrun
>  [drm:ironlake_irq_handler [i915]] *ERROR* PCH transcoder B FIFO 
>  underrun
>  ...
> 
>  CPU: Intel Core i3 (Clarkdale/Ironlake)
> 
>  The backports are:
> 
>  - diff --git a/drivers/gpu/drm/i915/intel_pm.c
>  b/drivers/gpu/drm/i915/intel_pm.c
>  index 49de476..277a802 100644
>  - diff --git a/drivers/gpu/drm/i915/intel_drv.h
>  b/drivers/gpu/drm/i915/intel_drv.h
>  index a19ec06..3ce9ba3 100644
> 
>  After reversing them the flicker is gone, no more messages in 
>  dmesg. All
>  else OK so far.
> >>> So which commit was the one that caused the problem?  I will be 
> >>> glad to
> >>> revert it.
> >>>
> >>> thanks,
> >>>
> >>> greg k-h
> >>>
> >>>
> >> I started by reverting the more complex one first ("index
> >> 49de476..277a802100644"). But the kernel wouldn't compile then.
> > What git commit id is that?  I don't see those ids in the 4.9-stable
> > tree.
> >
> >> So I also reverted "index a19ec06..3ce9ba3 100644". After that the
> >> kernel compiled just fine and the problems were gone (still are).
> > Same here, what git commit id was this?
> >
> > thanks,
> >
> > greg k-h
> >
>  OK, no mistake. IIRC, I took the patches (and the IDs) from the
>  changelog for patch-4.9.62. I've attached both, so you can check 
>  yourself.
> 
>  I've also applied a freshly downloaded patch-4.9.62 to a freshly
>  expanded 4.9 and re-compiled. The flicker is there. I haven't yet
>  reverted the two patches but I'm confident that after having done so 
>  the
>  flicker will be gone. If not I'll let you know.
> 
>  As a good news: 4.14 is *not* affected. So to me it seems those two
>  patches are part of sort of a package and can not be backported 
>  alone.
> 
>  So long!
>  Rainer Fiebig
>  diff --git a/drivers/gpu/drm/i915/intel_pm.c 
>  b/drivers/gpu/drm/i915/intel_pm.c
>  index 49de476..277a802 100644
>  --- a/drivers/gpu/drm/i915/intel_pm.c
>  +++ b/drivers/gpu/drm/i915/intel_pm.c
>  @@ -27,6 +27,7 @@
>   
>   #include 
>   #include 
>  +#include 
>   #include "i915_drv.h"
>   #include "intel_drv.h"
>   #include "../../../platform/x86/intel_ips.h"
>  @@ -2017,9 +2018,9 @@ static void ilk_compute_wm_level(const struct 
>  drm_i915_private *dev_priv,
>    const struct intel_crtc *intel_crtc,
>    int level,
>    struct intel_crtc_state *cstate,
>  - struct intel_plane_state *pristate,
>  - struct intel_plane_state *sprstate,
>  - struct intel_plane_state *curstate,
>  + const struct intel_plane_state 
>  *pristate,
>  + const struct intel_plane_state 
>  *sprstate,
>  + const struct intel_plane_state 
>  *curstate,
>    struct intel_wm_level *result)
>   {
>   uint16_t pri_latency = dev_priv->wm.pri_latency[level];
>  @@ -2341,28 +2342,24 @@ static int ilk_compute_pipe_wm(struct 
>  intel_crtc_state *cstate)
>   

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/selftests: Hold rpm wakeref for request + ggtt usage

[Patchwork]

== Series Details ==

Series: drm/i915/selftests: Hold rpm wakeref for request + ggtt usage
URL   : https://patchwork.freedesktop.org/series/34334/
State : warning

== Summary ==

Test kms_chv_cursor_fail:
Subgroup pipe-b-128x128-top-edge:
pass   -> SKIP   (shard-hsw)
Test kms_force_connector_basic:
Subgroup prune-stale-modes:
skip   -> PASS   (shard-hsw)
Test drv_selftest:
Subgroup mock_sanitycheck:
pass   -> DMESG-WARN (shard-snb) fdo#103717
Test drv_module_reload:
Subgroup basic-reload-inject:
pass   -> DMESG-WARN (shard-snb) fdo#102707 +1
Test kms_setmode:
Subgroup basic:
fail   -> PASS   (shard-hsw) fdo#99912
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-render:
pass   -> FAIL   (shard-snb) fdo#101623
Test kms_sysfs_edid_timing:
pass   -> WARN   (shard-hsw) fdo#100047
Test gem_busy:
Subgroup close-race:
pass   -> FAIL   (shard-snb) fdo#103829

fdo#103717 https://bugs.freedesktop.org/show_bug.cgi?id=103717
fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
fdo#103829 https://bugs.freedesktop.org/show_bug.cgi?id=103829

shard-hswtotal:2667 pass:1533 dwarn:2   dfail:0   fail:10  skip:1121 
time:9523s
shard-snbtotal:2667 pass:1309 dwarn:3   dfail:0   fail:14  skip:1341 
time:8095s
Blacklisted hosts:
shard-apltotal:2645 pass:1666 dwarn:2   dfail:0   fail:22  skip:954 
time:13223s
shard-kbltotal:2667 pass:1801 dwarn:1   dfail:0   fail:25  skip:840 
time:10916s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7271/shards.html
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/pmu: Hide the (unsigned long)ptr cast (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/pmu: Hide the (unsigned long)ptr cast (rev2)
URL   : https://patchwork.freedesktop.org/series/34318/
State : success

== Summary ==

Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-blt:
pass   -> FAIL   (shard-snb) fdo#101623
Test perf:
Subgroup polling:
fail   -> PASS   (shard-hsw) fdo#102252
Test drv_selftest:
Subgroup mock_sanitycheck:
pass   -> DMESG-WARN (shard-hsw) fdo#103719
Test drv_module_reload:
Subgroup basic-reload-inject:
pass   -> DMESG-WARN (shard-snb) fdo#102707 +1

fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#103719 https://bugs.freedesktop.org/show_bug.cgi?id=103719
fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707

shard-hswtotal:2667 pass:1534 dwarn:2   dfail:0   fail:10  skip:1121 
time:9530s
shard-snbtotal:2667 pass:1310 dwarn:3   dfail:0   fail:13  skip:1341 
time:8115s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7270/shards.html
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Re: [Intel-gfx] [PATCH] drm/i915/selftests: Hold rpm wakeref for request + ggtt usage

[Matthew Auld]

On 23 November 2017 at 23:37, Chris Wilson  wrote:
> Since the removal of the delayed rc6 enabling, we now setup and drop the
> early rpm wakeref during modules initialisation before we start the live
> selftests. As such, we are now detecting errors in the tests where we
> were not holding the required wakeref for various actions. As rpm is not
> the primary goal of the tests involved, take a coarse and convenient rpm
> wakeref around the tests.
>
> Signed-off-by: Chris Wilson 
> Cc: Matthew Auld 
Reviewed-by: Matthew Auld 
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Hold rpm wakeref for request + ggtt usage

[Patchwork]

== Series Details ==

Series: drm/i915/selftests: Hold rpm wakeref for request + ggtt usage
URL   : https://patchwork.freedesktop.org/series/34334/
State : success

== Summary ==

Series 34334v1 drm/i915/selftests: Hold rpm wakeref for request + ggtt usage
https://patchwork.freedesktop.org/api/1.0/series/34334/revisions/1/mbox/

Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-c:
incomplete -> PASS   (fi-cfl-s2)

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:442s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:462s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:388s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:541s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:279s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:506s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:506s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:502s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:492s
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:616s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:430s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:263s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:542s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:432s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:440s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:432s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:473s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:461s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:575s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:457s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:547s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:563s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:522s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:502s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:461s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:571s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:427s
Blacklisted hosts:
fi-cnl-y total:289  pass:261  dwarn:1   dfail:0   fail:0   skip:27  
time:575s
fi-glk-dsi   total:18   pass:17   dwarn:0   dfail:0   fail:0   skip:0  
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:478s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:528s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:483s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:529s

b407e5f38397c0c22b5056a1664753287993b152 drm-tip: 2017y-11m-23d-16h-14m-59s UTC 
integration manifest
dcdbce940b87 drm/i915/selftests: Hold rpm wakeref for request + ggtt usage

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7271/
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read()

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Pass the correct msgs to 
gmbus_is_index_read()
URL   : https://patchwork.freedesktop.org/series/34329/
State : success

== Summary ==

Test perf:
Subgroup polling:
fail   -> PASS   (shard-hsw) fdo#102252
Test kms_setmode:
Subgroup basic:
fail   -> PASS   (shard-hsw) fdo#99912
Test drv_selftest:
Subgroup mock_sanitycheck:
pass   -> DMESG-WARN (shard-snb) fdo#103717
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-render:
pass   -> FAIL   (shard-snb) fdo#101623

fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#103717 https://bugs.freedesktop.org/show_bug.cgi?id=103717
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623

shard-hswtotal:2667 pass:1536 dwarn:1   dfail:0   fail:9   skip:1121 
time:9530s
shard-snbtotal:2667 pass:1311 dwarn:2   dfail:0   fail:13  skip:1341 
time:8137s
Blacklisted hosts:
shard-apltotal:2645 pass:1663 dwarn:1   dfail:0   fail:26  skip:954 
time:13147s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7268/shards.html
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[Intel-gfx] [PATCH] drm/i915/selftests: Hold rpm wakeref for request + ggtt usage

[Chris Wilson]

Since the removal of the delayed rc6 enabling, we now setup and drop the
early rpm wakeref during modules initialisation before we start the live
selftests. As such, we are now detecting errors in the tests where we
were not holding the required wakeref for various actions. As rpm is not
the primary goal of the tests involved, take a coarse and convenient rpm
wakeref around the tests.

Signed-off-by: Chris Wilson 
Cc: Matthew Auld 
---
 drivers/gpu/drm/i915/selftests/huge_pages.c | 2 ++
 drivers/gpu/drm/i915/selftests/i915_gem_evict.c | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c 
b/drivers/gpu/drm/i915/selftests/huge_pages.c
index df1befe2c793..e6b31041cc88 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -1749,6 +1749,7 @@ int i915_gem_huge_page_live_selftests(struct 
drm_i915_private *dev_priv)
return PTR_ERR(file);
 
mutex_lock(_priv->drm.struct_mutex);
+   intel_runtime_pm_get(dev_priv);
 
ctx = live_context(dev_priv, file);
if (IS_ERR(ctx)) {
@@ -1759,6 +1760,7 @@ int i915_gem_huge_page_live_selftests(struct 
drm_i915_private *dev_priv)
err = i915_subtests(tests, ctx);
 
 out_unlock:
+   intel_runtime_pm_put(dev_priv);
mutex_unlock(_priv->drm.struct_mutex);
 
mock_file_free(dev_priv, file);
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c 
b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
index f463105ff48d..e1ddad635d73 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
@@ -355,6 +355,7 @@ static int igt_evict_contexts(void *arg)
return 0;
 
mutex_lock(>drm.struct_mutex);
+   intel_runtime_pm_get(i915);
 
/* Reserve a block so that we know we have enough to fit a few rq */
memset(, 0, sizeof(hole));
@@ -463,6 +464,7 @@ static int igt_evict_contexts(void *arg)
}
if (drm_mm_node_allocated())
drm_mm_remove_node();
+   intel_runtime_pm_put(i915);
mutex_unlock(>drm.struct_mutex);
 
return err;
-- 
2.15.0

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[Intel-gfx] ✗ Fi.CI.IGT: failure for igt/perf_pmu: Recalibrate interrupt loop.

[Patchwork]

== Series Details ==

Series: igt/perf_pmu: Recalibrate interrupt loop.
URL   : https://patchwork.freedesktop.org/series/34310/
State : failure

== Summary ==

Test perf:
Subgroup polling:
fail   -> PASS   (shard-hsw) fdo#102252
Test kms_flip:
Subgroup vblank-vs-modeset-suspend:
pass   -> DMESG-WARN (shard-snb)
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-blt:
pass   -> FAIL   (shard-snb) fdo#101623
Subgroup fbc-suspend:
pass   -> FAIL   (shard-hsw)
Test kms_setmode:
Subgroup basic:
fail   -> PASS   (shard-hsw) fdo#99912

fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912

shard-hswtotal:2667 pass:1535 dwarn:1   dfail:0   fail:10  skip:1121 
time:9570s
shard-snbtotal:2667 pass:1311 dwarn:2   dfail:0   fail:13  skip:1341 
time:8129s
Blacklisted hosts:
shard-kbltotal:2667 pass:1804 dwarn:1   dfail:0   fail:23  skip:839 
time:10931s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_545/shards.html
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm: More plane clipping polish

[Patchwork]

== Series Details ==

Series: drm: More plane clipping polish
URL   : https://patchwork.freedesktop.org/series/34323/
State : success

== Summary ==

Test drv_module_reload:
Subgroup basic-no-display:
pass   -> DMESG-WARN (shard-hsw) fdo#102707
Test kms_flip:
Subgroup wf_vblank-vs-modeset-interruptible:
pass   -> DMESG-WARN (shard-hsw) fdo#102614
Test perf:
Subgroup polling:
fail   -> PASS   (shard-hsw) fdo#102252
Test kms_setmode:
Subgroup basic:
fail   -> PASS   (shard-hsw) fdo#99912

fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912

shard-hswtotal:2667 pass:1534 dwarn:3   dfail:0   fail:9   skip:1121 
time:9483s
shard-snbtotal:2649 pass:1294 dwarn:1   dfail:0   fail:12  skip:1341 
time:7989s
Blacklisted hosts:
shard-apltotal:2608 pass:1654 dwarn:1   dfail:0   fail:24  skip:928 
time:13276s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7267/shards.html
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] tests/kms_color: Rename pipe tests to standard notation

[Patchwork]

== Series Details ==

Series: series starting with [1/3] tests/kms_color: Rename pipe tests to 
standard notation
URL   : https://patchwork.freedesktop.org/series/34287/
State : success

== Summary ==

Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-render:
pass   -> FAIL   (shard-snb) fdo#101623 +1
Test gem_busy:
Subgroup close-race:
pass   -> FAIL   (shard-snb) fdo#103829
Test drv_module_reload:
Subgroup basic-no-display:
pass   -> DMESG-WARN (shard-snb) fdo#102707
Test perf:
Subgroup polling:
fail   -> PASS   (shard-hsw) fdo#102252

fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#103829 https://bugs.freedesktop.org/show_bug.cgi?id=103829
fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252

shard-hswtotal:2643 pass:1523 dwarn:1   dfail:0   fail:10  skip:1109 
time:8783s
shard-snbtotal:2643 pass:1297 dwarn:2   dfail:0   fail:15  skip:1329 
time:7400s
Blacklisted hosts:
shard-apltotal:2621 pass:1655 dwarn:2   dfail:0   fail:21  skip:942 
time:12635s
shard-kbltotal:2643 pass:1787 dwarn:6   dfail:0   fail:25  skip:825 
time:10123s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_543/shards.html
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] igt/perf_pmu: Reduce arbitrary delays

[Patchwork]

== Series Details ==

Series: series starting with [1/3] igt/perf_pmu: Reduce arbitrary delays
URL   : https://patchwork.freedesktop.org/series/34271/
State : success

== Summary ==

Test kms_cursor_crc:
Subgroup cursor-256x256-suspend:
pass   -> SKIP   (shard-snb) fdo#102365

fdo#102365 https://bugs.freedesktop.org/show_bug.cgi?id=102365

shard-hswtotal:2667 pass:1534 dwarn:1   dfail:0   fail:11  skip:1121 
time:9593s
shard-snbtotal:2667 pass:1311 dwarn:1   dfail:0   fail:12  skip:1343 
time:8101s
Blacklisted hosts:
shard-apltotal:2645 pass:1665 dwarn:1   dfail:0   fail:24  skip:954 
time:13254s
shard-kbltotal:2595 pass:1734 dwarn:19  dfail:2   fail:24  skip:815 
time:10756s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_541/shards.html
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Hide the (unsigned long)ptr cast (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/pmu: Hide the (unsigned long)ptr cast (rev2)
URL   : https://patchwork.freedesktop.org/series/34318/
State : success

== Summary ==

Series 34318v2 drm/i915/pmu: Hide the (unsigned long)ptr cast
https://patchwork.freedesktop.org/api/1.0/series/34318/revisions/2/mbox/

Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-c:
incomplete -> PASS   (fi-cfl-s2)

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:444s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:459s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:382s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:554s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:276s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:502s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:512s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:501s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:493s
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:602s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:432s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:267s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:543s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:432s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:441s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:441s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:487s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:463s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:580s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:458s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:550s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:570s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:518s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:496s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:467s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:567s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:424s
Blacklisted hosts:
fi-glk-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:504s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:488s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:532s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:479s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:536s

b407e5f38397c0c22b5056a1664753287993b152 drm-tip: 2017y-11m-23d-16h-14m-59s UTC 
integration manifest
8fc005f6ba8f drm/i915/pmu: Hide the (unsigned long)ptr cast

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7270/
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[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/pmu: Hide the (unsigned long)ptr cast

[Patchwork]

== Series Details ==

Series: drm/i915/pmu: Hide the (unsigned long)ptr cast
URL   : https://patchwork.freedesktop.org/series/34318/
State : warning

== Summary ==

Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-blt:
pass   -> FAIL   (shard-snb) fdo#101623
Test kms_setmode:
Subgroup basic:
fail   -> PASS   (shard-hsw) fdo#99912
Test kms_chv_cursor_fail:
Subgroup pipe-b-128x128-top-edge:
pass   -> SKIP   (shard-hsw)
Test kms_force_connector_basic:
Subgroup prune-stale-modes:
skip   -> PASS   (shard-hsw)
Test drv_module_reload:
Subgroup basic-no-display:
pass   -> DMESG-WARN (shard-snb) fdo#102707 +1

fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707

shard-hswtotal:2667 pass:1534 dwarn:2   dfail:0   fail:10  skip:1121 
time:9516s
shard-snbtotal:2667 pass:1311 dwarn:2   dfail:0   fail:13  skip:1341 
time:8101s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7265/shards.html
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[Intel-gfx] ✓ Fi.CI.IGT: success for igt/perf_pmu: Stop peeking at intel_mmio registers

[Patchwork]

== Series Details ==

Series: igt/perf_pmu: Stop peeking at intel_mmio registers
URL   : https://patchwork.freedesktop.org/series/34268/
State : success

== Summary ==

Test perf:
Subgroup polling:
fail   -> PASS   (shard-hsw) fdo#102252

fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252

shard-hswtotal:2667 pass:1535 dwarn:1   dfail:0   fail:10  skip:1121 
time:9576s
shard-snbtotal:2667 pass:1312 dwarn:1   dfail:0   fail:12  skip:1342 
time:8145s
Blacklisted hosts:
shard-apltotal:2645 pass:1665 dwarn:1   dfail:0   fail:23  skip:954 
time:13157s
shard-kbltotal:2635 pass:1781 dwarn:1   dfail:0   fail:24  skip:828 
time:10536s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_540/shards.html
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Re: [Intel-gfx] [RFC] drm/i915/guc: Rename i915_guc_reg.h to intel_guc_reg.h

[Chris Wilson]

Quoting Michal Wajdeczko (2017-11-23 18:09:15)
> We are using intel_ prefix for all filenames with hardware related
> definitions. GuC registers also fall into this category.

Seconded.
-Chris
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[Intel-gfx] [PATCH v2] drm/i915/pmu: Hide the (unsigned long)ptr cast

[Chris Wilson]

We pretend the PMU config id is a pointer value when encoding it into
the device parameters for presentation via sysfs. This requires casting
of an unsigned long into and out of the pointer member, which annoys
smatch:

drivers/gpu/drm/i915/i915_pmu.c:684 i915_pmu_event_show() warn: argument 3 to 
%lx specifier is cast from pointer

Instead of abusing a generic dev_ext_attribute, define our own typesafe
attributes.

Signed-off-by: Chris Wilson 
Cc: Tvrtko Ursulin 
Cc: Michal Wajdeczko 
---
 drivers/gpu/drm/i915/i915_pmu.c | 30 --
 1 file changed, 20 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 6a42e7f7967d..5170a46893d7 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -650,19 +650,24 @@ static int i915_pmu_event_event_idx(struct perf_event 
*event)
return 0;
 }
 
+struct i915_str_attribute {
+   struct device_attribute attr;
+   const char *str;
+};
+
 static ssize_t i915_pmu_format_show(struct device *dev,
struct device_attribute *attr, char *buf)
 {
-   struct dev_ext_attribute *eattr;
+   struct i915_str_attribute *eattr;
 
-   eattr = container_of(attr, struct dev_ext_attribute, attr);
-   return sprintf(buf, "%s\n", (char *)eattr->var);
+   eattr = container_of(attr, struct i915_str_attribute, attr);
+   return sprintf(buf, "%s\n", eattr->str);
 }
 
 #define I915_PMU_FORMAT_ATTR(_name, _config) \
-   (&((struct dev_ext_attribute[]) { \
+   (&((struct i915_str_attribute[]) { \
{ .attr = __ATTR(_name, 0444, i915_pmu_format_show, NULL), \
- .var = (void *)_config, } \
+ .str = _config, } \
})[0].attr.attr)
 
 static struct attribute *i915_pmu_format_attrs[] = {
@@ -675,19 +680,24 @@ static const struct attribute_group 
i915_pmu_format_attr_group = {
.attrs = i915_pmu_format_attrs,
 };
 
+struct i915_ext_attribute {
+   struct device_attribute attr;
+   unsigned long val;
+};
+
 static ssize_t i915_pmu_event_show(struct device *dev,
   struct device_attribute *attr, char *buf)
 {
-   struct dev_ext_attribute *eattr;
+   struct i915_ext_attribute *eattr;
 
-   eattr = container_of(attr, struct dev_ext_attribute, attr);
-   return sprintf(buf, "config=0x%lx\n", (unsigned long)eattr->var);
+   eattr = container_of(attr, struct i915_ext_attribute, attr);
+   return sprintf(buf, "config=0x%lx\n", eattr->val);
 }
 
 #define I915_EVENT_ATTR(_name, _config) \
-   (&((struct dev_ext_attribute[]) { \
+   (&((struct i915_ext_attribute[]) { \
{ .attr = __ATTR(_name, 0444, i915_pmu_event_show, NULL), \
- .var = (void *)_config, } \
+ .val = _config, } \
})[0].attr.attr)
 
 #define I915_EVENT_STR(_name, _str) \
-- 
2.15.0

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Re: [Intel-gfx] 4.9.62: intermittent flicker after upgrade from 4.9.61

[Rainer Fiebig]

Rainer Fiebig wrote:
> Maarten Lankhorst wrote:
>> Op 20-11-17 om 09:51 schreef Rainer Fiebig:
>>> Jani Nikula wrote:
 On Sun, 19 Nov 2017, Greg KH  wrote:
> On Sun, Nov 19, 2017 at 01:44:06PM +0100, Rainer Fiebig wrote:
>> Greg KH wrote:
>>> On Sun, Nov 19, 2017 at 12:56:26PM +0100, Rainer Fiebig wrote:
 Greg KH wrote:
> On Sat, Nov 18, 2017 at 05:08:20PM +0100, Rainer Fiebig wrote:
>> Greg KH wrote:
>>> On Sat, Nov 18, 2017 at 01:47:32PM +0100, Rainer Fiebig wrote:
 Hi!

 Hopefully the right addressee.

 Encountered two bad backports which cause screen-flicker.
 dmesg shows:

 ...
 [drm:ironlake_irq_handler [i915]] *ERROR* CPU pipe A FIFO underrun
 [drm:ironlake_irq_handler [i915]] *ERROR* PCH transcoder A FIFO 
 underrun
 [drm:ironlake_irq_handler [i915]] *ERROR* CPU pipe B FIFO underrun
 [drm:ironlake_irq_handler [i915]] *ERROR* PCH transcoder B FIFO 
 underrun
 ...

 CPU: Intel Core i3 (Clarkdale/Ironlake)

 The backports are:

 - diff --git a/drivers/gpu/drm/i915/intel_pm.c
 b/drivers/gpu/drm/i915/intel_pm.c
 index 49de476..277a802 100644
 - diff --git a/drivers/gpu/drm/i915/intel_drv.h
 b/drivers/gpu/drm/i915/intel_drv.h
 index a19ec06..3ce9ba3 100644

 After reversing them the flicker is gone, no more messages in 
 dmesg. All
 else OK so far.
>>> So which commit was the one that caused the problem?  I will be 
>>> glad to
>>> revert it.
>>>
>>> thanks,
>>>
>>> greg k-h
>>>
>>>
>> I started by reverting the more complex one first ("index
>> 49de476..277a802100644"). But the kernel wouldn't compile then.
> What git commit id is that?  I don't see those ids in the 4.9-stable
> tree.
>
>> So I also reverted "index a19ec06..3ce9ba3 100644". After that the
>> kernel compiled just fine and the problems were gone (still are).
> Same here, what git commit id was this?
>
> thanks,
>
> greg k-h
>
 OK, no mistake. IIRC, I took the patches (and the IDs) from the
 changelog for patch-4.9.62. I've attached both, so you can check 
 yourself.

 I've also applied a freshly downloaded patch-4.9.62 to a freshly
 expanded 4.9 and re-compiled. The flicker is there. I haven't yet
 reverted the two patches but I'm confident that after having done so 
 the
 flicker will be gone. If not I'll let you know.

 As a good news: 4.14 is *not* affected. So to me it seems those two
 patches are part of sort of a package and can not be backported alone.

 So long!
 Rainer Fiebig
 diff --git a/drivers/gpu/drm/i915/intel_pm.c 
 b/drivers/gpu/drm/i915/intel_pm.c
 index 49de476..277a802 100644
 --- a/drivers/gpu/drm/i915/intel_pm.c
 +++ b/drivers/gpu/drm/i915/intel_pm.c
 @@ -27,6 +27,7 @@
  
  #include 
  #include 
 +#include 
  #include "i915_drv.h"
  #include "intel_drv.h"
  #include "../../../platform/x86/intel_ips.h"
 @@ -2017,9 +2018,9 @@ static void ilk_compute_wm_level(const struct 
 drm_i915_private *dev_priv,
 const struct intel_crtc *intel_crtc,
 int level,
 struct intel_crtc_state *cstate,
 -   struct intel_plane_state *pristate,
 -   struct intel_plane_state *sprstate,
 -   struct intel_plane_state *curstate,
 +   const struct intel_plane_state 
 *pristate,
 +   const struct intel_plane_state 
 *sprstate,
 +   const struct intel_plane_state 
 *curstate,
 struct intel_wm_level *result)
  {
uint16_t pri_latency = dev_priv->wm.pri_latency[level];
 @@ -2341,28 +2342,24 @@ static int ilk_compute_pipe_wm(struct 
 intel_crtc_state *cstate)
struct intel_pipe_wm *pipe_wm;
struct drm_device *dev = state->dev;
const struct drm_i915_private *dev_priv = to_i915(dev);
 -  struct intel_plane *intel_plane;
 -  struct intel_plane_state *pristate = NULL;
 -  struct intel_plane_state 

[Intel-gfx] ✓ Fi.CI.IGT: success for igt/kms_rotation_crc: Add horizontal flip subtest. (rev3)

[Patchwork]

== Series Details ==

Series: igt/kms_rotation_crc: Add horizontal flip subtest. (rev3)
URL   : https://patchwork.freedesktop.org/series/31407/
State : success

== Summary ==

Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-render:
pass   -> FAIL   (shard-snb) fdo#101623 +1
Test gem_busy:
Subgroup close-race:
pass   -> FAIL   (shard-snb) fdo#103829
Test kms_setmode:
Subgroup basic:
fail   -> PASS   (shard-hsw) fdo#99912
Test perf:
Subgroup polling:
fail   -> PASS   (shard-hsw) fdo#102252
Test drv_module_reload:
Subgroup basic-reload-inject:
pass   -> DMESG-WARN (shard-snb) fdo#102707 +1
Subgroup basic-reload:
pass   -> DMESG-WARN (shard-snb) fdo#102848

fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#103829 https://bugs.freedesktop.org/show_bug.cgi?id=103829
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#102848 https://bugs.freedesktop.org/show_bug.cgi?id=102848

shard-hswtotal:2687 pass:1535 dwarn:2   dfail:0   fail:9   skip:1141 
time:9553s
shard-snbtotal:2687 pass:1308 dwarn:3   dfail:0   fail:15  skip:1361 
time:8120s
Blacklisted hosts:
shard-apltotal:2665 pass:1665 dwarn:1   dfail:0   fail:24  skip:974 
time:13386s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_538/shards.html
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Re: [Intel-gfx] [PATCH] drm/i915/pmu: Hide the (unsigned long)ptr cast

[Chris Wilson]

Quoting Michal Wajdeczko (2017-11-23 18:20:52)
> On Thu, 23 Nov 2017 18:42:13 +0100, Chris Wilson  
>  wrote:
> 
> > We pretend the PMU config id is a pointer value when encoding it into
> > the device parameters for presentation via sysfs. This requires casting
> > of an unsigned long into and out of the pointer member, which annoys
> > smatch:
> >
> > drivers/gpu/drm/i915/i915_pmu.c:684 i915_pmu_event_show() warn: argument  
> > 3 to %lx specifier is cast from pointer
> >
> > Signed-off-by: Chris Wilson 
> > Cc: Tvrtko Ursulin 
> > ---
> >  drivers/gpu/drm/i915/i915_pmu.c   | 2 +-
> >  drivers/gpu/drm/i915/i915_utils.h | 5 +
> >  2 files changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_pmu.c  
> > b/drivers/gpu/drm/i915/i915_pmu.c
> > index 6a42e7f7967d..a8816d25a77b 100644
> > --- a/drivers/gpu/drm/i915/i915_pmu.c
> > +++ b/drivers/gpu/drm/i915/i915_pmu.c
> > @@ -681,7 +681,7 @@ static ssize_t i915_pmu_event_show(struct device  
> > *dev,
> >   struct dev_ext_attribute *eattr;
> >   eattr = container_of(attr, struct dev_ext_attribute, attr);
> > - return sprintf(buf, "config=0x%lx\n", (unsigned long)eattr->var);
> > + return sprintf(buf, "config=0x%lx\n", ptr_to_ulong(eattr->var));
> 
> Hmm, can't we just use %p here ?

We could but "%p" raises eyebrows as to leaking kernel addresses. It
would be nicer if there was a integer attribute we could use instead. If
push came to shove, we could just define our own, I believe.
-Chris
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[Intel-gfx] ✓ Fi.CI.IGT: success for igt/perf_pmu: Reduce arbitrary delays

[Patchwork]

== Series Details ==

Series: igt/perf_pmu: Reduce arbitrary delays
URL   : https://patchwork.freedesktop.org/series/34253/
State : success

== Summary ==

Test drv_module_reload:
Subgroup basic-no-display:
pass   -> DMESG-WARN (shard-snb) fdo#102707 +1
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-blt:
pass   -> FAIL   (shard-snb) fdo#101623
Test perf:
Subgroup polling:
fail   -> PASS   (shard-hsw) fdo#102252
Test kms_setmode:
Subgroup basic:
fail   -> PASS   (shard-hsw) fdo#99912

fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912

shard-hswtotal:2667 pass:1535 dwarn:2   dfail:0   fail:9   skip:1121 
time:9534s
shard-snbtotal:2667 pass:1311 dwarn:2   dfail:0   fail:13  skip:1341 
time:8146s
Blacklisted hosts:
shard-apltotal:2667 pass:1690 dwarn:1   dfail:0   fail:22  skip:954 
time:13516s
shard-kbltotal:2667 pass:1802 dwarn:1   dfail:0   fail:25  skip:839 
time:10903s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_536/shards.html
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Re: [Intel-gfx] [PATCH 3/3] drm/i915: Prevent zero length "index" write

[Chris Wilson]

Quoting Ville Syrjala (2017-11-23 19:41:57)
> From: Ville Syrjälä 
> 
> The hardware always writes one or two bytes in the index portion of
> an indexed transfer. Make sure the message we send as the index
> doesn't have a zero length.
> 
> Cc: sta...@vger.kernel.org
> Cc: Daniel Kurtz 
> Cc: Chris Wilson 
> Cc: Daniel Vetter 
> Cc: Sean Paul 
> Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read 
> transactions")
> Signed-off-by: Ville Syrjälä 
Reviewed-by: Chris Wilson 
-Chris
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Re: [Intel-gfx] [PATCH 2/3] drm/i915: Don't try indexed reads to alternate slave addresses

[Chris Wilson]

Quoting Ville Syrjala (2017-11-23 19:41:56)
> From: Ville Syrjälä 
> 
> We can only specify the one slave address to indexed reads/writes.
> Make sure the messages we check are destined to the same slave
> address before deciding to do an indexed transfer.
> 
> Cc: sta...@vger.kernel.org
> Cc: Daniel Kurtz 
> Cc: Chris Wilson 
> Cc: Daniel Vetter 
> Cc: Sean Paul 
> Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read 
> transactions")
> Signed-off-by: Ville Syrjälä 
Reviewed-by: Chris Wilson 
-Chris
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[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2] drm/i915: Enable render context support for Ironlake (gen5) (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [v2] drm/i915: Enable render context support for 
Ironlake (gen5) (rev2)
URL   : https://patchwork.freedesktop.org/series/34315/
State : failure

== Summary ==

Applying: drm/i915: Enable render context support for Ironlake (gen5)
Applying: drm/i915: Enable render context support for gen4 (Broadwater to 
Cantiga)
Using index info to reconstruct a base tree...
M   drivers/gpu/drm/i915/intel_engine_cs.c
Falling back to patching base and 3-way merge...
Auto-merging drivers/gpu/drm/i915/intel_engine_cs.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/intel_engine_cs.c
Patch failed at 0002 drm/i915: Enable render context support for gen4 
(Broadwater to Cantiga)

Current HEAD:
commit b407e5f38397c0c22b5056a1664753287993b152
Author: Chris Wilson 
Date:   Thu Nov 23 16:15:35 2017 +

drm-tip: 2017y-11m-23d-16h-14m-59s UTC integration manifest

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Re: [Intel-gfx] [PATCH 1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read()

[Chris Wilson]

Quoting Ville Syrjala (2017-11-23 19:41:55)
> From: Ville Syrjälä 
> 
> We're supposed to examine msgs[i] and msgs[i+1] to see if they
> form a pair suitable for an indexed transfer. But in reality
> we're examining msgs[0] and msgs[1]. Fix this.
> 
> Cc: sta...@vger.kernel.org
> Cc: Daniel Kurtz 
> Cc: Chris Wilson 
> Cc: Daniel Vetter 
> Cc: Sean Paul 
> Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read 
> transactions")
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/intel_i2c.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_i2c.c 
> b/drivers/gpu/drm/i915/intel_i2c.c
> index eb5827110d8f..165375cbef2f 100644
> --- a/drivers/gpu/drm/i915/intel_i2c.c
> +++ b/drivers/gpu/drm/i915/intel_i2c.c
> @@ -484,7 +484,7 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg 
> *msgs, int num)
>  
> for (; i < num; i += inc) {
> inc = 1;
> -   if (gmbus_is_index_read(msgs, i, num)) {
> +   if (gmbus_is_index_read([i], i, num)) {

i is passed to gmbus_is_index_read() and used as an index into msgs. So
this should be accounted for right?
-Chris
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[Intel-gfx] [PATCH v2] drm/i915: Enable render context support for Ironlake (gen5)

[Chris Wilson]

Ironlake does support being able to saving and reloading context specific
registers between contexts, providing isolation of the basic GPU state
(as programmable by userspace). This allows userspace to assume that the
GPU retains their state from one batch to the next, minimising the
amount of state it needs to reload.

v2: Fix off-by-one in reading CXT_SIZE, and add a comment that the
CXT_SIZE and context-layout do not match in bspec, but the difference is
irrelevant as we overallocate the full page anyway (Ville).

Signed-off-by: Chris Wilson 
Cc: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_engine_cs.c  | 16 
 drivers/gpu/drm/i915/intel_ringbuffer.c | 13 +
 2 files changed, 29 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c 
b/drivers/gpu/drm/i915/intel_engine_cs.c
index fede62daf3e1..5b99125a179b 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -175,6 +175,22 @@ __intel_engine_context_size(struct drm_i915_private 
*dev_priv, u8 class)
return round_up(GEN6_CXT_TOTAL_SIZE(cxt_size) * 64,
PAGE_SIZE);
case 5:
+   /*
+* There is a discrepancy here between the size reported
+* by the register and the size of the context layout
+* in the docs. Both are described as authorative!
+*
+* The discrepancy is on the order of a few cachelines,
+* but the total is under one page (4k), which is our
+* minimum allocation anyway so it should all come
+* out in the wash.
+*/
+   cxt_size = I915_READ(CXT_SIZE) + 1;
+   DRM_DEBUG_DRIVER("gen%d CXT_SIZE = %d bytes [0x%08x]\n",
+INTEL_GEN(dev_priv),
+cxt_size * 64,
+cxt_size - 1);
+   return round_up(cxt_size * 64, PAGE_SIZE);
case 4:
case 3:
case 2:
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c 
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index e2085820b586..2074749b27a5 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1403,11 +1403,14 @@ static inline int mi_set_context(struct 
drm_i915_gem_request *rq, u32 flags)
/* These flags are for resource streamer on HSW+ */
flags |= HSW_MI_RS_SAVE_STATE_EN | HSW_MI_RS_RESTORE_STATE_EN;
else
+   /* We need to save the extended state for powersaving modes */
flags |= MI_SAVE_EXT_STATE_EN | MI_RESTORE_EXT_STATE_EN;
 
len = 4;
if (IS_GEN7(i915))
len += 2 + (num_rings ? 4*num_rings + 6 : 0);
+   if (IS_GEN5(i915))
+   len += 2;
 
cs = intel_ring_begin(rq, len);
if (IS_ERR(cs))
@@ -1430,6 +1433,14 @@ static inline int mi_set_context(struct 
drm_i915_gem_request *rq, u32 flags)
GEN6_PSMI_SLEEP_MSG_DISABLE);
}
}
+   } else if (IS_GEN5(i915)) {
+   /*
+* This w/a is only listed for pre-production ilk a/b steppings,
+* but is also mentioned for programming the powerctx. To be
+* safe, just apply the workaround; we do not use SyncFlush so
+* this should never take effect and so be a no-op!
+*/
+   *cs++ = MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN;
}
 
*cs++ = MI_NOOP;
@@ -1464,6 +1475,8 @@ static inline int mi_set_context(struct 
drm_i915_gem_request *rq, u32 flags)
*cs++ = MI_NOOP;
}
*cs++ = MI_ARB_ON_OFF | MI_ARB_ENABLE;
+   } else if (IS_GEN5(i915)) {
+   *cs++ = MI_SUSPEND_FLUSH;
}
 
intel_ring_advance(rq, cs);
-- 
2.15.0

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[Intel-gfx] ✗ Fi.CI.BAT: failure for igt/perf_pmu: Combine rc6/rc6p tests

[Patchwork]

== Series Details ==

Series: igt/perf_pmu: Combine rc6/rc6p tests
URL   : https://patchwork.freedesktop.org/series/34313/
State : failure

== Summary ==

Series 34313 revision 1 was fully merged or fully failed: no git log

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[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915: Enable render context support for Ironlake (gen5)

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Enable render context support for 
Ironlake (gen5)
URL   : https://patchwork.freedesktop.org/series/34315/
State : failure

== Summary ==

Test pm_rc6_residency:
Subgroup rc6p-accuracy:
skip   -> PASS   (shard-snb)
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-render:
pass   -> FAIL   (shard-snb) fdo#101623
Test kms_cursor_legacy:
Subgroup basic-flip-after-cursor-varying-size:
pass   -> SKIP   (shard-hsw) fdo#102670
Test kms_chv_cursor_fail:
Subgroup pipe-b-128x128-bottom-edge:
pass   -> SKIP   (shard-hsw)
Test kms_pipe_crc_basic:
Subgroup read-crc-pipe-a-frame-sequence:
pass   -> FAIL   (shard-hsw)
Test perf:
Subgroup polling:
fail   -> PASS   (shard-hsw) fdo#102252
Test kms_setmode:
Subgroup basic:
fail   -> PASS   (shard-hsw) fdo#99912

fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#102670 https://bugs.freedesktop.org/show_bug.cgi?id=102670
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912

shard-hswtotal:2667 pass:1533 dwarn:1   dfail:0   fail:10  skip:1123 
time:9498s
shard-snbtotal:2667 pass:1312 dwarn:1   dfail:0   fail:14  skip:1340 
time:8069s
Blacklisted hosts:
shard-apltotal:2458 pass:1550 dwarn:2   dfail:0   fail:26  skip:878 
time:12487s
shard-kbltotal:2667 pass:1800 dwarn:1   dfail:0   fail:25  skip:841 
time:10898s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7264/shards.html
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read()

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Pass the correct msgs to 
gmbus_is_index_read()
URL   : https://patchwork.freedesktop.org/series/34329/
State : success

== Summary ==

Series 34329v1 series starting with [1/3] drm/i915: Pass the correct msgs to 
gmbus_is_index_read()
https://patchwork.freedesktop.org/api/1.0/series/34329/revisions/1/mbox/

Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-c:
incomplete -> PASS   (fi-cfl-s2)

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:446s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:458s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:437s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:550s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:279s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:508s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:513s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:503s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:507s
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:617s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:434s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:271s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:540s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:433s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:441s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:430s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:484s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:467s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:578s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:460s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:544s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:573s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:527s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:503s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:460s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:561s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:424s
Blacklisted hosts:
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:543s
fi-glk-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:500s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:483s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:528s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:478s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:533s

b407e5f38397c0c22b5056a1664753287993b152 drm-tip: 2017y-11m-23d-16h-14m-59s UTC 
integration manifest
cdb66eef313c drm/i915: Prevent zero length "index" write
de4e63cd1642 drm/i915: Don't try indexed reads to alternate slave addresses
eddcaf4bb19a drm/i915: Pass the correct msgs to gmbus_is_index_read()

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7268/
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[Intel-gfx] ✓ Fi.CI.BAT: success for igt/perf_pmu: Recalibrate interrupt loop.

[Patchwork]

== Series Details ==

Series: igt/perf_pmu: Recalibrate interrupt loop.
URL   : https://patchwork.freedesktop.org/series/34310/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
a1e444f4c8178acb590d41c21e921c6447668be4 tests/perf_pmu: Bump measuring 
duration for semaphores as well

with latest DRM-Tip kernel build CI_DRM_3378
b407e5f38397 drm-tip: 2017y-11m-23d-16h-14m-59s UTC integration manifest

No testlist changes.

Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass   -> INCOMPLETE (fi-snb-2520m) fdo#103713
Subgroup suspend-read-crc-pipe-c:
incomplete -> PASS   (fi-cfl-s2)

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:459s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:461s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:543s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:279s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:506s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:510s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:502s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:491s
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:612s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:433s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:265s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:548s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:431s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:440s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:429s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:484s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:464s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:587s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:456s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:541s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:571s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:518s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:507s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:465s
fi-snb-2520m total:246  pass:212  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:425s
Blacklisted hosts:
fi-cnl-y total:253  pass:226  dwarn:0   dfail:0   fail:1   skip:25 
fi-glk-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:495s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:495s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:531s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:481s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:534s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_545/
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[Intel-gfx] [PULL] drm-misc-next-fixes

[Daniel Vetter]

Hi Dave,

drm-misc-next-fixes-2017-11-23:
Fix crtc_id in page_flip event.

One tiny uapi fix, cc: stable, for a small oversight. Shouldn't matter
much since we added this for atomic, but yay for OCD and making igt happy
:-)

Cheers, Daniel

The following changes since commit f150891fd9878ef0d9197c4e8451ce67c3bdd014:

  Merge tag 'exynos-drm-next-for-v4.15' of 
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next 
(2017-11-14 14:12:43 +1000)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-next-fixes-2017-11-23

for you to fetch changes up to b8a3365a30c463e9105969ab1bf8674b763e3408:

  drm/vblank: Pass crtc_id to page_flip_ioctl. (2017-11-23 13:04:19 +0100)


Fix crtc_id in page_flip event.


Maarten Lankhorst (1):
  drm/vblank: Pass crtc_id to page_flip_ioctl.

 drivers/gpu/drm/drm_plane.c | 1 +
 1 file changed, 1 insertion(+)

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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[Intel-gfx] [PATCH 2/3] drm/i915: Don't try indexed reads to alternate slave addresses

[Ville Syrjala]

From: Ville Syrjälä 

We can only specify the one slave address to indexed reads/writes.
Make sure the messages we check are destined to the same slave
address before deciding to do an indexed transfer.

Cc: sta...@vger.kernel.org
Cc: Daniel Kurtz 
Cc: Chris Wilson 
Cc: Daniel Vetter 
Cc: Sean Paul 
Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read 
transactions")
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_i2c.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 165375cbef2f..4b4528d7010f 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -438,6 +438,7 @@ static bool
 gmbus_is_index_read(struct i2c_msg *msgs, int i, int num)
 {
return (i + 1 < num &&
+   msgs[i].addr == msgs[i + 1].addr &&
!(msgs[i].flags & I2C_M_RD) && msgs[i].len <= 2 &&
(msgs[i + 1].flags & I2C_M_RD));
 }
-- 
2.13.6

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[Intel-gfx] [PATCH 3/3] drm/i915: Prevent zero length "index" write

[Ville Syrjala]

From: Ville Syrjälä 

The hardware always writes one or two bytes in the index portion of
an indexed transfer. Make sure the message we send as the index
doesn't have a zero length.

Cc: sta...@vger.kernel.org
Cc: Daniel Kurtz 
Cc: Chris Wilson 
Cc: Daniel Vetter 
Cc: Sean Paul 
Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read 
transactions")
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_i2c.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 4b4528d7010f..8c6b26b5c3fb 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -439,7 +439,8 @@ gmbus_is_index_read(struct i2c_msg *msgs, int i, int num)
 {
return (i + 1 < num &&
msgs[i].addr == msgs[i + 1].addr &&
-   !(msgs[i].flags & I2C_M_RD) && msgs[i].len <= 2 &&
+   !(msgs[i].flags & I2C_M_RD) &&
+   (msgs[i].len == 1 || msgs[i].len == 2) &&
(msgs[i + 1].flags & I2C_M_RD));
 }
 
-- 
2.13.6

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[Intel-gfx] [PATCH 1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read()

[Ville Syrjala]

From: Ville Syrjälä 

We're supposed to examine msgs[i] and msgs[i+1] to see if they
form a pair suitable for an indexed transfer. But in reality
we're examining msgs[0] and msgs[1]. Fix this.

Cc: sta...@vger.kernel.org
Cc: Daniel Kurtz 
Cc: Chris Wilson 
Cc: Daniel Vetter 
Cc: Sean Paul 
Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read 
transactions")
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_i2c.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index eb5827110d8f..165375cbef2f 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -484,7 +484,7 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg 
*msgs, int num)
 
for (; i < num; i += inc) {
inc = 1;
-   if (gmbus_is_index_read(msgs, i, num)) {
+   if (gmbus_is_index_read([i], i, num)) {
ret = gmbus_xfer_index_read(dev_priv, [i]);
inc = 2; /* an index read is two msgs */
} else if (msgs[i].flags & I2C_M_RD) {
-- 
2.13.6

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[Intel-gfx] ✗ Fi.CI.BAT: failure for tests/kms_vblank: Add test to ensure DRM_CAP_CRTC_IN_VBLANK_EVENT works correctly

[Patchwork]

== Series Details ==

Series: tests/kms_vblank: Add test to ensure DRM_CAP_CRTC_IN_VBLANK_EVENT works 
correctly
URL   : https://patchwork.freedesktop.org/series/34299/
State : failure

== Summary ==

Series 34299 revision 1 was fully merged or fully failed: no git log

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[Intel-gfx] ✓ Fi.CI.BAT: success for drm: More plane clipping polish

[Patchwork]

== Series Details ==

Series: drm: More plane clipping polish
URL   : https://patchwork.freedesktop.org/series/34323/
State : success

== Summary ==

Series 34323v1 drm: More plane clipping polish
https://patchwork.freedesktop.org/api/1.0/series/34323/revisions/1/mbox/

Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-c:
incomplete -> PASS   (fi-cfl-s2)

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:452s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:465s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:382s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:550s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:280s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:506s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:512s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:504s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:503s
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:605s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:431s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:268s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:539s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:432s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:440s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:431s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:482s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:469s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:580s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:458s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:547s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:570s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:521s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:505s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:462s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:560s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:424s
Blacklisted hosts:
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:542s
fi-glk-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:497s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:486s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:530s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:475s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:534s

b407e5f38397c0c22b5056a1664753287993b152 drm-tip: 2017y-11m-23d-16h-14m-59s UTC 
integration manifest
975cf9bae7a3 drm: Don't pass clip to drm_atomic_helper_check_plane_state()
51ebe51a3012 drm/zte: Use drm_mode_get_hv_timing() to populate plane clip 
rectangle
c376ca060824 drm/vmwgfx: Use drm_mode_get_hv_timing() to populate plane clip 
rectangle
ed50094cf87d drm/tegra/dc: Use drm_mode_get_hv_timing() to populate plane clip 
rectangle
2b017f50a0d2 drm/rockchip: Use drm_mode_get_hv_timing() to populate plane clip 
rectangle
bf76698f2b25 drm/nouveau/kms/nv50: Use drm_mode_get_hv_timing() to populate 
plane clip rectangle
da6a67b6450b drm/msm/mdp5: Use drm_mode_get_hv_timing() to populate plane clip 
rectangle
90523aff7c90 drm/meson: Use drm_mode_get_hv_timing() to populate plane clip 
rectangle
baf88708e38f drm/mediatek: Use drm_mode_get_hv_timing() to populate plane clip 
rectangle
8d6797e79d3d drm/imx: Use drm_mode_get_hv_timing() to populate plane clip 
rectangle
4bd7ff6b606b drm/simple_kms_helper: Use drm_mode_get_hv_timing() to populate 
plane clip rectangle
fc3bc8c17475 drm/arm/mali-dp: Use drm_mode_get_hv_timing() to populate plane 
clip rectangle
69ec08a135e9 drm/arm/hdlcd: Use drm_mode_get_hv_timing() to populate plane clip 
rectangle
91f70c943b8f drm/i915: Use drm_mode_get_hv_timing() to populate plane clip 
rectangle
e666a96eb3a0 drm/i915: Reject odd pipe source width with double wide/dual link

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7267/
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] tests/kms_color: Rename pipe tests to standard notation

[Patchwork]

== Series Details ==

Series: series starting with [1/3] tests/kms_color: Rename pipe tests to 
standard notation
URL   : https://patchwork.freedesktop.org/series/34287/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
a1e444f4c8178acb590d41c21e921c6447668be4 tests/perf_pmu: Bump measuring 
duration for semaphores as well

with latest DRM-Tip kernel build CI_DRM_3378
b407e5f38397 drm-tip: 2017y-11m-23d-16h-14m-59s UTC integration manifest

Testlist changes:
+++ 72 lines
--- 96 lines

Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-c:
incomplete -> PASS   (fi-cfl-s2)

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:446s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:455s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:389s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:541s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:280s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:516s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:510s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:503s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:501s
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:607s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:431s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:268s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:542s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:437s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:445s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:427s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:487s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:466s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:584s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:461s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:541s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:568s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:521s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:499s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:461s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:561s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:436s
Blacklisted hosts:
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:545s
fi-kbl-7500u total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  
time:481s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:531s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:470s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:533s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_543/
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[Intel-gfx] [PATCH 15/15] drm: Don't pass clip to drm_atomic_helper_check_plane_state()

[Ville Syrjala]

From: Ville Syrjälä 

Move the plane clip rectangle handling into
drm_atomic_helper_check_plane_state(). Drivers no longer
have to worry about such mundane details.

Cc: Laurent Pinchart 
Cc: Daniel Vetter 
Suggested-by: Daniel Vetter 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/arm/hdlcd_crtc.c|  7 +--
 drivers/gpu/drm/arm/malidp_planes.c |  7 +--
 drivers/gpu/drm/armada/armada_overlay.c |  6 +-
 drivers/gpu/drm/drm_atomic_helper.c | 12 +++-
 drivers/gpu/drm/drm_plane_helper.c  | 11 +++
 drivers/gpu/drm/drm_simple_kms_helper.c |  6 --
 drivers/gpu/drm/i915/intel_display.c| 12 
 drivers/gpu/drm/imx/ipuv3-plane.c   |  7 +--
 drivers/gpu/drm/mediatek/mtk_drm_plane.c|  7 +--
 drivers/gpu/drm/meson/meson_plane.c |  7 +--
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c   | 14 ++
 drivers/gpu/drm/nouveau/nv50_display.c  | 12 
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c |  7 +--
 drivers/gpu/drm/tegra/dc.c  |  7 +--
 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c |  7 +--
 drivers/gpu/drm/zte/zx_plane.c  | 13 +
 include/drm/drm_atomic_helper.h |  1 -
 include/drm/drm_plane_helper.h  |  1 -
 18 files changed, 22 insertions(+), 122 deletions(-)

diff --git a/drivers/gpu/drm/arm/hdlcd_crtc.c b/drivers/gpu/drm/arm/hdlcd_crtc.c
index fa852fc1c9e6..93c503b754ba 100644
--- a/drivers/gpu/drm/arm/hdlcd_crtc.c
+++ b/drivers/gpu/drm/arm/hdlcd_crtc.c
@@ -229,7 +229,6 @@ static const struct drm_crtc_helper_funcs 
hdlcd_crtc_helper_funcs = {
 static int hdlcd_plane_atomic_check(struct drm_plane *plane,
struct drm_plane_state *state)
 {
-   struct drm_rect clip = { 0 };
struct drm_crtc_state *crtc_state;
u32 src_h = state->src_h >> 16;
 
@@ -249,11 +248,7 @@ static int hdlcd_plane_atomic_check(struct drm_plane 
*plane,
return -EINVAL;
}
 
-   if (crtc_state->enable)
-   drm_mode_get_hv_timing(_state->mode,
-  , );
-
-   return drm_atomic_helper_check_plane_state(state, crtc_state, ,
+   return drm_atomic_helper_check_plane_state(state, crtc_state,
   DRM_PLANE_HELPER_NO_SCALING,
   DRM_PLANE_HELPER_NO_SCALING,
   false, true);
diff --git a/drivers/gpu/drm/arm/malidp_planes.c 
b/drivers/gpu/drm/arm/malidp_planes.c
index 2f6d608d6eaf..e630c0218aaf 100644
--- a/drivers/gpu/drm/arm/malidp_planes.c
+++ b/drivers/gpu/drm/arm/malidp_planes.c
@@ -141,18 +141,13 @@ static int malidp_se_check_scaling(struct malidp_plane 
*mp,
struct drm_crtc_state *crtc_state =
drm_atomic_get_existing_crtc_state(state->state, state->crtc);
struct malidp_crtc_state *mc;
-   struct drm_rect clip = { 0 };
u32 src_w, src_h;
int ret;
 
if (!crtc_state)
return -EINVAL;
 
-   if (crtc_state->enable)
-   drm_mode_get_hv_timing(_state->mode,
-  , );
-
-   ret = drm_atomic_helper_check_plane_state(state, crtc_state, ,
+   ret = drm_atomic_helper_check_plane_state(state, crtc_state,
  0, INT_MAX, true, true);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/armada/armada_overlay.c 
b/drivers/gpu/drm/armada/armada_overlay.c
index b411b608821a..564bd63a5f6a 100644
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -111,10 +111,6 @@ armada_ovl_plane_update(struct drm_plane *plane, struct 
drm_crtc *crtc,
.x2 = crtc_x + crtc_w,
.y2 = crtc_y + crtc_h,
};
-   const struct drm_rect clip = {
-   .x2 = crtc->mode.hdisplay,
-   .y2 = crtc->mode.vdisplay,
-   };
uint32_t val, ctrl0;
unsigned idx = 0;
bool visible;
@@ -124,7 +120,7 @@ armada_ovl_plane_update(struct drm_plane *plane, struct 
drm_crtc *crtc,
 crtc_x, crtc_y, crtc_w, crtc_h,
 src_x, src_y, src_w, src_h);
 
-   ret = drm_plane_helper_check_update(plane, crtc, fb, , , ,
+   ret = drm_plane_helper_check_update(plane, crtc, fb, , ,
DRM_MODE_ROTATE_0,
0, INT_MAX, true, false, );
if (ret)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
b/drivers/gpu/drm/drm_atomic_helper.c
index 2f80377101a1..d25eaf6f62a9 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ 

[Intel-gfx] [PATCH 13/15] drm/vmwgfx: Use drm_mode_get_hv_timing() to populate plane clip rectangle

[Ville Syrjala]

From: Ville Syrjälä 

Use drm_mode_get_hv_timing() to fill out the plane clip rectangle.

Note that this replaces crtc_state->adjusted_mode usage with
crtc_state->mode. The latter is the correct choice since that's the
mode the user provided and it matches the plane crtc coordinates
the user also provided.

Once everyone agrees on this we can move the clip handling into
drm_atomic_helper_check_plane_state().

Cc: Laurent Pinchart 
Cc: VMware Graphics 
Cc: Sinclair Yeh 
Cc: Thomas Hellstrom 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 
b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index a2a93d7e2a04..25d96560180b 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -449,10 +449,9 @@ int vmw_du_primary_plane_atomic_check(struct drm_plane 
*plane,
if (state->crtc)
crtc_state = drm_atomic_get_new_crtc_state(state->state, 
state->crtc);
 
-   if (crtc_state && crtc_state->enable) {
-   clip.x2 = crtc_state->adjusted_mode.hdisplay;
-   clip.y2 = crtc_state->adjusted_mode.vdisplay;
-   }
+   if (crtc_state && crtc_state->enable)
+   drm_mode_get_hv_timing(_state->mode,
+  , );
 
ret = drm_atomic_helper_check_plane_state(state, crtc_state, ,
  DRM_PLANE_HELPER_NO_SCALING,
-- 
2.13.6

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[Intel-gfx] [PATCH 10/15] drm/nouveau/kms/nv50: Use drm_mode_get_hv_timing() to populate plane clip rectangle

[Ville Syrjala]

From: Ville Syrjälä 

Use drm_mode_get_hv_timing() to fill out the plane clip rectangle.

No functional changes as the code already uses crtc_state->mode
to populate the clip, which is also what drm_mode_get_hv_timing()
uses.

Once everyone agrees on this we can move the clip handling into
drm_atomic_helper_check_plane_state().

Cc: Laurent Pinchart 
Cc: Ben Skeggs 
Cc: nouv...@lists.freedesktop.org
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/nouveau/nv50_display.c | 20 
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nv50_display.c 
b/drivers/gpu/drm/nouveau/nv50_display.c
index 65336948e807..7d8307ec442c 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -228,8 +228,6 @@ struct nv50_wndw_atom {
struct drm_plane_state state;
u8 interval;
 
-   struct drm_rect clip;
-
struct {
u32  handle;
u16  offset:12;
@@ -840,10 +838,6 @@ nv50_wndw_atomic_check_acquire(struct nv50_wndw *wndw,
int ret;
 
NV_ATOMIC(drm, "%s acquire\n", wndw->plane.name);
-   asyw->clip.x1 = 0;
-   asyw->clip.y1 = 0;
-   asyw->clip.x2 = asyh->state.mode.hdisplay;
-   asyw->clip.y2 = asyh->state.mode.vdisplay;
 
asyw->image.w = fb->base.width;
asyw->image.h = fb->base.height;
@@ -1141,10 +1135,15 @@ static int
 nv50_curs_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
  struct nv50_head_atom *asyh)
 {
+   struct drm_rect clip = {};
int ret;
 
+   if (asyh->state.enable)
+   drm_mode_get_hv_timing(>state.mode,
+  , );
+
ret = drm_atomic_helper_check_plane_state(>state, >state,
- >clip,
+ ,
  DRM_PLANE_HELPER_NO_SCALING,
  DRM_PLANE_HELPER_NO_SCALING,
  true, true);
@@ -1428,13 +1427,18 @@ nv50_base_acquire(struct nv50_wndw *wndw, struct 
nv50_wndw_atom *asyw,
  struct nv50_head_atom *asyh)
 {
const struct drm_framebuffer *fb = asyw->state.fb;
+   struct drm_rect clip = {};
int ret;
 
if (!fb->format->depth)
return -EINVAL;
 
+   if (asyh->state.enable)
+   drm_mode_get_hv_timing(>state.mode,
+  , );
+
ret = drm_atomic_helper_check_plane_state(>state, >state,
- >clip,
+ ,
  DRM_PLANE_HELPER_NO_SCALING,
  DRM_PLANE_HELPER_NO_SCALING,
  false, true);
-- 
2.13.6

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[Intel-gfx] [PATCH 09/15] drm/msm/mdp5: Use drm_mode_get_hv_timing() to populate plane clip rectangle

[Ville Syrjala]

From: Ville Syrjälä 

Use drm_mode_get_hv_timing() to fill out the plane clip rectangle.

Note that this replaces crtc_state->adjusted_mode usage with
crtc_state->mode. The latter is the correct choice since that's the
mode the user provided and it matches the plane crtc coordinates
the user also provided.

Once everyone agrees on this we can move the clip handling into
drm_atomic_helper_check_plane_state().

Cc: Laurent Pinchart 
Cc: Rob Clark 
Cc: Archit Taneja 
Cc: linux-arm-...@vger.kernel.org
Cc: freedr...@lists.freedesktop.org
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c 
b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
index ee41423baeb7..09f758e7bb1b 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
@@ -286,7 +286,7 @@ static int mdp5_plane_atomic_check_with_state(struct 
drm_crtc_state *crtc_state,
uint32_t max_width, max_height;
bool out_of_bounds = false;
uint32_t caps = 0;
-   struct drm_rect clip;
+   struct drm_rect clip = {};
int min_scale, max_scale;
int ret;
 
@@ -320,13 +320,13 @@ static int mdp5_plane_atomic_check_with_state(struct 
drm_crtc_state *crtc_state,
return -ERANGE;
}
 
-   clip.x1 = 0;
-   clip.y1 = 0;
-   clip.x2 = crtc_state->adjusted_mode.hdisplay;
-   clip.y2 = crtc_state->adjusted_mode.vdisplay;
min_scale = FRAC_16_16(1, 8);
max_scale = FRAC_16_16(8, 1);
 
+   if (crtc_state->enable)
+   drm_mode_get_hv_timing(_state->mode,
+  , );
+
ret = drm_atomic_helper_check_plane_state(state, crtc_state, ,
  min_scale, max_scale,
  true, true);
@@ -471,7 +471,7 @@ static int mdp5_plane_atomic_async_check(struct drm_plane 
*plane,
 {
struct mdp5_plane_state *mdp5_state = to_mdp5_plane_state(state);
struct drm_crtc_state *crtc_state;
-   struct drm_rect clip;
+   struct drm_rect clip = {};
int min_scale, max_scale;
int ret;
 
@@ -499,13 +499,13 @@ static int mdp5_plane_atomic_async_check(struct drm_plane 
*plane,
plane->state->fb != state->fb)
return -EINVAL;
 
-   clip.x1 = 0;
-   clip.y1 = 0;
-   clip.x2 = crtc_state->adjusted_mode.hdisplay;
-   clip.y2 = crtc_state->adjusted_mode.vdisplay;
min_scale = FRAC_16_16(1, 8);
max_scale = FRAC_16_16(8, 1);
 
+   if (crtc_state->enable)
+   drm_mode_get_hv_timing(_state->mode,
+  , );
+
ret = drm_atomic_helper_check_plane_state(state, crtc_state, ,
  min_scale, max_scale,
  true, true);
-- 
2.13.6

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[Intel-gfx] [PATCH 12/15] drm/tegra/dc: Use drm_mode_get_hv_timing() to populate plane clip rectangle

[Ville Syrjala]

From: Ville Syrjälä 

Use drm_mode_get_hv_timing() to fill out the plane clip rectangle.

No functional changes as the code already uses crtc_state->mode
to populate the clip, which is also what drm_mode_get_hv_timing()
uses.

Once everyone agrees on this we can move the clip handling into
drm_atomic_helper_check_plane_state().

Cc: Laurent Pinchart 
Cc: Thierry Reding 
Cc: linux-te...@vger.kernel.org
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/tegra/dc.c | 9 -
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index fc70351b9017..93b47e0e038b 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -477,7 +477,7 @@ static int tegra_plane_state_add(struct tegra_plane *plane,
 {
struct drm_crtc_state *crtc_state;
struct tegra_dc_state *tegra;
-   struct drm_rect clip;
+   struct drm_rect clip = {};
int err;
 
/* Propagate errors from allocation or locking failures. */
@@ -485,10 +485,9 @@ static int tegra_plane_state_add(struct tegra_plane *plane,
if (IS_ERR(crtc_state))
return PTR_ERR(crtc_state);
 
-   clip.x1 = 0;
-   clip.y1 = 0;
-   clip.x2 = crtc_state->mode.hdisplay;
-   clip.y2 = crtc_state->mode.vdisplay;
+   if (crtc_state->enable)
+   drm_mode_get_hv_timing(_state->mode,
+  , );
 
/* Check plane state for visibility and calculate clipping bounds */
err = drm_atomic_helper_check_plane_state(state, crtc_state, ,
-- 
2.13.6

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[Intel-gfx] [PATCH 14/15] drm/zte: Use drm_mode_get_hv_timing() to populate plane clip rectangle

[Ville Syrjala]

From: Ville Syrjälä 

Use drm_mode_get_hv_timing() to fill out the plane clip rectangle.

Note that this replaces crtc_state->adjusted_mode usage with
crtc_state->mode. The latter is the correct choice since that's the
mode the user provided and it matches the plane crtc coordinates
the user also provided.

Once everyone agrees on this we can move the clip handling into
drm_atomic_helper_check_plane_state().

Cc: Laurent Pinchart 
Cc: Shawn Guo 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/zte/zx_plane.c | 18 --
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/zte/zx_plane.c b/drivers/gpu/drm/zte/zx_plane.c
index 68fd2e2dc78a..8e1f34274e24 100644
--- a/drivers/gpu/drm/zte/zx_plane.c
+++ b/drivers/gpu/drm/zte/zx_plane.c
@@ -55,7 +55,7 @@ static int zx_vl_plane_atomic_check(struct drm_plane *plane,
struct drm_framebuffer *fb = plane_state->fb;
struct drm_crtc *crtc = plane_state->crtc;
struct drm_crtc_state *crtc_state;
-   struct drm_rect clip;
+   struct drm_rect clip = {};
int min_scale = FRAC_16_16(1, 8);
int max_scale = FRAC_16_16(8, 1);
 
@@ -75,10 +75,9 @@ static int zx_vl_plane_atomic_check(struct drm_plane *plane,
if (!plane_state->crtc)
return -EINVAL;
 
-   clip.x1 = 0;
-   clip.y1 = 0;
-   clip.x2 = crtc_state->adjusted_mode.hdisplay;
-   clip.y2 = crtc_state->adjusted_mode.vdisplay;
+   if (crtc_state->enable)
+   drm_mode_get_hv_timing(_state->mode,
+  , );
 
return drm_atomic_helper_check_plane_state(plane_state, crtc_state,
   , min_scale, max_scale,
@@ -292,7 +291,7 @@ static int zx_gl_plane_atomic_check(struct drm_plane *plane,
struct drm_framebuffer *fb = plane_state->fb;
struct drm_crtc *crtc = plane_state->crtc;
struct drm_crtc_state *crtc_state;
-   struct drm_rect clip;
+   struct drm_rect clip = {};
 
if (!crtc || !fb)
return 0;
@@ -310,10 +309,9 @@ static int zx_gl_plane_atomic_check(struct drm_plane 
*plane,
if (!plane_state->crtc)
return -EINVAL;
 
-   clip.x1 = 0;
-   clip.y1 = 0;
-   clip.x2 = crtc_state->adjusted_mode.hdisplay;
-   clip.y2 = crtc_state->adjusted_mode.vdisplay;
+   if (crtc_state->enable)
+   drm_mode_get_hv_timing(_state->mode,
+  , );
 
return drm_atomic_helper_check_plane_state(plane_state, crtc_state,
   ,
-- 
2.13.6

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[Intel-gfx] [PATCH 08/15] drm/meson: Use drm_mode_get_hv_timing() to populate plane clip rectangle

[Ville Syrjala]

From: Ville Syrjälä 

Use drm_mode_get_hv_timing() to fill out the plane clip rectangle.

No functional changes as the code already uses crtc_state->mode
to populate the clip, which is also what drm_mode_get_hv_timing()
uses.

Once everyone agrees on this we can move the clip handling into
drm_atomic_helper_check_plane_state().

Cc: Laurent Pinchart 
Cc: Neil Armstrong 
Cc: linux-amlo...@lists.infradead.org
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/meson/meson_plane.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/meson/meson_plane.c 
b/drivers/gpu/drm/meson/meson_plane.c
index d0a6ac8390f3..3801bee1f9e6 100644
--- a/drivers/gpu/drm/meson/meson_plane.c
+++ b/drivers/gpu/drm/meson/meson_plane.c
@@ -58,8 +58,9 @@ static int meson_plane_atomic_check(struct drm_plane *plane,
if (IS_ERR(crtc_state))
return PTR_ERR(crtc_state);
 
-   clip.x2 = crtc_state->mode.hdisplay;
-   clip.y2 = crtc_state->mode.vdisplay;
+   if (crtc_state->enable)
+   drm_mode_get_hv_timing(_state->mode,
+  , );
 
return drm_atomic_helper_check_plane_state(state, crtc_state, ,
   DRM_PLANE_HELPER_NO_SCALING,
-- 
2.13.6

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[Intel-gfx] [PATCH 11/15] drm/rockchip: Use drm_mode_get_hv_timing() to populate plane clip rectangle

[Ville Syrjala]

From: Ville Syrjälä 

Use drm_mode_get_hv_timing() to fill out the plane clip rectangle.

Note that this replaces crtc_state->adjusted_mode usage with
crtc_state->mode. The latter is the correct choice since that's the
mode the user provided and it matches the plane crtc coordinates
the user also provided.

Once everyone agrees on this we can move the clip handling into
drm_atomic_helper_check_plane_state().

Cc: Laurent Pinchart 
Cc: Mark Yao 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 9 -
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index ba7505292b78..cd2c72389629 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -641,7 +641,7 @@ static int vop_plane_atomic_check(struct drm_plane *plane,
struct vop_win *vop_win = to_vop_win(plane);
const struct vop_win_data *win = vop_win->data;
int ret;
-   struct drm_rect clip;
+   struct drm_rect clip = {};
int min_scale = win->phy->scl ? FRAC_16_16(1, 8) :
DRM_PLANE_HELPER_NO_SCALING;
int max_scale = win->phy->scl ? FRAC_16_16(8, 1) :
@@ -654,10 +654,9 @@ static int vop_plane_atomic_check(struct drm_plane *plane,
if (WARN_ON(!crtc_state))
return -EINVAL;
 
-   clip.x1 = 0;
-   clip.y1 = 0;
-   clip.x2 = crtc_state->adjusted_mode.hdisplay;
-   clip.y2 = crtc_state->adjusted_mode.vdisplay;
+   if (crtc_state->enable)
+   drm_mode_get_hv_timing(_state->mode,
+  , );
 
ret = drm_atomic_helper_check_plane_state(state, crtc_state, ,
  min_scale, max_scale,
-- 
2.13.6

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[Intel-gfx] [PATCH 06/15] drm/imx: Use drm_mode_get_hv_timing() to populate plane clip rectangle

[Ville Syrjala]

From: Ville Syrjälä 

Use drm_mode_get_hv_timing() to fill out the plane clip rectangle.

Note that this replaces crtc_state->adjusted_mode usage with
crtc_state->mode. The latter is the correct choice since that's the
mode the user provided and it matches the plane crtc coordinates
the user also provided.

Once everyone agrees on this we can move the clip handling into
drm_atomic_helper_check_plane_state().

Cc: Laurent Pinchart 
Cc: Philipp Zabel 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/imx/ipuv3-plane.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c 
b/drivers/gpu/drm/imx/ipuv3-plane.c
index 5a67daedcf4d..c0662503571b 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -322,7 +322,7 @@ static int ipu_plane_atomic_check(struct drm_plane *plane,
struct drm_framebuffer *old_fb = old_state->fb;
unsigned long eba, ubo, vbo, old_ubo, old_vbo, alpha_eba;
bool can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY);
-   struct drm_rect clip;
+   struct drm_rect clip = {};
int hsub, vsub;
int ret;
 
@@ -338,10 +338,10 @@ static int ipu_plane_atomic_check(struct drm_plane *plane,
if (WARN_ON(!crtc_state))
return -EINVAL;
 
-   clip.x1 = 0;
-   clip.y1 = 0;
-   clip.x2 = crtc_state->adjusted_mode.hdisplay;
-   clip.y2 = crtc_state->adjusted_mode.vdisplay;
+   if (crtc_state->enable)
+   drm_mode_get_hv_timing(_state->mode,
+  , );
+
ret = drm_atomic_helper_check_plane_state(state, crtc_state, ,
  DRM_PLANE_HELPER_NO_SCALING,
  DRM_PLANE_HELPER_NO_SCALING,
-- 
2.13.6

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[Intel-gfx] [PATCH 07/15] drm/mediatek: Use drm_mode_get_hv_timing() to populate plane clip rectangle

[Ville Syrjala]

From: Ville Syrjälä 

Use drm_mode_get_hv_timing() to fill out the plane clip rectangle.

No functional changes as the code already uses crtc_state->mode
to populate the clip, which is also what drm_mode_get_hv_timing()
uses.

Once everyone agrees on this we can move the clip handling into
drm_atomic_helper_check_plane_state().

Cc: Laurent Pinchart 
Cc: CK Hu 
Cc: Philipp Zabel 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/mediatek/mtk_drm_plane.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c 
b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
index 5ef898b93d8d..b5c6eec9a584 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
@@ -108,8 +108,9 @@ static int mtk_plane_atomic_check(struct drm_plane *plane,
if (IS_ERR(crtc_state))
return PTR_ERR(crtc_state);
 
-   clip.x2 = crtc_state->mode.hdisplay;
-   clip.y2 = crtc_state->mode.vdisplay;
+   if (crtc_state->enable)
+   drm_mode_get_hv_timing(_state->mode,
+  , );
 
return drm_atomic_helper_check_plane_state(state, crtc_state, ,
   DRM_PLANE_HELPER_NO_SCALING,
-- 
2.13.6

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[Intel-gfx] [PATCH 02/15] drm/i915: Use drm_mode_get_hv_timing() to populate plane clip rectangle

[Ville Syrjala]

From: Ville Syrjälä 

Use drm_mode_get_hv_timing() to fill out the plane clip rectangle.
No functional changes since pipe_src_w/h are already filled via
drm_mode_get_hv_timing().

Once everyone agrees on this we can move the clip handling into
drm_atomic_helper_check_plane_state().

Cc: Laurent Pinchart 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_atomic_plane.c |  8 
 drivers/gpu/drm/i915/intel_display.c  | 14 --
 drivers/gpu/drm/i915/intel_drv.h  |  1 -
 drivers/gpu/drm/i915/intel_sprite.c   |  8 ++--
 4 files changed, 18 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c 
b/drivers/gpu/drm/i915/intel_atomic_plane.c
index 8e6dc159f64d..c7984a80706e 100644
--- a/drivers/gpu/drm/i915/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
@@ -129,14 +129,6 @@ int intel_plane_atomic_check_with_state(const struct 
intel_crtc_state *old_crtc_
if (!intel_state->base.crtc && !old_plane_state->base.crtc)
return 0;
 
-   /* Clip all planes to CRTC size, or 0x0 if CRTC is disabled */
-   intel_state->clip.x1 = 0;
-   intel_state->clip.y1 = 0;
-   intel_state->clip.x2 =
-   crtc_state->base.enable ? crtc_state->pipe_src_w : 0;
-   intel_state->clip.y2 =
-   crtc_state->base.enable ? crtc_state->pipe_src_h : 0;
-
if (state->fb && drm_rotation_90_or_270(state->rotation)) {
struct drm_format_name_buf format_name;
 
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 959d21157328..4eeec590b722 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9267,13 +9267,18 @@ static int intel_check_cursor(struct intel_crtc_state 
*crtc_state,
  struct intel_plane_state *plane_state)
 {
const struct drm_framebuffer *fb = plane_state->base.fb;
+   struct drm_rect clip = {};
int src_x, src_y;
u32 offset;
int ret;
 
+   if (crtc_state->base.enable)
+   drm_mode_get_hv_timing(_state->base.mode,
+  , );
+
ret = drm_atomic_helper_check_plane_state(_state->base,
  _state->base,
- _state->clip,
+ ,
  DRM_PLANE_HELPER_NO_SCALING,
  DRM_PLANE_HELPER_NO_SCALING,
  true, true);
@@ -12832,6 +12837,7 @@ intel_check_primary_plane(struct intel_plane *plane,
int min_scale = DRM_PLANE_HELPER_NO_SCALING;
int max_scale = DRM_PLANE_HELPER_NO_SCALING;
bool can_position = false;
+   struct drm_rect clip = {};
int ret;
 
if (INTEL_GEN(dev_priv) >= 9) {
@@ -12843,9 +12849,13 @@ intel_check_primary_plane(struct intel_plane *plane,
can_position = true;
}
 
+   if (crtc_state->base.enable)
+   drm_mode_get_hv_timing(_state->base.mode,
+  , );
+
ret = drm_atomic_helper_check_plane_state(>base,
  _state->base,
- >clip,
+ ,
  min_scale, max_scale,
  can_position, true);
if (ret)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 635a96fcd788..06017de4a29c 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -403,7 +403,6 @@ struct intel_atomic_state {
 
 struct intel_plane_state {
struct drm_plane_state base;
-   struct drm_rect clip;
struct i915_vma *vma;
 
struct {
diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
b/drivers/gpu/drm/i915/intel_sprite.c
index dd485f59eb1d..cffa7a8b0f9c 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -864,7 +864,7 @@ intel_check_sprite_plane(struct intel_plane *plane,
uint32_t src_x, src_y, src_w, src_h;
struct drm_rect *src = >base.src;
struct drm_rect *dst = >base.dst;
-   const struct drm_rect *clip = >clip;
+   struct drm_rect clip = {};
int hscale, vscale;
int max_scale, min_scale;
bool can_scale;
@@ -922,7 +922,11 @@ intel_check_sprite_plane(struct intel_plane *plane,
vscale = drm_rect_calc_vscale_relaxed(src, dst, min_scale, max_scale);
BUG_ON(vscale < 0);
 
-   state->base.visible = drm_rect_clip_scaled(src, dst, clip, hscale, 
vscale);
+   if 

[Intel-gfx] [PATCH 05/15] drm/simple_kms_helper: Use drm_mode_get_hv_timing() to populate plane clip rectangle

[Ville Syrjala]

From: Ville Syrjälä 

Use drm_mode_get_hv_timing() to fill out the plane clip rectangle.

Note that this replaces crtc_state->adjusted_mode usage with
crtc_state->mode. The latter is the correct choice since that's the
mode the user provided and it matches the plane crtc coordinates
the user also provided.

Once everyone agrees on this we can move the clip handling into
drm_atomic_helper_check_plane_state().

Cc: Laurent Pinchart 
Cc: Noralf Trønnes 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_simple_kms_helper.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/drm_simple_kms_helper.c 
b/drivers/gpu/drm/drm_simple_kms_helper.c
index 9f3b1c94802b..9d3f6b70812c 100644
--- a/drivers/gpu/drm/drm_simple_kms_helper.c
+++ b/drivers/gpu/drm/drm_simple_kms_helper.c
@@ -100,8 +100,9 @@ static int drm_simple_kms_plane_atomic_check(struct 
drm_plane *plane,
if (!crtc_state->enable)
return 0; /* nothing to check when disabling or disabled */
 
-   clip.x2 = crtc_state->adjusted_mode.hdisplay;
-   clip.y2 = crtc_state->adjusted_mode.vdisplay;
+   if (crtc_state->enable)
+   drm_mode_get_hv_timing(_state->mode,
+  , );
 
ret = drm_atomic_helper_check_plane_state(plane_state, crtc_state,
  ,
-- 
2.13.6

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[Intel-gfx] [PATCH 03/15] drm/arm/hdlcd: Use drm_mode_get_hv_timing() to populate plane clip rectangle

[Ville Syrjala]

From: Ville Syrjälä 

Use drm_mode_get_hv_timing() to fill out the plane clip rectangle.

Note that this replaces crtc_state->adjusted_mode usage with
crtc_state->mode. The latter is the correct choice since that's the
mode the user provided and it matches the plane crtc coordinates
the user also provided.

Once everyone agrees on this we can move the clip handling into
drm_atomic_helper_check_plane_state().

Cc: Laurent Pinchart 
Cc: Liviu Dudau 
Cc: Brian Starkey 
Cc: Mali DP Maintainers 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/arm/hdlcd_crtc.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/arm/hdlcd_crtc.c b/drivers/gpu/drm/arm/hdlcd_crtc.c
index 63511a3bbf6c..fa852fc1c9e6 100644
--- a/drivers/gpu/drm/arm/hdlcd_crtc.c
+++ b/drivers/gpu/drm/arm/hdlcd_crtc.c
@@ -249,8 +249,9 @@ static int hdlcd_plane_atomic_check(struct drm_plane *plane,
return -EINVAL;
}
 
-   clip.x2 = crtc_state->adjusted_mode.hdisplay;
-   clip.y2 = crtc_state->adjusted_mode.vdisplay;
+   if (crtc_state->enable)
+   drm_mode_get_hv_timing(_state->mode,
+  , );
 
return drm_atomic_helper_check_plane_state(state, crtc_state, ,
   DRM_PLANE_HELPER_NO_SCALING,
-- 
2.13.6

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[Intel-gfx] [PATCH 04/15] drm/arm/mali-dp: Use drm_mode_get_hv_timing() to populate plane clip rectangle

[Ville Syrjala]

From: Ville Syrjälä 

Use drm_mode_get_hv_timing() to fill out the plane clip rectangle.

Note that this replaces crtc_state->adjusted_mode usage with
crtc_state->mode. The latter is the correct choice since that's the
mode the user provided and it matches the plane crtc coordinates
the user also provided.

Once everyone agrees on this we can move the clip handling into
drm_atomic_helper_check_plane_state().

Cc: Laurent Pinchart 
Cc: Liviu Dudau 
Cc: Brian Starkey 
Cc: Mali DP Maintainers 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/arm/malidp_planes.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/arm/malidp_planes.c 
b/drivers/gpu/drm/arm/malidp_planes.c
index 72a07950167e..2f6d608d6eaf 100644
--- a/drivers/gpu/drm/arm/malidp_planes.c
+++ b/drivers/gpu/drm/arm/malidp_planes.c
@@ -148,8 +148,10 @@ static int malidp_se_check_scaling(struct malidp_plane *mp,
if (!crtc_state)
return -EINVAL;
 
-   clip.x2 = crtc_state->adjusted_mode.hdisplay;
-   clip.y2 = crtc_state->adjusted_mode.vdisplay;
+   if (crtc_state->enable)
+   drm_mode_get_hv_timing(_state->mode,
+  , );
+
ret = drm_atomic_helper_check_plane_state(state, crtc_state, ,
  0, INT_MAX, true, true);
if (ret)
-- 
2.13.6

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[Intel-gfx] [PATCH 00/15] drm: More plane clipping polish

[Ville Syrjala]

From: Ville Syrjälä 

This series first unifies all users of drm_atomic_helper_check_plane_state()
to populate the clip rectangle with drm_mode_get_hv_timing(), and once
everything is unified the clip rectangle handling is sucked into
drm_atomic_helper_check_plane_state() away from driver code.

Entire series available here:
git://github.com/vsyrjala/linux.git atomic_plane_helper_clip

Cc: Archit Taneja 
Cc: Ben Skeggs 
Cc: Brian Starkey 
Cc: CK Hu 
Cc: Daniel Vetter 
Cc: freedr...@lists.freedesktop.org
Cc: Laurent Pinchart 
Cc: linux-amlo...@lists.infradead.org
Cc: linux-arm-...@vger.kernel.org
Cc: linux-te...@vger.kernel.org
Cc: Liviu Dudau 
Cc: Mali DP Maintainers 
Cc: Mark Yao 
Cc: Neil Armstrong 
Cc: Noralf Trønnes 
Cc: nouv...@lists.freedesktop.org
Cc: Philipp Zabel 
Cc: Rob Clark 
Cc: Shawn Guo 
Cc: Sinclair Yeh 
Cc: Thierry Reding 
Cc: Thomas Hellstrom 
Cc: VMware Graphics 

Ville Syrjälä (15):
  drm/i915: Reject odd pipe source width with double wide/dual link
  drm/i915: Use drm_mode_get_hv_timing() to populate plane clip
rectangle
  drm/arm/hdlcd: Use drm_mode_get_hv_timing() to populate plane clip
rectangle
  drm/arm/mali-dp: Use drm_mode_get_hv_timing() to populate plane clip
rectangle
  drm/simple_kms_helper: Use drm_mode_get_hv_timing() to populate plane
clip rectangle
  drm/imx: Use drm_mode_get_hv_timing() to populate plane clip rectangle
  drm/mediatek: Use drm_mode_get_hv_timing() to populate plane clip
rectangle
  drm/meson: Use drm_mode_get_hv_timing() to populate plane clip
rectangle
  drm/msm/mdp5: Use drm_mode_get_hv_timing() to populate plane clip
rectangle
  drm/nouveau/kms/nv50: Use drm_mode_get_hv_timing() to populate plane
clip rectangle
  drm/rockchip: Use drm_mode_get_hv_timing() to populate plane clip
rectangle
  drm/tegra/dc: Use drm_mode_get_hv_timing() to populate plane clip
rectangle
  drm/vmwgfx: Use drm_mode_get_hv_timing() to populate plane clip
rectangle
  drm/zte: Use drm_mode_get_hv_timing() to populate plane clip rectangle
  drm: Don't pass clip to drm_atomic_helper_check_plane_state()

 drivers/gpu/drm/arm/hdlcd_crtc.c|  6 +-
 drivers/gpu/drm/arm/malidp_planes.c |  5 +
 drivers/gpu/drm/armada/armada_overlay.c |  2 +-
 drivers/gpu/drm/drm_atomic_helper.c | 12 +++-
 drivers/gpu/drm/drm_plane_helper.c  | 11 +++
 drivers/gpu/drm/drm_simple_kms_helper.c |  5 -
 drivers/gpu/drm/i915/intel_atomic_plane.c   |  8 
 drivers/gpu/drm/i915/intel_display.c| 12 +++-
 drivers/gpu/drm/i915/intel_drv.h|  1 -
 drivers/gpu/drm/i915/intel_sprite.c |  8 ++--
 drivers/gpu/drm/imx/ipuv3-plane.c   |  7 +--
 drivers/gpu/drm/mediatek/mtk_drm_plane.c|  6 +-
 drivers/gpu/drm/meson/meson_plane.c |  6 +-
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c   | 14 ++
 drivers/gpu/drm/nouveau/nv50_display.c  |  8 
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c |  8 +---
 drivers/gpu/drm/tegra/dc.c  |  8 +---
 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c |  8 +---
 drivers/gpu/drm/zte/zx_plane.c  | 15 +--
 include/drm/drm_atomic_helper.h |  1 -
 include/drm/drm_plane_helper.h  |  1 -
 21 files changed, 35 insertions(+), 117 deletions(-)

-- 
2.13.6

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[Intel-gfx] [PATCH 01/15] drm/i915: Reject odd pipe source width with double wide/dual link

[Ville Syrjala]

From: Ville Syrjälä 

In order to guarantee that pipe_src_w/h matches the user mode h/vdisplay
we must not adjust pipe_src_w to accommodate double wide/dual link.
Instead just reject the mode outright.

This will allows us to rely on crtc_state->mode for plane clipping.

Cc: Laurent Pinchart 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_display.c | 15 ---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index d67c7c498b34..959d21157328 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6332,9 +6332,18 @@ static int intel_crtc_compute_config(struct intel_crtc 
*crtc,
 * - LVDS dual channel mode
 * - Double wide pipe
 */
-   if ((intel_crtc_has_type(pipe_config, INTEL_OUTPUT_LVDS) &&
-intel_is_dual_link_lvds(dev)) || pipe_config->double_wide)
-   pipe_config->pipe_src_w &= ~1;
+   if (pipe_config->pipe_src_w & 1) {
+   if (pipe_config->double_wide) {
+   DRM_DEBUG_KMS("Odd pipe source width not supported with 
double wide pipe\n");
+   return -EINVAL;
+   }
+
+   if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_LVDS) &&
+   intel_is_dual_link_lvds(dev)) {
+   DRM_DEBUG_KMS("Odd pipe source width not supported with 
dual link LVDS\n");
+   return -EINVAL;
+   }
+   }
 
/* Cantiga+ cannot handle modes with a hsync front porch of 0.
 * WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.
-- 
2.13.6

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[Intel-gfx] ✗ Fi.CI.BAT: failure for tests/perf_pmu: Bump measuring duration for semaphores as well

[Patchwork]

== Series Details ==

Series: tests/perf_pmu: Bump measuring duration for semaphores as well
URL   : https://patchwork.freedesktop.org/series/34285/
State : failure

== Summary ==

Series 34285 revision 1 was fully merged or fully failed: no git log

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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] igt/perf_pmu: Reduce arbitrary delays

[Patchwork]

== Series Details ==

Series: series starting with [1/3] igt/perf_pmu: Reduce arbitrary delays
URL   : https://patchwork.freedesktop.org/series/34271/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
a1e444f4c8178acb590d41c21e921c6447668be4 tests/perf_pmu: Bump measuring 
duration for semaphores as well

with latest DRM-Tip kernel build CI_DRM_3378
b407e5f38397 drm-tip: 2017y-11m-23d-16h-14m-59s UTC integration manifest

No testlist changes.

Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-c:
incomplete -> PASS   (fi-cfl-s2)

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:447s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:457s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:388s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:549s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:279s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:514s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:521s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:513s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:496s
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:606s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:429s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:266s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:544s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:432s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:441s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:434s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:484s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:465s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:579s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:454s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:542s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:565s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:524s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:504s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:464s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:565s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:438s
Blacklisted hosts:
fi-cnl-y total:237  pass:212  dwarn:0   dfail:0   fail:0   skip:24 
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:515s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:483s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:531s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:476s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:536s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_541/
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Rename i915_guc_reg.h to intel_guc_reg.h

[Patchwork]

== Series Details ==

Series: drm/i915/guc: Rename i915_guc_reg.h to intel_guc_reg.h
URL   : https://patchwork.freedesktop.org/series/34319/
State : failure

== Summary ==

Series 34319v1 drm/i915/guc: Rename i915_guc_reg.h to intel_guc_reg.h
https://patchwork.freedesktop.org/api/1.0/series/34319/revisions/1/mbox/

Test kms_pipe_crc_basic:
Subgroup read-crc-pipe-c-frame-sequence:
pass   -> FAIL   (fi-skl-6700k)
Subgroup suspend-read-crc-pipe-c:
incomplete -> PASS   (fi-cfl-s2)

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:455s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:455s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:382s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:536s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:278s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:511s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:511s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:499s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:486s
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:612s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:432s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:266s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:544s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:429s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:438s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:429s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:484s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:462s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:580s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:456s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:540s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:563s
fi-skl-6700k total:289  pass:264  dwarn:0   dfail:0   fail:1   skip:24  
time:520s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:503s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:466s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:570s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:422s
Blacklisted hosts:
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:561s
fi-glk-dsi   total:286  pass:159  dwarn:0   dfail:7   fail:3   skip:116
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:487s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:526s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:482s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:531s

b407e5f38397c0c22b5056a1664753287993b152 drm-tip: 2017y-11m-23d-16h-14m-59s UTC 
integration manifest
82d75b6cdecf drm/i915/guc: Rename i915_guc_reg.h to intel_guc_reg.h

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7266/
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] igt/perf_pmu: Idle the GPU before starting to measure busyness

[Patchwork]

== Series Details ==

Series: series starting with [1/3] igt/perf_pmu: Idle the GPU before starting 
to measure busyness
URL   : https://patchwork.freedesktop.org/series/34246/
State : success

== Summary ==

Test kms_flip:
Subgroup blt-flip-vs-panning-interruptible:
dmesg-warn -> PASS   (shard-hsw)
Test drv_module_reload:
Subgroup basic-no-display:
dmesg-warn -> PASS   (shard-snb) fdo#102707 +1
Test kms_cursor_legacy:
Subgroup flip-vs-cursor-legacy:
pass   -> FAIL   (shard-hsw) fdo#102670

fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#102670 https://bugs.freedesktop.org/show_bug.cgi?id=102670

shard-hswtotal:2667 pass:1535 dwarn:1   dfail:0   fail:10  skip:1121 
time:9590s
shard-snbtotal:2667 pass:1312 dwarn:1   dfail:0   fail:13  skip:1341 
time:8058s
Blacklisted hosts:
shard-apltotal:2645 pass:1664 dwarn:2   dfail:0   fail:22  skip:955 
time:13214s
shard-kbltotal:2647 pass:1779 dwarn:3   dfail:0   fail:25  skip:839 
time:10696s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_532/shards.html
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Re: [Intel-gfx] [PATCH 2/3] drm/i915: Enable render context support for gen4 (Broadwater to Cantiga)

[Ville Syrjälä]

On Thu, Nov 23, 2017 at 04:27:49PM +, Chris Wilson wrote:
> Broadwater and the rest of gen4  do support being able to saving and
> reloading context specific registers between contexts, providing isolation
> of the basic GPU state (as programmable by userspace). This allows
> userspace to assume that the GPU retains their state from one batch to the
> next, minimising the amount of state it needs to reload.
> 
> Signed-off-by: Chris Wilson 
> ---
>  drivers/gpu/drm/i915/intel_engine_cs.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c 
> b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 88ef00faf576..2c9b67e21d48 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -175,9 +175,9 @@ __intel_engine_context_size(struct drm_i915_private 
> *dev_priv, u8 class)
>   return round_up(GEN6_CXT_TOTAL_SIZE(cxt_size) * 64,
>   PAGE_SIZE);
>   case 5:
> + case 4:
>   cxt_size = I915_READ(CXT_SIZE);
>   return round_up(cxt_size * 64, PAGE_SIZE);

On 965 the CXT_SIZE does seem to match the full context image size.
At least my 965 matches the docs perfectly. So just an off by one error
here for 965.

ctg/elk seem to require the same treatment as ilk. Except the extra
we need this time is 9 cachelines. That still can't make the numbers I
see match up with the spec though. I have: CXT_SIZE=0x29,
CTX_SIZE_NOEXT=0x5. The NOEXT value seems to be 2 cachelines too
small. And the full size seems to be 5 cachelines too small. So I wonder
if the full size doesn't account for the media PRT part either? On ILK
we seemed to miss one cacheline there, on ctg/elk 3 cachelines. Or was
it actually two cachelines on ILK, not sure anymore.

Hmm. I wonder if it's the 'Media PRT' part (+ one or two preceding
cachlines) we're missing from this on both platforms. If that's the case
the I guess 0x9+3 and 0xb+2 might be the correct number of extra
cachlines we need on ctg/elk and ilk respectively. Or maybe just add
a comment that we may be missing a few cachelines from the total, but
it doesn't matter?

> - case 4:
>   case 3:
>   case 2:
>   /* For the special day when i810 gets merged. */
> -- 
> 2.15.0
> 
> ___
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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Re: [Intel-gfx] [PATCH] drm/i915/pmu: Hide the (unsigned long)ptr cast

[Michal Wajdeczko]

On Thu, 23 Nov 2017 18:42:13 +0100, Chris Wilson  
 wrote:



We pretend the PMU config id is a pointer value when encoding it into
the device parameters for presentation via sysfs. This requires casting
of an unsigned long into and out of the pointer member, which annoys
smatch:

drivers/gpu/drm/i915/i915_pmu.c:684 i915_pmu_event_show() warn: argument  
3 to %lx specifier is cast from pointer


Signed-off-by: Chris Wilson 
Cc: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_pmu.c   | 2 +-
 drivers/gpu/drm/i915/i915_utils.h | 5 +
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_pmu.c  
b/drivers/gpu/drm/i915/i915_pmu.c

index 6a42e7f7967d..a8816d25a77b 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -681,7 +681,7 @@ static ssize_t i915_pmu_event_show(struct device  
*dev,

struct dev_ext_attribute *eattr;
eattr = container_of(attr, struct dev_ext_attribute, attr);
-   return sprintf(buf, "config=0x%lx\n", (unsigned long)eattr->var);
+   return sprintf(buf, "config=0x%lx\n", ptr_to_ulong(eattr->var));


Hmm, can't we just use %p here ?

return sprintf(buf, "config=%p\n", eattr->var);


 }
#define I915_EVENT_ATTR(_name, _config) \
diff --git a/drivers/gpu/drm/i915/i915_utils.h  
b/drivers/gpu/drm/i915/i915_utils.h

index 8d07764887ec..2595fbf6451f 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -107,6 +107,11 @@ static inline u64 ptr_to_u64(const void *ptr)
return (uintptr_t)ptr;
 }
+static inline unsigned long ptr_to_ulong(const void *ptr)
+{
+   return ptr_to_u64(ptr);
+}
+
 #define u64_to_ptr(T, x) ({\
typecheck(u64, x);  \
(T *)(uintptr_t)(x);\

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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Hide the (unsigned long)ptr cast

[Patchwork]

== Series Details ==

Series: drm/i915/pmu: Hide the (unsigned long)ptr cast
URL   : https://patchwork.freedesktop.org/series/34318/
State : success

== Summary ==

Series 34318v1 drm/i915/pmu: Hide the (unsigned long)ptr cast
https://patchwork.freedesktop.org/api/1.0/series/34318/revisions/1/mbox/

Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-c:
incomplete -> PASS   (fi-cfl-s2)

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:449s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:456s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:387s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:541s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:279s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:513s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:514s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:506s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:493s
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:608s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:439s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:274s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:540s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:439s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:441s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:425s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:479s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:462s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:576s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:462s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:549s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:568s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:528s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:502s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:463s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:558s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:428s
Blacklisted hosts:
fi-cnl-y total:231  pass:206  dwarn:0   dfail:0   fail:0   skip:24 
fi-glk-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:506s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:486s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:535s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:472s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:537s

b407e5f38397c0c22b5056a1664753287993b152 drm-tip: 2017y-11m-23d-16h-14m-59s UTC 
integration manifest
c58003d888da drm/i915/pmu: Hide the (unsigned long)ptr cast

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7265/
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[Intel-gfx] [RFC] drm/i915/guc: Rename i915_guc_reg.h to intel_guc_reg.h

[Michal Wajdeczko]

We are using intel_ prefix for all filenames with hardware related
definitions. GuC registers also fall into this category.

Signed-off-by: Michal Wajdeczko 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Sagar Arun Kamble 
---
 drivers/gpu/drm/i915/i915_guc_reg.h  | 119 ---
 drivers/gpu/drm/i915/intel_guc.h |   2 +-
 drivers/gpu/drm/i915/intel_guc_reg.h | 119 +++
 3 files changed, 120 insertions(+), 120 deletions(-)
 delete mode 100644 drivers/gpu/drm/i915/i915_guc_reg.h
 create mode 100644 drivers/gpu/drm/i915/intel_guc_reg.h

diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h 
b/drivers/gpu/drm/i915/i915_guc_reg.h
deleted file mode 100644
index bc1ae7d..000
--- a/drivers/gpu/drm/i915/i915_guc_reg.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- * Copyright © 2014 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- */
-#ifndef _I915_GUC_REG_H_
-#define _I915_GUC_REG_H_
-
-/* Definitions of GuC H/W registers, bits, etc */
-
-#define GUC_STATUS _MMIO(0xc000)
-#define   GS_RESET_SHIFT   0
-#define   GS_MIA_IN_RESET(0x01 << GS_RESET_SHIFT)
-#define   GS_BOOTROM_SHIFT 1
-#define   GS_BOOTROM_MASK(0x7F << GS_BOOTROM_SHIFT)
-#define   GS_BOOTROM_RSA_FAILED  (0x50 << GS_BOOTROM_SHIFT)
-#define   GS_BOOTROM_JUMP_PASSED (0x76 << GS_BOOTROM_SHIFT)
-#define   GS_UKERNEL_SHIFT 8
-#define   GS_UKERNEL_MASK(0xFF << GS_UKERNEL_SHIFT)
-#define   GS_UKERNEL_LAPIC_DONE  (0x30 << GS_UKERNEL_SHIFT)
-#define   GS_UKERNEL_DPC_ERROR   (0x60 << GS_UKERNEL_SHIFT)
-#define   GS_UKERNEL_READY   (0xF0 << GS_UKERNEL_SHIFT)
-#define   GS_MIA_SHIFT 16
-#define   GS_MIA_MASK(0x07 << GS_MIA_SHIFT)
-#define   GS_MIA_CORE_STATE  (0x01 << GS_MIA_SHIFT)
-#define   GS_MIA_HALT_REQUESTED  (0x02 << GS_MIA_SHIFT)
-#define   GS_MIA_ISR_ENTRY   (0x04 << GS_MIA_SHIFT)
-#define   GS_AUTH_STATUS_SHIFT 30
-#define   GS_AUTH_STATUS_MASK(0x03 << GS_AUTH_STATUS_SHIFT)
-#define   GS_AUTH_STATUS_BAD (0x01 << GS_AUTH_STATUS_SHIFT)
-#define   GS_AUTH_STATUS_GOOD(0x02 << GS_AUTH_STATUS_SHIFT)
-
-#define SOFT_SCRATCH(n)_MMIO(0xc180 + (n) * 4)
-#define SOFT_SCRATCH_COUNT 16
-
-#define UOS_RSA_SCRATCH(i) _MMIO(0xc200 + (i) * 4)
-#define   UOS_RSA_SCRATCH_MAX_COUNT  64
-#define DMA_ADDR_0_LOW _MMIO(0xc300)
-#define DMA_ADDR_0_HIGH_MMIO(0xc304)
-#define DMA_ADDR_1_LOW _MMIO(0xc308)
-#define DMA_ADDR_1_HIGH_MMIO(0xc30c)
-#define   DMA_ADDRESS_SPACE_WOPCM(7 << 16)
-#define   DMA_ADDRESS_SPACE_GTT  (8 << 16)
-#define DMA_COPY_SIZE  _MMIO(0xc310)
-#define DMA_CTRL   _MMIO(0xc314)
-#define   HUC_UKERNEL(1<<9)
-#define   UOS_MOVE   (1<<4)
-#define   START_DMA  (1<<0)
-#define DMA_GUC_WOPCM_OFFSET   _MMIO(0xc340)
-#define   HUC_LOADING_AGENT_VCR  (0<<1)
-#define   HUC_LOADING_AGENT_GUC  (1<<1)
-#define   GUC_WOPCM_OFFSET_VALUE 0x8   /* 512KB */
-#define GUC_MAX_IDLE_COUNT _MMIO(0xC3E4)
-
-#define HUC_STATUS2 _MMIO(0xD3B0)
-#define   HUC_FW_VERIFIED   (1<<7)
-
-/* Defines WOPCM space available to GuC firmware */
-#define GUC_WOPCM_SIZE _MMIO(0xc050)
-/* GuC addresses below GUC_WOPCM_TOP don't map through the GTT */
-#define   GUC_WOPCM_TOP  (0x80 << 12)  /* 512KB */
-#define   

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Enable render context support for Ironlake (gen5)

[Chris Wilson]

Quoting Ville Syrjälä (2017-11-23 17:50:50)
> On Thu, Nov 23, 2017 at 07:46:23PM +0200, Ville Syrjälä wrote:
> > On Thu, Nov 23, 2017 at 04:27:48PM +, Chris Wilson wrote:
> > > Ironlake does support being able to saving and reloading context specific
> > > registers between contexts, providing isolation of the basic GPU state
> > > (as programmable by userspace). This allows userspace to assume that the
> > > GPU retains their state from one batch to the next, minimising the
> > > amount of state it needs to reload.
> > > 
> > > Signed-off-by: Chris Wilson 
> > > ---
> > >  drivers/gpu/drm/i915/intel_engine_cs.c  | 2 ++
> > >  drivers/gpu/drm/i915/intel_ringbuffer.c | 7 +++
> > >  2 files changed, 9 insertions(+)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c 
> > > b/drivers/gpu/drm/i915/intel_engine_cs.c
> > > index fede62daf3e1..88ef00faf576 100644
> > > --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> > > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> > > @@ -175,6 +175,8 @@ __intel_engine_context_size(struct drm_i915_private 
> > > *dev_priv, u8 class)
> > > return round_up(GEN6_CXT_TOTAL_SIZE(cxt_size) * 64,
> > > PAGE_SIZE);
> > > case 5:
> > > +   cxt_size = I915_READ(CXT_SIZE);
> > > +   return round_up(cxt_size * 64, PAGE_SIZE);
> > 
> > I don't think this is correct. It misses the non-pipelined 3D state,
> > and the ring stuff at the start which IIRC at least SNB still
> > saved even though it's not used in ring buffer mode. So I think
> > this needs a 0xb added to the CXT_SIZE value.
> > 
> > But even that doesn't really match the docs. The context image layout
> > is shown to be 0x3b cachelines long, but 0xb+0x2d only gets us to
> > 0x38. So it looks like CXT_SIZE is off by two for some reason.
> 
> Oh. Actually CXT_SIZE is documented to be U5-1 on pre-SNB, so I
> guess it's only off by one at most.

U5-1, sounds typical of the hw engineers -- anything up to 2k which
corresponds with their 2k alignment requirement and not cross the page
boundary (which iirc was mentioned for gen4).
-Chris
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Re: [Intel-gfx] [PATCH 1/3] drm/i915: Enable render context support for Ironlake (gen5)

[Chris Wilson]

Quoting Ville Syrjälä (2017-11-23 17:46:23)
> On Thu, Nov 23, 2017 at 04:27:48PM +, Chris Wilson wrote:
> > Ironlake does support being able to saving and reloading context specific
> > registers between contexts, providing isolation of the basic GPU state
> > (as programmable by userspace). This allows userspace to assume that the
> > GPU retains their state from one batch to the next, minimising the
> > amount of state it needs to reload.
> > 
> > Signed-off-by: Chris Wilson 
> > ---
> >  drivers/gpu/drm/i915/intel_engine_cs.c  | 2 ++
> >  drivers/gpu/drm/i915/intel_ringbuffer.c | 7 +++
> >  2 files changed, 9 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c 
> > b/drivers/gpu/drm/i915/intel_engine_cs.c
> > index fede62daf3e1..88ef00faf576 100644
> > --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> > @@ -175,6 +175,8 @@ __intel_engine_context_size(struct drm_i915_private 
> > *dev_priv, u8 class)
> >   return round_up(GEN6_CXT_TOTAL_SIZE(cxt_size) * 64,
> >   PAGE_SIZE);
> >   case 5:
> > + cxt_size = I915_READ(CXT_SIZE);
> > + return round_up(cxt_size * 64, PAGE_SIZE);
> 
> I don't think this is correct. It misses the non-pipelined 3D state,
> and the ring stuff at the start which IIRC at least SNB still
> saved even though it's not used in ring buffer mode. So I think
> this needs a 0xb added to the CXT_SIZE value.

/me scratches his head
This was described as the full size of the context; including the
extended state required for the power context.
In the past we know that it is less that one page, which is our minimum
allocation.
 
> But even that doesn't really match the docs. The context image layout
> is shown to be 0x3b cachelines long, but 0xb+0x2d only gets us to
> 0x38. So it looks like CXT_SIZE is off by two for some reason. But
> it does't really matter I suppose since we round it up to
> a page anyway.

Right. I started with just using 1 page and ignoring the register all
together.

> I don't think I ever looked at the context dump to see how big it
> really is on ILK. IIRC I did that on SNB and IVB, and maybe HSW.
> 
> >   case 4:
> >   case 3:
> >   case 2:
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c 
> > b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index e2085820b586..e649b564b165 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -1403,11 +1403,14 @@ static inline int mi_set_context(struct 
> > drm_i915_gem_request *rq, u32 flags)
> >   /* These flags are for resource streamer on HSW+ */
> >   flags |= HSW_MI_RS_SAVE_STATE_EN | HSW_MI_RS_RESTORE_STATE_EN;
> >   else
> > + /* We need to save the extended state for powersaving modes */
> >   flags |= MI_SAVE_EXT_STATE_EN | MI_RESTORE_EXT_STATE_EN;
> >  
> >   len = 4;
> >   if (IS_GEN7(i915))
> >   len += 2 + (num_rings ? 4*num_rings + 6 : 0);
> > + if (IS_GEN5(i915))
> > + len += 2;
> >  
> >   cs = intel_ring_begin(rq, len);
> >   if (IS_ERR(cs))
> > @@ -1430,6 +1433,8 @@ static inline int mi_set_context(struct 
> > drm_i915_gem_request *rq, u32 flags)
> >   GEN6_PSMI_SLEEP_MSG_DISABLE);
> >   }
> >   }
> > + } else if (IS_GEN5(i915)) {
> > + *cs++ = MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN;
> 
> Hmm. These are documented for steppings A/B. I wonder what is the
> first production stepping for ILK. Latest stepping mentioned in the
> w/a db is C2.

I was going by Ben's notes that we still wanted these for undetermined
reasons based around the powerctx programming example, iirc. Certainly,
the bspec I found only had them for a/b, but it should be a no-op for us
in any case as we don't use sync flush.
 
> Oh, actually w/a db has WaIlkEnableDisableSuspendFlush listed a
> "forever". Not sure which source to believe here.

I think it's safe and cheap enough to include them. But probably worth a
note that it's more paranoia than anything.
-Chris
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[Intel-gfx] ✓ Fi.CI.BAT: success for igt/perf_pmu: Stop peeking at intel_mmio registers

[Patchwork]

== Series Details ==

Series: igt/perf_pmu: Stop peeking at intel_mmio registers
URL   : https://patchwork.freedesktop.org/series/34268/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
a1e444f4c8178acb590d41c21e921c6447668be4 tests/perf_pmu: Bump measuring 
duration for semaphores as well

with latest DRM-Tip kernel build CI_DRM_3378
b407e5f38397 drm-tip: 2017y-11m-23d-16h-14m-59s UTC integration manifest

No testlist changes.

Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass   -> INCOMPLETE (fi-snb-2520m) fdo#103713
Subgroup suspend-read-crc-pipe-c:
incomplete -> PASS   (fi-cfl-s2)

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:447s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:462s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:383s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:542s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:282s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:505s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:507s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:503s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:492s
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:605s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:434s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:267s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:544s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:435s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:451s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:430s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:488s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:465s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:585s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:465s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:544s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:571s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:526s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:502s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:462s
fi-snb-2520m total:246  pass:212  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:428s
Blacklisted hosts:
fi-cnl-y total:252  pass:226  dwarn:0   dfail:0   fail:0   skip:25 
fi-glk-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:493s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:480s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:534s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:475s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:533s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_540/
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Re: [Intel-gfx] [PATCH 1/3] drm/i915: Enable render context support for Ironlake (gen5)

[Ville Syrjälä]

On Thu, Nov 23, 2017 at 07:46:23PM +0200, Ville Syrjälä wrote:
> On Thu, Nov 23, 2017 at 04:27:48PM +, Chris Wilson wrote:
> > Ironlake does support being able to saving and reloading context specific
> > registers between contexts, providing isolation of the basic GPU state
> > (as programmable by userspace). This allows userspace to assume that the
> > GPU retains their state from one batch to the next, minimising the
> > amount of state it needs to reload.
> > 
> > Signed-off-by: Chris Wilson 
> > ---
> >  drivers/gpu/drm/i915/intel_engine_cs.c  | 2 ++
> >  drivers/gpu/drm/i915/intel_ringbuffer.c | 7 +++
> >  2 files changed, 9 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c 
> > b/drivers/gpu/drm/i915/intel_engine_cs.c
> > index fede62daf3e1..88ef00faf576 100644
> > --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> > @@ -175,6 +175,8 @@ __intel_engine_context_size(struct drm_i915_private 
> > *dev_priv, u8 class)
> > return round_up(GEN6_CXT_TOTAL_SIZE(cxt_size) * 64,
> > PAGE_SIZE);
> > case 5:
> > +   cxt_size = I915_READ(CXT_SIZE);
> > +   return round_up(cxt_size * 64, PAGE_SIZE);
> 
> I don't think this is correct. It misses the non-pipelined 3D state,
> and the ring stuff at the start which IIRC at least SNB still
> saved even though it's not used in ring buffer mode. So I think
> this needs a 0xb added to the CXT_SIZE value.
> 
> But even that doesn't really match the docs. The context image layout
> is shown to be 0x3b cachelines long, but 0xb+0x2d only gets us to
> 0x38. So it looks like CXT_SIZE is off by two for some reason.

Oh. Actually CXT_SIZE is documented to be U5-1 on pre-SNB, so I
guess it's only off by one at most.

-- 
Ville Syrjälä
Intel OTC
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915: Unwind incomplete legacy context switches

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/2] drm/i915: Unwind incomplete legacy 
context switches
URL   : https://patchwork.freedesktop.org/series/34312/
State : success

== Summary ==

Test drv_module_reload:
Subgroup basic-no-display:
dmesg-warn -> PASS   (shard-snb) fdo#102707 +1
Test kms_setmode:
Subgroup basic:
pass   -> FAIL   (shard-hsw) fdo#99912
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-render:
fail   -> PASS   (shard-snb) fdo#101623 +1
Test kms_flip:
Subgroup blt-flip-vs-panning-interruptible:
dmesg-warn -> PASS   (shard-hsw)
Test drv_selftest:
Subgroup mock_sanitycheck:
pass   -> DMESG-WARN (shard-snb) fdo#103717

fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#103717 https://bugs.freedesktop.org/show_bug.cgi?id=103717

shard-hswtotal:2667 pass:1534 dwarn:2   dfail:0   fail:10  skip:1121 
time:9550s
shard-snbtotal:2667 pass:1310 dwarn:3   dfail:0   fail:13  skip:1341 
time:8147s
Blacklisted hosts:
shard-apltotal:2667 pass:1689 dwarn:1   dfail:0   fail:23  skip:954 
time:13574s
shard-kbltotal:2647 pass:1776 dwarn:7   dfail:0   fail:24  skip:839 
time:10665s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7263/shards.html
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Re: [Intel-gfx] [PATCH 1/3] drm/i915: Enable render context support for Ironlake (gen5)

[Ville Syrjälä]

On Thu, Nov 23, 2017 at 04:27:48PM +, Chris Wilson wrote:
> Ironlake does support being able to saving and reloading context specific
> registers between contexts, providing isolation of the basic GPU state
> (as programmable by userspace). This allows userspace to assume that the
> GPU retains their state from one batch to the next, minimising the
> amount of state it needs to reload.
> 
> Signed-off-by: Chris Wilson 
> ---
>  drivers/gpu/drm/i915/intel_engine_cs.c  | 2 ++
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 7 +++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c 
> b/drivers/gpu/drm/i915/intel_engine_cs.c
> index fede62daf3e1..88ef00faf576 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -175,6 +175,8 @@ __intel_engine_context_size(struct drm_i915_private 
> *dev_priv, u8 class)
>   return round_up(GEN6_CXT_TOTAL_SIZE(cxt_size) * 64,
>   PAGE_SIZE);
>   case 5:
> + cxt_size = I915_READ(CXT_SIZE);
> + return round_up(cxt_size * 64, PAGE_SIZE);

I don't think this is correct. It misses the non-pipelined 3D state,
and the ring stuff at the start which IIRC at least SNB still
saved even though it's not used in ring buffer mode. So I think
this needs a 0xb added to the CXT_SIZE value.

But even that doesn't really match the docs. The context image layout
is shown to be 0x3b cachelines long, but 0xb+0x2d only gets us to
0x38. So it looks like CXT_SIZE is off by two for some reason. But
it does't really matter I suppose since we round it up to
a page anyway.

I don't think I ever looked at the context dump to see how big it
really is on ILK. IIRC I did that on SNB and IVB, and maybe HSW.

>   case 4:
>   case 3:
>   case 2:
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c 
> b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index e2085820b586..e649b564b165 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1403,11 +1403,14 @@ static inline int mi_set_context(struct 
> drm_i915_gem_request *rq, u32 flags)
>   /* These flags are for resource streamer on HSW+ */
>   flags |= HSW_MI_RS_SAVE_STATE_EN | HSW_MI_RS_RESTORE_STATE_EN;
>   else
> + /* We need to save the extended state for powersaving modes */
>   flags |= MI_SAVE_EXT_STATE_EN | MI_RESTORE_EXT_STATE_EN;
>  
>   len = 4;
>   if (IS_GEN7(i915))
>   len += 2 + (num_rings ? 4*num_rings + 6 : 0);
> + if (IS_GEN5(i915))
> + len += 2;
>  
>   cs = intel_ring_begin(rq, len);
>   if (IS_ERR(cs))
> @@ -1430,6 +1433,8 @@ static inline int mi_set_context(struct 
> drm_i915_gem_request *rq, u32 flags)
>   GEN6_PSMI_SLEEP_MSG_DISABLE);
>   }
>   }
> + } else if (IS_GEN5(i915)) {
> + *cs++ = MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN;

Hmm. These are documented for steppings A/B. I wonder what is the
first production stepping for ILK. Latest stepping mentioned in the
w/a db is C2.

Oh, actually w/a db has WaIlkEnableDisableSuspendFlush listed a
"forever". Not sure which source to believe here.

>   }
>  
>   *cs++ = MI_NOOP;
> @@ -1464,6 +1469,8 @@ static inline int mi_set_context(struct 
> drm_i915_gem_request *rq, u32 flags)
>   *cs++ = MI_NOOP;
>   }
>   *cs++ = MI_ARB_ON_OFF | MI_ARB_ENABLE;
> + } else if (IS_GEN5(i915)) {
> + *cs++ = MI_SUSPEND_FLUSH;
>   }
>  
>   intel_ring_advance(rq, cs);
> -- 
> 2.15.0
> 
> ___
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> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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[Intel-gfx] [PATCH] drm/i915/pmu: Hide the (unsigned long)ptr cast

[Chris Wilson]

We pretend the PMU config id is a pointer value when encoding it into
the device parameters for presentation via sysfs. This requires casting
of an unsigned long into and out of the pointer member, which annoys
smatch:

drivers/gpu/drm/i915/i915_pmu.c:684 i915_pmu_event_show() warn: argument 3 to 
%lx specifier is cast from pointer

Signed-off-by: Chris Wilson 
Cc: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_pmu.c   | 2 +-
 drivers/gpu/drm/i915/i915_utils.h | 5 +
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 6a42e7f7967d..a8816d25a77b 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -681,7 +681,7 @@ static ssize_t i915_pmu_event_show(struct device *dev,
struct dev_ext_attribute *eattr;
 
eattr = container_of(attr, struct dev_ext_attribute, attr);
-   return sprintf(buf, "config=0x%lx\n", (unsigned long)eattr->var);
+   return sprintf(buf, "config=0x%lx\n", ptr_to_ulong(eattr->var));
 }
 
 #define I915_EVENT_ATTR(_name, _config) \
diff --git a/drivers/gpu/drm/i915/i915_utils.h 
b/drivers/gpu/drm/i915/i915_utils.h
index 8d07764887ec..2595fbf6451f 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -107,6 +107,11 @@ static inline u64 ptr_to_u64(const void *ptr)
return (uintptr_t)ptr;
 }
 
+static inline unsigned long ptr_to_ulong(const void *ptr)
+{
+   return ptr_to_u64(ptr);
+}
+
 #define u64_to_ptr(T, x) ({\
typecheck(u64, x);  \
(T *)(uintptr_t)(x);\
-- 
2.15.0

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[Intel-gfx] ✗ Fi.CI.BAT: failure for igt/perf_pmu: Bump batch_duration for legacy sampling inaccuracy

[Patchwork]

== Series Details ==

Series: igt/perf_pmu: Bump batch_duration for legacy sampling inaccuracy
URL   : https://patchwork.freedesktop.org/series/34263/
State : failure

== Summary ==

Series 34263 revision 1 was fully merged or fully failed: no git log

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[Intel-gfx] ✓ Fi.CI.BAT: success for igt/kms_rotation_crc: Add horizontal flip subtest. (rev3)

[Patchwork]

== Series Details ==

Series: igt/kms_rotation_crc: Add horizontal flip subtest. (rev3)
URL   : https://patchwork.freedesktop.org/series/31407/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
a1e444f4c8178acb590d41c21e921c6447668be4 tests/perf_pmu: Bump measuring 
duration for semaphores as well

with latest DRM-Tip kernel build CI_DRM_3378
b407e5f38397 drm-tip: 2017y-11m-23d-16h-14m-59s UTC integration manifest

Testlist changes:
+igt@kms_rotation_crc@primary-x-tiled-reflect-x-0
+igt@kms_rotation_crc@primary-x-tiled-reflect-x-0-flip
+igt@kms_rotation_crc@primary-x-tiled-reflect-x-180
+igt@kms_rotation_crc@primary-x-tiled-reflect-x-180-flip
+igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0
+igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0-flip
+igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90
+igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90-flip
+igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180
+igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180-flip
+igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270
+igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270-flip
+igt@kms_rotation_crc@primary-y-tiled-reflect-x-0
+igt@kms_rotation_crc@primary-y-tiled-reflect-x-0-flip
+igt@kms_rotation_crc@primary-y-tiled-reflect-x-90
+igt@kms_rotation_crc@primary-y-tiled-reflect-x-90-flip
+igt@kms_rotation_crc@primary-y-tiled-reflect-x-180
+igt@kms_rotation_crc@primary-y-tiled-reflect-x-180-flip
+igt@kms_rotation_crc@primary-y-tiled-reflect-x-270
+igt@kms_rotation_crc@primary-y-tiled-reflect-x-270-flip

Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-c:
incomplete -> PASS   (fi-cfl-s2)

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:456s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:462s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:383s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:543s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:281s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:507s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:511s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:507s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:494s
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:606s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:440s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:267s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:543s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:434s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:442s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:428s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:485s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:464s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:581s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:457s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:543s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:566s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:521s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:500s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:466s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:561s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:426s
Blacklisted hosts:
fi-cnl-y total:232  pass:207  dwarn:0   dfail:0   fail:0   skip:24 
fi-glk-dsi   total:289  pass:164  dwarn:0   dfail:10  fail:2   skip:113 
time:420s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:487s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:534s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:478s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:534s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_538/
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[Intel-gfx] ✗ Fi.CI.BAT: failure for tests/perf_pmu: Make the invalid-init failure place more obvious

[Patchwork]

== Series Details ==

Series: tests/perf_pmu: Make the invalid-init failure place more obvious
URL   : https://patchwork.freedesktop.org/series/34255/
State : failure

== Summary ==

Series 34255 revision 1 was fully merged or fully failed: no git log

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[Intel-gfx] ✓ Fi.CI.BAT: success for igt/perf_pmu: Reduce arbitrary delays

[Patchwork]

== Series Details ==

Series: igt/perf_pmu: Reduce arbitrary delays
URL   : https://patchwork.freedesktop.org/series/34253/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
a1e444f4c8178acb590d41c21e921c6447668be4 tests/perf_pmu: Bump measuring 
duration for semaphores as well

with latest DRM-Tip kernel build CI_DRM_3378
b407e5f38397 drm-tip: 2017y-11m-23d-16h-14m-59s UTC integration manifest

No testlist changes.

Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-c:
incomplete -> PASS   (fi-cfl-s2)

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:450s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:462s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:381s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:548s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:282s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:511s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:517s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:508s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:490s
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:604s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:429s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:267s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:551s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:438s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:441s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:437s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:486s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:469s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:576s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:458s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:540s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:574s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:519s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:504s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:468s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:561s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:426s
Blacklisted hosts:
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:551s
fi-glk-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:499s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:483s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:532s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:475s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:532s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_536/
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[Intel-gfx] ✓ Fi.CI.IGT: success for igt/gem_ctx_isolation: Check isolation of registers between contexts (rev7)

[Patchwork]

== Series Details ==

Series: igt/gem_ctx_isolation: Check isolation of registers between contexts 
(rev7)
URL   : https://patchwork.freedesktop.org/series/32531/
State : success

== Summary ==

Test drv_module_reload:
Subgroup basic-reload-inject:
pass   -> DMESG-WARN (shard-snb) fdo#102707 +3
Test kms_sysfs_edid_timing:
pass   -> WARN   (shard-hsw) fdo#100047
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-blt:
pass   -> FAIL   (shard-snb) fdo#101623
Test drv_selftest:
Subgroup mock_sanitycheck:
pass   -> DMESG-WARN (shard-hsw) fdo#103719
Test kms_flip:
Subgroup blt-flip-vs-panning-interruptible:
dmesg-warn -> PASS   (shard-hsw)

fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#103719 https://bugs.freedesktop.org/show_bug.cgi?id=103719

shard-hswtotal:2702 pass:1539 dwarn:3   dfail:0   fail:10  skip:1149 
time:9593s
shard-snbtotal:2702 pass:1316 dwarn:2   dfail:0   fail:15  skip:1369 
time:8132s
Blacklisted hosts:
shard-apltotal:2682 pass:1689 dwarn:2   dfail:0   fail:28  skip:961 
time:13440s
shard-kbltotal:2682 pass:1806 dwarn:5   dfail:0   fail:30  skip:840 
time:10736s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_531/shards.html
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[Intel-gfx] ✗ Fi.CI.BAT: failure for igt/perf_pmu: Avoid underflow in measured_sleep()

[Patchwork]

== Series Details ==

Series: igt/perf_pmu: Avoid underflow in measured_sleep()
URL   : https://patchwork.freedesktop.org/series/34252/
State : failure

== Summary ==

Series 34252 revision 1 was fully merged or fully failed: no git log

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[Intel-gfx] ✗ Fi.CI.BAT: failure for igt/perf_pmu: Protect macro args

[Patchwork]

== Series Details ==

Series: igt/perf_pmu: Protect macro args
URL   : https://patchwork.freedesktop.org/series/34251/
State : failure

== Summary ==

Series 34251 revision 1 was fully merged or fully failed: no git log

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[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] igt/perf_pmu: Clear errno in between invalid atrr tests

[Patchwork]

== Series Details ==

Series: series starting with [1/2] igt/perf_pmu: Clear errno in between invalid 
atrr tests
URL   : https://patchwork.freedesktop.org/series/34249/
State : failure

== Summary ==

Series 34249 revision 1 was fully merged or fully failed: no git log

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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Enable render context support for Ironlake (gen5)

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Enable render context support for 
Ironlake (gen5)
URL   : https://patchwork.freedesktop.org/series/34315/
State : success

== Summary ==

Series 34315v1 series starting with [1/3] drm/i915: Enable render context 
support for Ironlake (gen5)
https://patchwork.freedesktop.org/api/1.0/series/34315/revisions/1/mbox/

Test gem_ctx_basic:
skip   -> PASS   (fi-bwr-2160)
skip   -> PASS   (fi-elk-e7500)
skip   -> PASS   (fi-ilk-650)
Test gem_ctx_create:
Subgroup basic:
skip   -> PASS   (fi-bwr-2160)
skip   -> PASS   (fi-elk-e7500)
skip   -> PASS   (fi-ilk-650)
Subgroup basic-files:
skip   -> PASS   (fi-bwr-2160)
skip   -> PASS   (fi-elk-e7500)
skip   -> PASS   (fi-ilk-650)
Test gem_ctx_exec:
Subgroup basic:
skip   -> PASS   (fi-bwr-2160)
skip   -> PASS   (fi-elk-e7500)
skip   -> PASS   (fi-ilk-650)
Test gem_ctx_param:
Subgroup basic:
skip   -> PASS   (fi-bwr-2160)
skip   -> PASS   (fi-elk-e7500)
skip   -> PASS   (fi-ilk-650)
Subgroup basic-default:
skip   -> PASS   (fi-bwr-2160)
skip   -> PASS   (fi-elk-e7500)
skip   -> PASS   (fi-ilk-650)
Test gem_ctx_switch:
Subgroup basic-default:
skip   -> PASS   (fi-bwr-2160)
skip   -> PASS   (fi-elk-e7500)
skip   -> PASS   (fi-ilk-650)
Subgroup basic-default-heavy:
skip   -> PASS   (fi-bwr-2160)
skip   -> PASS   (fi-elk-e7500)
skip   -> PASS   (fi-ilk-650)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass   -> INCOMPLETE (fi-snb-2520m) fdo#103713
Subgroup suspend-read-crc-pipe-c:
incomplete -> PASS   (fi-cfl-s2)

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:450s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:453s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:383s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:545s
fi-bwr-2160  total:289  pass:191  dwarn:0   dfail:0   fail:0   skip:98  
time:440s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:507s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:507s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:502s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:488s
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:604s
fi-elk-e7500 total:289  pass:237  dwarn:0   dfail:0   fail:0   skip:52  
time:503s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:268s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:540s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:433s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:444s
fi-ilk-650   total:289  pass:236  dwarn:0   dfail:0   fail:0   skip:53  
time:462s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:477s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:462s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:581s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:452s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:539s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:565s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:519s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:497s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:463s
fi-snb-2520m total:246  pass:212  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:429s
Blacklisted hosts:
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:549s
fi-glk-dsi   total:66   pass:57   dwarn:1   dfail:0   fail:0   skip:7  
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:481s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:529s

[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/2] intel-gpu-overlay: Add queued stat

[Patchwork]

== Series Details ==

Series: series starting with [1/2] intel-gpu-overlay: Add queued stat
URL   : https://patchwork.freedesktop.org/series/34228/
State : warning

== Summary ==

Test kms_flip:
Subgroup wf_vblank-ts-check-interruptible:
pass   -> SKIP   (shard-hsw) fdo#103181
Subgroup plain-flip-fb-recreate:
pass   -> FAIL   (shard-hsw) fdo#100368
Subgroup blt-flip-vs-panning-interruptible:
dmesg-warn -> PASS   (shard-hsw)
Test kms_cursor_legacy:
Subgroup cursor-vs-flip-varying-size:
pass   -> SKIP   (shard-hsw)
Test drv_module_reload:
Subgroup basic-no-display:
dmesg-warn -> PASS   (shard-snb) fdo#102707 +1
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-render:
fail   -> PASS   (shard-snb) fdo#101623 +1
Test drv_selftest:
Subgroup mock_sanitycheck:
pass   -> DMESG-WARN (shard-snb) fdo#103717
pass   -> DMESG-WARN (shard-hsw) fdo#103719
Test kms_setmode:
Subgroup basic:
pass   -> FAIL   (shard-hsw) fdo#99912

fdo#103181 https://bugs.freedesktop.org/show_bug.cgi?id=103181
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#103717 https://bugs.freedesktop.org/show_bug.cgi?id=103717
fdo#103719 https://bugs.freedesktop.org/show_bug.cgi?id=103719
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912

shard-hswtotal:2677 pass:1531 dwarn:2   dfail:0   fail:19  skip:1125 
time:9491s
shard-snbtotal:2677 pass:1311 dwarn:2   dfail:0   fail:19  skip:1345 
time:8130s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_530/shards.html
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[Intel-gfx] [PATCH 1/3] drm/i915: Enable render context support for Ironlake (gen5)

[Chris Wilson]

Ironlake does support being able to saving and reloading context specific
registers between contexts, providing isolation of the basic GPU state
(as programmable by userspace). This allows userspace to assume that the
GPU retains their state from one batch to the next, minimising the
amount of state it needs to reload.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/intel_engine_cs.c  | 2 ++
 drivers/gpu/drm/i915/intel_ringbuffer.c | 7 +++
 2 files changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c 
b/drivers/gpu/drm/i915/intel_engine_cs.c
index fede62daf3e1..88ef00faf576 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -175,6 +175,8 @@ __intel_engine_context_size(struct drm_i915_private 
*dev_priv, u8 class)
return round_up(GEN6_CXT_TOTAL_SIZE(cxt_size) * 64,
PAGE_SIZE);
case 5:
+   cxt_size = I915_READ(CXT_SIZE);
+   return round_up(cxt_size * 64, PAGE_SIZE);
case 4:
case 3:
case 2:
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c 
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index e2085820b586..e649b564b165 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1403,11 +1403,14 @@ static inline int mi_set_context(struct 
drm_i915_gem_request *rq, u32 flags)
/* These flags are for resource streamer on HSW+ */
flags |= HSW_MI_RS_SAVE_STATE_EN | HSW_MI_RS_RESTORE_STATE_EN;
else
+   /* We need to save the extended state for powersaving modes */
flags |= MI_SAVE_EXT_STATE_EN | MI_RESTORE_EXT_STATE_EN;
 
len = 4;
if (IS_GEN7(i915))
len += 2 + (num_rings ? 4*num_rings + 6 : 0);
+   if (IS_GEN5(i915))
+   len += 2;
 
cs = intel_ring_begin(rq, len);
if (IS_ERR(cs))
@@ -1430,6 +1433,8 @@ static inline int mi_set_context(struct 
drm_i915_gem_request *rq, u32 flags)
GEN6_PSMI_SLEEP_MSG_DISABLE);
}
}
+   } else if (IS_GEN5(i915)) {
+   *cs++ = MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN;
}
 
*cs++ = MI_NOOP;
@@ -1464,6 +1469,8 @@ static inline int mi_set_context(struct 
drm_i915_gem_request *rq, u32 flags)
*cs++ = MI_NOOP;
}
*cs++ = MI_ARB_ON_OFF | MI_ARB_ENABLE;
+   } else if (IS_GEN5(i915)) {
+   *cs++ = MI_SUSPEND_FLUSH;
}
 
intel_ring_advance(rq, cs);
-- 
2.15.0

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[Intel-gfx] [PATCH 2/3] drm/i915: Enable render context support for gen4 (Broadwater to Cantiga)

[Chris Wilson]

Broadwater and the rest of gen4  do support being able to saving and
reloading context specific registers between contexts, providing isolation
of the basic GPU state (as programmable by userspace). This allows
userspace to assume that the GPU retains their state from one batch to the
next, minimising the amount of state it needs to reload.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/intel_engine_cs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c 
b/drivers/gpu/drm/i915/intel_engine_cs.c
index 88ef00faf576..2c9b67e21d48 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -175,9 +175,9 @@ __intel_engine_context_size(struct drm_i915_private 
*dev_priv, u8 class)
return round_up(GEN6_CXT_TOTAL_SIZE(cxt_size) * 64,
PAGE_SIZE);
case 5:
+   case 4:
cxt_size = I915_READ(CXT_SIZE);
return round_up(cxt_size * 64, PAGE_SIZE);
-   case 4:
case 3:
case 2:
/* For the special day when i810 gets merged. */
-- 
2.15.0

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[Intel-gfx] [PATCH 3/3] drm/i915: Remove unsafe i915.enable_rc6

[Chris Wilson]

It has been many years since the last confirmed sighting (and fix) of an
RC6 related bug (usually a system hang). Remove the parameter to stop
users from setting dangerous values, as they often set it during triage
and end up disabling the entire runtime pm instead (the option is not a
fine scalpel!).

Furthermore, it allows users to set known dangerous values which were
intended for testing and not for production use. For testing, we can
always patch in the required setting without having to expose ourselves
to random abuse.

v2: Fixup NEEDS_WaRsDisableCoarsePowerGating fumble, and document the
lack of ilk support better.
v3: Clear intel_info->rc6p if we don't support rc6 itself.

Signed-off-by: Chris Wilson 
Cc: Rodrigo Vivi 
Cc: Joonas Lahtinen 
Cc: Jani Nikula 
Cc: Imre Deak 
Cc: Daniel Vetter 
Acked-by: Daniel Vetter 
Reviewed-by: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/i915_drv.c |   2 +-
 drivers/gpu/drm/i915/i915_drv.h |   1 +
 drivers/gpu/drm/i915/i915_params.c  |   7 --
 drivers/gpu/drm/i915/i915_params.h  |   1 -
 drivers/gpu/drm/i915/i915_pci.c |   2 +
 drivers/gpu/drm/i915/i915_sysfs.c   |  13 +++-
 drivers/gpu/drm/i915/intel_drv.h|   5 --
 drivers/gpu/drm/i915/intel_guc.c|   3 +-
 drivers/gpu/drm/i915/intel_pm.c | 134 +++-
 drivers/gpu/drm/i915/intel_uncore.c |   3 -
 10 files changed, 56 insertions(+), 115 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 0793a27e2b95..a6af1e710ae1 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2505,7 +2505,7 @@ static int intel_runtime_suspend(struct device *kdev)
struct drm_i915_private *dev_priv = to_i915(dev);
int ret;
 
-   if (WARN_ON_ONCE(!(dev_priv->gt_pm.rc6.enabled && intel_rc6_enabled(
+   if (WARN_ON_ONCE(!(dev_priv->gt_pm.rc6.enabled && HAS_RC6(dev_priv
return -ENODEV;
 
if (WARN_ON_ONCE(!HAS_RUNTIME_PM(dev_priv)))
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d575a56fc100..6132145eb128 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3214,6 +3214,7 @@ intel_info(const struct drm_i915_private *dev_priv)
 #define HAS_PSR(dev_priv)   ((dev_priv)->info.has_psr)
 #define HAS_RC6(dev_priv)   ((dev_priv)->info.has_rc6)
 #define HAS_RC6p(dev_priv)  ((dev_priv)->info.has_rc6p)
+#define HAS_RC6pp(dev_priv) (false) /* HW was never validated */
 
 #define HAS_CSR(dev_priv)  ((dev_priv)->info.has_csr)
 
diff --git a/drivers/gpu/drm/i915/i915_params.c 
b/drivers/gpu/drm/i915/i915_params.c
index 3328147b4863..7bc538687871 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -46,13 +46,6 @@ i915_param_named_unsafe(panel_ignore_lid, int, 0600,
"Override lid status (0=autodetect, 1=autodetect disabled [default], "
"-1=force lid closed, -2=force lid open)");
 
-i915_param_named_unsafe(enable_rc6, int, 0400,
-   "Enable power-saving render C-state 6. "
-   "Different stages can be selected via bitmask values "
-   "(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest 
rc6). "
-   "For example, 3 would enable rc6 and deep rc6, and 7 would enable 
everything. "
-   "default: -1 (use per-chip default)");
-
 i915_param_named_unsafe(enable_dc, int, 0400,
"Enable power-saving display C-states. "
"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6)");
diff --git a/drivers/gpu/drm/i915/i915_params.h 
b/drivers/gpu/drm/i915/i915_params.h
index 8321bd86cba5..c48c88bb95e8 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -34,7 +34,6 @@
param(int, lvds_channel_mode, 0) \
param(int, panel_use_ssc, -1) \
param(int, vbt_sdvo_panel_type, -1) \
-   param(int, enable_rc6, -1) \
param(int, enable_dc, -1) \
param(int, enable_fbc, -1) \
param(int, enable_ppgtt, -1) \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 6458c309c039..edf7221c553a 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -216,6 +216,8 @@ static const struct intel_device_info intel_gm45_info 
__initconst = {
 static const struct intel_device_info intel_ironlake_d_info __initconst = {
GEN5_FEATURES,
.platform = INTEL_IRONLAKE,
+   /* ilk does support rc6, but we do not implement [power] contexts */
+   .has_rc6 = 0,
 };
 
 static const struct intel_device_info intel_ironlake_m_info __initconst = {
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c 
b/drivers/gpu/drm/i915/i915_sysfs.c
index 

[Intel-gfx] ✓ Fi.CI.IGT: success for kms_plane: Enumerate outputs before planes

[Patchwork]

== Series Details ==

Series: kms_plane: Enumerate outputs before planes
URL   : https://patchwork.freedesktop.org/series/34190/
State : success

== Summary ==

Test kms_setmode:
Subgroup basic:
pass   -> FAIL   (shard-hsw) fdo#99912
Test kms_flip:
Subgroup plain-flip-ts-check-interruptible:
pass   -> FAIL   (shard-hsw) fdo#100368 +2
Subgroup blt-flip-vs-panning-interruptible:
dmesg-warn -> PASS   (shard-hsw)
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-render:
fail   -> PASS   (shard-snb) fdo#101623
Test drv_module_reload:
Subgroup basic-reload:
pass   -> DMESG-WARN (shard-hsw) fdo#102707 +2

fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707

shard-hswtotal:2667 pass:1532 dwarn:2   dfail:0   fail:12  skip:1121 
time:9522s
shard-snbtotal:2649 pass:1293 dwarn:1   dfail:0   fail:13  skip:1341 
time:7983s
Blacklisted hosts:
shard-apltotal:2647 pass:1665 dwarn:1   dfail:0   fail:26  skip:954 
time:13350s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_525/shards.html
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] igt/perf_pmu: Idle the GPU before starting to measure busyness

[Patchwork]

== Series Details ==

Series: series starting with [1/3] igt/perf_pmu: Idle the GPU before starting 
to measure busyness
URL   : https://patchwork.freedesktop.org/series/34246/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
a1e444f4c8178acb590d41c21e921c6447668be4 tests/perf_pmu: Bump measuring 
duration for semaphores as well

with latest DRM-Tip kernel build CI_DRM_3377
9d399f816945 drm-tip: 2017y-11m-23d-12h-28m-12s UTC integration manifest

No testlist changes.

Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass   -> INCOMPLETE (fi-snb-2520m) fdo#103713

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:450s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:462s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:384s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:554s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:279s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:514s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:511s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:509s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:491s
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:608s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:440s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:272s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:543s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:432s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:436s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:430s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:490s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:473s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:583s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:447s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:552s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:569s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:524s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:502s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:469s
fi-snb-2520m total:246  pass:212  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:427s
Blacklisted hosts:
fi-cnl-y total:219  pass:198  dwarn:0   dfail:0   fail:0   skip:20 
fi-glk-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:491s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:495s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:529s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:478s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:536s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_532/
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Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/selftests: rein in igt_write_huge

[Chris Wilson]

Quoting Patchwork (2017-11-23 16:05:02)
> == Series Details ==
> 
> Series: series starting with [1/2] drm/i915/selftests: rein in igt_write_huge
> URL   : https://patchwork.freedesktop.org/series/34304/
> State : success
> 
> == Summary ==
> 
> Test drv_module_reload:
> Subgroup basic-no-display:
> dmesg-warn -> PASS   (shard-snb) fdo#102707 +1
> Test kms_flip:
> Subgroup plain-flip-fb-recreate-interruptible:
> pass   -> FAIL   (shard-hsw) fdo#100368
> Subgroup blt-flip-vs-panning-interruptible:
> dmesg-warn -> PASS   (shard-hsw)
> Test drv_selftest:
> Subgroup mock_sanitycheck:
> pass   -> DMESG-WARN (shard-snb) fdo#103717

And pushed. Thanks for the improvements to the tests,
-Chris
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Re: [Intel-gfx] [PATCH igt 3/3] igt/perf_pmu: Idle the GPU before starting to measure busyness

[Chris Wilson]

Quoting Chris Wilson (2017-11-23 16:02:20)
> Quoting Tvrtko Ursulin (2017-11-23 13:37:30)
> > 
> > On 23/11/2017 08:22, Chris Wilson wrote:
> > > Make sure the HW is idle before we start sampling the GPU for busyness.
> > > If we do not rest for long enough between tests, we may carry the
> > > sampling over.
> > 
> > I'd rather not have this since as I said yesterday each opened PMU event 
> > is supposed to record the initial counter value as reference. If that is 
> > failing or not good enough on some tests/platforms I would rather first 
> > understand why and how.
> 
> All legacy sampling fails... :| I'm putting it back!

So presumably it is coupling with the parking.
-Chris
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Re: [Intel-gfx] [PATCH] drm: Introduce RGB 64-bit 16:16:16:16 float format

[Ville Syrjälä]

On Thu, Nov 23, 2017 at 04:56:56PM +0800, Tina Zhang wrote:
> The RGB 64-bit 16:16:16:16 float pixel format is needed by some Apps in
> windows. The float format in each component is 1:5:10 MSb-sign:exponent:
> fraction.
> 
> This patch is to introduce the format to drm, so that the windows guest's
> framebuffer in this kind of format can be recognized and used by linux
> host.
> 
> v14:
> - add some details about the float pixel format. (Daniel)
> - add F suffix to the defined name. (Daniel)
> 
> v12:
> - send to dri-devel at lists.freedesktop.org. (Ville)
> 
> v9:
> - separated from framebuffer decoder patch. (Zhenyu) (Xiaoguang)
> 
> Signed-off-by: Tina Zhang 
> Cc: Ville Syrjälä 
> Cc: Dave Airlie 
> Cc: Daniel Vetter 
> ---
>  include/uapi/drm/drm_fourcc.h | 4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index 3ad838d..391d2e6 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -113,6 +113,10 @@ extern "C" {
>  
>  #define DRM_FORMAT_AYUV  fourcc_code('A', 'Y', 'U', 'V') /* 
> [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
>  
> +/* 64 bpp RGB 16:16:16:16 Floating Point */

As before this is still extremely vague. Stating that each component is
a IEEE-754 half-precision float (binary16) should cover it. Well, assuming
that it really is one.

> +#define DRM_FORMAT_XRGB161616F  fourcc_code('X', 'R', '3', 'F') /* [63:0] 
> x:R:G:B 16:16:16:16 little endian */
> +#define DRM_FORMAT_XBGR161616F  fourcc_code('X', 'B', '3', 'F') /* [63:0] 
> x:B:G:R 16:16:16:16 little endian */

Missing one 16 from that name to be consistent with the non-float stuff.

Also maybe it should be (... '4', 'F')? '3' would seem to imply a 48 bit
pixel.

And of course it's still missing the actual implemntation for any driver.

> +
>  /*
>   * 2 plane RGB + A
>   * index 0 = RGB plane, same format as the corresponding non _A8 format has
> -- 
> 2.7.4

-- 
Ville Syrjälä
Intel OTC
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/selftests: rein in igt_write_huge

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/selftests: rein in igt_write_huge
URL   : https://patchwork.freedesktop.org/series/34304/
State : success

== Summary ==

Test drv_module_reload:
Subgroup basic-no-display:
dmesg-warn -> PASS   (shard-snb) fdo#102707 +1
Test kms_flip:
Subgroup plain-flip-fb-recreate-interruptible:
pass   -> FAIL   (shard-hsw) fdo#100368
Subgroup blt-flip-vs-panning-interruptible:
dmesg-warn -> PASS   (shard-hsw)
Test drv_selftest:
Subgroup mock_sanitycheck:
pass   -> DMESG-WARN (shard-snb) fdo#103717

fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103717 https://bugs.freedesktop.org/show_bug.cgi?id=103717

shard-hswtotal:2667 pass:1535 dwarn:1   dfail:0   fail:10  skip:1121 
time:9487s
shard-snbtotal:2649 pass:1292 dwarn:2   dfail:0   fail:13  skip:1341 
time:7945s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7262/shards.html
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Re: [Intel-gfx] [PATCH igt 3/3] igt/perf_pmu: Idle the GPU before starting to measure busyness

[Chris Wilson]

Quoting Tvrtko Ursulin (2017-11-23 13:37:30)
> 
> On 23/11/2017 08:22, Chris Wilson wrote:
> > Make sure the HW is idle before we start sampling the GPU for busyness.
> > If we do not rest for long enough between tests, we may carry the
> > sampling over.
> 
> I'd rather not have this since as I said yesterday each opened PMU event 
> is supposed to record the initial counter value as reference. If that is 
> failing or not good enough on some tests/platforms I would rather first 
> understand why and how.

All legacy sampling fails... :| I'm putting it back!
-Chris
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/selftests: rein in igt_write_huge

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/selftests: rein in igt_write_huge
URL   : https://patchwork.freedesktop.org/series/34302/
State : success

== Summary ==

Test kms_setmode:
Subgroup basic:
pass   -> FAIL   (shard-hsw) fdo#99912
Test drv_module_reload:
Subgroup basic-no-display:
dmesg-warn -> PASS   (shard-hsw) fdo#102707
Test kms_cursor_legacy:
Subgroup flip-vs-cursor-legacy:
pass   -> FAIL   (shard-hsw) fdo#102670 +1
Test drv_suspend:
Subgroup fence-restore-tiled2untiled-hibernate:
fail   -> SKIP   (shard-hsw) fdo#103375
Test kms_flip:
Subgroup blt-flip-vs-panning-interruptible:
dmesg-warn -> PASS   (shard-hsw)

fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#102670 https://bugs.freedesktop.org/show_bug.cgi?id=102670
fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375

shard-hswtotal:2667 pass:1533 dwarn:1   dfail:0   fail:11  skip:1122 
time:9556s
shard-snbtotal:2667 pass:1311 dwarn:2   dfail:0   fail:13  skip:1341 
time:8108s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7259/shards.html
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Re: [Intel-gfx] [PATCH i-g-t] i-g-t: kms_plane_scaling: Enhanced scaling tests

[Juha-Pekka Heikkila]

On 22.11.2017 10:15, Vidya Srinivas wrote:

From: Jyoti Yadav 

Added subtests to cover below gaps.
1. scaler with pixelformat and tiling.
2. scaler with rotation
3. scaler with multiple planes
4. scaler with multi pipe
5. scaler with clipping/clamping scenario

Signed-off-by: Jyoti Yadav 
---
  tests/kms_plane_scaling.c | 480 +-
  1 file changed, 476 insertions(+), 4 deletions(-)

diff --git a/tests/kms_plane_scaling.c b/tests/kms_plane_scaling.c
index 403df47..2be6acc 100644
--- a/tests/kms_plane_scaling.c
+++ b/tests/kms_plane_scaling.c
@@ -43,10 +43,11 @@ typedef struct {
struct igt_fb fb1;
struct igt_fb fb2;
struct igt_fb fb3;
+   struct igt_fb fb4;
int fb_id1;
int fb_id2;
int fb_id3;
-
+   int fb_id4;
igt_plane_t *plane1;
igt_plane_t *plane2;
igt_plane_t *plane3;
@@ -54,6 +55,51 @@ typedef struct {
  } data_t;
  
  #define FILE_NAME   "1080p-left.png"

+#define MIN_SRC_WIDTH 8
+#define MAX_SRC_WIDTH 4096
+static uint32_t check_pixel_format(uint32_t pixel_format)
+{
+   const uint32_t *igt_formats;
+   int num_igt_formats;
+   int i;
+
+
+   igt_get_all_cairo_formats(_formats, _igt_formats);
+   for (i = 0; i < num_igt_formats; i++) {
+   if (pixel_format == igt_formats[i])
+   return 0;
+   }
+
+   return -1;
+}
+bool is_igt_output_connected(igt_output_t *output)


^^ static


+{
+   /* Something went wrong during probe? */
+   if (!output->config.connector)
+   return false;
+
+   if (output->config.connector->connection == DRM_MODE_CONNECTED)
+   return true;
+
+   return false;
+}
+
+static igt_output_t *get_next_valid_output(igt_display_t *data, int i)
+{
+   int j = 0, valid_output = 0;
+   drmModeModeInfo *mode;
+   for (j = 0; j < data->n_outputs; j++) {
+   if (is_igt_output_connected(>outputs[j])) {
+   mode = igt_output_get_mode(>outputs[j]);
+   if (mode->hdisplay != 0 && mode->vdisplay != 0) {
+   valid_output++;
+   if (valid_output == i)
+   return >outputs[j];
+   }
+   }
+   }
+   return NULL;
+}
  
  static void prepare_crtc(data_t *data, igt_output_t *output, enum pipe pipe,

igt_plane_t *plane, drmModeModeInfo *mode, enum 
igt_commit_style s)
@@ -298,7 +344,418 @@ static void test_plane_scaling(data_t *d)
igt_require_f(valid_tests, "no valid crtc/connector combinations 
found\n");
  }
  
-igt_simple_main

+uint64_t get_tiling(int i)


^^ static


+{
+   switch (i) {
+   case 0:
+   return LOCAL_DRM_FORMAT_MOD_NONE;
+   break;
+   case 1:
+   return LOCAL_I915_FORMAT_MOD_X_TILED;
+   break;
+   case 2:
+   return LOCAL_I915_FORMAT_MOD_Y_TILED;
+   break;
+   case 3:
+   return LOCAL_I915_FORMAT_MOD_Yf_TILED;
+   break;
+   default:
+   return -1;
+   }
+}
+
+void loop_plane_scaling(data_t *d, igt_plane_t *plane, uint32_t pixel_format,


^^ static


+   uint64_t tiling, enum pipe pipe, igt_output_t *output)
+{
+   igt_display_t *display = >display;
+   int width, height;
+   /* create buffer in the range of  min and max source side limit.*/
+   for (width = MIN_SRC_WIDTH; width <= MAX_SRC_WIDTH; width = width + 
500) {
+   igt_output_set_pipe(output, pipe);
+   height = width + 10;
+   d->fb_id1 = igt_create_pattern_fb(display->drm_fd, width, 
height,
+   pixel_format, tiling, >fb1);
+   igt_assert(d->fb_id1);
+   igt_plane_set_fb(plane, >fb1);
+   /* check upscaling */
+   igt_fb_set_position(>fb1, plane, 0, 0);
+   igt_fb_set_size(>fb1, plane, d->fb1.width, d->fb1.height);
+   igt_plane_set_position(plane, 10, 10);
+   igt_plane_set_size(plane, width*2, height*2);
+   igt_display_commit2(display, COMMIT_ATOMIC);


When it says 'check' here, should here be used 'igt_display_try_commit2' 
instead of 'igt_display_commit2'? I was bit confused where the checking 
is really happening. Same goes for all the tests, I see the setup 
asserted but for actual 'check' I didn't find asserts about any results.



+   igt_plane_set_fb(plane, NULL);
+   igt_plane_set_position(plane, 0, 0);
+   if (d->fb_id1) {
+   igt_remove_fb(d->drm_fd, >fb1);
+   d->fb_id1 = 0;
+   }
+   }
+}
+void test_scaler_with_pixel_format(data_t *d)


^^ 

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/pmu: Remove conditional HOTPLUG_CPU registration

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/pmu: Remove conditional HOTPLUG_CPU 
registration
URL   : https://patchwork.freedesktop.org/series/34300/
State : success

== Summary ==

Test drv_module_reload:
Subgroup basic-no-display:
dmesg-warn -> PASS   (shard-snb) fdo#102707 +2
Test kms_flip:
Subgroup plain-flip-fb-recreate-interruptible:
pass   -> FAIL   (shard-hsw) fdo#100368
Subgroup blt-flip-vs-panning-interruptible:
dmesg-warn -> PASS   (shard-hsw)
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-render:
fail   -> PASS   (shard-snb) fdo#101623
Test drv_selftest:
Subgroup mock_sanitycheck:
pass   -> DMESG-WARN (shard-hsw) fdo#103719

fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#103719 https://bugs.freedesktop.org/show_bug.cgi?id=103719

shard-hswtotal:2667 pass:1533 dwarn:3   dfail:0   fail:10  skip:1121 
time:9599s
shard-snbtotal:2667 pass:1313 dwarn:1   dfail:0   fail:12  skip:1341 
time:8128s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7258/shards.html
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915: Unwind incomplete legacy context switches

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/2] drm/i915: Unwind incomplete legacy 
context switches
URL   : https://patchwork.freedesktop.org/series/34312/
State : success

== Summary ==

Series 34312v1 series starting with [CI,1/2] drm/i915: Unwind incomplete legacy 
context switches
https://patchwork.freedesktop.org/api/1.0/series/34312/revisions/1/mbox/

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:447s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:466s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:386s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:548s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:278s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:509s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:507s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:503s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:493s
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:609s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:436s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:265s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:545s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:434s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:438s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:433s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:477s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:465s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:577s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:462s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:554s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:570s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:525s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:498s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:467s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:568s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:428s
Blacklisted hosts:
fi-glk-dsi   total:120  pass:64   dwarn:0   dfail:1   fail:0   skip:54 
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:480s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:532s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:476s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:538s
fi-cnl-y failed to connect after reboot

9d399f81694538228a539de9a908cdf9ef00f814 drm-tip: 2017y-11m-23d-12h-28m-12s UTC 
integration manifest
407e8abb3ef1 drm/i915: Move mi_set_context() into the legacy ringbuffer 
submission
901050170110 drm/i915: Unwind incomplete legacy context switches

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7263/
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