[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/8] drm/i915/psr: Share PSR and PSR2 exit mask
== Series Details == Series: series starting with [1/8] drm/i915/psr: Share PSR and PSR2 exit mask URL : https://patchwork.freedesktop.org/series/49993/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4854_full -> Patchwork_10246_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10246_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10246_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10246_full: === IGT changes === Warnings igt@perf_pmu@rc6: shard-kbl: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_10246_full that come from known issues: === IGT changes === Issues hit igt@kms_busy@extended-modeset-hang-newfb-render-a: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-pageflip-hang-newfb-render-a: shard-apl: PASS -> DMESG-WARN (fdo#107956) Possible fixes igt@gem_eio@in-flight-1us: shard-glk: FAIL (fdo#105957) -> PASS igt@gem_exec_await@wide-contexts: shard-apl: FAIL (fdo#106680) -> PASS igt@gem_ppgtt@blt-vs-render-ctxn: shard-kbl: INCOMPLETE (fdo#103665, fdo#106023) -> PASS igt@kms_available_modes_crc@available_mode_test_crc: shard-hsw: FAIL (fdo#106641) -> PASS igt@kms_cursor_legacy@cursora-vs-flipa-toggle: shard-glk: DMESG-WARN (fdo#106538, fdo#105763) -> PASS igt@kms_setmode@basic: shard-kbl: FAIL (fdo#99912) -> PASS fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763 fdo#105957 https://bugs.freedesktop.org/show_bug.cgi?id=105957 fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023 fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538 fdo#106641 https://bugs.freedesktop.org/show_bug.cgi?id=106641 fdo#106680 https://bugs.freedesktop.org/show_bug.cgi?id=106680 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4854 -> Patchwork_10246 CI_DRM_4854: 78a6bcff149f370d58fe0bf51c29cbe62d8bc27c @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10246: 2325a088dbf665a85474f22d50b1c54e8930db09 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10246/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm: Use default dma_fence hooks where possible for null syncobj
== Series Details == Series: series starting with [1/2] drm: Use default dma_fence hooks where possible for null syncobj URL : https://patchwork.freedesktop.org/series/49988/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4853_full -> Patchwork_10245_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10245_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10245_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10245_full: === IGT changes === Warnings igt@perf_pmu@rc6: shard-kbl: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_10245_full that come from known issues: === IGT changes === Issues hit igt@gem_exec_big: shard-hsw: PASS -> TIMEOUT (fdo#107937) igt@gem_ppgtt@blt-vs-render-ctxn: shard-kbl: PASS -> INCOMPLETE (fdo#103665, fdo#106023) igt@gem_userptr_blits@readonly-unsync: shard-kbl: PASS -> INCOMPLETE (fdo#103665) igt@kms_busy@extended-modeset-hang-newfb-render-b: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: shard-kbl: PASS -> DMESG-WARN (fdo#107956) igt@kms_cursor_legacy@cursora-vs-flipa-toggle: shard-glk: PASS -> DMESG-WARN (fdo#106538, fdo#105763) igt@kms_setmode@basic: shard-kbl: PASS -> FAIL (fdo#99912) Possible fixes igt@gem_exec_await@wide-contexts: shard-apl: FAIL (fdo#106680) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: shard-kbl: INCOMPLETE (fdo#103665) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763 fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023 fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538 fdo#106680 https://bugs.freedesktop.org/show_bug.cgi?id=106680 fdo#107937 https://bugs.freedesktop.org/show_bug.cgi?id=107937 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4853 -> Patchwork_10245 CI_DRM_4853: 4393e65dc7ab572d1d711b30e1e3bb8bfbe072c1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10245: 390966251c12a2a5539165da23819e9f6d0b04c6 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10245/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Onion unwind for logical_ring_init() failure
== Series Details == Series: drm/i915/execlists: Onion unwind for logical_ring_init() failure URL : https://patchwork.freedesktop.org/series/49986/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4853_full -> Patchwork_10244_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10244_full that come from known issues: === IGT changes === Issues hit igt@gem_exec_big: shard-hsw: PASS -> TIMEOUT (fdo#107937) igt@kms_busy@extended-modeset-hang-newfb-render-b: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: shard-kbl: PASS -> DMESG-WARN (fdo#107956) igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-glk: PASS -> FAIL (fdo#102887, fdo#105363) Possible fixes igt@gem_exec_await@wide-contexts: shard-apl: FAIL (fdo#106680) -> PASS igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: shard-hsw: DMESG-WARN (fdo#107956) -> PASS fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#106680 https://bugs.freedesktop.org/show_bug.cgi?id=106680 fdo#107937 https://bugs.freedesktop.org/show_bug.cgi?id=107937 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4853 -> Patchwork_10244 CI_DRM_4853: 4393e65dc7ab572d1d711b30e1e3bb8bfbe072c1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10244: 3be159f44994f541d9c8304bc285888bc52371ee @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10244/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 1/6] drm/dp_mst: Introduce drm_dp_mst_connector_atomic_check()
On 2018-09-19 07:08 PM, Lyude Paul wrote: > Currently the way that we prevent userspace from performing new modesets > on MST connectors that have just been destroyed is rather broken. > There's nothing in the actual DRM DP MST topology helpers that checks > whether or not a connector still exists, instead each DRM driver does > this on it's own, usually by returning NULL from the best_encoder > callback which in turn, causes the atomic commit to fail. > > However, this is wrong in a rather subtle way. If ->best_encoder() > returns NULL, this makes ALL modesets involving the connector fail. This > includes modesets from userspace that would shut off the CRTCs being > used by the connector. Since this results in blocking any changes to a > connector's DPMS prop, it has the sideaffect of preventing legacy > modesetting users from ever disabling a CRTC that was previously enabled > for use in an MST topology. An example of this, where X tries to > change the DPMS property of an MST connector that was just detached from > the system: > > [ 2908.320131] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] > [CONNECTOR:82:DP-6] > [ 2908.320148] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] > [CONNECTOR:82:DP-6] status updated from connected to disconnected > [ 2908.320166] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] > [CONNECTOR:82:DP-6] disconnected > [ 2908.320193] [drm:drm_mode_object_put.part.2 [drm]] OBJ ID: 111 (1) > [ 2908.320230] [drm:drm_sysfs_hotplug_event [drm]] generating hotplug event > ... > [ 2908.638539] [drm:drm_ioctl [drm]] pid=12928, dev=0xe201, auth=1, > DRM_IOCTL_MODE_SETPROPERTY > [ 2908.638546] [drm:drm_atomic_state_init [drm]] Allocated atomic state > 7155ba49 > [ 2908.638553] [drm:drm_mode_object_get [drm]] OBJ ID: 114 (1) > [ 2908.638560] [drm:drm_mode_object_get [drm]] OBJ ID: 108 (1) > [ 2908.638568] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:head-0] > 97a6396e state to 7155ba49 > [ 2908.638575] [drm:drm_atomic_add_affected_connectors [drm]] Adding all > current connectors for [CRTC:41:head-0] to 7155ba49 > [ 2908.638582] [drm:drm_mode_object_get [drm]] OBJ ID: 82 (3) > [ 2908.638589] [drm:drm_mode_object_get [drm]] OBJ ID: 82 (4) > [ 2908.638596] [drm:drm_atomic_get_connector_state [drm]] Added > [CONNECTOR:82:DP-6] 87427144 state to 7155ba49 > [ 2908.638603] [drm:drm_atomic_check_only [drm]] checking 7155ba49 > [ 2908.638609] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] > [CRTC:41:head-0] active changed > [ 2908.638613] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] > Updating routing for [CONNECTOR:82:DP-6] > [ 2908.638616] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] No > suitable encoder found for [CONNECTOR:82:DP-6] > [ 2908.638623] [drm:drm_atomic_check_only [drm]] atomic driver check for > 7155ba49 failed: -22 > [ 2908.638630] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic > state 7155ba49 > [ 2908.638637] [drm:drm_mode_object_put.part.2 [drm]] OBJ ID: 82 (4) > [ 2908.638643] [drm:drm_mode_object_put.part.2 [drm]] OBJ ID: 82 (3) > [ 2908.638650] [drm:drm_mode_object_put.part.2 [drm]] OBJ ID: 114 (2) > [ 2908.638656] [drm:drm_mode_object_put.part.2 [drm]] OBJ ID: 108 (2) > [ 2908.638663] [drm:__drm_atomic_state_free [drm]] Freeing atomic state > 7155ba49 > [ 2908.638669] [drm:drm_mode_object_put.part.2 [drm]] OBJ ID: 82 (2) > [ 2908.638676] [drm:drm_ioctl [drm]] pid=12928, ret = -22 > > While this doesn't usually result in any errors that would be obvious to > the user, it does result in us leaving display resources on. This in > turn leads to unwanted sideaffects like inactive GPUs being left on > (usually from the resulting leaked runtime PM ref). > > So, provide an easier way of doing this that doesn't require breaking > ->best_encoder(): add a common drm_dp_mst_connector_atomic_check() > function that DRM drivers can call in order to have CRTC enabling > commits fail automatically if the MST port driving the connector no > longer exists. We'll also be able to expand upon this later as well once > we add MST fallback retraining support. > > Changes since v1: > - Use list_for_each_entry_safe in drm_dp_mst_connector_still_exists() - > Julia Lawall > > Signed-off-by: Lyude Paul > Cc: Julia Lawall > Cc: sta...@vger.kernel.org Whoops, missed the v2 earlier. It's still Acked-by: Harry Wentland Harry > --- > drivers/gpu/drm/drm_dp_mst_topology.c | 76 +++ > include/drm/drm_dp_mst_helper.h | 3 ++ > 2 files changed, 79 insertions(+) > > diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c > b/drivers/gpu/drm/drm_dp_mst_topology.c > index 7780567aa669..58b9554711c7 100644 > --- a/drivers/gpu/drm/drm_dp_mst_topology.c > +++ b/drivers/gpu/drm/drm_dp_mst_topology.c > @@ -3129,6 +3129,82 @@ static const struct drm_private_state_funcs > mst_state_funcs =
Re: [Intel-gfx] [PATCH 6/6] drm/amdgpu/dm/mst: Use drm_dp_mst_connector_atomic_check()
On 2018-09-18 07:06 PM, Lyude Paul wrote:
> Hook this into amdgpu's atomic check for their connectors so they never
> get modesets on no-longer-present MST connectors. We'll also expand on
> this later once we add DP MST fallback retraining support.
>
> As well, turns out that the only atomic DRM driver without the
> ->best_encoder() bug is amdgpu. Congrats AMD!
>
> Signed-off-by: Lyude Paul
Reviewed-by: Harry Wentland
Harry
> ---
> .../drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> index 9a300732ba37..d011a39f17b2 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> @@ -294,10 +294,22 @@ static struct drm_encoder *dm_mst_best_encoder(struct
> drm_connector *connector)
> return _dm_connector->mst_encoder->base;
> }
>
> +static int
> +amdgpu_dm_mst_connector_atomic_check(struct drm_connector *connector,
> + struct drm_connector_state *new_cstate)
> +{
> + struct amdgpu_dm_connector *aconnector =
> + to_amdgpu_dm_connector(connector);
> +
> + return drm_dp_mst_connector_atomic_check(connector, new_cstate,
> + >mst_mgr);
> +}
> +
> static const struct drm_connector_helper_funcs
> dm_dp_mst_connector_helper_funcs = {
> .get_modes = dm_dp_mst_get_modes,
> .mode_valid = amdgpu_dm_connector_mode_valid,
> .best_encoder = dm_mst_best_encoder,
> + .atomic_check = amdgpu_dm_mst_connector_atomic_check,
> };
>
> static void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder)
>
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Re: [Intel-gfx] [PATCH 1/6] drm/dp_mst: Introduce drm_dp_mst_connector_atomic_check()
On 2018-09-18 07:06 PM, Lyude Paul wrote: > Currently the way that we prevent userspace from performing new modesets > on MST connectors that have just been destroyed is rather broken. > There's nothing in the actual DRM DP MST topology helpers that checks > whether or not a connector still exists, instead each DRM driver does > this on it's own, usually by returning NULL from the best_encoder > callback which in turn, causes the atomic commit to fail. > > However, this is wrong in a rather subtle way. If ->best_encoder() > returns NULL, this makes ALL modesets involving the connector fail. This > includes modesets from userspace that would shut off the CRTCs being > used by the connector. Since this results in blocking any changes to a > connector's DPMS prop, it has the sideaffect of preventing legacy > modesetting users from ever disabling a CRTC that was previously enabled > for use in an MST topology. An example of this, where X tries to > change the DPMS property of an MST connector that was just detached from > the system: > > [ 2908.320131] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] > [CONNECTOR:82:DP-6] > [ 2908.320148] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] > [CONNECTOR:82:DP-6] status updated from connected to disconnected > [ 2908.320166] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] > [CONNECTOR:82:DP-6] disconnected > [ 2908.320193] [drm:drm_mode_object_put.part.2 [drm]] OBJ ID: 111 (1) > [ 2908.320230] [drm:drm_sysfs_hotplug_event [drm]] generating hotplug event > ... > [ 2908.638539] [drm:drm_ioctl [drm]] pid=12928, dev=0xe201, auth=1, > DRM_IOCTL_MODE_SETPROPERTY > [ 2908.638546] [drm:drm_atomic_state_init [drm]] Allocated atomic state > 7155ba49 > [ 2908.638553] [drm:drm_mode_object_get [drm]] OBJ ID: 114 (1) > [ 2908.638560] [drm:drm_mode_object_get [drm]] OBJ ID: 108 (1) > [ 2908.638568] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:head-0] > 97a6396e state to 7155ba49 > [ 2908.638575] [drm:drm_atomic_add_affected_connectors [drm]] Adding all > current connectors for [CRTC:41:head-0] to 7155ba49 > [ 2908.638582] [drm:drm_mode_object_get [drm]] OBJ ID: 82 (3) > [ 2908.638589] [drm:drm_mode_object_get [drm]] OBJ ID: 82 (4) > [ 2908.638596] [drm:drm_atomic_get_connector_state [drm]] Added > [CONNECTOR:82:DP-6] 87427144 state to 7155ba49 > [ 2908.638603] [drm:drm_atomic_check_only [drm]] checking 7155ba49 > [ 2908.638609] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] > [CRTC:41:head-0] active changed > [ 2908.638613] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] > Updating routing for [CONNECTOR:82:DP-6] > [ 2908.638616] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] No > suitable encoder found for [CONNECTOR:82:DP-6] > [ 2908.638623] [drm:drm_atomic_check_only [drm]] atomic driver check for > 7155ba49 failed: -22 > [ 2908.638630] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic > state 7155ba49 > [ 2908.638637] [drm:drm_mode_object_put.part.2 [drm]] OBJ ID: 82 (4) > [ 2908.638643] [drm:drm_mode_object_put.part.2 [drm]] OBJ ID: 82 (3) > [ 2908.638650] [drm:drm_mode_object_put.part.2 [drm]] OBJ ID: 114 (2) > [ 2908.638656] [drm:drm_mode_object_put.part.2 [drm]] OBJ ID: 108 (2) > [ 2908.638663] [drm:__drm_atomic_state_free [drm]] Freeing atomic state > 7155ba49 > [ 2908.638669] [drm:drm_mode_object_put.part.2 [drm]] OBJ ID: 82 (2) > [ 2908.638676] [drm:drm_ioctl [drm]] pid=12928, ret = -22 > > While this doesn't usually result in any errors that would be obvious to > the user, it does result in us leaving display resources on. This in > turn leads to unwanted sideaffects like inactive GPUs being left on > (usually from the resulting leaked runtime PM ref). > > So, provide an easier way of doing this that doesn't require breaking > ->best_encoder(): add a common drm_dp_mst_connector_atomic_check() > function that DRM drivers can call in order to have CRTC enabling > commits fail automatically if the MST port driving the connector no > longer exists. We'll also be able to expand upon this later as well once > we add MST fallback retraining support. > > Signed-off-by: Lyude Paul > Cc: sta...@vger.kernel.org This does seem like a saner way to handle the case when the MST connector is gone. As this doesn't currently seem to affect amdgpu directly and I therefore might miss something I'll leave the RB to someone else, but you have my Acked-by: Harry Wentland Harry > --- > drivers/gpu/drm/drm_dp_mst_topology.c | 76 +++ > include/drm/drm_dp_mst_helper.h | 3 ++ > 2 files changed, 79 insertions(+) > > diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c > b/drivers/gpu/drm/drm_dp_mst_topology.c > index 7780567aa669..0162d4bf2549 100644 > --- a/drivers/gpu/drm/drm_dp_mst_topology.c > +++ b/drivers/gpu/drm/drm_dp_mst_topology.c > @@ -3129,6 +3129,82 @@ static
Re: [Intel-gfx] [PATCH 8/8] drm/i915: Force planar YUV coordinates to be a multiple of 2, v2.
On Thu, Sep 20, 2018 at 12:27:11PM +0200, Maarten Lankhorst wrote:
> We can't make NV12 work any other way. The scaler doesn't handle odd
> coordinates well, and we will get visual corruption on the screen.
>
> Changes since v1:
> - Put the check in intel_plane_check_src_coordinates. (Ville)
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/intel_sprite.c | 9 -
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c
> b/drivers/gpu/drm/i915/intel_sprite.c
> index 7d3c7469d271..46c6336cb858 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -253,13 +253,20 @@ int intel_plane_check_src_coordinates(struct
> intel_plane_state *plane_state)
> src->y2 = (src_y + src_h) << 16;
>
> if (fb->format->is_yuv &&
> - fb->format->format != DRM_FORMAT_NV12 &&
> (src_x & 1 || src_w & 1)) {
> DRM_DEBUG_KMS("src x/w (%u, %u) must be a multiple of 2 for YUV
> planes\n",
> src_x, src_w);
> return -EINVAL;
> }
>
> + if (fb->format->is_yuv &&
> + fb->format->num_planes > 1 &&
> + (src_y & 1 || src_h & 1)) {
> + DRM_DEBUG_KMS("src y/h (%u, %u) must be a multiple of 2 for
> planar YUV planes\n",
> + src_y, src_h);
> + return -EINVAL;
> + }
> +
> return 0;
> }
>
> --
> 2.18.0
>
> ___
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--
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
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Re: [Intel-gfx] [PATCH 7/8] drm/i915: Move programming plane scaler to its own function.
On Thu, Sep 20, 2018 at 12:27:10PM +0200, Maarten Lankhorst wrote:
> This cleans the code up slightly, and will make other changes easier.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/intel_sprite.c | 90 +
> 1 file changed, 52 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c
> b/drivers/gpu/drm/i915/intel_sprite.c
> index d4c8e10fc90b..7d3c7469d271 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -280,13 +280,63 @@ skl_plane_max_stride(struct intel_plane *plane,
> return min(8192 * cpp, 32768);
> }
>
> +static void
> +skl_program_scaler(struct drm_i915_private *dev_priv,
> +struct intel_plane *plane,
> +const struct intel_crtc_state *crtc_state,
> +const struct intel_plane_state *plane_state)
> +{
> + enum plane_id plane_id = plane->id;
> + enum pipe pipe = plane->pipe;
> + int scaler_id = plane_state->scaler_id;
> + const struct intel_scaler *scaler =
> + _state->scaler_state.scalers[scaler_id];
> + int crtc_x = plane_state->base.dst.x1;
> + int crtc_y = plane_state->base.dst.y1;
> + uint32_t crtc_w = drm_rect_width(_state->base.dst);
> + uint32_t crtc_h = drm_rect_height(_state->base.dst);
> + u16 y_hphase, uv_rgb_hphase;
> + u16 y_vphase, uv_rgb_vphase;
> +
> + /* Sizes are 0 based */
> + crtc_w--;
> + crtc_h--;
> +
> + /* TODO: handle sub-pixel coordinates */
> + if (plane_state->base.fb->format->format == DRM_FORMAT_NV12) {
> + y_hphase = skl_scaler_calc_phase(1, false);
> + y_vphase = skl_scaler_calc_phase(1, false);
> +
> + /* MPEG2 chroma siting convention */
> + uv_rgb_hphase = skl_scaler_calc_phase(2, true);
> + uv_rgb_vphase = skl_scaler_calc_phase(2, false);
> + } else {
> + /* not used */
> + y_hphase = 0;
> + y_vphase = 0;
> +
> + uv_rgb_hphase = skl_scaler_calc_phase(1, false);
> + uv_rgb_vphase = skl_scaler_calc_phase(1, false);
> + }
> +
> + I915_WRITE_FW(SKL_PS_CTRL(pipe, scaler_id),
> + PS_SCALER_EN | PS_PLANE_SEL(plane_id) | scaler->mode);
> + I915_WRITE_FW(SKL_PS_PWR_GATE(pipe, scaler_id), 0);
> + I915_WRITE_FW(SKL_PS_VPHASE(pipe, scaler_id),
> + PS_Y_PHASE(y_vphase) | PS_UV_RGB_PHASE(uv_rgb_vphase));
> + I915_WRITE_FW(SKL_PS_HPHASE(pipe, scaler_id),
> + PS_Y_PHASE(y_hphase) | PS_UV_RGB_PHASE(uv_rgb_hphase));
> + I915_WRITE_FW(SKL_PS_WIN_POS(pipe, scaler_id), (crtc_x << 16) | crtc_y);
> + I915_WRITE_FW(SKL_PS_WIN_SZ(pipe, scaler_id),
> + ((crtc_w + 1) << 16)|(crtc_h + 1));
> +}
> +
> void
> skl_update_plane(struct intel_plane *plane,
>const struct intel_crtc_state *crtc_state,
>const struct intel_plane_state *plane_state)
> {
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> - const struct drm_framebuffer *fb = plane_state->base.fb;
> enum plane_id plane_id = plane->id;
> enum pipe pipe = plane->pipe;
> u32 plane_ctl = plane_state->ctl;
> @@ -296,8 +346,6 @@ skl_update_plane(struct intel_plane *plane,
> u32 aux_stride = skl_plane_stride(plane_state, 1);
> int crtc_x = plane_state->base.dst.x1;
> int crtc_y = plane_state->base.dst.y1;
> - uint32_t crtc_w = drm_rect_width(_state->base.dst);
> - uint32_t crtc_h = drm_rect_height(_state->base.dst);
> uint32_t x = plane_state->color_plane[0].x;
> uint32_t y = plane_state->color_plane[0].y;
> uint32_t src_w = drm_rect_width(_state->base.src) >> 16;
> @@ -307,8 +355,6 @@ skl_update_plane(struct intel_plane *plane,
> /* Sizes are 0 based */
> src_w--;
> src_h--;
> - crtc_w--;
> - crtc_h--;
>
> spin_lock_irqsave(_priv->uncore.lock, irqflags);
>
> @@ -333,39 +379,7 @@ skl_update_plane(struct intel_plane *plane,
>
> /* program plane scaler */
> if (plane_state->scaler_id >= 0) {
> - int scaler_id = plane_state->scaler_id;
> - const struct intel_scaler *scaler =
> - _state->scaler_state.scalers[scaler_id];
> - u16 y_hphase, uv_rgb_hphase;
> - u16 y_vphase, uv_rgb_vphase;
> -
> - /* TODO: handle sub-pixel coordinates */
> - if (fb->format->format == DRM_FORMAT_NV12) {
> - y_hphase = skl_scaler_calc_phase(1, false);
> - y_vphase = skl_scaler_calc_phase(1, false);
> -
> - /* MPEG2 chroma siting convention */
> - uv_rgb_hphase = skl_scaler_calc_phase(2, true);
> - uv_rgb_vphase = skl_scaler_calc_phase(2, false);
> - } else {
> - /* not used
Re: [Intel-gfx] [PATCH 6/8] drm/i915: Clean up scaler setup.
On Thu, Sep 20, 2018 at 12:27:09PM +0200, Maarten Lankhorst wrote:
> On skylake we can switch to a high quality scaler mode when only 1 out
> of 2 scalers are used, but on GLK and later bit 28 has a different
> meaning. Don't set it, and make clear the distinction between
> SKL and later PS values.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/i915_reg.h | 7 +-
> drivers/gpu/drm/i915/intel_atomic.c | 108 +++
> drivers/gpu/drm/i915/intel_display.c | 2 +-
> 3 files changed, 66 insertions(+), 51 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 4948b352bf4c..e7e6ca7f9665 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6850,11 +6850,12 @@ enum {
> #define _PS_2B_CTRL 0x68A80
> #define _PS_1C_CTRL 0x69180
> #define PS_SCALER_EN(1 << 31)
> -#define PS_SCALER_MODE_MASK (3 << 28)
> -#define PS_SCALER_MODE_DYN (0 << 28)
> -#define PS_SCALER_MODE_HQ (1 << 28)
> +#define SKL_PS_SCALER_MODE_MASK (3 << 28)
> +#define SKL_PS_SCALER_MODE_DYN (0 << 28)
> +#define SKL_PS_SCALER_MODE_HQ (1 << 28)
> #define SKL_PS_SCALER_MODE_NV12 (2 << 28)
> #define PS_SCALER_MODE_PLANAR (1 << 29)
> +#define PS_SCALER_MODE_PACKED (0 << 29)
> #define PS_PLANE_SEL_MASK (7 << 25)
> #define PS_PLANE_SEL(plane) (((plane) + 1) << 25)
> #define PS_FILTER_MASK (3 << 23)
> diff --git a/drivers/gpu/drm/i915/intel_atomic.c
> b/drivers/gpu/drm/i915/intel_atomic.c
> index b04952bacf77..40fba3f22f87 100644
> --- a/drivers/gpu/drm/i915/intel_atomic.c
> +++ b/drivers/gpu/drm/i915/intel_atomic.c
> @@ -203,6 +203,62 @@ intel_crtc_destroy_state(struct drm_crtc *crtc,
> drm_atomic_helper_crtc_destroy_state(crtc, state);
> }
>
> +static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state
> *scaler_state,
> + int num_scalers_need, struct intel_crtc
> *intel_crtc,
> + const char *name, int idx,
> + struct intel_plane_state *plane_state,
> + int *scaler_id)
> +{
> + struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
> + int j;
> + u32 mode;
> +
> + if (*scaler_id < 0) {
> + /* find a free scaler */
> + for (j = 0; j < intel_crtc->num_scalers; j++) {
> + if (scaler_state->scalers[j].in_use)
> + continue;
> +
> + *scaler_id = j;
> + scaler_state->scalers[*scaler_id].in_use = 1;
> + }
> + }
> +
> + if (WARN(*scaler_id < 0, "Cannot find scaler for %s:%d\n", name, idx))
> + return;
> +
> + /* set scaler mode */
> + if (plane_state && plane_state->base.fb &&
> + plane_state->base.fb->format->is_yuv &&
> + plane_state->base.fb->format->num_planes > 1) {
> + if (INTEL_GEN(dev_priv) == 9 &&
> + !IS_GEMINILAKE(dev_priv))
> + mode = SKL_PS_SCALER_MODE_NV12;
> + else
> + mode = PS_SCALER_MODE_PLANAR;
> +
> + } else if (INTEL_GEN(dev_priv) > 9 || IS_GEMINILAKE(dev_priv)) {
> + mode = PS_SCALER_MODE_PACKED;
> + } else if (num_scalers_need == 1 && intel_crtc->num_scalers > 1) {
> + /*
> + * when only 1 scaler is in use on a pipe with 2 scalers
> + * scaler 0 operates in high quality (HQ) mode.
> + * In this case use scaler 0 to take advantage of HQ mode
> + */
> + scaler_state->scalers[*scaler_id].in_use = 0;
> + *scaler_id = 0;
> + scaler_state->scalers[0].in_use = 1;
> + mode = SKL_PS_SCALER_MODE_HQ;
> + } else {
> + mode = SKL_PS_SCALER_MODE_DYN;
> + }
> +
> + DRM_DEBUG_KMS("Attached scaler id %u.%u to %s:%d\n",
> + intel_crtc->pipe, *scaler_id, name, idx);
> + scaler_state->scalers[*scaler_id].mode = mode;
> +}
> +
> +
> /**
> * intel_atomic_setup_scalers() - setup scalers for crtc per staged requests
> * @dev_priv: i915 device
> @@ -232,7 +288,7 @@ int intel_atomic_setup_scalers(struct drm_i915_private
> *dev_priv,
> struct drm_atomic_state *drm_state = crtc_state->base.state;
> struct intel_atomic_state *intel_state =
> to_intel_atomic_state(drm_state);
> int num_scalers_need;
> - int i, j;
> + int i;
>
> num_scalers_need = hweight32(scaler_state->scaler_users);
>
> @@ -304,59 +360,17 @@ int intel_atomic_setup_scalers(struct drm_i915_private
> *dev_priv,
> idx = plane->base.id;
>
> /* plane on different crtc cannot be a scaler user of
> this crtc */
> - if (WARN_ON(intel_plane->pipe != intel_crtc->pipe)) {
> + if
Re: [Intel-gfx] [PATCH 3/8] drm/i915: Unconditionally clear plane visibility, v2.
On Thu, Sep 20, 2018 at 12:27:06PM +0200, Maarten Lankhorst wrote: > We need to assume the plane has been visible before, even if no CRTC > is assigned to the plane. This is because nv12 will enable a a extra You may want to clarify that this is future, gen11-style NV12, not current, gen9-style NV12 since the current code obviously doesn't do anything like this. Otherwise, Reviewed-by: Matt Roper > plane and make it visible by marking it in crtc_state->active_planes > for intel_update_planes_on_crtc(). > > Additionally, clear visible flag in intel_plane_atomic_check, in case > we ever hit a bug with visibility. Our code implicitly assumes that > plane_state->visible is only true when crtc and fb are set, > so we will either null deref in intel_fbc_choose_crtc() or > do something bad during the actual commit which cares even more. > > Changes since v1: > - Unconditionally clear crtc_state->active_planes as well. > - Reword commit message, since this is now a preparation patch for > NV12 Y / UV plane linking. > > Signed-off-by: Maarten Lankhorst > --- > drivers/gpu/drm/i915/intel_atomic_plane.c | 8 +--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c > b/drivers/gpu/drm/i915/intel_atomic_plane.c > index aabebe0d2e9b..f70e9cb9cf02 100644 > --- a/drivers/gpu/drm/i915/intel_atomic_plane.c > +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c > @@ -117,10 +117,13 @@ int intel_plane_atomic_check_with_state(const struct > intel_crtc_state *old_crtc_ > struct intel_plane *intel_plane = to_intel_plane(plane); > int ret; > > + crtc_state->active_planes &= ~BIT(intel_plane->id); > + intel_state->base.visible = false; > + > + /* If this is a cursor plane, no further checks are needed. */ > if (!intel_state->base.crtc && !old_plane_state->base.crtc) > return 0; > > - intel_state->base.visible = false; > ret = intel_plane->check_plane(crtc_state, intel_state); > if (ret) > return ret; > @@ -128,8 +131,6 @@ int intel_plane_atomic_check_with_state(const struct > intel_crtc_state *old_crtc_ > /* FIXME pre-g4x don't work like this */ > if (state->visible) > crtc_state->active_planes |= BIT(intel_plane->id); > - else > - crtc_state->active_planes &= ~BIT(intel_plane->id); > > if (state->visible && state->fb->format->format == DRM_FORMAT_NV12) > crtc_state->nv12_planes |= BIT(intel_plane->id); > @@ -152,6 +153,7 @@ static int intel_plane_atomic_check(struct drm_plane > *plane, > const struct drm_crtc_state *old_crtc_state; > struct drm_crtc_state *new_crtc_state; > > + new_plane_state->visible = false; > if (!crtc) > return 0; > > -- > 2.18.0 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Matt Roper Graphics Software Engineer IoTG Platform Enabling & Development Intel Corporation (916) 356-2795 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/8] drm/i915: Handle cursor updating active_planes correctly, v2.
On Thu, Sep 20, 2018 at 12:27:05PM +0200, Maarten Lankhorst wrote:
> While we may not update new_crtc_state, we may clear active_planes
> if the new cursor update state will disable the cursor, but we fail
> after. If this is immediately followed by a modeset disable, we may
> soon not disable the planes correctly when we start depending on
> active_planes.
>
> Changes since v1:
> - Clarify why we cannot swap crtc_state. (Matt)
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_display.c | 36 +---
> 1 file changed, 28 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 58c188482c78..078cdcca88e1 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -13515,14 +13515,16 @@ intel_legacy_cursor_update(struct drm_plane *plane,
> struct drm_plane_state *old_plane_state, *new_plane_state;
> struct intel_plane *intel_plane = to_intel_plane(plane);
> struct drm_framebuffer *old_fb;
> - struct drm_crtc_state *crtc_state = crtc->state;
> + struct intel_crtc_state *crtc_state =
> + to_intel_crtc_state(crtc->state);
> + struct intel_crtc_state *new_crtc_state;
>
> /*
>* When crtc is inactive or there is a modeset pending,
>* wait for it to complete in the slowpath
>*/
> - if (!crtc_state->active || needs_modeset(crtc_state) ||
> - to_intel_crtc_state(crtc_state)->update_pipe)
> + if (!crtc_state->base.active || needs_modeset(_state->base) ||
> + crtc_state->update_pipe)
> goto slow;
>
> old_plane_state = plane->state;
> @@ -13552,6 +13554,12 @@ intel_legacy_cursor_update(struct drm_plane *plane,
> if (!new_plane_state)
> return -ENOMEM;
>
> + new_crtc_state = to_intel_crtc_state(intel_crtc_duplicate_state(crtc));
> + if (!new_crtc_state) {
> + ret = -ENOMEM;
> + goto out_free;
> + }
> +
> drm_atomic_set_fb_for_plane(new_plane_state, fb);
>
> new_plane_state->src_x = src_x;
> @@ -13563,9 +13571,8 @@ intel_legacy_cursor_update(struct drm_plane *plane,
> new_plane_state->crtc_w = crtc_w;
> new_plane_state->crtc_h = crtc_h;
>
> - ret =
> intel_plane_atomic_check_with_state(to_intel_crtc_state(crtc->state),
> -
> to_intel_crtc_state(crtc->state), /* FIXME need a new crtc state? */
> -
> to_intel_plane_state(plane->state),
> + ret = intel_plane_atomic_check_with_state(crtc_state, new_crtc_state,
> +
> to_intel_plane_state(old_plane_state),
>
> to_intel_plane_state(new_plane_state));
> if (ret)
> goto out_free;
> @@ -13587,10 +13594,21 @@ intel_legacy_cursor_update(struct drm_plane *plane,
> /* Swap plane state */
> plane->state = new_plane_state;
>
> + /*
> + * We cannot swap crtc_state as it may be in use by an atomic commit or
> + * page flip that's running simultaneously. If we swap crtc_state and
> + * destroy the old state, we will cause a use-after-free there.
Just to confirm, the commit running simultaneously would have to have
already dropped locks (specifically the crtc lock) and returned to
userspace for us to have this problem, right? So it's either a
non-blocking commit in the process of doing its programming via
workqueue, or a blocking commit that's done everything except
intel_atomic_cleanup_work?
Reviewed-by: Matt Roper
> + *
> + * Only update active_planes, which is needed for our internal
> + * bookkeeping. Either value will do the right thing when updating
> + * planes atomically. If the cursor was part of the atomic update then
> + * we would have taken the slowpath.
> + */
> + crtc_state->active_planes = new_crtc_state->active_planes;
> +
> if (plane->state->visible) {
> trace_intel_update_plane(plane, to_intel_crtc(crtc));
> - intel_plane->update_plane(intel_plane,
> - to_intel_crtc_state(crtc->state),
> + intel_plane->update_plane(intel_plane, crtc_state,
> to_intel_plane_state(plane->state));
> } else {
> trace_intel_disable_plane(plane, to_intel_crtc(crtc));
> @@ -13602,6 +13620,8 @@ intel_legacy_cursor_update(struct drm_plane *plane,
> out_unlock:
> mutex_unlock(_priv->drm.struct_mutex);
> out_free:
> + if (new_crtc_state)
> + intel_crtc_destroy_state(crtc, _crtc_state->base);
> if (ret)
> intel_plane_destroy_state(plane, new_plane_state);
> else
> --
> 2.18.0
>
> ___
> Intel-gfx mailing list
>
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Make sure fb gtt offsets stay within 32bits
== Series Details == Series: drm/i915: Make sure fb gtt offsets stay within 32bits URL : https://patchwork.freedesktop.org/series/49985/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4852_full -> Patchwork_10243_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10243_full that come from known issues: === IGT changes === Issues hit igt@gem_eio@in-flight-1us: shard-glk: PASS -> FAIL (fdo#105957) igt@kms_busy@extended-modeset-hang-newfb-render-c: shard-apl: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_cursor_legacy@pipe-b-single-bo: shard-snb: PASS -> INCOMPLETE (fdo#105411) igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-snb: NOTRUN -> FAIL (fdo#103166) Possible fixes igt@gem_ctx_isolation@vcs0-s3: shard-apl: INCOMPLETE (fdo#103927) -> PASS igt@gem_exec_big: shard-hsw: TIMEOUT (fdo#107937) -> PASS igt@gem_ppgtt@blt-vs-render-ctxn: shard-kbl: INCOMPLETE (fdo#106023, fdo#103665) -> PASS igt@gem_render_copy_redux@normal: shard-kbl: INCOMPLETE (fdo#106650, fdo#103665) -> PASS igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: shard-apl: DMESG-WARN (fdo#107956) -> PASS +1 igt@kms_chv_cursor_fail@pipe-b-128x128-left-edge: shard-kbl: FAIL (fdo#104671) -> PASS igt@kms_cursor_crc@cursor-256x256-suspend: shard-kbl: FAIL (fdo#103232, fdo#103191) -> PASS shard-apl: FAIL (fdo#103232, fdo#103191) -> PASS igt@kms_flip_tiling@flip-to-yf-tiled: shard-apl: DMESG-WARN (fdo#103558, fdo#105602) -> PASS +3 shard-kbl: DMESG-WARN (fdo#103558, fdo#105602) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@kms_setmode@basic: shard-kbl: FAIL (fdo#99912) -> PASS igt@perf@blocking: shard-hsw: FAIL (fdo#102252) -> PASS fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671 fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#105957 https://bugs.freedesktop.org/show_bug.cgi?id=105957 fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023 fdo#106650 https://bugs.freedesktop.org/show_bug.cgi?id=106650 fdo#107937 https://bugs.freedesktop.org/show_bug.cgi?id=107937 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4852 -> Patchwork_10243 CI_DRM_4852: c7249769bf8b7da87c0f3d8e343a7c342f0f4c16 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10243: 387bf87ad18338496b51e7b45585ba16245e8231 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10243/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 6/8] drm/i915/psr: Use WA to force HW tracking to exit PSR2
On Thu, 2018-09-20 at 15:54 -0700, Rodrigo Vivi wrote:
> On Thu, Sep 20, 2018 at 01:43:25PM -0700, José Roberto de Souza
> wrote:
> > This WA also works fine for PSR2, triggering a selective update
> > when
> > possible.
>
> Oh! really?! It didn't work when I chacked on my CNL,
> but we probably had other bugs back there...
Tested in WHL and ICL, I will give a try in CNL.
>
> Thanks for finding this
>
>
> Reviewed-by: Rodrigo Vivi
>
>
>
> >
> > Cc: Dhinakaran Pandiyan
> > Cc: Rodrigo Vivi
> > Signed-off-by: José Roberto de Souza
> > ---
> > drivers/gpu/drm/i915/intel_psr.c | 24 ++--
> > 1 file changed, 10 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index 84b512426514..cf9d6e965697 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -1026,20 +1026,16 @@ void intel_psr_flush(struct
> > drm_i915_private *dev_priv,
> >
> > /* By definition flush = invalidate + flush */
> > if (frontbuffer_bits) {
> > - if (dev_priv->psr.psr2_enabled) {
> > - intel_psr_exit(dev_priv);
> > - } else {
> > - /*
> > -* Display WA #0884: all
> > -* This documented WA for bxt can be safely
> > applied
> > -* broadly so we can force HW tracking to exit
> > PSR
> > -* instead of disabling and re-enabling.
> > -* Workaround tells us to write 0 to
> > CUR_SURFLIVE_A,
> > -* but it makes more sense write to the current
> > active
> > -* pipe.
> > -*/
> > - I915_WRITE(CURSURFLIVE(pipe), 0);
> > - }
> > + /*
> > +* Display WA #0884: all
> > +* This documented WA for bxt can be safely applied
> > +* broadly so we can force HW tracking to exit PSR
> > +* instead of disabling and re-enabling.
> > +* Workaround tells us to write 0 to CUR_SURFLIVE_A,
> > +* but it makes more sense write to the current active
> > +* pipe.
> > +*/
> > + I915_WRITE(CURSURFLIVE(pipe), 0);
> > }
> >
> > if (!dev_priv->psr.active && !dev_priv-
> > >psr.busy_frontbuffer_bits)
> > --
> > 2.19.0
> >
___
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Re: [Intel-gfx] [PATCH 6/8] drm/i915/psr: Use WA to force HW tracking to exit PSR2
On Thu, Sep 20, 2018 at 01:43:25PM -0700, José Roberto de Souza wrote:
> This WA also works fine for PSR2, triggering a selective update when
> possible.
Oh! really?! It didn't work when I chacked on my CNL,
but we probably had other bugs back there...
Thanks for finding this
Reviewed-by: Rodrigo Vivi
>
> Cc: Dhinakaran Pandiyan
> Cc: Rodrigo Vivi
> Signed-off-by: José Roberto de Souza
> ---
> drivers/gpu/drm/i915/intel_psr.c | 24 ++--
> 1 file changed, 10 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_psr.c
> b/drivers/gpu/drm/i915/intel_psr.c
> index 84b512426514..cf9d6e965697 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -1026,20 +1026,16 @@ void intel_psr_flush(struct drm_i915_private
> *dev_priv,
>
> /* By definition flush = invalidate + flush */
> if (frontbuffer_bits) {
> - if (dev_priv->psr.psr2_enabled) {
> - intel_psr_exit(dev_priv);
> - } else {
> - /*
> - * Display WA #0884: all
> - * This documented WA for bxt can be safely applied
> - * broadly so we can force HW tracking to exit PSR
> - * instead of disabling and re-enabling.
> - * Workaround tells us to write 0 to CUR_SURFLIVE_A,
> - * but it makes more sense write to the current active
> - * pipe.
> - */
> - I915_WRITE(CURSURFLIVE(pipe), 0);
> - }
> + /*
> + * Display WA #0884: all
> + * This documented WA for bxt can be safely applied
> + * broadly so we can force HW tracking to exit PSR
> + * instead of disabling and re-enabling.
> + * Workaround tells us to write 0 to CUR_SURFLIVE_A,
> + * but it makes more sense write to the current active
> + * pipe.
> + */
> + I915_WRITE(CURSURFLIVE(pipe), 0);
> }
>
> if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits)
> --
> 2.19.0
>
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915/psr: Share PSR and PSR2 exit mask
== Series Details ==
Series: series starting with [1/8] drm/i915/psr: Share PSR and PSR2 exit mask
URL : https://patchwork.freedesktop.org/series/49993/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4854 -> Patchwork_10246 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/49993/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_10246 that come from known issues:
=== IGT changes ===
Issues hit
igt@drm_mm@insert:
{fi-skl-caroline}: NOTRUN -> INCOMPLETE (fdo#108003)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
fi-byt-clapper: PASS -> FAIL (fdo#107362, fdo#103191)
fi-bdw-samus: NOTRUN -> INCOMPLETE (fdo#107773)
igt@kms_psr@primary_page_flip:
fi-icl-u: PASS -> FAIL (fdo#107336)
fi-cnl-u: PASS -> FAIL (fdo#107336)
fi-kbl-r: PASS -> FAIL (fdo#107336)
Possible fixes
igt@drv_selftest@live_hugepages:
fi-kbl-7560u: INCOMPLETE -> PASS
igt@gem_exec_suspend@basic-s3:
fi-bdw-samus: INCOMPLETE (fdo#107773) -> PASS
igt@kms_flip@basic-flip-vs-modeset:
fi-skl-6700hq: DMESG-WARN (fdo#105998) -> PASS
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b:
fi-byt-clapper: FAIL (fdo#107362) -> PASS
igt@kms_psr@primary_page_flip:
fi-kbl-7560u: FAIL (fdo#107336) -> PASS
fi-cfl-s3: FAIL (fdo#107336) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
fdo#107336 https://bugs.freedesktop.org/show_bug.cgi?id=107336
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773
fdo#108003 https://bugs.freedesktop.org/show_bug.cgi?id=108003
== Participating hosts (52 -> 48) ==
Additional (1): fi-skl-caroline
Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan
fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4854 -> Patchwork_10246
CI_DRM_4854: 78a6bcff149f370d58fe0bf51c29cbe62d8bc27c @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10246: 2325a088dbf665a85474f22d50b1c54e8930db09 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
2325a088dbf6 drm/i915/psr: Remove alpm from i915_psr
e8974aa38bea drm/i915/psr: Don't tell sink that main link will be active in PSR2
8bae5f0d8246 drm/i915/psr: Use WA to force HW tracking to exit PSR2
dc6f8bb9a85a drm/i915/psr: Do not enable PSR2 if sink requires selective update
X granularity
4ae52440e0c5 drm/i915/psr: Remove PSR2 TODO error handling
99fae4c917bd drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC
mismatch
588709076949 drm/i915/psr: Do not set MASK_DISP_REG_WRITE in ICL
87d6ea8a6245 drm/i915/psr: Share PSR and PSR2 exit mask
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10246/issues.html
___
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Infoframe precompute/check
== Series Details == Series: drm/i915: Infoframe precompute/check URL : https://patchwork.freedesktop.org/series/49983/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4852_full -> Patchwork_10242_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10242_full that come from known issues: === IGT changes === Issues hit igt@gem_eio@in-flight-1us: shard-glk: PASS -> FAIL (fdo#107799) igt@gem_userptr_blits@sync-unmap-after-close: shard-snb: SKIP -> INCOMPLETE (fdo#105411) igt@kms_available_modes_crc@available_mode_test_crc: shard-snb: NOTRUN -> FAIL (fdo#106641) igt@kms_busy@extended-modeset-hang-newfb-render-c: shard-apl: NOTRUN -> DMESG-WARN (fdo#107956) Possible fixes igt@gem_ctx_isolation@vcs0-s3: shard-apl: INCOMPLETE (fdo#103927) -> PASS igt@gem_render_copy_redux@normal: shard-kbl: INCOMPLETE (fdo#103665, fdo#106650) -> PASS igt@kms_chv_cursor_fail@pipe-b-128x128-left-edge: shard-kbl: FAIL (fdo#104671) -> PASS igt@kms_cursor_crc@cursor-256x256-suspend: shard-kbl: FAIL (fdo#103191, fdo#103232) -> PASS shard-apl: FAIL (fdo#103191, fdo#103232) -> PASS igt@kms_flip_tiling@flip-to-yf-tiled: shard-apl: DMESG-WARN (fdo#105602, fdo#103558) -> PASS +3 shard-kbl: DMESG-WARN (fdo#105602, fdo#103558) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_setmode@basic: shard-apl: FAIL (fdo#99912) -> PASS shard-kbl: FAIL (fdo#99912) -> PASS igt@perf@blocking: shard-hsw: FAIL (fdo#102252) -> PASS fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671 fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#106641 https://bugs.freedesktop.org/show_bug.cgi?id=106641 fdo#106650 https://bugs.freedesktop.org/show_bug.cgi?id=106650 fdo#107799 https://bugs.freedesktop.org/show_bug.cgi?id=107799 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4852 -> Patchwork_10242 CI_DRM_4852: c7249769bf8b7da87c0f3d8e343a7c342f0f4c16 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10242: cbbbc677305468fbab0b7943eebc62584250f296 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10242/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/8] drm/i915/psr: Share PSR and PSR2 exit mask
== Series Details == Series: series starting with [1/8] drm/i915/psr: Share PSR and PSR2 exit mask URL : https://patchwork.freedesktop.org/series/49993/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/psr: Share PSR and PSR2 exit mask Okay! Commit: drm/i915/psr: Do not set MASK_DISP_REG_WRITE in ICL Okay! Commit: drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch Okay! Commit: drm/i915/psr: Remove PSR2 TODO error handling Okay! Commit: drm/i915/psr: Do not enable PSR2 if sink requires selective update X granularity Okay! Commit: drm/i915/psr: Use WA to force HW tracking to exit PSR2 Okay! Commit: drm/i915/psr: Don't tell sink that main link will be active in PSR2 Okay! Commit: drm/i915/psr: Remove alpm from i915_psr -drivers/gpu/drm/i915/selftests/../i915_drv.h:3718:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3717:16: warning: expression using sizeof(void) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Park the GPU on module load (rev2)
== Series Details == Series: drm/i915: Park the GPU on module load (rev2) URL : https://patchwork.freedesktop.org/series/49693/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4852_full -> Patchwork_10241_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10241_full that come from known issues: === IGT changes === Issues hit igt@gem_render_linear_blits@basic: shard-kbl: PASS -> INCOMPLETE (fdo#103665) igt@kms_available_modes_crc@available_mode_test_crc: shard-snb: NOTRUN -> FAIL (fdo#106641) igt@kms_busy@extended-modeset-hang-newfb-render-c: shard-apl: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-snb: NOTRUN -> FAIL (fdo#103166) Possible fixes igt@gem_ctx_isolation@vcs0-s3: shard-apl: INCOMPLETE (fdo#103927) -> PASS igt@gem_exec_big: shard-hsw: TIMEOUT (fdo#107937) -> PASS igt@gem_render_copy_redux@normal: shard-kbl: INCOMPLETE (fdo#103665, fdo#106650) -> PASS igt@kms_chv_cursor_fail@pipe-b-128x128-left-edge: shard-kbl: FAIL (fdo#104671) -> PASS igt@kms_cursor_crc@cursor-256x256-suspend: shard-kbl: FAIL (fdo#103232, fdo#103191) -> PASS igt@kms_flip_tiling@flip-to-yf-tiled: shard-kbl: DMESG-WARN (fdo#103558, fdo#105602) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-rte: shard-apl: DMESG-WARN (fdo#103558, fdo#105602) -> PASS igt@perf@blocking: shard-hsw: FAIL (fdo#102252) -> PASS fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#106641 https://bugs.freedesktop.org/show_bug.cgi?id=106641 fdo#106650 https://bugs.freedesktop.org/show_bug.cgi?id=106650 fdo#107937 https://bugs.freedesktop.org/show_bug.cgi?id=107937 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4852 -> Patchwork_10241 CI_DRM_4852: c7249769bf8b7da87c0f3d8e343a7c342f0f4c16 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10241: 7291c09cb6cdc06d9c8735565ff0fc38f069d53f @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10241/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm: Use default dma_fence hooks where possible for null syncobj
== Series Details ==
Series: series starting with [1/2] drm: Use default dma_fence hooks where
possible for null syncobj
URL : https://patchwork.freedesktop.org/series/49988/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4853 -> Patchwork_10245 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/49988/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_10245 that come from known issues:
=== IGT changes ===
Issues hit
igt@gem_exec_suspend@basic-s3:
{fi-skl-caroline}: NOTRUN -> INCOMPLETE (fdo#104108, fdo#107556)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
fi-bdw-samus: NOTRUN -> INCOMPLETE (fdo#107773)
Possible fixes
igt@gem_exec_suspend@basic-s3:
fi-bdw-samus: INCOMPLETE (fdo#107773) -> PASS
fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS
igt@kms_frontbuffer_tracking@basic:
fi-hsw-peppy: DMESG-WARN (fdo#102614) -> PASS
igt@kms_psr@primary_page_flip:
fi-cfl-s3: FAIL (fdo#107336) -> PASS
fi-cnl-u: FAIL (fdo#107336) -> PASS
fi-kbl-r: FAIL (fdo#107336) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#107336 https://bugs.freedesktop.org/show_bug.cgi?id=107336
fdo#107556 https://bugs.freedesktop.org/show_bug.cgi?id=107556
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773
== Participating hosts (51 -> 47) ==
Additional (1): fi-skl-caroline
Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-bsw-cyan fi-snb-2520m
fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4853 -> Patchwork_10245
CI_DRM_4853: 4393e65dc7ab572d1d711b30e1e3bb8bfbe072c1 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10245: 390966251c12a2a5539165da23819e9f6d0b04c6 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
390966251c12 drm: Fix syncobj handing of schedule() returning 0
a2d0f8c34fe1 drm: Use default dma_fence hooks where possible for null syncobj
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10245/issues.html
___
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Live tests emit requests and so require rpm
== Series Details == Series: drm/i915/selftests: Live tests emit requests and so require rpm URL : https://patchwork.freedesktop.org/series/49972/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4851_full -> Patchwork_10240_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10240_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10240_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10240_full: === IGT changes === Warnings igt@perf_pmu@rc6: shard-kbl: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_10240_full that come from known issues: === IGT changes === Issues hit igt@kms_busy@extended-modeset-hang-newfb-render-c: shard-kbl: PASS -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) +3 igt@kms_cursor_crc@cursor-256x256-suspend: shard-apl: PASS -> FAIL (fdo#103191, fdo#103232) igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic: shard-hsw: PASS -> FAIL (fdo#105767) igt@kms_flip_tiling@flip-to-yf-tiled: shard-apl: PASS -> DMESG-WARN (fdo#105602, fdo#103558) +2 Possible fixes igt@gem_eio@in-flight-1us: shard-glk: FAIL (fdo#105957) -> PASS igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: shard-glk: FAIL (fdo#105363) -> PASS igt@kms_setmode@basic: shard-apl: FAIL (fdo#99912) -> PASS shard-kbl: FAIL (fdo#99912) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#105767 https://bugs.freedesktop.org/show_bug.cgi?id=105767 fdo#105957 https://bugs.freedesktop.org/show_bug.cgi?id=105957 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4851 -> Patchwork_10240 CI_DRM_4851: f9b15cfe6b2059cec1465980d556d30be0fb7f75 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10240: dda3c179339c020e161eb697e09a6d5d72d2788d @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10240/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for ICL interrupt handling improvements
== Series Details == Series: ICL interrupt handling improvements URL : https://patchwork.freedesktop.org/series/49971/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4851_full -> Patchwork_10239_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10239_full that come from known issues: === IGT changes === Issues hit igt@gem_exec_big: shard-hsw: PASS -> TIMEOUT (fdo#107937) igt@kms_busy@extended-modeset-hang-newfb-render-b: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_busy@extended-modeset-hang-newfb-render-c: shard-kbl: PASS -> DMESG-WARN (fdo#107956) igt@kms_cursor_crc@cursor-256x256-suspend: shard-apl: PASS -> FAIL (fdo#103232, fdo#103191) igt@kms_flip_tiling@flip-to-yf-tiled: shard-apl: PASS -> DMESG-WARN (fdo#105602, fdo#103558) +3 igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-snb: NOTRUN -> FAIL (fdo#103166) igt@perf@polling: shard-hsw: PASS -> FAIL (fdo#102252) Possible fixes igt@gem_eio@in-flight-1us: shard-glk: FAIL (fdo#105957) -> PASS igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: shard-glk: FAIL (fdo#105363) -> PASS igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@kms_setmode@basic: shard-apl: FAIL (fdo#99912) -> PASS shard-kbl: FAIL (fdo#99912) -> PASS fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#105957 https://bugs.freedesktop.org/show_bug.cgi?id=105957 fdo#107937 https://bugs.freedesktop.org/show_bug.cgi?id=107937 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4851 -> Patchwork_10239 CI_DRM_4851: f9b15cfe6b2059cec1465980d556d30be0fb7f75 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10239: 55cf33be427cac92f05fac6793a6ef4d1a0b9f2d @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10239/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Onion unwind for logical_ring_init() failure
== Series Details ==
Series: drm/i915/execlists: Onion unwind for logical_ring_init() failure
URL : https://patchwork.freedesktop.org/series/49986/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4853 -> Patchwork_10244 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/49986/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_10244 that come from known issues:
=== IGT changes ===
Issues hit
igt@drm_mm@insert:
{fi-skl-caroline}: NOTRUN -> INCOMPLETE (fdo#108003)
igt@drv_selftest@live_coherency:
fi-gdg-551: PASS -> DMESG-FAIL (fdo#107164)
igt@kms_flip@basic-flip-vs-modeset:
fi-skl-6700hq: PASS -> DMESG-WARN (fdo#105998)
igt@kms_psr@primary_page_flip:
fi-kbl-7560u: PASS -> FAIL (fdo#107336)
Possible fixes
igt@gem_exec_suspend@basic-s3:
fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS
igt@kms_frontbuffer_tracking@basic:
fi-hsw-peppy: DMESG-WARN (fdo#102614) -> PASS
fi-byt-clapper: FAIL (fdo#103167) -> PASS
igt@kms_psr@primary_page_flip:
fi-cfl-s3: FAIL (fdo#107336) -> PASS
fi-cnl-u: FAIL (fdo#107336) -> PASS
fi-kbl-r: FAIL (fdo#107336) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107336 https://bugs.freedesktop.org/show_bug.cgi?id=107336
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
fdo#108003 https://bugs.freedesktop.org/show_bug.cgi?id=108003
== Participating hosts (51 -> 48) ==
Additional (1): fi-skl-caroline
Missing(4): fi-ctg-p8600 fi-ilk-m540 fi-bsw-cyan fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4853 -> Patchwork_10244
CI_DRM_4853: 4393e65dc7ab572d1d711b30e1e3bb8bfbe072c1 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10244: 3be159f44994f541d9c8304bc285888bc52371ee @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
3be159f44994 drm/i915/execlists: Onion unwind for logical_ring_init() failure
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10244/issues.html
___
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[Intel-gfx] [PATCH 2/8] drm/i915/psr: Do not set MASK_DISP_REG_WRITE in ICL
ICL spec states that this bit is now reserved.
Spec: 7722
Cc: Dhinakaran Pandiyan
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
drivers/gpu/drm/i915/intel_psr.c | 17 +++--
2 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 4948b352bf4c..4dd5290a3b95 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4195,7 +4195,7 @@ enum {
#define EDP_PSR_DEBUG_MASK_LPSP (1 << 27)
#define EDP_PSR_DEBUG_MASK_MEMUP (1 << 26)
#define EDP_PSR_DEBUG_MASK_HPD (1 << 25)
-#define EDP_PSR_DEBUG_MASK_DISP_REG_WRITE(1 << 16)
+#define EDP_PSR_DEBUG_MASK_DISP_REG_WRITE(1 << 16) /* Reserved in ICL+ */
#define EDP_PSR_DEBUG_EXIT_ON_PIXEL_UNDERRUN (1 << 15) /* SKL+ */
#define EDP_PSR2_CTL _MMIO(0x6f900)
@@ -4232,7 +4232,7 @@ enum {
#define PSR_EVENT_FRONT_BUFFER_MODIFY (1 << 9)
#define PSR_EVENT_WD_TIMER_EXPIRE (1 << 8)
#define PSR_EVENT_PIPE_REGISTERS_UPDATE (1 << 6)
-#define PSR_EVENT_REGISTER_UPDATE (1 << 5)
+#define PSR_EVENT_REGISTER_UPDATE (1 << 5) /* Reserved in ICL+ */
#define PSR_EVENT_HDCP_ENABLE (1 << 4)
#define PSR_EVENT_KVMR_SESSION_ENABLE (1 << 3)
#define PSR_EVENT_VBI_ENABLE (1 << 2)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 358bbcd3b5f3..6f3c6f0c539f 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -558,6 +558,7 @@ static void intel_psr_enable_source(struct intel_dp
*intel_dp,
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ u32 mask;
/* Only HSW and BDW have PSR AUX registers that need to be setup. SKL+
* use hardcoded values PSR AUX transactions
@@ -583,12 +584,16 @@ static void intel_psr_enable_source(struct intel_dp
*intel_dp,
* runtime_pm besides preventing other hw tracking issues now we
* can rely on frontbuffer tracking.
*/
- I915_WRITE(EDP_PSR_DEBUG,
- EDP_PSR_DEBUG_MASK_MEMUP |
- EDP_PSR_DEBUG_MASK_HPD |
- EDP_PSR_DEBUG_MASK_LPSP |
- EDP_PSR_DEBUG_MASK_DISP_REG_WRITE |
- EDP_PSR_DEBUG_MASK_MAX_SLEEP);
+ mask = EDP_PSR_DEBUG_MASK_MEMUP |
+ EDP_PSR_DEBUG_MASK_HPD |
+ EDP_PSR_DEBUG_MASK_LPSP |
+ EDP_PSR_DEBUG_MASK_DISP_REG_WRITE |
+ EDP_PSR_DEBUG_MASK_MAX_SLEEP;
+
+ if (INTEL_GEN(dev_priv) >= 11)
+ mask &= ~EDP_PSR_DEBUG_MASK_DISP_REG_WRITE;
+
+ I915_WRITE(EDP_PSR_DEBUG, mask);
}
static void intel_psr_enable_locked(struct drm_i915_private *dev_priv,
--
2.19.0
___
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[Intel-gfx] [PATCH 7/8] drm/i915/psr: Don't tell sink that main link will be active in PSR2
For PSR2 we don't have the option to keep main link enabled while
PSR2 is active, so don't configure sink DPCD with a wrong value.
Cc: Dhinakaran Pandiyan
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_psr.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index cf9d6e965697..60cf6fd251d0 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -344,12 +344,13 @@ static void intel_psr_enable_sink(struct intel_dp
*intel_dp)
drm_dp_dpcd_writeb(_dp->aux, DP_RECEIVER_ALPM_CONFIG,
DP_ALPM_ENABLE);
dpcd_val |= DP_PSR_ENABLE_PSR2 | DP_PSR_IRQ_HPD_WITH_CRC_ERRORS;
+ } else {
+ if (dev_priv->psr.link_standby)
+ dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
+ if (INTEL_GEN(dev_priv) >= 8)
+ dpcd_val |= DP_PSR_CRC_VERIFICATION;
}
- if (dev_priv->psr.link_standby)
- dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
- if (!dev_priv->psr.psr2_enabled && INTEL_GEN(dev_priv) >= 8)
- dpcd_val |= DP_PSR_CRC_VERIFICATION;
drm_dp_dpcd_writeb(_dp->aux, DP_PSR_EN_CFG, dpcd_val);
drm_dp_dpcd_writeb(_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
--
2.19.0
___
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[Intel-gfx] [PATCH 5/8] drm/i915/psr: Do not enable PSR2 if sink requires selective update X granularity
According to eDP spec, sink could required a granularity in the
start of x coordinate or in the width of the selective update region.
As it is not supported by hardware, lets not enable PSR2 in sinks
that requires it.
Cc: Dhinakaran Pandiyan
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_psr.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 0dd4211cb293..84b512426514 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -243,6 +243,8 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
bool y_req = intel_dp->psr_dpcd[1] &
DP_PSR2_SU_Y_COORDINATE_REQUIRED;
bool alpm = intel_dp_get_alpm_status(intel_dp);
+ bool granularity_req = (intel_dp->psr_dpcd[1] &
+ DP_PSR2_SU_GRANULARITY_REQUIRED);
/*
* All panels that supports PSR version 03h (PSR2 +
@@ -255,7 +257,8 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
* Y-coordinate requirement panels we would need to enable
* GTC first.
*/
- dev_priv->psr.sink_psr2_support = y_req && alpm;
+ dev_priv->psr.sink_psr2_support = y_req && alpm &&
+ !granularity_req;
DRM_DEBUG_KMS("PSR2 %ssupported\n",
dev_priv->psr.sink_psr2_support ? "" : "not ");
--
2.19.0
___
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[Intel-gfx] [PATCH 6/8] drm/i915/psr: Use WA to force HW tracking to exit PSR2
This WA also works fine for PSR2, triggering a selective update when
possible.
Cc: Dhinakaran Pandiyan
Cc: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_psr.c | 24 ++--
1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 84b512426514..cf9d6e965697 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -1026,20 +1026,16 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
/* By definition flush = invalidate + flush */
if (frontbuffer_bits) {
- if (dev_priv->psr.psr2_enabled) {
- intel_psr_exit(dev_priv);
- } else {
- /*
-* Display WA #0884: all
-* This documented WA for bxt can be safely applied
-* broadly so we can force HW tracking to exit PSR
-* instead of disabling and re-enabling.
-* Workaround tells us to write 0 to CUR_SURFLIVE_A,
-* but it makes more sense write to the current active
-* pipe.
-*/
- I915_WRITE(CURSURFLIVE(pipe), 0);
- }
+ /*
+* Display WA #0884: all
+* This documented WA for bxt can be safely applied
+* broadly so we can force HW tracking to exit PSR
+* instead of disabling and re-enabling.
+* Workaround tells us to write 0 to CUR_SURFLIVE_A,
+* but it makes more sense write to the current active
+* pipe.
+*/
+ I915_WRITE(CURSURFLIVE(pipe), 0);
}
if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits)
--
2.19.0
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[Intel-gfx] [PATCH 8/8] drm/i915/psr: Remove alpm from i915_psr
ALPM is a requirement and we don't need to keep it's cached, what
were done in commit 97c9de66ca80
("drm/i915/psr: Fix ALPM cap check for PSR2") but the alpm was not
removed from i915_psr.
Cc: Dhinakaran Pandiyan
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_drv.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 41f1082da122..4ed129cf4d12 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -630,7 +630,6 @@ struct i915_psr {
bool sink_psr2_support;
bool link_standby;
bool colorimetry_support;
- bool alpm;
bool psr2_enabled;
u8 sink_sync_latency;
ktime_t last_entry_attempt;
--
2.19.0
___
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[Intel-gfx] [PATCH 1/8] drm/i915/psr: Share PSR and PSR2 exit mask
Now both PSR and PSR2 have the same exit mask, so let's share then
instead of have the same code 2 times.
Cc: Dhinakaran Pandiyan
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_psr.c | 34
1 file changed, 13 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index b6838b525502..358bbcd3b5f3 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -575,28 +575,20 @@ static void intel_psr_enable_source(struct intel_dp
*intel_dp,
else
chicken &= ~VSC_DATA_SEL_SOFTWARE_CONTROL;
I915_WRITE(CHICKEN_TRANS(cpu_transcoder), chicken);
-
- I915_WRITE(EDP_PSR_DEBUG,
- EDP_PSR_DEBUG_MASK_MEMUP |
- EDP_PSR_DEBUG_MASK_HPD |
- EDP_PSR_DEBUG_MASK_LPSP |
- EDP_PSR_DEBUG_MASK_MAX_SLEEP |
- EDP_PSR_DEBUG_MASK_DISP_REG_WRITE);
- } else {
- /*
-* Per Spec: Avoid continuous PSR exit by masking MEMUP
-* and HPD. also mask LPSP to avoid dependency on other
-* drivers that might block runtime_pm besides
-* preventing other hw tracking issues now we can rely
-* on frontbuffer tracking.
-*/
- I915_WRITE(EDP_PSR_DEBUG,
- EDP_PSR_DEBUG_MASK_MEMUP |
- EDP_PSR_DEBUG_MASK_HPD |
- EDP_PSR_DEBUG_MASK_LPSP |
- EDP_PSR_DEBUG_MASK_DISP_REG_WRITE |
- EDP_PSR_DEBUG_MASK_MAX_SLEEP);
}
+
+ /*
+* Per Spec: Avoid continuous PSR exit by masking MEMUP and HPD also
+* mask LPSP to avoid dependency on other drivers that might block
+* runtime_pm besides preventing other hw tracking issues now we
+* can rely on frontbuffer tracking.
+*/
+ I915_WRITE(EDP_PSR_DEBUG,
+ EDP_PSR_DEBUG_MASK_MEMUP |
+ EDP_PSR_DEBUG_MASK_HPD |
+ EDP_PSR_DEBUG_MASK_LPSP |
+ EDP_PSR_DEBUG_MASK_DISP_REG_WRITE |
+ EDP_PSR_DEBUG_MASK_MAX_SLEEP);
}
static void intel_psr_enable_locked(struct drm_i915_private *dev_priv,
--
2.19.0
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[Intel-gfx] [PATCH 4/8] drm/i915/psr: Remove PSR2 TODO error handling
We are already handling all PSR2 errors, so we can drop this TODO. Cc: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_psr.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index b4edbbda8d71..0dd4211cb293 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -1127,8 +1127,6 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp) intel_psr_disable_locked(intel_dp); /* clear status register */ drm_dp_dpcd_writeb(_dp->aux, DP_PSR_ERROR_STATUS, val); - - /* TODO: handle PSR2 errors */ exit: mutex_unlock(>lock); } -- 2.19.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/8] drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch
eDP spec states 2 different bits to enable sink to trigger a
interruption when there is a CRC mismatch.
DP_PSR_CRC_VERIFICATION is for PSR only and
DP_PSR_IRQ_HPD_WITH_CRC_ERRORS is for PSR2 only.
Cc: Dhinakaran Pandiyan
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_psr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 6f3c6f0c539f..b4edbbda8d71 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -340,7 +340,7 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp)
if (dev_priv->psr.psr2_enabled) {
drm_dp_dpcd_writeb(_dp->aux, DP_RECEIVER_ALPM_CONFIG,
DP_ALPM_ENABLE);
- dpcd_val |= DP_PSR_ENABLE_PSR2;
+ dpcd_val |= DP_PSR_ENABLE_PSR2 | DP_PSR_IRQ_HPD_WITH_CRC_ERRORS;
}
if (dev_priv->psr.link_standby)
--
2.19.0
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Re: [Intel-gfx] [PATCH] drm/i915: Make sure fb gtt offsets stay within 32bits
Quoting Ville Syrjala (2018-09-20 20:10:18)
> From: Ville Syrjälä
>
> Let's try to make sure the fb offset computations never hit
> an integer overflow by making sure the entire fb stays
> below 32bits. framebuffer_check() in the core already does
> the same check, but as it doesn't know about tiling some things
> can slip through. Repeat the check in the driver with tiling
> taken into account.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_display.c | 18 +-
> 1 file changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index e642b7717106..67259c719ffe 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2400,10 +2400,26 @@ static int intel_fb_offset_to_xy(int *x, int *y,
> int color_plane)
> {
> struct drm_i915_private *dev_priv = to_i915(fb->dev);
> + unsigned int height;
>
> if (fb->modifier != DRM_FORMAT_MOD_LINEAR &&
> - fb->offsets[color_plane] % intel_tile_size(dev_priv))
> + fb->offsets[color_plane] % intel_tile_size(dev_priv)) {
> + DRM_DEBUG_KMS("Misaligned offset 0x%08x for color plane %d\n",
> + fb->offsets[color_plane], color_plane);
> return -EINVAL;
> + }
> +
> + height = drm_framebuffer_plane_height(fb->height, fb, color_plane);
> + height = ALIGN(height, intel_tile_height(fb, color_plane));
> +
> + /* Catch potential overflows early */
> + if (mul_u32_u32(height, fb->pitches[color_plane]) +
if (add_overflows(mul_u32_u32(height, fb->pitches[color_plane]),
fb->offsets[color_plane],
U32_MAX) {
?
> + fb->offsets[color_plane] > UINT_MAX) {
> + DRM_DEBUG_KMS("Bad offset 0x%08x or pitch %d for color plane
> %d\n",
> + fb->offsets[color_plane],
> fb->pitches[color_plane],
> + color_plane);
> + return -ERANGE;
> + }
>
> *x = 0;
> *y = 0;
> --
> 2.16.4
>
> ___
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[Intel-gfx] [PATCH 2/2] drm: Fix syncobj handing of schedule() returning 0
After schedule() returns 0, we must do one last check of COND to
determine the reason for the wakeup with 0 jiffies remaining before
reporting the timeout -- otherwise we may lose the signal due to
scheduler delays.
References: https://bugs.freedesktop.org/show_bug.cgi?id=106690
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/drm_syncobj.c | 41 +--
1 file changed, 15 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index e254f97fed7d..5bcb3ef9b256 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -672,7 +672,6 @@ static signed long drm_syncobj_array_wait_timeout(struct
drm_syncobj **syncobjs,
{
struct syncobj_wait_entry *entries;
struct dma_fence *fence;
- signed long ret;
uint32_t signaled_count, i;
entries = kcalloc(count, sizeof(*entries), GFP_KERNEL);
@@ -692,7 +691,7 @@ static signed long drm_syncobj_array_wait_timeout(struct
drm_syncobj **syncobjs,
if (flags & DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT) {
continue;
} else {
- ret = -EINVAL;
+ timeout = -EINVAL;
goto cleanup_entries;
}
}
@@ -704,12 +703,6 @@ static signed long drm_syncobj_array_wait_timeout(struct
drm_syncobj **syncobjs,
}
}
- /* Initialize ret to the max of timeout and 1. That way, the
-* default return value indicates a successful wait and not a
-* timeout.
-*/
- ret = max_t(signed long, timeout, 1);
-
if (signaled_count == count ||
(signaled_count > 0 &&
!(flags & DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL)))
@@ -760,18 +753,17 @@ static signed long drm_syncobj_array_wait_timeout(struct
drm_syncobj **syncobjs,
goto done_waiting;
if (timeout == 0) {
- /* If we are doing a 0 timeout wait and we got
-* here, then we just timed out.
-*/
- ret = 0;
+ timeout = -ETIME;
goto done_waiting;
}
- ret = schedule_timeout(ret);
+ if (signal_pending(current)) {
+ timeout = -ERESTARTSYS;
+ goto done_waiting;
+ }
- if (ret > 0 && signal_pending(current))
- ret = -ERESTARTSYS;
- } while (ret > 0);
+ timeout = schedule_timeout(timeout);
+ } while (1);
done_waiting:
__set_current_state(TASK_RUNNING);
@@ -788,7 +780,7 @@ static signed long drm_syncobj_array_wait_timeout(struct
drm_syncobj **syncobjs,
}
kfree(entries);
- return ret;
+ return timeout;
}
/**
@@ -829,19 +821,16 @@ static int drm_syncobj_array_wait(struct drm_device *dev,
struct drm_syncobj **syncobjs)
{
signed long timeout = drm_timeout_abs_to_jiffies(wait->timeout_nsec);
- signed long ret = 0;
uint32_t first = ~0;
- ret = drm_syncobj_array_wait_timeout(syncobjs,
-wait->count_handles,
-wait->flags,
-timeout, );
- if (ret < 0)
- return ret;
+ timeout = drm_syncobj_array_wait_timeout(syncobjs,
+wait->count_handles,
+wait->flags,
+timeout, );
+ if (timeout < 0)
+ return timeout;
wait->first_signaled = first;
- if (ret == 0)
- return -ETIME;
return 0;
}
--
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[Intel-gfx] [PATCH 1/2] drm: Use default dma_fence hooks where possible for null syncobj
Both the .enable_signaling and .release of the null syncobj fence
can be replaced by the default callbacks for a small reduction in code
size. In particular the default callback for .release was changed in
commit e28bd101ae1b ("drm: rename null fence to stub fence in syncobj v2")
which neglected its RCU protection.
Fixes: e28bd101ae1b ("drm: rename null fence to stub fence in syncobj v2")
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/drm_syncobj.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index 497729202bfe..e254f97fed7d 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -66,20 +66,9 @@ static const char *drm_syncobj_stub_fence_get_name(struct
dma_fence *fence)
return "syncobjstub";
}
-static bool drm_syncobj_stub_fence_enable_signaling(struct dma_fence *fence)
-{
-return !dma_fence_is_signaled(fence);
-}
-
-static void drm_syncobj_stub_fence_release(struct dma_fence *f)
-{
- kfree(f);
-}
static const struct dma_fence_ops drm_syncobj_stub_fence_ops = {
.get_driver_name = drm_syncobj_stub_fence_get_name,
.get_timeline_name = drm_syncobj_stub_fence_get_name,
- .enable_signaling = drm_syncobj_stub_fence_enable_signaling,
- .release = drm_syncobj_stub_fence_release,
};
--
2.19.0
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[Intel-gfx] [CI] drm/i915/execlists: Onion unwind for logical_ring_init() failure
Fix up the error unwind for logical_ring_init() failing by moving the
cleanup into the callers who own the various bits of state during
initialisation, so we don't forget to free the state allocated by the
caller.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/intel_lrc.c | 18 +++---
1 file changed, 11 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index a51be16ddaac..43957bb37a42 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -2396,7 +2396,7 @@ static int logical_ring_init(struct intel_engine_cs
*engine)
ret = intel_engine_init_common(engine);
if (ret)
- goto error;
+ return ret;
if (HAS_LOGICAL_RING_ELSQ(i915)) {
execlists->submit_reg = i915->regs +
@@ -2438,10 +2438,6 @@ static int logical_ring_init(struct intel_engine_cs
*engine)
reset_csb_pointers(execlists);
return 0;
-
-error:
- intel_logical_ring_cleanup(engine);
- return ret;
}
int logical_render_ring_init(struct intel_engine_cs *engine)
@@ -2464,10 +2460,14 @@ int logical_render_ring_init(struct intel_engine_cs
*engine)
engine->emit_breadcrumb = gen8_emit_breadcrumb_rcs;
engine->emit_breadcrumb_sz = gen8_emit_breadcrumb_rcs_sz;
- ret = intel_engine_create_scratch(engine, PAGE_SIZE);
+ ret = logical_ring_init(engine);
if (ret)
return ret;
+ ret = intel_engine_create_scratch(engine, PAGE_SIZE);
+ if (ret)
+ goto err_cleanup_common;
+
ret = intel_init_workaround_bb(engine);
if (ret) {
/*
@@ -2479,7 +2479,11 @@ int logical_render_ring_init(struct intel_engine_cs
*engine)
ret);
}
- return logical_ring_init(engine);
+ return 0;
+
+err_cleanup_common:
+ intel_engine_cleanup_common(engine);
+ return ret;
}
int logical_xcs_ring_init(struct intel_engine_cs *engine)
--
2.19.0
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Re: [Intel-gfx] [PATCH 11/40] drm/i915/execlists: Onion unwind for logical_ring_init() failure
Quoting Tvrtko Ursulin (2018-09-20 15:21:47) > > On 19/09/2018 20:55, Chris Wilson wrote: > > Fix up the error unwind for logical_ring_init() failing by moving the > > Could you say in the commit what was broken? We didn't cleanup all the state we allocated in the caller. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Make sure fb gtt offsets stay within 32bits
== Series Details ==
Series: drm/i915: Make sure fb gtt offsets stay within 32bits
URL : https://patchwork.freedesktop.org/series/49985/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4852 -> Patchwork_10243 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/49985/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_10243 that come from known issues:
=== IGT changes ===
Issues hit
igt@gem_exec_suspend@basic-s3:
fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
fi-bdw-samus: NOTRUN -> INCOMPLETE (fdo#107773)
igt@kms_psr@primary_page_flip:
fi-cnl-u: PASS -> FAIL (fdo#107336)
igt@pm_rpm@module-reload:
{fi-skl-caroline}: NOTRUN -> INCOMPLETE (fdo#107807)
Possible fixes
igt@gem_exec_suspend@basic-s4-devices:
fi-bdw-samus: INCOMPLETE (fdo#107773) -> PASS
igt@kms_flip@basic-flip-vs-modeset:
fi-skl-6700hq: DMESG-WARN (fdo#105998) -> PASS +1
igt@kms_frontbuffer_tracking@basic:
fi-byt-clapper: FAIL (fdo#103167) -> PASS
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS
igt@kms_psr@primary_page_flip:
fi-whl-u: FAIL (fdo#107336) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
fdo#107336 https://bugs.freedesktop.org/show_bug.cgi?id=107336
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773
fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807
== Participating hosts (52 -> 48) ==
Additional (1): fi-skl-caroline
Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan
fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4852 -> Patchwork_10243
CI_DRM_4852: c7249769bf8b7da87c0f3d8e343a7c342f0f4c16 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10243: 387bf87ad18338496b51e7b45585ba16245e8231 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
387bf87ad183 drm/i915: Make sure fb gtt offsets stay within 32bits
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10243/issues.html
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Re: [Intel-gfx] [PATCH v2 5/5] drm/i915: Bump gen4+ fb size limits to 32kx32k
Quoting Ville Syrjälä (2018-09-20 20:41:30)
> On Thu, Sep 20, 2018 at 09:09:03AM +0100, Chris Wilson wrote:
> > Quoting Ville Syrjälä (2018-09-19 17:59:51)
> > > On Thu, Sep 13, 2018 at 11:01:40PM +0300, Ville Syrjala wrote:
> > > > From: Ville Syrjälä
> > > >
> > > > With gtt remapping in place we can use arbitraily large framebuffers.
> > > > Let's bump the limits as high as we can (32k-1). Going beyond that
> > > > would require switching our s16.16 src coordinate representation to
> > > > something with more spare bits.
> > > >
> > > > Signed-off-by: Ville Syrjälä
> > > > ---
> > > > drivers/gpu/drm/i915/intel_display.c | 4 ++--
> > > > 1 file changed, 2 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > > > b/drivers/gpu/drm/i915/intel_display.c
> > > > index 346572cf734a..0ee6255cd040 100644
> > > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > > @@ -15527,8 +15527,8 @@ int intel_modeset_init(struct drm_device *dev)
> > > > dev->mode_config.max_width = 4096;
> > > > dev->mode_config.max_height = 4096;
> > > > } else {
> > > > - dev->mode_config.max_width = 8192;
> > > > - dev->mode_config.max_height = 8192;
> > > > + dev->mode_config.max_width = 32767;
> > > > + dev->mode_config.max_height = 32767;
> > >
> > > It appears that neither Mesa nor glamor will check whether window system
> > > buffers exceed the capabilities of the 3D engine. So trying to use a >16k
> > > trips an assert when genxml tries to pack the surface_state.
> > >
> > > So looks like we'll need to limit this to 16k for gen7+, and leave it
> > > at 8k for gen4+. If userspace gets smarter later on we could add a new
> > > client cap to expose higher limits.
> >
> > At which point, the client can just ignore this field and just use
> > rejection criteria from addfb2 and/or setcrtc (or the atomic variant).
>
> I suppose. Though probing the max size using addfb might be a bit
> tedious. That's assuming the client wants to report the max in some
> way, as X does.
>
> >
> > Or we can just keep this field as meaning the maximum size of a single
> > CRTC and just ignore it entirely in -modesetting for fb size as we do
> > elsewhere.
>
> Would require changing the core addfb code to ignore these
> limits for i915 but keep chekcing them for the other drivers.
> So a bit of work, and I'm not really sure what the actual
> benefit for i915 would be.
Why is the core addfb using these fields? Since when did they *stop*
being per-CRTC limits?
-Chris
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Re: [Intel-gfx] [PATCH v2 5/5] drm/i915: Bump gen4+ fb size limits to 32kx32k
On Thu, Sep 20, 2018 at 09:09:03AM +0100, Chris Wilson wrote:
> Quoting Ville Syrjälä (2018-09-19 17:59:51)
> > On Thu, Sep 13, 2018 at 11:01:40PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > With gtt remapping in place we can use arbitraily large framebuffers.
> > > Let's bump the limits as high as we can (32k-1). Going beyond that
> > > would require switching our s16.16 src coordinate representation to
> > > something with more spare bits.
> > >
> > > Signed-off-by: Ville Syrjälä
> > > ---
> > > drivers/gpu/drm/i915/intel_display.c | 4 ++--
> > > 1 file changed, 2 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > > b/drivers/gpu/drm/i915/intel_display.c
> > > index 346572cf734a..0ee6255cd040 100644
> > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > @@ -15527,8 +15527,8 @@ int intel_modeset_init(struct drm_device *dev)
> > > dev->mode_config.max_width = 4096;
> > > dev->mode_config.max_height = 4096;
> > > } else {
> > > - dev->mode_config.max_width = 8192;
> > > - dev->mode_config.max_height = 8192;
> > > + dev->mode_config.max_width = 32767;
> > > + dev->mode_config.max_height = 32767;
> >
> > It appears that neither Mesa nor glamor will check whether window system
> > buffers exceed the capabilities of the 3D engine. So trying to use a >16k
> > trips an assert when genxml tries to pack the surface_state.
> >
> > So looks like we'll need to limit this to 16k for gen7+, and leave it
> > at 8k for gen4+. If userspace gets smarter later on we could add a new
> > client cap to expose higher limits.
>
> At which point, the client can just ignore this field and just use
> rejection criteria from addfb2 and/or setcrtc (or the atomic variant).
I suppose. Though probing the max size using addfb might be a bit
tedious. That's assuming the client wants to report the max in some
way, as X does.
>
> Or we can just keep this field as meaning the maximum size of a single
> CRTC and just ignore it entirely in -modesetting for fb size as we do
> elsewhere.
Would require changing the core addfb code to ignore these
limits for i915 but keep chekcing them for the other drivers.
So a bit of work, and I'm not really sure what the actual
benefit for i915 would be.
--
Ville Syrjälä
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Infoframe precompute/check
== Series Details == Series: drm/i915: Infoframe precompute/check URL : https://patchwork.freedesktop.org/series/49983/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4852 -> Patchwork_10242 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/49983/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10242 that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_coherency: fi-gdg-551: PASS -> DMESG-FAIL (fdo#107164) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: fi-skl-6260u: PASS -> INCOMPLETE (fdo#104108) igt@kms_psr@primary_page_flip: fi-icl-u: PASS -> FAIL (fdo#107336) Possible fixes igt@kms_frontbuffer_tracking@basic: fi-byt-clapper: FAIL (fdo#103167) -> PASS igt@kms_pipe_crc_basic@hang-read-crc-pipe-c: fi-skl-6700hq: DMESG-WARN (fdo#105998) -> PASS +1 igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS igt@kms_psr@primary_page_flip: fi-whl-u: FAIL (fdo#107336) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998 fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164 fdo#107336 https://bugs.freedesktop.org/show_bug.cgi?id=107336 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 == Participating hosts (52 -> 47) == Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4852 -> Patchwork_10242 CI_DRM_4852: c7249769bf8b7da87c0f3d8e343a7c342f0f4c16 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10242: cbbbc677305468fbab0b7943eebc62584250f296 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == cbbbc6773054 drm/i915: Include infoframes in the crtc state dump e102b1bf70d2 drm/i915: Check infoframe state in intel_pipe_config_compare() a12eb68ce310 drm/i915/sdvo: Read out HDMI infoframes 183a843e443c drm/i915/sdvo: Precompute HDMI infoframes 4a85a46081d1 drm/i915: Read out HDMI infoframes 05deffb2dac6 drm/i915: Precompute HDMI infoframes 570e42f6d35c drm/i915: Store mask of enabled infoframes in the crtc state a5c2fe997d55 drm/i915: Return the mask of enabled infoframes from ->inforame_enabled() cbdd05631044 drm/i915: Add the missing HDMI gamut metadata packet stuff 367a7d97dd45 drm/i915: Pass intel_encoder to infoframe functions c2cb612d54fa drm/i915: Use memmove() for punching the hole into infoframes 41d4768fd109 video/hdmi: Handle the NTSC VBI infoframe 72b90dd1fe07 video/hdmi: Handle the MPEG Source infoframe 0986996f110b video/hdmi: Add an enum for HDMI packet types d0b178dc443b video/hdmi: Constify infoframe passed to the pack functions 5e5b56d27f18 video/hdmi: Constify infoframe passed to the log functions 0a03b408d82f video/hdmi: Pass buffer size to infoframe unpack functions a017fc23cf36 video/hdmi: Constify 'buffer' to the unpack functions == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10242/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Infoframe precompute/check
== Series Details == Series: drm/i915: Infoframe precompute/check URL : https://patchwork.freedesktop.org/series/49983/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: video/hdmi: Constify 'buffer' to the unpack functions Okay! Commit: video/hdmi: Pass buffer size to infoframe unpack functions Okay! Commit: video/hdmi: Constify infoframe passed to the log functions Okay! Commit: video/hdmi: Constify infoframe passed to the pack functions Okay! Commit: video/hdmi: Add an enum for HDMI packet types Okay! Commit: video/hdmi: Handle the MPEG Source infoframe Okay! Commit: video/hdmi: Handle the NTSC VBI infoframe Okay! Commit: drm/i915: Use memmove() for punching the hole into infoframes Okay! Commit: drm/i915: Pass intel_encoder to infoframe functions Okay! Commit: drm/i915: Add the missing HDMI gamut metadata packet stuff Okay! Commit: drm/i915: Return the mask of enabled infoframes from ->inforame_enabled() Okay! Commit: drm/i915: Store mask of enabled infoframes in the crtc state Okay! Commit: drm/i915: Precompute HDMI infoframes Okay! Commit: drm/i915: Read out HDMI infoframes Okay! Commit: drm/i915/sdvo: Precompute HDMI infoframes Okay! Commit: drm/i915/sdvo: Read out HDMI infoframes +drivers/gpu/drm/i915/intel_sdvo.c:1023:21: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_sdvo.c:1023:21: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_sdvo.c:1029:47: warning: expression using sizeof(void) Commit: drm/i915: Check infoframe state in intel_pipe_config_compare() Okay! Commit: drm/i915: Include infoframes in the crtc state dump Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Make sure fb gtt offsets stay within 32bits
From: Ville Syrjälä
Let's try to make sure the fb offset computations never hit
an integer overflow by making sure the entire fb stays
below 32bits. framebuffer_check() in the core already does
the same check, but as it doesn't know about tiling some things
can slip through. Repeat the check in the driver with tiling
taken into account.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index e642b7717106..67259c719ffe 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2400,10 +2400,26 @@ static int intel_fb_offset_to_xy(int *x, int *y,
int color_plane)
{
struct drm_i915_private *dev_priv = to_i915(fb->dev);
+ unsigned int height;
if (fb->modifier != DRM_FORMAT_MOD_LINEAR &&
- fb->offsets[color_plane] % intel_tile_size(dev_priv))
+ fb->offsets[color_plane] % intel_tile_size(dev_priv)) {
+ DRM_DEBUG_KMS("Misaligned offset 0x%08x for color plane %d\n",
+ fb->offsets[color_plane], color_plane);
return -EINVAL;
+ }
+
+ height = drm_framebuffer_plane_height(fb->height, fb, color_plane);
+ height = ALIGN(height, intel_tile_height(fb, color_plane));
+
+ /* Catch potential overflows early */
+ if (mul_u32_u32(height, fb->pitches[color_plane]) +
+ fb->offsets[color_plane] > UINT_MAX) {
+ DRM_DEBUG_KMS("Bad offset 0x%08x or pitch %d for color plane
%d\n",
+ fb->offsets[color_plane],
fb->pitches[color_plane],
+ color_plane);
+ return -ERANGE;
+ }
*x = 0;
*y = 0;
--
2.16.4
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Infoframe precompute/check
== Series Details ==
Series: drm/i915: Infoframe precompute/check
URL : https://patchwork.freedesktop.org/series/49983/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a017fc23cf36 video/hdmi: Constify 'buffer' to the unpack functions
0a03b408d82f video/hdmi: Pass buffer size to infoframe unpack functions
5e5b56d27f18 video/hdmi: Constify infoframe passed to the log functions
d0b178dc443b video/hdmi: Constify infoframe passed to the pack functions
0986996f110b video/hdmi: Add an enum for HDMI packet types
72b90dd1fe07 video/hdmi: Handle the MPEG Source infoframe
-:351: CHECK:BOOL_MEMBER: Avoid using bool structure members because of
possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#351: FILE: include/linux/hdmi.h:355:
+ bool field_repeat;
total: 0 errors, 0 warnings, 1 checks, 340 lines checked
41d4768fd109 video/hdmi: Handle the NTSC VBI infoframe
c2cb612d54fa drm/i915: Use memmove() for punching the hole into infoframes
367a7d97dd45 drm/i915: Pass intel_encoder to infoframe functions
cbdd05631044 drm/i915: Add the missing HDMI gamut metadata packet stuff
-:35: WARNING:LONG_LINE: line over 100 characters
#35: FILE: drivers/gpu/drm/i915/i915_reg.h:7956:
+#define HSW_TVIDEO_DIP_GMP_DATA(trans, i) _MMIO_TRANS2(trans,
_HSW_VIDEO_DIP_GMP_DATA_A + (i) * 4)
total: 0 errors, 1 warnings, 0 checks, 55 lines checked
a5c2fe997d55 drm/i915: Return the mask of enabled infoframes from
->inforame_enabled()
570e42f6d35c drm/i915: Store mask of enabled infoframes in the crtc state
05deffb2dac6 drm/i915: Precompute HDMI infoframes
4a85a46081d1 drm/i915: Read out HDMI infoframes
183a843e443c drm/i915/sdvo: Precompute HDMI infoframes
a12eb68ce310 drm/i915/sdvo: Read out HDMI infoframes
e102b1bf70d2 drm/i915: Check infoframe state in intel_pipe_config_compare()
-:70: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'name' - possible
side-effects?
#70: FILE: drivers/gpu/drm/i915/intel_display.c:11575:
+#define PIPE_CONF_CHECK_INFOFRAME(name) do { \
+ if (!intel_compare_infoframe(_config->infoframes.name, \
+_config->infoframes.name)) { \
+ pipe_config_infoframe_err(dev_priv, adjust, __stringify(name), \
+ _config->infoframes.name, \
+ _config->infoframes.name); \
+ ret = false; \
+ } \
+} while (0)
total: 0 errors, 0 warnings, 1 checks, 67 lines checked
cbbbc6773054 drm/i915: Include infoframes in the crtc state dump
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Re: [Intel-gfx] [PATCH 2/2] drm/amdgpu: Use per-device driver_features to disable atomic
On 2018-09-13 12:31 PM, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Disable atomic on a per-device basis instead of for all devices.
> Made possible by the new device.driver_features thing.
>
> Cc: Alex Deucher
> Cc: "Christian König"
> Cc: "David (ChunMing) Zhou"
> Cc: Harry Wentland
> Cc: Michel Dänzer
> Suggested-by: Michel Dänzer
> Signed-off-by: Ville Syrjälä
Reviewed-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 12
> 1 file changed, 4 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 6870909da926..8c1db96be070 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -816,17 +816,13 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
> if (ret)
> return ret;
>
> - /* warn the user if they mix atomic and non-atomic capable GPUs */
> - if ((kms_driver.driver_features & DRIVER_ATOMIC) && !supports_atomic)
> - DRM_ERROR("Mixing atomic and non-atomic capable GPUs!\n");
> - /* support atomic early so the atomic debugfs stuff gets created */
> - if (supports_atomic)
> - kms_driver.driver_features |= DRIVER_ATOMIC;
> -
> dev = drm_dev_alloc(_driver, >dev);
> if (IS_ERR(dev))
> return PTR_ERR(dev);
>
> + if (!supports_atomic)
> + dev->driver_features &= ~DRIVER_ATOMIC;
> +
> ret = pci_enable_device(pdev);
> if (ret)
> goto err_free;
> @@ -1078,7 +1074,7 @@ amdgpu_get_crtc_scanout_position(struct drm_device
> *dev, unsigned int pipe,
>
> static struct drm_driver kms_driver = {
> .driver_features =
> - DRIVER_USE_AGP |
> + DRIVER_USE_AGP | DRIVER_ATOMIC |
> DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
> DRIVER_PRIME | DRIVER_RENDER | DRIVER_MODESET | DRIVER_SYNCOBJ,
> .load = amdgpu_driver_load_kms,
>
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[Intel-gfx] [PATCH 18/18] drm/i915: Include infoframes in the crtc state dump
From: Ville Syrjälä
Dump out the infoframes in the normal crtc state dump.
TODO: Try to better integrate the infoframe dumps with
drm state dumps
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 3dce49e36a05..27ac33a2a4d3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10924,6 +10924,16 @@ intel_dump_m_n_config(struct intel_crtc_state
*pipe_config, char *id,
m_n->link_m, m_n->link_n, m_n->tu);
}
+static void
+intel_dump_infoframe(struct drm_i915_private *dev_priv,
+const union hdmi_infoframe *frame)
+{
+ if ((drm_debug & DRM_UT_KMS) == 0)
+ return;
+
+ hdmi_infoframe_log(KERN_DEBUG, dev_priv->drm.dev, frame);
+}
+
#define OUTPUT_TYPE(x) [INTEL_OUTPUT_ ## x] = #x
static const char * const output_type_str[] = {
@@ -11013,6 +11023,22 @@ static void intel_dump_pipe_config(struct intel_crtc
*crtc,
DRM_DEBUG_KMS("audio: %i, infoframes: %i\n",
pipe_config->has_audio, pipe_config->has_infoframe);
+ DRM_DEBUG_KMS("infoframes enabled: 0x%x\n",
+ pipe_config->infoframes.enable);
+
+ if (pipe_config->infoframes.enable &
+ intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GENERAL_CONTROL))
+ DRM_DEBUG_KMS("GCP: 0x%x\n", pipe_config->infoframes.gcp);
+ if (pipe_config->infoframes.enable &
+ intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI))
+ intel_dump_infoframe(dev_priv, _config->infoframes.avi);
+ if (pipe_config->infoframes.enable &
+ intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_SPD))
+ intel_dump_infoframe(dev_priv, _config->infoframes.spd);
+ if (pipe_config->infoframes.enable &
+ intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_VENDOR))
+ intel_dump_infoframe(dev_priv, _config->infoframes.hdmi);
+
DRM_DEBUG_KMS("requested mode:\n");
drm_mode_debug_printmodeline(_config->base.mode);
DRM_DEBUG_KMS("adjusted mode:\n");
--
2.16.4
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[Intel-gfx] [PATCH 17/18] drm/i915: Check infoframe state in intel_pipe_config_compare()
From: Ville Syrjälä
Check the infoframes and infoframe enable state when comparing two
crtc states.
We'll use the infoframe logging functions from video/hdmi.c to
show the infoframes as part of the state dump.
TODO: Try to better integrate the infoframe dumps with
drm state dumps
v2: drm_printk() is no more
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 49 +++-
1 file changed, 48 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index fbcc56caffb6..3dce49e36a05 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11380,6 +11380,37 @@ intel_compare_link_m_n(const struct intel_link_m_n
*m_n,
return false;
}
+static bool
+intel_compare_infoframe(const union hdmi_infoframe *a,
+ const union hdmi_infoframe *b)
+{
+ return memcmp(a, b, sizeof(*a)) == 0;
+}
+
+static void
+pipe_config_infoframe_err(struct drm_i915_private *dev_priv,
+ bool adjust, const char *name,
+ const union hdmi_infoframe *a,
+ const union hdmi_infoframe *b)
+{
+ if (adjust) {
+ if ((drm_debug & DRM_UT_KMS) == 0)
+ return;
+
+ drm_dbg(DRM_UT_KMS, "mismatch in %s infoframe", name);
+ drm_dbg(DRM_UT_KMS, "expected:");
+ hdmi_infoframe_log(KERN_DEBUG, dev_priv->drm.dev, a);
+ drm_dbg(DRM_UT_KMS, "found");
+ hdmi_infoframe_log(KERN_DEBUG, dev_priv->drm.dev, b);
+ } else {
+ drm_err("mismatch in %s infoframe", name);
+ drm_err("expected:");
+ hdmi_infoframe_log(KERN_ERR, dev_priv->drm.dev, a);
+ drm_err("found");
+ hdmi_infoframe_log(KERN_ERR, dev_priv->drm.dev, b);
+ }
+}
+
static void __printf(3, 4)
pipe_config_err(bool adjust, const char *name, const char *format, ...)
{
@@ -11541,7 +11572,17 @@ intel_pipe_config_compare(struct drm_i915_private
*dev_priv,
} \
} while (0)
-#define PIPE_CONF_QUIRK(quirk) \
+#define PIPE_CONF_CHECK_INFOFRAME(name) do { \
+ if (!intel_compare_infoframe(_config->infoframes.name, \
+_config->infoframes.name)) { \
+ pipe_config_infoframe_err(dev_priv, adjust, __stringify(name), \
+ _config->infoframes.name, \
+ _config->infoframes.name); \
+ ret = false; \
+ } \
+} while (0)
+
+#define PIPE_CONF_QUIRK(quirk) \
((current_config->quirks | pipe_config->quirks) & (quirk))
PIPE_CONF_CHECK_I(cpu_transcoder);
@@ -11670,6 +11711,12 @@ intel_pipe_config_compare(struct drm_i915_private
*dev_priv,
PIPE_CONF_CHECK_I(min_voltage_level);
+ PIPE_CONF_CHECK_X(infoframes.enable);
+ PIPE_CONF_CHECK_X(infoframes.gcp);
+ PIPE_CONF_CHECK_INFOFRAME(avi);
+ PIPE_CONF_CHECK_INFOFRAME(spd);
+ PIPE_CONF_CHECK_INFOFRAME(hdmi);
+
#undef PIPE_CONF_CHECK_X
#undef PIPE_CONF_CHECK_I
#undef PIPE_CONF_CHECK_BOOL
--
2.16.4
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[Intel-gfx] [PATCH 13/18] drm/i915: Precompute HDMI infoframes
From: Ville Syrjälä
Store the infoframes in the crtc state and precompute them in
.compute_config(). While precomputing we'll also fill out the
inforames.enable bitmask appropriately.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_ddi.c | 1 +
drivers/gpu/drm/i915/intel_drv.h | 5 +
drivers/gpu/drm/i915/intel_hdmi.c | 249 +++---
3 files changed, 187 insertions(+), 68 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 19fef88e680e..5f3bd536d261 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -3391,6 +3391,7 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
intel_dig_port = enc_to_dig_port(>base);
pipe_config->infoframes.enable |=
+ intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_NULL) |
intel_hdmi_infoframes_enabled(encoder, pipe_config);
if (pipe_config->infoframes.enable)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 50c0c049ee15..357624a6bfe2 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -895,6 +895,10 @@ struct intel_crtc_state {
struct {
u32 enable;
+ u32 gcp;
+ union hdmi_infoframe avi;
+ union hdmi_infoframe spd;
+ union hdmi_infoframe hdmi;
} infoframes;
/* HDMI scrambling status */
@@ -1862,6 +1866,7 @@ void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi
*hdmi, bool enable);
void intel_infoframe_init(struct intel_digital_port *intel_dig_port);
u32 intel_hdmi_infoframes_enabled(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
+u32 intel_hdmi_infoframe_enable(unsigned int type);
/* intel_lvds.c */
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 98a44084324c..491001fc0fad 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -446,6 +446,18 @@ static const u8 infoframe_type_to_idx[] = {
HDMI_INFOFRAME_TYPE_VENDOR,
};
+u32 intel_hdmi_infoframe_enable(unsigned int type)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(infoframe_type_to_idx); i++) {
+ if (infoframe_type_to_idx[i] == type)
+ return BIT(i);
+ }
+
+ return 0;
+}
+
u32 intel_hdmi_infoframes_enabled(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
@@ -491,15 +503,23 @@ u32 intel_hdmi_infoframes_enabled(struct intel_encoder
*encoder,
*/
static void intel_write_infoframe(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
- union hdmi_infoframe *frame)
+ enum hdmi_infoframe_type type,
+ const union hdmi_infoframe *frame)
{
struct intel_digital_port *intel_dig_port =
enc_to_dig_port(>base);
u8 buffer[VIDEO_DIP_DATA_SIZE];
ssize_t len;
+ if ((crtc_state->infoframes.enable &
+intel_hdmi_infoframe_enable(type)) == 0)
+ return;
+
+ if (WARN_ON(frame->any.type != type))
+ return;
+
/* see comment above for the reason for this offset */
- len = hdmi_infoframe_pack(frame, buffer + 1, sizeof(buffer) - 1);
- if (len < 0)
+ len = hdmi_infoframe_pack_only(frame, buffer + 1, sizeof(buffer) - 1);
+ if (WARN_ON(len < 0))
return;
/* Insert the 'hole' (see big comment above) at position 3 */
@@ -507,85 +527,111 @@ static void intel_write_infoframe(struct intel_encoder
*encoder,
buffer[3] = 0;
len++;
- intel_dig_port->write_infoframe(encoder,
- crtc_state,
- frame->any.type, buffer, len);
+ intel_dig_port->write_infoframe(encoder, crtc_state, type, buffer, len);
}
-static void intel_hdmi_set_avi_infoframe(struct intel_encoder *encoder,
-const struct intel_crtc_state
*crtc_state,
-const struct drm_connector_state
*conn_state)
+static bool
+intel_hdmi_compute_avi_infoframe(struct intel_encoder *encoder,
+struct intel_crtc_state *crtc_state,
+struct drm_connector_state *conn_state)
{
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(>base);
+ struct hdmi_avi_infoframe *frame = _state->infoframes.avi.avi;
+ bool is_hdmi2_sink =
conn_state->connector->display_info.hdmi.scdc.supported;
const struct drm_display_mode *adjusted_mode =
_state->base.adjusted_mode;
- struct
[Intel-gfx] [PATCH 14/18] drm/i915: Read out HDMI infoframes
From: Ville Syrjälä
Add code to read the infoframes from the video DIP and unpack them into
the crtc state.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_ddi.c | 17
drivers/gpu/drm/i915/intel_drv.h | 10 ++
drivers/gpu/drm/i915/intel_hdmi.c | 203 ++
3 files changed, 230 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 5f3bd536d261..a56289f78326 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -3459,6 +3459,23 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
bxt_ddi_phy_get_lane_lat_optim_mask(encoder);
intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
+
+ intel_hdmi_read_gcp_infoframe(encoder, pipe_config);
+
+ if (!intel_read_infoframe(encoder, pipe_config,
+ HDMI_INFOFRAME_TYPE_AVI,
+ _config->infoframes.avi))
+ DRM_ERROR("failed to read AVI infoframe\n");
+
+ if (!intel_read_infoframe(encoder, pipe_config,
+ HDMI_INFOFRAME_TYPE_SPD,
+ _config->infoframes.spd))
+ DRM_ERROR("failed to read SPD infoframe:\n");
+
+ if (!intel_read_infoframe(encoder, pipe_config,
+ HDMI_INFOFRAME_TYPE_VENDOR,
+ _config->infoframes.hdmi))
+ DRM_ERROR("failed to read HDMI infoframe\n");
}
static enum intel_output_type
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 357624a6bfe2..75ec99b85232 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1185,6 +1185,10 @@ struct intel_digital_port {
const struct intel_crtc_state *crtc_state,
unsigned int type,
const void *frame, ssize_t len);
+ ssize_t (*read_infoframe)(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ unsigned int type,
+ void *frame, ssize_t len);
void (*set_infoframes)(struct intel_encoder *encoder,
bool enable,
const struct intel_crtc_state *crtc_state,
@@ -1867,6 +1871,12 @@ void intel_infoframe_init(struct intel_digital_port
*intel_dig_port);
u32 intel_hdmi_infoframes_enabled(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
u32 intel_hdmi_infoframe_enable(unsigned int type);
+void intel_hdmi_read_gcp_infoframe(struct intel_encoder *encoder,
+ struct intel_crtc_state *crtc_state);
+bool intel_read_infoframe(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ enum hdmi_infoframe_type type,
+ union hdmi_infoframe *frame);
/* intel_lvds.c */
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 491001fc0fad..27cb6ec32e94 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -203,6 +203,31 @@ static void g4x_write_infoframe(struct intel_encoder
*encoder,
POSTING_READ(VIDEO_DIP_CTL);
}
+static ssize_t g4x_read_infoframe(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ unsigned int type,
+ void *frame, ssize_t len)
+{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ u32 val, *data = frame;
+ int i;
+
+ val = I915_READ(VIDEO_DIP_CTL);
+
+ if ((val & g4x_infoframe_enable(type)) == 0)
+ return 0;
+
+ val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */
+ val |= g4x_infoframe_index(type);
+
+ I915_WRITE(VIDEO_DIP_CTL, val);
+
+ for (i = 0; i < len; i += 4)
+ *data++ = I915_READ(VIDEO_DIP_DATA);
+
+ return len;
+}
+
static u32 g4x_infoframes_enabled(struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config)
{
@@ -258,6 +283,32 @@ static void ibx_write_infoframe(struct intel_encoder
*encoder,
POSTING_READ(reg);
}
+static ssize_t ibx_read_infoframe(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ unsigned int type,
+ void *frame, ssize_t len)
+{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ u32 val, *data = frame;
+ int i;
+
+
[Intel-gfx] [PATCH 15/18] drm/i915/sdvo: Precompute HDMI infoframes
From: Ville Syrjälä
As with regular HDMI encoders, let's precompute the infoframes
(actually just AVI infoframe for the time being) with SDVO HDMI
encoders.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_sdvo.c | 58 +--
1 file changed, 43 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c
b/drivers/gpu/drm/i915/intel_sdvo.c
index 701372e512a8..d8c78aebaf01 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -981,33 +981,57 @@ static bool intel_sdvo_write_infoframe(struct intel_sdvo
*intel_sdvo,
_rate, 1);
}
-static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
-const struct intel_crtc_state
*pipe_config)
+static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
+struct intel_crtc_state
*crtc_state,
+struct drm_connector_state
*conn_state)
{
- uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
- union hdmi_infoframe frame;
+ struct hdmi_avi_infoframe *frame = _state->infoframes.avi.avi;
int ret;
- ssize_t len;
- ret = drm_hdmi_avi_infoframe_from_display_mode(,
-
_config->base.adjusted_mode,
+ if (!crtc_state->has_hdmi_sink)
+ return true;
+
+ crtc_state->infoframes.enable |=
+ intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
+
+ ret = drm_hdmi_avi_infoframe_from_display_mode(frame,
+
_state->base.adjusted_mode,
false);
- if (ret < 0) {
- DRM_ERROR("couldn't fill AVI infoframe\n");
+ if (WARN_ON(ret))
return false;
- }
if (intel_sdvo->rgb_quant_range_selectable) {
- if (pipe_config->limited_color_range)
- frame.avi.quantization_range =
+ if (crtc_state->limited_color_range)
+ frame->quantization_range =
HDMI_QUANTIZATION_RANGE_LIMITED;
else
- frame.avi.quantization_range =
+ frame->quantization_range =
HDMI_QUANTIZATION_RANGE_FULL;
}
- len = hdmi_infoframe_pack(, sdvo_data, sizeof(sdvo_data));
- if (len < 0)
+ ret = hdmi_avi_infoframe_check(frame);
+ if (WARN_ON(ret))
+ return false;
+
+ return true;
+}
+
+static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
+const struct intel_crtc_state
*crtc_state)
+{
+ u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
+ const union hdmi_infoframe *frame = _state->infoframes.avi;
+ ssize_t len;
+
+ if ((crtc_state->infoframes.enable &
+intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) == 0)
+ return true;
+
+ if (WARN_ON(frame->any.type != HDMI_INFOFRAME_TYPE_AVI))
+ return false;
+
+ len = hdmi_infoframe_pack_only(frame, sdvo_data, sizeof(sdvo_data));
+ if (WARN_ON(len < 0))
return false;
return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
@@ -1194,6 +1218,10 @@ static bool intel_sdvo_compute_config(struct
intel_encoder *encoder,
if (intel_sdvo_connector->is_hdmi)
adjusted_mode->picture_aspect_ratio =
conn_state->picture_aspect_ratio;
+ if (!intel_sdvo_compute_avi_infoframe(intel_sdvo,
+ pipe_config, conn_state))
+ return false;
+
return true;
}
--
2.16.4
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[Intel-gfx] [PATCH 10/18] drm/i915: Add the missing HDMI gamut metadata packet stuff
From: Ville Syrjälä
We have definitions and low level code for everything except the gamut
metadata HDMI packet. Add the missing bits.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_reg.h | 4 +++-
drivers/gpu/drm/i915/intel_hdmi.c | 12
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 4948b352bf4c..c07fd394ca1d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4577,6 +4577,7 @@ enum {
#define VIDEO_DIP_ENABLE_SPD (8 << 21)
#define VIDEO_DIP_SELECT_AVI (0 << 19)
#define VIDEO_DIP_SELECT_VENDOR (1 << 19)
+#define VIDEO_DIP_SELECT_GAMUT (2 << 19)
#define VIDEO_DIP_SELECT_SPD (3 << 19)
#define VIDEO_DIP_SELECT_MASK(3 << 19)
#define VIDEO_DIP_FREQ_ONCE (0 << 16)
@@ -7948,10 +7949,11 @@ enum {
#define _ICL_VIDEO_DIP_PPS_ECC_B 0x613D4
#define HSW_TVIDEO_DIP_CTL(trans) _MMIO_TRANS2(trans,
_HSW_VIDEO_DIP_CTL_A)
+#define HSW_TVIDEO_DIP_GCP(trans) _MMIO_TRANS2(trans,
_HSW_VIDEO_DIP_GCP_A)
#define HSW_TVIDEO_DIP_AVI_DATA(trans, i) _MMIO_TRANS2(trans,
_HSW_VIDEO_DIP_AVI_DATA_A + (i) * 4)
#define HSW_TVIDEO_DIP_VS_DATA(trans, i) _MMIO_TRANS2(trans,
_HSW_VIDEO_DIP_VS_DATA_A + (i) * 4)
#define HSW_TVIDEO_DIP_SPD_DATA(trans, i) _MMIO_TRANS2(trans,
_HSW_VIDEO_DIP_SPD_DATA_A + (i) * 4)
-#define HSW_TVIDEO_DIP_GCP(trans) _MMIO_TRANS2(trans,
_HSW_VIDEO_DIP_GCP_A)
+#define HSW_TVIDEO_DIP_GMP_DATA(trans, i) _MMIO_TRANS2(trans,
_HSW_VIDEO_DIP_GMP_DATA_A + (i) * 4)
#define HSW_TVIDEO_DIP_VSC_DATA(trans, i) _MMIO_TRANS2(trans,
_HSW_VIDEO_DIP_VSC_DATA_A + (i) * 4)
#define ICL_VIDEO_DIP_PPS_DATA(trans, i) _MMIO_TRANS2(trans,
_ICL_VIDEO_DIP_PPS_DATA_A + (i) * 4)
#define ICL_VIDEO_DIP_PPS_ECC(trans, i)_MMIO_TRANS2(trans,
_ICL_VIDEO_DIP_PPS_ECC_A + (i) * 4)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 454f570275e9..c3c2a638d062 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -83,6 +83,8 @@ static struct intel_hdmi *intel_attached_hdmi(struct
drm_connector *connector)
static u32 g4x_infoframe_index(unsigned int type)
{
switch (type) {
+ case HDMI_PACKET_TYPE_GAMUT_METADATA:
+ return VIDEO_DIP_SELECT_GAMUT;
case HDMI_INFOFRAME_TYPE_AVI:
return VIDEO_DIP_SELECT_AVI;
case HDMI_INFOFRAME_TYPE_SPD:
@@ -98,6 +100,10 @@ static u32 g4x_infoframe_index(unsigned int type)
static u32 g4x_infoframe_enable(unsigned int type)
{
switch (type) {
+ case HDMI_PACKET_TYPE_GENERAL_CONTROL:
+ return VIDEO_DIP_ENABLE_GCP;
+ case HDMI_PACKET_TYPE_GAMUT_METADATA:
+ return VIDEO_DIP_ENABLE_GAMUT;
case HDMI_INFOFRAME_TYPE_AVI:
return VIDEO_DIP_ENABLE_AVI;
case HDMI_INFOFRAME_TYPE_SPD:
@@ -113,6 +119,10 @@ static u32 g4x_infoframe_enable(unsigned int type)
static u32 hsw_infoframe_enable(unsigned int type)
{
switch (type) {
+ case HDMI_PACKET_TYPE_GENERAL_CONTROL:
+ return VIDEO_DIP_ENABLE_GCP_HSW;
+ case HDMI_PACKET_TYPE_GAMUT_METADATA:
+ return VIDEO_DIP_ENABLE_GMP_HSW;
case DP_SDP_VSC:
return VIDEO_DIP_ENABLE_VSC_HSW;
case HDMI_INFOFRAME_TYPE_AVI:
@@ -134,6 +144,8 @@ hsw_dip_data_reg(struct drm_i915_private *dev_priv,
int i)
{
switch (type) {
+ case HDMI_PACKET_TYPE_GAMUT_METADATA:
+ return HSW_TVIDEO_DIP_GMP_DATA(cpu_transcoder, i);
case DP_SDP_VSC:
return HSW_TVIDEO_DIP_VSC_DATA(cpu_transcoder, i);
case HDMI_INFOFRAME_TYPE_AVI:
--
2.16.4
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[Intel-gfx] [PATCH 16/18] drm/i915/sdvo: Read out HDMI infoframes
From: Ville Syrjälä
Read the HDMI infoframes from the hbuf and unpack them into
the crtc state.
Well, actually just AVI infoframe for now but let's write the
infoframe readout code in a more generic fashion in case we
expand this later.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_sdvo.c | 92 +--
1 file changed, 89 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c
b/drivers/gpu/drm/i915/intel_sdvo.c
index d8c78aebaf01..4d787c86df6d 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -981,6 +981,58 @@ static bool intel_sdvo_write_infoframe(struct intel_sdvo
*intel_sdvo,
_rate, 1);
}
+static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo,
+unsigned int if_index,
+u8 *data, unsigned int length)
+{
+ u8 set_buf_index[2] = { if_index, 0 };
+ u8 hbuf_size, tx_rate, av_split;
+ int i;
+
+ if (!intel_sdvo_get_value(intel_sdvo,
+ SDVO_CMD_GET_HBUF_AV_SPLIT,
+ _split, 1))
+ return -ENXIO;
+
+ if (av_split < if_index)
+ return 0;
+
+ if (!intel_sdvo_get_value(intel_sdvo,
+ SDVO_CMD_GET_HBUF_TXRATE,
+ _rate, 1))
+ return -ENXIO;
+
+ if (tx_rate == SDVO_HBUF_TX_DISABLED)
+ return 0;
+
+ if (!intel_sdvo_set_value(intel_sdvo,
+ SDVO_CMD_SET_HBUF_INDEX,
+ set_buf_index, 2))
+ return -ENXIO;
+
+ if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
+ _size, 1))
+ return -ENXIO;
+
+ /* Buffer size is 0 based, hooray! */
+ hbuf_size++;
+
+ DRM_DEBUG_KMS("reading sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
+ if_index, length, hbuf_size);
+
+ hbuf_size = min_t(unsigned int, length, hbuf_size);
+
+ for (i = 0; i < hbuf_size; i += 8) {
+ if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HBUF_DATA,
NULL, 0))
+ return -ENXIO;
+ if (!intel_sdvo_read_response(intel_sdvo, [i],
+ min_t(unsigned int, 8, hbuf_size
- i)))
+ return -ENXIO;
+ }
+
+ return hbuf_size;
+}
+
static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
struct intel_crtc_state
*crtc_state,
struct drm_connector_state
*conn_state)
@@ -1039,6 +1091,37 @@ static bool intel_sdvo_set_avi_infoframe(struct
intel_sdvo *intel_sdvo,
sdvo_data, sizeof(sdvo_data));
}
+static bool intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
+struct intel_crtc_state *crtc_state)
+{
+ u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
+ union hdmi_infoframe *frame = _state->infoframes.avi;
+ ssize_t len;
+ int ret;
+
+ if (!crtc_state->has_hdmi_sink)
+ return true;
+
+ len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
+ sdvo_data, sizeof(sdvo_data));
+ if (len < 0)
+ return false;
+ else if (len == 0)
+ return true;
+
+ crtc_state->infoframes.enable |=
+ intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
+
+ ret = hdmi_infoframe_unpack(frame, sdvo_data, sizeof(sdvo_data));
+ if (ret)
+ return false;
+
+ if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI)
+ return false;
+
+ return true;
+}
+
static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
const struct drm_connector_state
*conn_state)
{
@@ -1535,6 +1618,10 @@ static void intel_sdvo_get_config(struct intel_encoder
*encoder,
}
}
+ WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
+"SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
+pipe_config->pixel_multiplier, encoder_pixel_multiplier);
+
if (sdvox & HDMI_COLOR_RANGE_16_235)
pipe_config->limited_color_range = true;
@@ -1547,9 +1634,8 @@ static void intel_sdvo_get_config(struct intel_encoder
*encoder,
pipe_config->has_hdmi_sink = true;
}
- WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
-"SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
-pipe_config->pixel_multiplier, encoder_pixel_multiplier);
+ if
[Intel-gfx] [PATCH 09/18] drm/i915: Pass intel_encoder to infoframe functions
From: Ville Syrjälä
Make life simpler by passing around intel_encoder instead of
drm_encoder.
@r1@
identifier F =~ "infoframe";
identifier I, M;
@@
F(
- struct drm_encoder *I
+ struct intel_encoder *I
, ...)
{
<...
(
- I->M
+ I->base.M
|
- I
+ >base
)
...>
}
@r2@
identifier F =~ "infoframe";
identifier I;
type T, ST;
@@
ST {
...
T (*F)(
- struct drm_encoder *I
+ struct intel_encoder *encoder
, ...);
...
};
@@
identifier r1.F;
expression E;
@@
F(
- E
+ to_intel_encoder(E)
,...)
@@
identifier r2.F;
expression E, X;
@@
(
X.F(
- E
+ to_intel_encoder(E)
,...)
|
X->F(
-E
+to_intel_encoder(E)
,...)
)
@@
expression E;
@@
(
- to_intel_encoder(>base)
+ E
|
- to_intel_encoder(>base.base)
+ >base
)
@@
identifier D, M;
expression E;
@@
D = enc_to_dig_port(>base)
<...
(
- D->base.M
+ E->M
|
- >base
+ E
)
...>
@@
identifier D;
expression E;
type T;
@@
- T D = enc_to_dig_port(E);
... when != D
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_ddi.c | 6 +-
drivers/gpu/drm/i915/intel_drv.h | 6 +-
drivers/gpu/drm/i915/intel_hdmi.c | 129 +++---
drivers/gpu/drm/i915/intel_psr.c | 3 +-
4 files changed, 71 insertions(+), 73 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index b6910c8b4e08..086e3f940586 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2947,7 +2947,7 @@ static void intel_ddi_pre_enable_hdmi(struct
intel_encoder *encoder,
intel_ddi_enable_pipe_clock(crtc_state);
- intel_dig_port->set_infoframes(>base,
+ intel_dig_port->set_infoframes(encoder,
crtc_state->has_infoframe,
crtc_state, conn_state);
}
@@ -3046,7 +3046,7 @@ static void intel_ddi_post_disable_hdmi(struct
intel_encoder *encoder,
struct intel_digital_port *dig_port = enc_to_dig_port(>base);
struct intel_hdmi *intel_hdmi = _port->hdmi;
- dig_port->set_infoframes(>base, false,
+ dig_port->set_infoframes(encoder, false,
old_crtc_state, old_conn_state);
intel_ddi_disable_pipe_clock(old_crtc_state);
@@ -3390,7 +3390,7 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
pipe_config->has_hdmi_sink = true;
intel_dig_port = enc_to_dig_port(>base);
- if (intel_dig_port->infoframe_enabled(>base,
pipe_config))
+ if (intel_dig_port->infoframe_enabled(encoder, pipe_config))
pipe_config->has_infoframe = true;
if ((temp & TRANS_DDI_HDMI_SCRAMBLING_MASK) ==
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index bf1c38728a59..e0f3a79fc75e 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1173,15 +1173,15 @@ struct intel_digital_port {
enum intel_display_power_domain ddi_io_power_domain;
enum tc_port_type tc_type;
- void (*write_infoframe)(struct drm_encoder *encoder,
+ void (*write_infoframe)(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
unsigned int type,
const void *frame, ssize_t len);
- void (*set_infoframes)(struct drm_encoder *encoder,
+ void (*set_infoframes)(struct intel_encoder *encoder,
bool enable,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state);
- bool (*infoframe_enabled)(struct drm_encoder *encoder,
+ bool (*infoframe_enabled)(struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config);
};
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 3b56ab253171..454f570275e9 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -148,14 +148,13 @@ hsw_dip_data_reg(struct drm_i915_private *dev_priv,
}
}
-static void g4x_write_infoframe(struct drm_encoder *encoder,
+static void g4x_write_infoframe(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
unsigned int type,
const void *frame, ssize_t len)
{
const u32 *data = frame;
- struct drm_device *dev = encoder->dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
u32 val = I915_READ(VIDEO_DIP_CTL);
int i;
@@ -186,31 +185,29 @@ static void g4x_write_infoframe(struct drm_encoder
*encoder,
POSTING_READ(VIDEO_DIP_CTL);
}
-static bool g4x_infoframe_enabled(struct
[Intel-gfx] [PATCH 06/18] video/hdmi: Handle the MPEG Source infoframe
From: Ville Syrjälä
Add the code to deal with the MPEG source infoframe.
Blindly typed from the spec, and totally untested.
Cc: Thierry Reding
Cc: Hans Verkuil
Cc: linux-me...@vger.kernel.org
Signed-off-by: Ville Syrjälä
---
drivers/video/hdmi.c | 229 +++
include/linux/hdmi.h | 27 ++
2 files changed, 256 insertions(+)
diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
index 9507f668a569..3d24c7746c51 100644
--- a/drivers/video/hdmi.c
+++ b/drivers/video/hdmi.c
@@ -706,6 +706,131 @@ hdmi_vendor_any_infoframe_pack(union
hdmi_vendor_any_infoframe *frame,
return hdmi_vendor_any_infoframe_pack_only(frame, buffer, size);
}
+/**
+ * hdmi_mpeg_source_infoframe_init() - initialize an HDMI MPEG Source infoframe
+ * @frame: HDMI MPEG Source infoframe
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int hdmi_mpeg_source_infoframe_init(struct hdmi_mpeg_source_infoframe *frame)
+{
+ memset(frame, 0, sizeof(*frame));
+
+ frame->type = HDMI_INFOFRAME_TYPE_MPEG_SOURCE;
+ frame->version = 1;
+ frame->length = HDMI_MPEG_SOURCE_INFOFRAME_SIZE;
+
+ return 0;
+}
+EXPORT_SYMBOL(hdmi_mpeg_source_infoframe_init);
+
+static int hdmi_mpeg_source_infoframe_check_only(const struct
hdmi_mpeg_source_infoframe *frame)
+{
+ if (frame->type != HDMI_INFOFRAME_TYPE_MPEG_SOURCE ||
+ frame->version != 1 ||
+ frame->length != HDMI_MPEG_SOURCE_INFOFRAME_SIZE)
+ return -EINVAL;
+
+ return 0;
+}
+
+/**
+ * hdmi_mpeg_source_infoframe_check() - Check and check a HDMI MPEG Source
infoframe
+ * @frame: HDMI MPEG Source infoframe
+ *
+ * Validates that the infoframe is consistent and updates derived fields
+ * (eg. length) based on other fields.
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int hdmi_mpeg_source_infoframe_check(struct hdmi_mpeg_source_infoframe *frame)
+{
+ return hdmi_mpeg_source_infoframe_check_only(frame);
+}
+EXPORT_SYMBOL(hdmi_mpeg_source_infoframe_check);
+
+/**
+ * hdmi_mpeg_source_infoframe_pack_only() - write HDMI MPEG Source infoframe
to binary buffer
+ * @frame: HDMI MPEG Source infoframe
+ * @buffer: destination buffer
+ * @size: size of buffer
+ *
+ * Packs the information contained in the @frame structure into a binary
+ * representation that can be written into the corresponding controller
+ * registers. Also computes the checksum as required by section 5.3.5 of
+ * the HDMI 1.4 specification.
+ *
+ * Returns the number of bytes packed into the binary buffer or a negative
+ * error code on failure.
+ */
+ssize_t hdmi_mpeg_source_infoframe_pack_only(const struct
hdmi_mpeg_source_infoframe *frame,
+void *buffer, size_t size)
+{
+ u8 *ptr = buffer;
+ size_t length;
+ int ret;
+
+ ret = hdmi_mpeg_source_infoframe_check_only(frame);
+ if (ret)
+ return ret;
+
+ length = HDMI_INFOFRAME_HEADER_SIZE + frame->length;
+
+ if (size < length)
+ return -ENOSPC;
+
+ memset(buffer, 0, size);
+
+ ptr[0] = frame->type;
+ ptr[1] = frame->version;
+ ptr[2] = frame->length;
+ ptr[3] = 0; /* checksum */
+
+ /* start infoframe payload */
+ ptr += HDMI_INFOFRAME_HEADER_SIZE;
+
+ ptr[0] = frame->mpeg_bit_rate >> 0;
+ ptr[1] = frame->mpeg_bit_rate >> 8;
+ ptr[2] = frame->mpeg_bit_rate >> 16;
+ ptr[3] = frame->mpeg_bit_rate >> 24;
+ ptr[4] = (frame->field_repeat << 4) | frame->mpeg_frame;
+
+ hdmi_infoframe_set_checksum(buffer, length);
+
+ return length;
+}
+EXPORT_SYMBOL(hdmi_mpeg_source_infoframe_pack_only);
+
+/**
+ * hdmi_mpeg_source_infoframe_pack() - Check and check a HDMI MPEG Source
infoframe,
+ * and write it to binary buffer
+ * @frame: HDMI MPEG Source infoframe
+ * @buffer: destination buffer
+ * @size: size of buffer
+ *
+ * Validates that the infoframe is consistent and updates derived fields
+ * (eg. length) based on other fields, after which packs the information
+ * contained in the @frame structure into a binary representation that
+ * can be written into the corresponding controller registers. Also
+ * computes the checksum as required by section 5.3.5 of the HDMI 1.4
+ * specification.
+ *
+ * Returns the number of bytes packed into the binary buffer or a negative
+ * error code on failure.
+ */
+ssize_t hdmi_mpeg_source_infoframe_pack(struct hdmi_mpeg_source_infoframe
*frame,
+ void *buffer, size_t size)
+{
+ int ret;
+
+ ret = hdmi_mpeg_source_infoframe_check(frame);
+ if (ret)
+ return ret;
+
+ return hdmi_mpeg_source_infoframe_pack_only(frame, buffer, size);
+}
+EXPORT_SYMBOL(hdmi_mpeg_source_infoframe_pack);
+
/**
* hdmi_infoframe_check() - Check check a HDMI infoframe
* @frame: HDMI infoframe
@@
[Intel-gfx] [PATCH 11/18] drm/i915: Return the mask of enabled infoframes from ->inforame_enabled()
From: Ville Syrjälä
We want to start tracking which infoframes are enabled, so let's replace
the boolean flag with a bitmask.
We'll abstract the bitmask so that it's not platform dependent. That
will allow us to examine the bitmask later in platform independent code.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/intel_drv.h | 4 +-
drivers/gpu/drm/i915/intel_hdmi.c | 87 ---
3 files changed, 68 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 086e3f940586..098a0e4edf2a 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -3390,7 +3390,7 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
pipe_config->has_hdmi_sink = true;
intel_dig_port = enc_to_dig_port(>base);
- if (intel_dig_port->infoframe_enabled(encoder, pipe_config))
+ if (intel_hdmi_infoframes_enabled(encoder, pipe_config))
pipe_config->has_infoframe = true;
if ((temp & TRANS_DDI_HDMI_SCRAMBLING_MASK) ==
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e0f3a79fc75e..6815c69aac2f 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1181,7 +1181,7 @@ struct intel_digital_port {
bool enable,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state);
- bool (*infoframe_enabled)(struct intel_encoder *encoder,
+ u32 (*infoframes_enabled)(struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config);
};
@@ -1856,6 +1856,8 @@ bool intel_hdmi_handle_sink_scrambling(struct
intel_encoder *encoder,
bool scrambling);
void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable);
void intel_infoframe_init(struct intel_digital_port *intel_dig_port);
+u32 intel_hdmi_infoframes_enabled(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state);
/* intel_lvds.c */
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index c3c2a638d062..a8fcddb199ae 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -100,10 +100,14 @@ static u32 g4x_infoframe_index(unsigned int type)
static u32 g4x_infoframe_enable(unsigned int type)
{
switch (type) {
+ case HDMI_PACKET_TYPE_NULL:
+ return VIDEO_DIP_ENABLE; /* slight lie */
case HDMI_PACKET_TYPE_GENERAL_CONTROL:
return VIDEO_DIP_ENABLE_GCP;
case HDMI_PACKET_TYPE_GAMUT_METADATA:
return VIDEO_DIP_ENABLE_GAMUT;
+ case DP_SDP_VSC:
+ return 0;
case HDMI_INFOFRAME_TYPE_AVI:
return VIDEO_DIP_ENABLE_AVI;
case HDMI_INFOFRAME_TYPE_SPD:
@@ -119,6 +123,8 @@ static u32 g4x_infoframe_enable(unsigned int type)
static u32 hsw_infoframe_enable(unsigned int type)
{
switch (type) {
+ case HDMI_PACKET_TYPE_NULL:
+ return 0;
case HDMI_PACKET_TYPE_GENERAL_CONTROL:
return VIDEO_DIP_ENABLE_GCP_HSW;
case HDMI_PACKET_TYPE_GAMUT_METADATA:
@@ -197,19 +203,19 @@ static void g4x_write_infoframe(struct intel_encoder
*encoder,
POSTING_READ(VIDEO_DIP_CTL);
}
-static bool g4x_infoframe_enabled(struct intel_encoder *encoder,
+static u32 g4x_infoframes_enabled(struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
u32 val = I915_READ(VIDEO_DIP_CTL);
if ((val & VIDEO_DIP_ENABLE) == 0)
- return false;
+ return 0;
if ((val & VIDEO_DIP_PORT_MASK) != VIDEO_DIP_PORT(encoder->port))
- return false;
+ return 0;
- return val & (VIDEO_DIP_ENABLE_AVI |
+ return val & (VIDEO_DIP_ENABLE | VIDEO_DIP_ENABLE_AVI |
VIDEO_DIP_ENABLE_VENDOR | VIDEO_DIP_ENABLE_SPD);
}
@@ -252,7 +258,7 @@ static void ibx_write_infoframe(struct intel_encoder
*encoder,
POSTING_READ(reg);
}
-static bool ibx_infoframe_enabled(struct intel_encoder *encoder,
+static u32 ibx_infoframes_enabled(struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
@@ -261,12 +267,12 @@ static bool ibx_infoframe_enabled(struct intel_encoder
*encoder,
u32 val = I915_READ(reg);
if ((val & VIDEO_DIP_ENABLE) == 0)
- return false;
+ return 0;
if ((val &
[Intel-gfx] [PATCH 12/18] drm/i915: Store mask of enabled infoframes in the crtc state
From: Ville Syrjälä
Store the mask of enabled infoframes in the crtc state. We'll start
with just the readout for HDMI encoder, and we'll expand this
to compute the bitmask in .compute_config() later. SDVO will also
follow later.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_ddi.c | 5 -
drivers/gpu/drm/i915/intel_drv.h | 4
drivers/gpu/drm/i915/intel_hdmi.c | 5 -
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 098a0e4edf2a..19fef88e680e 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -3390,7 +3390,10 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
pipe_config->has_hdmi_sink = true;
intel_dig_port = enc_to_dig_port(>base);
- if (intel_hdmi_infoframes_enabled(encoder, pipe_config))
+ pipe_config->infoframes.enable |=
+ intel_hdmi_infoframes_enabled(encoder, pipe_config);
+
+ if (pipe_config->infoframes.enable)
pipe_config->has_infoframe = true;
if ((temp & TRANS_DDI_HDMI_SCRAMBLING_MASK) ==
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 6815c69aac2f..50c0c049ee15 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -893,6 +893,10 @@ struct intel_crtc_state {
u8 active_planes;
u8 nv12_planes;
+ struct {
+ u32 enable;
+ } infoframes;
+
/* HDMI scrambling status */
bool hdmi_scrambling;
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index a8fcddb199ae..98a44084324c 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1264,7 +1264,10 @@ static void intel_hdmi_get_config(struct intel_encoder
*encoder,
if (tmp & HDMI_MODE_SELECT_HDMI)
pipe_config->has_hdmi_sink = true;
- if (intel_hdmi_infoframes_enabled(encoder, pipe_config))
+ pipe_config->infoframes.enable |=
+ intel_hdmi_infoframes_enabled(encoder, pipe_config);
+
+ if (pipe_config->infoframes.enable)
pipe_config->has_infoframe = true;
if (tmp & SDVO_AUDIO_ENABLE)
--
2.16.4
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[Intel-gfx] [PATCH 04/18] video/hdmi: Constify infoframe passed to the pack functions
From: Ville Syrjälä
Let's make the infoframe pack functions usable with a const infoframe
structure. This allows us to precompute the infoframe earlier, and still
pack it later when we're no longer allowed to modify the structure.
So now we end up with a _check()+_pack_only() or _pack() functions
depending on whether you want to precompute the infoframes or not.
The names aren't greate but I was lazy and didn't want to change all the
drivers.
v2: Deal with exynos churn
Actually export the new funcs
Cc: Thierry Reding
Cc: Hans Verkuil
Cc: linux-me...@vger.kernel.org
Signed-off-by: Ville Syrjälä
---
drivers/video/hdmi.c | 425 +++
include/linux/hdmi.h | 19 ++-
2 files changed, 416 insertions(+), 28 deletions(-)
diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
index 53e7ee2c83fc..9507f668a569 100644
--- a/drivers/video/hdmi.c
+++ b/drivers/video/hdmi.c
@@ -68,8 +68,36 @@ int hdmi_avi_infoframe_init(struct hdmi_avi_infoframe *frame)
}
EXPORT_SYMBOL(hdmi_avi_infoframe_init);
+static int hdmi_avi_infoframe_check_only(const struct hdmi_avi_infoframe
*frame)
+{
+ if (frame->type != HDMI_INFOFRAME_TYPE_AVI ||
+ frame->version != 2 ||
+ frame->length != HDMI_AVI_INFOFRAME_SIZE)
+ return -EINVAL;
+
+ if (frame->picture_aspect > HDMI_PICTURE_ASPECT_16_9)
+ return -EINVAL;
+
+ return 0;
+}
+
/**
- * hdmi_avi_infoframe_pack() - write HDMI AVI infoframe to binary buffer
+ * hdmi_avi_infoframe_check() - Check and check a HDMI AVI infoframe
+ * @frame: HDMI AVI infoframe
+ *
+ * Validates that the infoframe is consistent and updates derived fields
+ * (eg. length) based on other fields.
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int hdmi_avi_infoframe_check(struct hdmi_avi_infoframe *frame)
+{
+ return hdmi_avi_infoframe_check_only(frame);
+}
+EXPORT_SYMBOL(hdmi_avi_infoframe_check);
+
+/**
+ * hdmi_avi_infoframe_pack_only() - write HDMI AVI infoframe to binary buffer
* @frame: HDMI AVI infoframe
* @buffer: destination buffer
* @size: size of buffer
@@ -82,20 +110,22 @@ EXPORT_SYMBOL(hdmi_avi_infoframe_init);
* Returns the number of bytes packed into the binary buffer or a negative
* error code on failure.
*/
-ssize_t hdmi_avi_infoframe_pack(struct hdmi_avi_infoframe *frame, void *buffer,
- size_t size)
+ssize_t hdmi_avi_infoframe_pack_only(const struct hdmi_avi_infoframe *frame,
+void *buffer, size_t size)
{
u8 *ptr = buffer;
size_t length;
+ int ret;
+
+ ret = hdmi_avi_infoframe_check_only(frame);
+ if (ret)
+ return ret;
length = HDMI_INFOFRAME_HEADER_SIZE + frame->length;
if (size < length)
return -ENOSPC;
- if (frame->picture_aspect > HDMI_PICTURE_ASPECT_16_9)
- return -EINVAL;
-
memset(buffer, 0, size);
ptr[0] = frame->type;
@@ -152,6 +182,36 @@ ssize_t hdmi_avi_infoframe_pack(struct hdmi_avi_infoframe
*frame, void *buffer,
return length;
}
+EXPORT_SYMBOL(hdmi_avi_infoframe_pack_only);
+
+/**
+ * hdmi_avi_infoframe_pack() - Check and check a HDMI AVI infoframe,
+ * and write it to binary buffer
+ * @frame: HDMI AVI infoframe
+ * @buffer: destination buffer
+ * @size: size of buffer
+ *
+ * Validates that the infoframe is consistent and updates derived fields
+ * (eg. length) based on other fields, after which packs the information
+ * contained in the @frame structure into a binary representation that
+ * can be written into the corresponding controller registers. Also
+ * computes the checksum as required by section 5.3.5 of the HDMI 1.4
+ * specification.
+ *
+ * Returns the number of bytes packed into the binary buffer or a negative
+ * error code on failure.
+ */
+ssize_t hdmi_avi_infoframe_pack(struct hdmi_avi_infoframe *frame,
+ void *buffer, size_t size)
+{
+ int ret;
+
+ ret = hdmi_avi_infoframe_check(frame);
+ if (ret)
+ return ret;
+
+ return hdmi_avi_infoframe_pack_only(frame, buffer, size);
+}
EXPORT_SYMBOL(hdmi_avi_infoframe_pack);
/**
@@ -178,8 +238,33 @@ int hdmi_spd_infoframe_init(struct hdmi_spd_infoframe
*frame,
}
EXPORT_SYMBOL(hdmi_spd_infoframe_init);
+static int hdmi_spd_infoframe_check_only(const struct hdmi_spd_infoframe
*frame)
+{
+ if (frame->type != HDMI_INFOFRAME_TYPE_SPD ||
+ frame->version != 1 ||
+ frame->length != HDMI_SPD_INFOFRAME_SIZE)
+ return -EINVAL;
+
+ return 0;
+}
+
/**
- * hdmi_spd_infoframe_pack() - write HDMI SPD infoframe to binary buffer
+ * hdmi_spd_infoframe_check() - Check and check a HDMI SPD infoframe
+ * @frame: HDMI SPD infoframe
+ *
+ * Validates that the infoframe is consistent and updates derived fields
+ * (eg. length) based
[Intel-gfx] [PATCH 05/18] video/hdmi: Add an enum for HDMI packet types
From: Ville Syrjälä
We'll be wanting to send more than just infoframes over HDMI. So add an
enum for other packet types.
TODO: Maybe just include the infoframe types in the packet type enum
and get rid of the infoframe type enum?
Cc: Thierry Reding
Cc: Hans Verkuil
Cc: linux-me...@vger.kernel.org
Signed-off-by: Ville Syrjälä
---
include/linux/hdmi.h | 15 +++
1 file changed, 15 insertions(+)
diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
index c76b50a48e48..80521d9591a1 100644
--- a/include/linux/hdmi.h
+++ b/include/linux/hdmi.h
@@ -27,6 +27,21 @@
#include
#include
+enum hdmi_packet_type {
+ HDMI_PACKET_TYPE_NULL = 0x00,
+ HDMI_PACKET_TYPE_AUDIO_CLOCK_REGEN = 0x01,
+ HDMI_PACKET_TYPE_AUDIO_SAMPLE = 0x02,
+ HDMI_PACKET_TYPE_GENERAL_CONTROL = 0x03,
+ HDMI_PACKET_TYPE_AUDIO_CP = 0x04,
+ HDMI_PACKET_TYPE_ISRC1 = 0x05,
+ HDMI_PACKET_TYPE_ISRC2 = 0x06,
+ HDMI_PACKET_TYPE_ONE_BIT_AUDIO_SAMPLE = 0x07,
+ HDMI_PACKET_TYPE_DST_AUDIO = 0x08,
+ HDMI_PACKET_TYPE_HBR_AUDIO_STREAM = 0x09,
+ HDMI_PACKET_TYPE_GAMUT_METADATA = 0x0a,
+ /* + enum hdmi_infoframe_type */
+};
+
enum hdmi_infoframe_type {
HDMI_INFOFRAME_TYPE_VENDOR = 0x81,
HDMI_INFOFRAME_TYPE_AVI = 0x82,
--
2.16.4
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[Intel-gfx] [PATCH 07/18] video/hdmi: Handle the NTSC VBI infoframe
From: Ville Syrjälä
Add the code to deal with the NTSC VBI infoframe.
I decided against parsing the PES_data_field and just leave
it as an opaque blob, just dumping it out as hex in the log.
Blindly typed from the spec, and totally untested.
Cc: Thierry Reding
Cc: Hans Verkuil
Cc: linux-me...@vger.kernel.org
Signed-off-by: Ville Syrjälä
---
drivers/video/hdmi.c | 208 +++
include/linux/hdmi.h | 18 +
2 files changed, 226 insertions(+)
diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
index 3d24c7746c51..3c320d69fa0a 100644
--- a/drivers/video/hdmi.c
+++ b/drivers/video/hdmi.c
@@ -831,6 +831,139 @@ ssize_t hdmi_mpeg_source_infoframe_pack(struct
hdmi_mpeg_source_infoframe *frame
}
EXPORT_SYMBOL(hdmi_mpeg_source_infoframe_pack);
+/**
+ * hdmi_ntsc_vbi_infoframe_init() - initialize an HDMI NTSC VBI infoframe
+ * @frame: HDMI NTSC VBI infoframe
+ * @pes_data_field: ANSI/SCTE 127 PES_data_field
+ * @length: ANSI/SCTE 127 PES_data_field length
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int hdmi_ntsc_vbi_infoframe_init(struct hdmi_ntsc_vbi_infoframe *frame,
+const void *pes_data_field,
+size_t length)
+{
+ if (length < 1 || length > 27)
+ return -EINVAL;
+
+ memset(frame, 0, sizeof(*frame));
+
+ frame->type = HDMI_INFOFRAME_TYPE_NTSC_VBI;
+ frame->version = 1;
+ frame->length = length;
+
+ memcpy(frame->pes_data_field, pes_data_field, length);
+
+ return 0;
+}
+EXPORT_SYMBOL(hdmi_ntsc_vbi_infoframe_init);
+
+static int hdmi_ntsc_vbi_infoframe_check_only(const struct
hdmi_ntsc_vbi_infoframe *frame)
+{
+ if (frame->type != HDMI_INFOFRAME_TYPE_NTSC_VBI ||
+ frame->version != 1 ||
+ frame->length < 1 || frame->length > 27)
+ return -EINVAL;
+
+ if (frame->pes_data_field[0] != 0x99)
+ return -EINVAL;
+
+ return 0;
+}
+
+/**
+ * hdmi_ntsc_vbi_infoframe_check() - Check and check a HDMI NTSC VBI infoframe
+ * @frame: HDMI NTSC VBI infoframe
+ *
+ * Validates that the infoframe is consistent and updates derived fields
+ * (eg. length) based on other fields.
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int hdmi_ntsc_vbi_infoframe_check(struct hdmi_ntsc_vbi_infoframe *frame)
+{
+ return hdmi_ntsc_vbi_infoframe_check_only(frame);
+}
+EXPORT_SYMBOL(hdmi_ntsc_vbi_infoframe_check);
+
+/**
+ * hdmi_ntsc_vbi_infoframe_pack_only() - write HDMI NTSC VBI infoframe to
binary buffer
+ * @frame: HDMI NTSC VBI infoframe
+ * @buffer: destination buffer
+ * @size: size of buffer
+ *
+ * Packs the information contained in the @frame structure into a binary
+ * representation that can be written into the corresponding controller
+ * registers. Also computes the checksum as required by section 5.3.5 of
+ * the HDMI 1.4 specification.
+ *
+ * Returns the number of bytes packed into the binary buffer or a negative
+ * error code on failure.
+ */
+ssize_t hdmi_ntsc_vbi_infoframe_pack_only(const struct hdmi_ntsc_vbi_infoframe
*frame,
+ void *buffer, size_t size)
+{
+ u8 *ptr = buffer;
+ size_t length;
+ int ret;
+
+ ret = hdmi_ntsc_vbi_infoframe_check_only(frame);
+ if (ret)
+ return ret;
+
+ length = HDMI_INFOFRAME_HEADER_SIZE + frame->length;
+
+ if (size < length)
+ return -ENOSPC;
+
+ memset(buffer, 0, size);
+
+ ptr[0] = frame->type;
+ ptr[1] = frame->version;
+ ptr[2] = frame->length;
+ ptr[3] = 0; /* checksum */
+
+ /* start infoframe payload */
+ ptr += HDMI_INFOFRAME_HEADER_SIZE;
+
+ memcpy(ptr, frame->pes_data_field, frame->length);
+
+ hdmi_infoframe_set_checksum(buffer, length);
+
+ return length;
+}
+EXPORT_SYMBOL(hdmi_ntsc_vbi_infoframe_pack_only);
+
+/**
+ * hdmi_ntsc_vbi_infoframe_pack() - Check and check a HDMI NTSC VBI infoframe,
+ * and write it to binary buffer
+ * @frame: HDMI NTSC VBI infoframe
+ * @buffer: destination buffer
+ * @size: size of buffer
+ *
+ * Validates that the infoframe is consistent and updates derived fields
+ * (eg. length) based on other fields, after which packs the information
+ * contained in the @frame structure into a binary representation that
+ * can be written into the corresponding controller registers. Also
+ * computes the checksum as required by section 5.3.5 of the HDMI 1.4
+ * specification.
+ *
+ * Returns the number of bytes packed into the binary buffer or a negative
+ * error code on failure.
+ */
+ssize_t hdmi_ntsc_vbi_infoframe_pack(struct hdmi_ntsc_vbi_infoframe *frame,
+void *buffer, size_t size)
+{
+ int ret;
+
+ ret = hdmi_ntsc_vbi_infoframe_check(frame);
+ if (ret)
+ return ret;
+
+
[Intel-gfx] [PATCH 08/18] drm/i915: Use memmove() for punching the hole into infoframes
From: Ville Syrjälä Replace the hand rolled memmove() with the real thing. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_hdmi.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index a2dab0b6bde6..3b56ab253171 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -457,9 +457,7 @@ static void intel_write_infoframe(struct drm_encoder *encoder, return; /* Insert the 'hole' (see big comment above) at position 3 */ - buffer[0] = buffer[1]; - buffer[1] = buffer[2]; - buffer[2] = buffer[3]; + memmove([0], [1], 3); buffer[3] = 0; len++; -- 2.16.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 03/18] video/hdmi: Constify infoframe passed to the log functions
From: Ville Syrjälä
The log functions don't modify the passed in infoframe so make it const.
Cc: Thierry Reding
Cc: Hans Verkuil
Cc: linux-me...@vger.kernel.org
Signed-off-by: Ville Syrjälä
---
drivers/video/hdmi.c | 22 +++---
include/linux/hdmi.h | 2 +-
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
index b5d491014b0b..53e7ee2c83fc 100644
--- a/drivers/video/hdmi.c
+++ b/drivers/video/hdmi.c
@@ -471,7 +471,7 @@ static const char *hdmi_infoframe_type_get_name(enum
hdmi_infoframe_type type)
static void hdmi_infoframe_log_header(const char *level,
struct device *dev,
- struct hdmi_any_infoframe *frame)
+ const struct hdmi_any_infoframe *frame)
{
hdmi_log("HDMI infoframe: %s, version %u, length %u\n",
hdmi_infoframe_type_get_name(frame->type),
@@ -673,10 +673,10 @@ hdmi_content_type_get_name(enum hdmi_content_type
content_type)
*/
static void hdmi_avi_infoframe_log(const char *level,
struct device *dev,
- struct hdmi_avi_infoframe *frame)
+ const struct hdmi_avi_infoframe *frame)
{
hdmi_infoframe_log_header(level, dev,
- (struct hdmi_any_infoframe *)frame);
+ (const struct hdmi_any_infoframe *)frame);
hdmi_log("colorspace: %s\n",
hdmi_colorspace_get_name(frame->colorspace));
@@ -750,12 +750,12 @@ static const char *hdmi_spd_sdi_get_name(enum
hdmi_spd_sdi sdi)
*/
static void hdmi_spd_infoframe_log(const char *level,
struct device *dev,
- struct hdmi_spd_infoframe *frame)
+ const struct hdmi_spd_infoframe *frame)
{
u8 buf[17];
hdmi_infoframe_log_header(level, dev,
- (struct hdmi_any_infoframe *)frame);
+ (const struct hdmi_any_infoframe *)frame);
memset(buf, 0, sizeof(buf));
@@ -886,10 +886,10 @@ hdmi_audio_coding_type_ext_get_name(enum
hdmi_audio_coding_type_ext ctx)
*/
static void hdmi_audio_infoframe_log(const char *level,
struct device *dev,
-struct hdmi_audio_infoframe *frame)
+const struct hdmi_audio_infoframe *frame)
{
hdmi_infoframe_log_header(level, dev,
- (struct hdmi_any_infoframe *)frame);
+ (const struct hdmi_any_infoframe *)frame);
if (frame->channels)
hdmi_log("channels: %u\n", frame->channels - 1);
@@ -949,12 +949,12 @@ hdmi_3d_structure_get_name(enum hdmi_3d_structure
s3d_struct)
static void
hdmi_vendor_any_infoframe_log(const char *level,
struct device *dev,
- union hdmi_vendor_any_infoframe *frame)
+ const union hdmi_vendor_any_infoframe *frame)
{
- struct hdmi_vendor_infoframe *hvf = >hdmi;
+ const struct hdmi_vendor_infoframe *hvf = >hdmi;
hdmi_infoframe_log_header(level, dev,
- (struct hdmi_any_infoframe *)frame);
+ (const struct hdmi_any_infoframe *)frame);
if (frame->any.oui != HDMI_IEEE_OUI) {
hdmi_log("not a HDMI vendor infoframe\n");
@@ -984,7 +984,7 @@ hdmi_vendor_any_infoframe_log(const char *level,
*/
void hdmi_infoframe_log(const char *level,
struct device *dev,
- union hdmi_infoframe *frame)
+ const union hdmi_infoframe *frame)
{
switch (frame->any.type) {
case HDMI_INFOFRAME_TYPE_AVI:
diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
index a577d4ae2570..bce1abb1fe57 100644
--- a/include/linux/hdmi.h
+++ b/include/linux/hdmi.h
@@ -335,6 +335,6 @@ hdmi_infoframe_pack(union hdmi_infoframe *frame, void
*buffer, size_t size);
int hdmi_infoframe_unpack(union hdmi_infoframe *frame,
const void *buffer, size_t size);
void hdmi_infoframe_log(const char *level, struct device *dev,
- union hdmi_infoframe *frame);
+ const union hdmi_infoframe *frame);
#endif /* _DRM_HDMI_H */
--
2.16.4
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[Intel-gfx] [PATCH 02/18] video/hdmi: Pass buffer size to infoframe unpack functions
From: Ville Syrjälä
To make sure the infoframe unpack functions don't end up examining
stack garbage or oopsing, let's pass in the size of the buffer.
v2: Convert tda1997x.c as well (kbuild test robot)
Cc: Thierry Reding
Cc: Hans Verkuil
Cc: linux-me...@vger.kernel.org
Signed-off-by: Ville Syrjälä
---
drivers/media/i2c/adv7511.c | 2 +-
drivers/media/i2c/adv7604.c | 2 +-
drivers/media/i2c/adv7842.c | 2 +-
drivers/media/i2c/tc358743.c | 2 +-
drivers/media/i2c/tda1997x.c | 4 ++--
drivers/video/hdmi.c | 51
include/linux/hdmi.h | 2 +-
7 files changed, 44 insertions(+), 21 deletions(-)
diff --git a/drivers/media/i2c/adv7511.c b/drivers/media/i2c/adv7511.c
index 55c2ea0720d9..b85b181bbb6c 100644
--- a/drivers/media/i2c/adv7511.c
+++ b/drivers/media/i2c/adv7511.c
@@ -550,7 +550,7 @@ static void log_infoframe(struct v4l2_subdev *sd, const
struct adv7511_cfg_read_
buffer[3] = 0;
buffer[3] = hdmi_infoframe_checksum(buffer, len + 4);
- if (hdmi_infoframe_unpack(, buffer) < 0) {
+ if (hdmi_infoframe_unpack(, buffer, sizeof(buffer)) < 0) {
v4l2_err(sd, "%s: unpack of %s infoframe failed\n", __func__,
cri->desc);
return;
}
diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index 668be2bca57a..2e7a28dbad4e 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -2418,7 +2418,7 @@ static int adv76xx_read_infoframe(struct v4l2_subdev *sd,
int index,
buffer[i + 3] = infoframe_read(sd,
adv76xx_cri[index].payload_addr + i);
- if (hdmi_infoframe_unpack(frame, buffer) < 0) {
+ if (hdmi_infoframe_unpack(frame, buffer, sizeof(buffer)) < 0) {
v4l2_err(sd, "%s: unpack of %s infoframe failed\n", __func__,
adv76xx_cri[index].desc);
return -ENOENT;
diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c
index 4f8fbdd00e35..2cfd03f929b2 100644
--- a/drivers/media/i2c/adv7842.c
+++ b/drivers/media/i2c/adv7842.c
@@ -2563,7 +2563,7 @@ static void log_infoframe(struct v4l2_subdev *sd, struct
adv7842_cfg_read_infofr
for (i = 0; i < len; i++)
buffer[i + 3] = infoframe_read(sd, cri->payload_addr + i);
- if (hdmi_infoframe_unpack(, buffer) < 0) {
+ if (hdmi_infoframe_unpack(, buffer, sizeof(buffer)) < 0) {
v4l2_err(sd, "%s: unpack of %s infoframe failed\n", __func__,
cri->desc);
return;
}
diff --git a/drivers/media/i2c/tc358743.c b/drivers/media/i2c/tc358743.c
index 44c41933415a..519bf92508d5 100644
--- a/drivers/media/i2c/tc358743.c
+++ b/drivers/media/i2c/tc358743.c
@@ -444,7 +444,7 @@ static void print_avi_infoframe(struct v4l2_subdev *sd)
i2c_rd(sd, PK_AVI_0HEAD, buffer, HDMI_INFOFRAME_SIZE(AVI));
- if (hdmi_infoframe_unpack(, buffer) < 0) {
+ if (hdmi_infoframe_unpack(, buffer, sizeof(buffer)) < 0) {
v4l2_err(sd, "%s: unpack of AVI infoframe failed\n", __func__);
return;
}
diff --git a/drivers/media/i2c/tda1997x.c b/drivers/media/i2c/tda1997x.c
index d114ac5243ec..195a1fc74ee8 100644
--- a/drivers/media/i2c/tda1997x.c
+++ b/drivers/media/i2c/tda1997x.c
@@ -1253,7 +1253,7 @@ tda1997x_parse_infoframe(struct tda1997x_state *state,
u16 addr)
/* read data */
len = io_readn(sd, addr, sizeof(buffer), buffer);
- err = hdmi_infoframe_unpack(, buffer);
+ err = hdmi_infoframe_unpack(, buffer, sizeof(buffer));
if (err) {
v4l_err(state->client,
"failed parsing %d byte infoframe: 0x%04x/0x%02x\n",
@@ -1928,7 +1928,7 @@ static int tda1997x_log_infoframe(struct v4l2_subdev *sd,
int addr)
/* read data */
len = io_readn(sd, addr, sizeof(buffer), buffer);
v4l2_dbg(1, debug, sd, "infoframe: addr=%d len=%d\n", addr, len);
- err = hdmi_infoframe_unpack(, buffer);
+ err = hdmi_infoframe_unpack(, buffer, sizeof(buffer));
if (err) {
v4l_err(state->client,
"failed parsing %d byte infoframe: 0x%04x/0x%02x\n",
diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
index 65b915ea4936..b5d491014b0b 100644
--- a/drivers/video/hdmi.c
+++ b/drivers/video/hdmi.c
@@ -1005,8 +1005,9 @@ EXPORT_SYMBOL(hdmi_infoframe_log);
/**
* hdmi_avi_infoframe_unpack() - unpack binary buffer to a HDMI AVI infoframe
- * @buffer: source buffer
* @frame: HDMI AVI infoframe
+ * @buffer: source buffer
+ * @size: size of buffer
*
* Unpacks the information contained in binary @buffer into a structured
* @frame of the HDMI Auxiliary Video (AVI) information frame.
@@ -1016,11 +1017,14 @@ EXPORT_SYMBOL(hdmi_infoframe_log);
* Returns 0 on success or a negative error code on failure.
*/
static int hdmi_avi_infoframe_unpack(struct
[Intel-gfx] [PATCH 00/18] drm/i915: Infoframe precompute/check
From: Ville Syrjälä Series aimed at precomputing the HDMI infoframes, and we also get better validation by reading them back out from the hardware and comparing with the expected data. Looks like I typed these up about a year ago. Might be time to get them in before the anniversary ;) Cc: Thierry Reding Cc: Hans Verkuil Cc: linux-me...@vger.kernel.org Ville Syrjälä (18): video/hdmi: Constify 'buffer' to the unpack functions video/hdmi: Pass buffer size to infoframe unpack functions video/hdmi: Constify infoframe passed to the log functions video/hdmi: Constify infoframe passed to the pack functions video/hdmi: Add an enum for HDMI packet types video/hdmi: Handle the MPEG Source infoframe video/hdmi: Handle the NTSC VBI infoframe drm/i915: Use memmove() for punching the hole into infoframes drm/i915: Pass intel_encoder to infoframe functions drm/i915: Add the missing HDMI gamut metadata packet stuff drm/i915: Return the mask of enabled infoframes from ->inforame_enabled() drm/i915: Store mask of enabled infoframes in the crtc state drm/i915: Precompute HDMI infoframes drm/i915: Read out HDMI infoframes drm/i915/sdvo: Precompute HDMI infoframes drm/i915/sdvo: Read out HDMI infoframes drm/i915: Check infoframe state in intel_pipe_config_compare() drm/i915: Include infoframes in the crtc state dump drivers/gpu/drm/i915/i915_reg.h |4 +- drivers/gpu/drm/i915/intel_ddi.c | 27 +- drivers/gpu/drm/i915/intel_display.c | 74 ++- drivers/gpu/drm/i915/intel_drv.h | 27 +- drivers/gpu/drm/i915/intel_hdmi.c| 651 - drivers/gpu/drm/i915/intel_psr.c |3 +- drivers/gpu/drm/i915/intel_sdvo.c| 150 - drivers/media/i2c/adv7511.c |2 +- drivers/media/i2c/adv7604.c |2 +- drivers/media/i2c/adv7842.c |2 +- drivers/media/i2c/tc358743.c |2 +- drivers/media/i2c/tda1997x.c |4 +- drivers/video/hdmi.c | 1032 ++ include/linux/hdmi.h | 84 ++- 14 files changed, 1786 insertions(+), 278 deletions(-) -- 2.16.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 01/18] video/hdmi: Constify 'buffer' to the unpack functions
From: Ville Syrjälä
The unpack functions just read from the passed in buffer,
so make it const.
Cc: Thierry Reding
Cc: Hans Verkuil
Cc: linux-me...@vger.kernel.org
Signed-off-by: Ville Syrjälä
---
drivers/video/hdmi.c | 23 ---
include/linux/hdmi.h | 3 ++-
2 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
index 38716eb50408..65b915ea4936 100644
--- a/drivers/video/hdmi.c
+++ b/drivers/video/hdmi.c
@@ -31,7 +31,7 @@
#define hdmi_log(fmt, ...) dev_printk(level, dev, fmt, ##__VA_ARGS__)
-static u8 hdmi_infoframe_checksum(u8 *ptr, size_t size)
+static u8 hdmi_infoframe_checksum(const u8 *ptr, size_t size)
{
u8 csum = 0;
size_t i;
@@ -1016,9 +1016,9 @@ EXPORT_SYMBOL(hdmi_infoframe_log);
* Returns 0 on success or a negative error code on failure.
*/
static int hdmi_avi_infoframe_unpack(struct hdmi_avi_infoframe *frame,
-void *buffer)
+const void *buffer)
{
- u8 *ptr = buffer;
+ const u8 *ptr = buffer;
int ret;
if (ptr[0] != HDMI_INFOFRAME_TYPE_AVI ||
@@ -1079,9 +1079,9 @@ static int hdmi_avi_infoframe_unpack(struct
hdmi_avi_infoframe *frame,
* Returns 0 on success or a negative error code on failure.
*/
static int hdmi_spd_infoframe_unpack(struct hdmi_spd_infoframe *frame,
-void *buffer)
+const void *buffer)
{
- u8 *ptr = buffer;
+ const u8 *ptr = buffer;
int ret;
if (ptr[0] != HDMI_INFOFRAME_TYPE_SPD ||
@@ -1117,9 +1117,9 @@ static int hdmi_spd_infoframe_unpack(struct
hdmi_spd_infoframe *frame,
* Returns 0 on success or a negative error code on failure.
*/
static int hdmi_audio_infoframe_unpack(struct hdmi_audio_infoframe *frame,
- void *buffer)
+ const void *buffer)
{
- u8 *ptr = buffer;
+ const u8 *ptr = buffer;
int ret;
if (ptr[0] != HDMI_INFOFRAME_TYPE_AUDIO ||
@@ -1163,9 +1163,9 @@ static int hdmi_audio_infoframe_unpack(struct
hdmi_audio_infoframe *frame,
*/
static int
hdmi_vendor_any_infoframe_unpack(union hdmi_vendor_any_infoframe *frame,
-void *buffer)
+const void *buffer)
{
- u8 *ptr = buffer;
+ const u8 *ptr = buffer;
size_t length;
int ret;
u8 hdmi_video_format;
@@ -1234,10 +1234,11 @@ hdmi_vendor_any_infoframe_unpack(union
hdmi_vendor_any_infoframe *frame,
*
* Returns 0 on success or a negative error code on failure.
*/
-int hdmi_infoframe_unpack(union hdmi_infoframe *frame, void *buffer)
+int hdmi_infoframe_unpack(union hdmi_infoframe *frame,
+ const void *buffer)
{
int ret;
- u8 *ptr = buffer;
+ const u8 *ptr = buffer;
switch (ptr[0]) {
case HDMI_INFOFRAME_TYPE_AVI:
diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
index d271ff23984f..d3816170c062 100644
--- a/include/linux/hdmi.h
+++ b/include/linux/hdmi.h
@@ -332,7 +332,8 @@ union hdmi_infoframe {
ssize_t
hdmi_infoframe_pack(union hdmi_infoframe *frame, void *buffer, size_t size);
-int hdmi_infoframe_unpack(union hdmi_infoframe *frame, void *buffer);
+int hdmi_infoframe_unpack(union hdmi_infoframe *frame,
+ const void *buffer);
void hdmi_infoframe_log(const char *level, struct device *dev,
union hdmi_infoframe *frame);
--
2.16.4
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Re: [Intel-gfx] [PATCH 06/10] drm/i915/icl: Streamline guc irq handling
On 20/09/18 07:33, Mika Kuoppala wrote: The returning of iir through function parameter is eyesore. Make guc irq acking inline and return the iir directly, being pedantic, this is not the guc irq but gu_misc irq (in the commit title as well). Sounds similar but it's a different interrupt :P GuC is under INTR_DW0, bit 25. Daniele ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Park the GPU on module load (rev2)
== Series Details ==
Series: drm/i915: Park the GPU on module load (rev2)
URL : https://patchwork.freedesktop.org/series/49693/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4852 -> Patchwork_10241 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/49693/revisions/2/mbox/
== Known issues ==
Here are the changes found in Patchwork_10241 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_getparams_basic@basic-subslice-total:
fi-snb-2520m: PASS -> DMESG-WARN (fdo#103713) +10
igt@gem_exec_suspend@basic-s3:
{fi-skl-caroline}: NOTRUN -> INCOMPLETE (fdo#104108, fdo#107556)
Possible fixes
igt@kms_frontbuffer_tracking@basic:
fi-byt-clapper: FAIL (fdo#103167) -> PASS
igt@kms_pipe_crc_basic@hang-read-crc-pipe-c:
fi-skl-6700hq: DMESG-WARN (fdo#105998) -> PASS
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS
igt@kms_psr@primary_page_flip:
fi-whl-u: FAIL (fdo#107336) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
fdo#107336 https://bugs.freedesktop.org/show_bug.cgi?id=107336
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107556 https://bugs.freedesktop.org/show_bug.cgi?id=107556
== Participating hosts (52 -> 48) ==
Additional (1): fi-skl-caroline
Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan
fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4852 -> Patchwork_10241
CI_DRM_4852: c7249769bf8b7da87c0f3d8e343a7c342f0f4c16 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10241: 7291c09cb6cdc06d9c8735565ff0fc38f069d53f @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
7291c09cb6cd drm/i915: Park the GPU on module load
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10241/issues.html
___
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Re: [Intel-gfx] [PATCH 10/10] drm/i915/icl: Only ack irq identities we did handle
On 20/09/18 07:33, Mika Kuoppala wrote:
If we ack the identities immediately after they have been
handled, it should unblock next interrupt accumulation
in the gathering register earlier. It also allows us to
remove time based polling of valid bit. If we don't get a valid
sample now, we will likely get a valid sample on next interrupt,
which will be generated due to skipping the ack. The downside
is that we will have as many ack writes as there were identities
handled.
I'm not sure this is going to work. It looks like if we skip the
clearing of the identity register we need to skip the clearing of
INTR_DW as well because the HW doesn't seem to set that again. If we
clear it, when the interrupt gets re-triggered the driver won't be able
to handle it and so it'll keep being re-triggered in a loop. I've just
confirmed this behavior on the current code (i.e. without this series
applied) by simply pretending the ident was not valid for the first
interrupt:
[ 728.765749] [drm:gen11_gt_engine_identity [i915]] *ERROR*
INTR_IDENTITY_REG0:15 0x not valid!
[ 728.765800] [drm:gen11_irq_handler [i915]] *ERROR* GT_INTR_DW0 blank!
[ 728.765865] [drm:gen11_irq_handler [i915]] *ERROR* GT_INTR_DW0 blank!
[ 728.766050] [drm:gen11_irq_handler [i915]] *ERROR* GT_INTR_DW0 blank!
[... more of the same ...]
[ 782.395257] [drm:gen11_irq_handler [i915]] *ERROR* GT_INTR_DW0 blank!
[ 782.395293] [drm:gen11_irq_handler [i915]] *ERROR* GT_INTR_DW0 blank!
I haven't checked in detail all the other patches in the series yet so
not sure if any of them can mitigate this issue.
Daniele
Leave small retry loop for safety and with debugs to see if we
ever encounter read with valid not set.
Cc: Daniele Ceraolo Spurio
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_irq.c | 26 +++---
1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 27116e3f21af..beb9fe4abf1f 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2965,22 +2965,18 @@ gen11_gt_engine_identity(struct drm_i915_private *
const i915,
const unsigned int bank, const unsigned int bit)
{
void __iomem * const regs = i915->regs;
- u32 timeout_ts;
- u32 ident;
+ u32 ident, retry = 0;
lockdep_assert_held(>irq_lock);
raw_reg_write(regs, GEN11_IIR_REG_SELECTOR(bank), BIT(bit));
- /*
-* NB: Specs do not specify how long to spin wait,
-* so we do ~100us as an educated guess.
-*/
- timeout_ts = (local_clock() >> 10) + 100;
do {
ident = raw_reg_read(regs, GEN11_INTR_IDENTITY_REG(bank));
- } while (!(ident & GEN11_INTR_DATA_VALID) &&
-!time_after32(local_clock() >> 10, timeout_ts));
+ } while (!(ident & GEN11_INTR_DATA_VALID) && ++retry <= 10);
+
+ if (unlikely(GEM_SHOW_DEBUG() && retry))
+ WARN_ONCE(1, "INTR_IDENTITY took %u reads to settle\n", retry);
if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) {
DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
@@ -3031,9 +3027,6 @@ gen11_gt_identity_handler(struct drm_i915_private * const
i915,
const u8 instance = GEN11_INTR_ENGINE_INSTANCE(identity);
const u16 intr = GEN11_INTR_ENGINE_INTR(identity);
- if (unlikely(!intr))
- return;
-
if (class <= COPY_ENGINE_CLASS)
return gen11_engine_irq_handler(i915, class, instance, intr);
@@ -3065,11 +3058,14 @@ gen11_gt_bank_handler(struct drm_i915_private * const i915,
const u32 ident = gen11_gt_engine_identity(i915,
bank, bit);
+ if (unlikely(!ident))
+ continue;
+
gen11_gt_identity_handler(i915, ident);
- }
- /* Clear must be after shared has been served for engine */
- raw_reg_write(regs, GEN11_GT_INTR_DW(bank), intr_dw);
+ /* Clear must be after shared has been served for engine */
+ raw_reg_write(regs, GEN11_GT_INTR_DW(bank), BIT(bit));
+ }
}
static void
___
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[Intel-gfx] RC6 support in Ironlake
Hello, I am suddenly stuck with an old laptop (Thinkpad X201) with gen5 intel gfx. I remember using it back when rc6 was enabled in ironlake, and working really well, so I am trying to patch a recent kernel to get rc6 back and get a bit more battery life. I understand that the last patchset ( https://lists.freedesktop.org/archives/intel-gfx/2017-November/147557.html ) was never applied in full. I thought of trying it, but couldn't track down what kernel the patches were meant for. Tried everything from 4.13 onwards, but patching fails every time. Do people know what was the last kernel to have rc6 enabled for ironlake or, alternatively, to what specific -rc or minor version kernel I could apply the patches above? Thanks very much ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [CI] drm/i915: Park the GPU on module load
Once we have flushed the first request through the system to both load a
context and record the default state; tell the GPU to park and idle
itself, putting itself immediately (hopefully at least) into a
powersaving state, and allowing ourselves to start from known state
after setting up all our bookkeeping.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index b79362bbd97b..db9688d14912 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5419,6 +5419,14 @@ static int __intel_engines_record_defaults(struct
drm_i915_private *i915)
assert_kernel_context_is_current(i915);
+ /*
+* Immediately park the GPU so that we enable powersaving and
+* treat it as idle. The next time we issue a request, we will
+* unpark and start using the engine->pinned_default_state, otherwise
+* it is in limbo and an early reset may fail.
+*/
+ __i915_gem_park(i915);
+
for_each_engine(engine, i915, id) {
struct i915_vma *state;
void *vaddr;
--
2.19.0
___
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Re: [Intel-gfx] [PATCH 03/10] drm/i915/icl: No need to early bailout on interrupt
On 20/09/18 07:33, Mika Kuoppala wrote: Getting interrupt without any second level indications is unlikely. Do you have any numbers for this? I remember seeing empty interrupts quite often (i.e. up to 5-10%) in early testing on workloads submitting lots of no-ops due to the double buffering, when both events ended up being serviced by the first interrupt. The code was different at the time though, so those might just have been due to less optimal SW handing, but I'd be curious to see the numbers if you have any. Thanks, Daniele ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Live tests emit requests and so require rpm
== Series Details == Series: drm/i915/selftests: Live tests emit requests and so require rpm URL : https://patchwork.freedesktop.org/series/49972/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4851 -> Patchwork_10240 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/49972/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10240 that come from known issues: === IGT changes === Issues hit igt@drv_selftest@mock_hugepages: fi-bwr-2160:PASS -> DMESG-FAIL (fdo#107930) igt@gem_exec_suspend@basic-s3: fi-bdw-samus: PASS -> INCOMPLETE (fdo#107773) Possible fixes igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 fdo#107930 https://bugs.freedesktop.org/show_bug.cgi?id=107930 == Participating hosts (51 -> 47) == Additional (2): fi-hsw-4770r fi-icl-u Missing(6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-skl-caroline == Build changes == * Linux: CI_DRM_4851 -> Patchwork_10240 CI_DRM_4851: f9b15cfe6b2059cec1465980d556d30be0fb7f75 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10240: dda3c179339c020e161eb697e09a6d5d72d2788d @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == dda3c179339c drm/i915/selftests: Live tests emit requests and so require rpm == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10240/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: don't assume struct page in i915_sg_trim
Quoting Ville Syrjälä (2018-09-20 15:38:28) > On Thu, Sep 20, 2018 at 03:27:06PM +0100, Matthew Auld wrote: > > Which means we can now also put it to work in fake_get_huge_pages. > > Just another reminder to write self-contained commit msgs. Reading > this wihtout copy pasting the subject line in makes one wonder > what the "which" is here. Tweaked the commitmsg so that it is self explanatory, will push shortly. Thanks for the patches, -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for ICL interrupt handling improvements
== Series Details == Series: ICL interrupt handling improvements URL : https://patchwork.freedesktop.org/series/49971/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4851 -> Patchwork_10239 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/49971/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10239 that come from known issues: === IGT changes === Issues hit igt@kms_flip@basic-flip-vs-modeset: fi-skl-6700hq: PASS -> DMESG-WARN (fdo#105998) igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: fi-byt-clapper: PASS -> FAIL (fdo#107362, fdo#103191) igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b: fi-byt-clapper: PASS -> FAIL (fdo#107362) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-bdw-samus: NOTRUN -> INCOMPLETE (fdo#107773) igt@kms_psr@primary_page_flip: fi-kbl-r: PASS -> FAIL (fdo#107336) Possible fixes igt@drv_module_reload@basic-reload: fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS fi-bdw-samus: INCOMPLETE (fdo#107773) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998 fdo#107336 https://bugs.freedesktop.org/show_bug.cgi?id=107336 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 == Participating hosts (51 -> 47) == Additional (2): fi-hsw-4770r fi-icl-u Missing(6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-skl-caroline == Build changes == * Linux: CI_DRM_4851 -> Patchwork_10239 CI_DRM_4851: f9b15cfe6b2059cec1465980d556d30be0fb7f75 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10239: 55cf33be427cac92f05fac6793a6ef4d1a0b9f2d @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 55cf33be427c drm/i915/icl: Only ack irq identities we did handle 8dd8e3ae6d78 drm/i915/icl: Handle display interrupts after enabling master 5de1efadeb46 drm/i915/icl: Handle GT interrupts after enabling master 78eeaa6937d6 drm/i915/icl: Make own function for display irq handler d9e3a88f8697 drm/i915/icl: Streamline guc irq handling fa484b8ca969 drm/i915/icl: Trim down posting reads on master intr control 42c13d4cda92 drm/i915/icl: Add helper to enable/disable master irq 832790b9e43f drm/i915/icl: No need to early bailout on interrupt e0de72a3f1e9 drm/i915/icl: Disable master intr early 1cccecc51f8d drm/i915/icl: No need to ack intr through master control == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10239/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 09/10] drm/i915/icl: Handle display interrupts after enabling master
Quoting Mika Kuoppala (2018-09-20 15:33:49) > Don't keep master disabled while handling display interrupts. > This should help a little with latency of generating the > next interrupt. > > Cc: Ville Syrjälä > Cc: Chris Wilson > Signed-off-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/i915_irq.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index b4992d397c5d..27116e3f21af 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -3162,13 +3162,11 @@ static irqreturn_t gen11_irq_handler(int irq, void > *arg) > return IRQ_NONE; > > master_ctl = gen11_master_irq_disable(regs); > - > - gen11_display_irq_handler(i915, master_ctl); > gu_misc_iir = gen11_gu_misc_irq_ack(regs, master_ctl); > - > gen11_master_irq_enable(regs); > > gen11_gt_irq_handler(i915, master_ctl); > + gen11_display_irq_handler(i915, master_ctl); > gen11_gu_misc_irq_handler(i915, gu_misc_iir); Hmm. So we no longer do ack within the interrupts off section. Is there even a point to disabling master-ctl in that scenario. The danger is simply we raise more master interrupts for sub-level interrupts that we proceed to handle. Doesn't seem like a huge deal... But there's usually some interesting rules on edge level interrupt that bite. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 07/10] drm/i915/icl: Make own function for display irq handler
Quoting Mika Kuoppala (2018-09-20 15:33:47) > Move display interrupt handling outside of generic handler. Nah, this needs to be split into the ack/handle as per Ville's suggestion. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 06/10] drm/i915/icl: Streamline guc irq handling
Quoting Mika Kuoppala (2018-09-20 15:33:46)
> The returning of iir through function parameter is eyesore.
> Make guc irq acking inline and return the iir directly, handling
> the empty iir exception early. We can then omit passing the
> master control to guc handler as the iir now contains everything
> we need.
>
> Cc: Chris Wilson
> Cc: Dhinakaran Pandiyan
> Signed-off-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/i915_irq.c | 38 -
> 1 file changed, 18 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index c35576f9c3f5..e9034d6d87b0 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -3088,36 +3088,34 @@ gen11_gt_irq_handler(struct drm_i915_private * const
> i915,
> spin_unlock(>irq_lock);
> }
>
> -static void
> -gen11_gu_misc_irq_ack(struct drm_i915_private *dev_priv, const u32
> master_ctl,
> - u32 *iir)
> +static inline u32
> +gen11_gu_misc_irq_ack(void __iomem * const regs, const u32 master_ctl)
> {
> - void __iomem * const regs = dev_priv->regs;
> + u32 iir;
>
> if (!(master_ctl & GEN11_GU_MISC_IRQ))
> - return;
> + return 0;
> +
> + iir = raw_reg_read(regs, GEN11_GU_MISC_IIR);
> + if (likely(iir))
> + raw_reg_write(regs, GEN11_GU_MISC_IIR, iir);
> + else
> + DRM_ERROR("GU_MISC iir blank!\n");
>
> - *iir = raw_reg_read(regs, GEN11_GU_MISC_IIR);
> - if (likely(*iir))
> - raw_reg_write(regs, GEN11_GU_MISC_IIR, *iir);
> + return iir;
> }
>
> static void
> gen11_gu_misc_irq_handler(struct drm_i915_private *dev_priv,
> - const u32 master_ctl, const u32 iir)
> + const u32 iir)
> {
> - if (!(master_ctl & GEN11_GU_MISC_IRQ))
> - return;
However, the argument is that by using master_ctl as our guard for all
functions, should encourage the compiler to keep it around in a
register. That's the thinking at least.
Care to test that theory if it makes any significant difference to code
layout and register usage?
-Chris
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Re: [Intel-gfx] [PATCH 05/10] drm/i915/icl: Trim down posting reads on master intr control
Quoting Mika Kuoppala (2018-09-20 15:33:45) > If we return a master control value on disable, it will act > as a posting read and further streamline our interrupt handler. > We can then safely use the inlined helpers on irq reset > and on postinstall. Posting read on postinstall is > superfluous as nothing beneath it is depedent. > > Cc: Chris Wilson > Signed-off-by: Mika Kuoppala Ok, this adds more weight to patch 4. The question about extending the pattern back as far as it goes still applies :) Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: don't assume struct page in i915_sg_trim
== Series Details == Series: series starting with [1/2] drm/i915: don't assume struct page in i915_sg_trim URL : https://patchwork.freedesktop.org/series/49969/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4851 -> Patchwork_10238 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/49969/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10238 that come from known issues: === IGT changes === Issues hit igt@drv_module_reload@basic-reload: fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000) igt@gem_exec_suspend@basic-s3: fi-bdw-samus: PASS -> INCOMPLETE (fdo#107773) igt@kms_flip@basic-flip-vs-modeset: fi-skl-6700hq: PASS -> DMESG-WARN (fdo#105998) igt@kms_pipe_crc_basic@hang-read-crc-pipe-a: fi-byt-clapper: PASS -> FAIL (fdo#107362, fdo#103191) igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a: fi-byt-clapper: PASS -> FAIL (fdo#107362) igt@kms_psr@primary_page_flip: fi-kbl-r: PASS -> FAIL (fdo#107336) Possible fixes igt@drv_module_reload@basic-reload: fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998 fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000 fdo#107336 https://bugs.freedesktop.org/show_bug.cgi?id=107336 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 == Participating hosts (51 -> 45) == Additional (1): fi-hsw-4770r Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-ctg-p8600 fi-skl-caroline == Build changes == * Linux: CI_DRM_4851 -> Patchwork_10238 CI_DRM_4851: f9b15cfe6b2059cec1465980d556d30be0fb7f75 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4647: ae8187922d8de2bc739519da3bd40cf5f03f5e4f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10238: 556a1f7ee1386c9144842f97d16b85035566c7b1 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 556a1f7ee138 drm/i915: pass dev_priv to i915_gem_cleanup_stolen 5bf0202718f6 drm/i915: don't assume struct page in i915_sg_trim == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10238/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 04/10] drm/i915/icl: Add helper to enable/disable master irq
Quoting Mika Kuoppala (2018-09-20 15:33:44) > Add static inline helpers to master irq control. Related > comments become superfluous and can be removed. > > Signed-off-by: Mika Kuoppala Hmm, need a little more convincing as it breaks the pattern. Does it make sense to apply this back to gen6 (excluding the atoms) where we have the same master ctl? -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 03/10] drm/i915/icl: No need to early bailout on interrupt
Quoting Mika Kuoppala (2018-09-20 15:33:43) > Getting interrupt without any second level indications > is unlikely. So there is no real advantage to bailout early > as all the second level handlers can handle empty master > control status. > > Signed-off-by: Mika Kuoppala Looks reasonable, Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 04/40] drm/i915: Park the GPU on module load
Quoting Tvrtko Ursulin (2018-09-20 15:02:36)
>
> On 19/09/2018 20:55, Chris Wilson wrote:
> > Once we have flushed the first request through the system to both load a
> > context and record the default state; tell the GPU to park and idle
> > itself, putting itself immediately (hopefully at least) into a
> > powersaving state, and allowing ourselves to start from known state
> > after setting up all our bookkeeping.
> >
> > Signed-off-by: Chris Wilson
> > Cc: Tvrtko Ursulin
> > ---
> > drivers/gpu/drm/i915/i915_gem.c | 8
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c
> > b/drivers/gpu/drm/i915/i915_gem.c
> > index a94d5a308c4d..6b347ffb996b 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -5417,6 +5417,14 @@ static int __intel_engines_record_defaults(struct
> > drm_i915_private *i915)
> >
> > assert_kernel_context_is_current(i915);
> >
> > + /*
> > + * Immediately park the GPU so that we enable powersaving and
> > + * treat it as idle. The next time we issue a request, we will
> > + * unpark and start using the engine->pinned_default_state, otherwise
> > + * it is in limbo and an early reset may fail.
> > + */
> > + __i915_gem_park(i915);
> > +
> > for_each_engine(engine, i915, id) {
> > struct i915_vma *state;
> > void *vaddr;
> >
>
> Presumably the previous patch will make this pass CI?
Aye. There was an earlier series of just this pair to check that I had
caught all the missing wakerefs uncovered by idling on init.
> I would prefer the parking is done from the caller level but we couldn't
> agree on this minor detail so anyway:
I wanted to postpone that idea until we have the rc6 setup refactored,
as I think that may open some more interesting avenues of how to handle
this.
-Chris
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Re: [Intel-gfx] [PATCH 1/2] drm/i915: don't assume struct page in i915_sg_trim
On 20/09/2018 15:27, Matthew Auld wrote:
Which means we can now also put it to work in fake_get_huge_pages.
Signed-off-by: Matthew Auld
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c | 4 +++-
drivers/gpu/drm/i915/selftests/huge_pages.c | 2 ++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index a94d5a308c4d..b79362bbd97b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2506,7 +2506,9 @@ static bool i915_sg_trim(struct sg_table *orig_st)
new_sg = new_st.sgl;
for_each_sg(orig_st->sgl, sg, orig_st->nents, i) {
sg_set_page(new_sg, sg_page(sg), sg->length, 0);
- /* called before being DMA mapped, no need to copy sg->dma_* */
+ sg_dma_address(new_sg) = sg_dma_address(sg);
+ sg_dma_len(new_sg) = sg_dma_len(sg);
+
new_sg = sg_next(new_sg);
}
GEM_BUG_ON(new_sg); /* Should walk exactly nents and hit the end */
diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c
b/drivers/gpu/drm/i915/selftests/huge_pages.c
index e272127783fe..8d03f64eabd7 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -235,6 +235,8 @@ static int fake_get_huge_pages(struct drm_i915_gem_object
*obj)
sg = sg_next(sg);
} while (1);
+ i915_sg_trim(st);
+
obj->mm.madv = I915_MADV_DONTNEED;
__i915_gem_object_set_pages(obj, st, sg_page_sizes);
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
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[Intel-gfx] [CI] drm/i915/selftests: Live tests emit requests and so require rpm
As we emit requests or touch HW directly for some of the live tests, the
requirement is that we hold the rpm wakeref before doing so. We want a
mix of granularity since we will want to test runtime suspend, so try to
mark up only the critical sections where we need rpm for the live test.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108002
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/selftests/i915_gem_coherency.c | 2 ++
drivers/gpu/drm/i915/selftests/i915_gem_context.c | 6 ++
drivers/gpu/drm/i915/selftests/i915_request.c | 8
drivers/gpu/drm/i915/selftests/intel_guc.c | 4
drivers/gpu/drm/i915/selftests/intel_lrc.c | 8
drivers/gpu/drm/i915/selftests/intel_workarounds.c | 5 +
6 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_coherency.c
b/drivers/gpu/drm/i915/selftests/i915_gem_coherency.c
index 4e6a221063ac..f7392c1ffe75 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_coherency.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_coherency.c
@@ -298,6 +298,7 @@ static int igt_gem_coherency(void *arg)
values = offsets + ncachelines;
mutex_lock(>drm.struct_mutex);
+ intel_runtime_pm_get(i915);
for (over = igt_coherency_mode; over->name; over++) {
if (!over->set)
continue;
@@ -375,6 +376,7 @@ static int igt_gem_coherency(void *arg)
}
}
unlock:
+ intel_runtime_pm_put(i915);
mutex_unlock(>drm.struct_mutex);
kfree(offsets);
return err;
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_context.c
b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
index 441a51d4aa54..76df25aa90c9 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
@@ -119,6 +119,7 @@ static int live_nop_switch(void *arg)
return PTR_ERR(file);
mutex_lock(>drm.struct_mutex);
+ intel_runtime_pm_get(i915);
ctx = kcalloc(nctx, sizeof(*ctx), GFP_KERNEL);
if (!ctx) {
@@ -221,6 +222,7 @@ static int live_nop_switch(void *arg)
}
out_unlock:
+ intel_runtime_pm_put(i915);
mutex_unlock(>drm.struct_mutex);
mock_file_free(i915, file);
return err;
@@ -831,6 +833,8 @@ static int igt_switch_to_kernel_context(void *arg)
*/
mutex_lock(>drm.struct_mutex);
+ intel_runtime_pm_get(i915);
+
ctx = kernel_context(i915);
if (IS_ERR(ctx)) {
mutex_unlock(>drm.struct_mutex);
@@ -853,6 +857,8 @@ static int igt_switch_to_kernel_context(void *arg)
GEM_TRACE_DUMP_ON(err);
if (igt_flush_test(i915, I915_WAIT_LOCKED))
err = -EIO;
+
+ intel_runtime_pm_put(i915);
mutex_unlock(>drm.struct_mutex);
kernel_context_close(ctx);
diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c
b/drivers/gpu/drm/i915/selftests/i915_request.c
index c4aac6141e04..07e557815308 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -342,6 +342,7 @@ static int live_nop_request(void *arg)
*/
mutex_lock(>drm.struct_mutex);
+ intel_runtime_pm_get(i915);
for_each_engine(engine, i915, id) {
struct i915_request *request = NULL;
@@ -402,6 +403,7 @@ static int live_nop_request(void *arg)
}
out_unlock:
+ intel_runtime_pm_put(i915);
mutex_unlock(>drm.struct_mutex);
return err;
}
@@ -487,6 +489,7 @@ static int live_empty_request(void *arg)
*/
mutex_lock(>drm.struct_mutex);
+ intel_runtime_pm_get(i915);
batch = empty_batch(i915);
if (IS_ERR(batch)) {
@@ -550,6 +553,7 @@ static int live_empty_request(void *arg)
i915_vma_unpin(batch);
i915_vma_put(batch);
out_unlock:
+ intel_runtime_pm_put(i915);
mutex_unlock(>drm.struct_mutex);
return err;
}
@@ -644,6 +648,7 @@ static int live_all_engines(void *arg)
*/
mutex_lock(>drm.struct_mutex);
+ intel_runtime_pm_get(i915);
err = begin_live_test(, i915, __func__, "");
if (err)
@@ -726,6 +731,7 @@ static int live_all_engines(void *arg)
i915_vma_unpin(batch);
i915_vma_put(batch);
out_unlock:
+ intel_runtime_pm_put(i915);
mutex_unlock(>drm.struct_mutex);
return err;
}
@@ -747,6 +753,7 @@ static int live_sequential_engines(void *arg)
*/
mutex_lock(>drm.struct_mutex);
+ intel_runtime_pm_get(i915);
err = begin_live_test(, i915, __func__, "");
if (err)
@@ -853,6 +860,7 @@ static int live_sequential_engines(void *arg)
i915_request_put(request[id]);
}
out_unlock:
+ intel_runtime_pm_put(i915);
mutex_unlock(>drm.struct_mutex);
return err;
}
diff --git
Re: [Intel-gfx] [PATCH 03/40] drm/i915/selftests: Live tests emit requests and so require rpm
Quoting Tvrtko Ursulin (2018-09-20 15:01:38) > > On 19/09/2018 20:55, Chris Wilson wrote: > > As we emit requests or touch HW directly for some of the live tests, the > > requirement is that we hold the rpm wakeref before doing so. We want a > > mix of granularity since we will want to test runtime suspend, so try to > > mark up only the critical sections where we need rpm for the live test. > > > > Signed-off-by: Chris Wilson > > --- > Should we have a rpm assert in i915_request_alloc? The intel_runtime_pm_get_noresume() we use there complains if we don't have an intel rpm wakeref. > Or at least in the > backend context pin if that's the only place where we can need it. Yup, it spits one out when we touch HW without a wakeref. Just it seems that wakerefs abound and we rarely catch ourselves out ;) -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 05/10] drm/i915/icl: Trim down posting reads on master intr control
If we return a master control value on disable, it will act
as a posting read and further streamline our interrupt handler.
We can then safely use the inlined helpers on irq reset
and on postinstall. Posting read on postinstall is
superfluous as nothing beneath it is depedent.
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_irq.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 89d76e7f4d00..c35576f9c3f5 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3125,9 +3125,11 @@ static inline void gen11_master_irq_enable(void __iomem
* const regs)
raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
}
-static inline void gen11_master_irq_disable(void __iomem * const regs)
+static inline u32 gen11_master_irq_disable(void __iomem * const regs)
{
raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, 0);
+
+ return raw_reg_read(regs, GEN11_GFX_MSTR_IRQ) & ~GEN11_MASTER_IRQ;
}
static irqreturn_t gen11_irq_handler(int irq, void *arg)
@@ -3140,8 +3142,7 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
if (!intel_irqs_enabled(i915))
return IRQ_NONE;
- gen11_master_irq_disable(regs);
- master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ) & ~GEN11_MASTER_IRQ;
+ master_ctl = gen11_master_irq_disable(regs);
/* Find, clear, then process each source of interrupt. */
gen11_gt_irq_handler(i915, master_ctl);
@@ -3652,10 +3653,10 @@ static void gen11_gt_irq_reset(struct drm_i915_private
*dev_priv)
static void gen11_irq_reset(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
+ void __iomem * const regs = dev_priv->regs;
int pipe;
- I915_WRITE(GEN11_GFX_MSTR_IRQ, 0);
- POSTING_READ(GEN11_GFX_MSTR_IRQ);
+ gen11_master_irq_disable(regs);
gen11_gt_irq_reset(dev_priv);
@@ -4308,6 +4309,7 @@ static void icp_irq_postinstall(struct drm_device *dev)
static int gen11_irq_postinstall(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
+ void __iomem * const regs = dev_priv->regs;
u32 gu_misc_masked = GEN11_GU_MISC_GSE;
if (HAS_PCH_ICP(dev_priv))
@@ -4320,8 +4322,7 @@ static int gen11_irq_postinstall(struct drm_device *dev)
I915_WRITE(GEN11_DISPLAY_INT_CTL, GEN11_DISPLAY_IRQ_ENABLE);
- I915_WRITE(GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
- POSTING_READ(GEN11_GFX_MSTR_IRQ);
+ gen11_master_irq_enable(regs);
return 0;
}
--
2.17.1
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Re: [Intel-gfx] [PATCH 1/2] drm/i915: don't assume struct page in i915_sg_trim
On Thu, Sep 20, 2018 at 03:27:06PM +0100, Matthew Auld wrote:
> Which means we can now also put it to work in fake_get_huge_pages.
Just another reminder to write self-contained commit msgs. Reading
this wihtout copy pasting the subject line in makes one wonder
what the "which" is here.
>
> Signed-off-by: Matthew Auld
> Cc: Tvrtko Ursulin
> ---
> drivers/gpu/drm/i915/i915_gem.c | 4 +++-
> drivers/gpu/drm/i915/selftests/huge_pages.c | 2 ++
> 2 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index a94d5a308c4d..b79362bbd97b 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2506,7 +2506,9 @@ static bool i915_sg_trim(struct sg_table *orig_st)
> new_sg = new_st.sgl;
> for_each_sg(orig_st->sgl, sg, orig_st->nents, i) {
> sg_set_page(new_sg, sg_page(sg), sg->length, 0);
> - /* called before being DMA mapped, no need to copy sg->dma_* */
> + sg_dma_address(new_sg) = sg_dma_address(sg);
> + sg_dma_len(new_sg) = sg_dma_len(sg);
> +
> new_sg = sg_next(new_sg);
> }
> GEM_BUG_ON(new_sg); /* Should walk exactly nents and hit the end */
> diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c
> b/drivers/gpu/drm/i915/selftests/huge_pages.c
> index e272127783fe..8d03f64eabd7 100644
> --- a/drivers/gpu/drm/i915/selftests/huge_pages.c
> +++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
> @@ -235,6 +235,8 @@ static int fake_get_huge_pages(struct drm_i915_gem_object
> *obj)
> sg = sg_next(sg);
> } while (1);
>
> + i915_sg_trim(st);
> +
> obj->mm.madv = I915_MADV_DONTNEED;
>
> __i915_gem_object_set_pages(obj, st, sg_page_sizes);
> --
> 2.17.1
>
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Re: [Intel-gfx] [PATCH 02/10] drm/i915/icl: Disable master intr early
Quoting Mika Kuoppala (2018-09-20 15:33:42) > Disable master interrupt first before reading. This > guarantees that the sample we act upon is a frozen sample > of level indications and no interrupt was missed between > reading and disabling, possibly then ending up triggering > another interrupt later. Your argument is convincing. Care to spin a series changing the other and cc Ville, so that we have both coverage of machines and experience. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 02/10] drm/i915/icl: Disable master intr early
Disable master interrupt first before reading. This
guarantees that the sample we act upon is a frozen sample
of level indications and no interrupt was missed between
reading and disabling, possibly then ending up triggering
another interrupt later.
Cc: Chris Wilson
Cc: Dhinakaran Pandiyan
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_irq.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 3d8c53bcbedb..1e05ffe16816 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3130,14 +3130,15 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
if (!intel_irqs_enabled(i915))
return IRQ_NONE;
- master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);
- master_ctl &= ~GEN11_MASTER_IRQ;
- if (!master_ctl)
- return IRQ_NONE;
-
/* Disable interrupts. */
raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, 0);
+ master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ) & ~GEN11_MASTER_IRQ;
+ if (!master_ctl) {
+ raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
+ return IRQ_NONE;
+ }
+
/* Find, clear, then process each source of interrupt. */
gen11_gt_irq_handler(i915, master_ctl);
--
2.17.1
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[Intel-gfx] [PATCH 07/10] drm/i915/icl: Make own function for display irq handler
Move display interrupt handling outside of generic handler.
Cc: Chris Wilson
Cc: Ville Syrjälä
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_irq.c | 36 -
1 file changed, 22 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index e9034d6d87b0..506cfd048dd6 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3118,6 +3118,27 @@ gen11_gu_misc_irq_handler(struct drm_i915_private
*dev_priv,
DRM_ERROR("Unexpected GU_MISC interrupt 0x%x\n", iir);
}
+static void
+gen11_display_irq_handler(struct drm_i915_private * const i915,
+ const u32 master_ctl)
+{
+ u32 disp_ctl;
+
+ if (!(master_ctl & GEN11_DISPLAY_IRQ))
+ return;
+
+ /* IRQs are synced during runtime_suspend, we don't require a wakeref */
+ disp_ctl = raw_reg_read(i915->regs, GEN11_DISPLAY_INT_CTL);
+
+ disable_rpm_wakeref_asserts(i915);
+ /*
+* GEN11_DISPLAY_INT_CTL has same format as GEN8_MASTER_IRQ
+* for the display related bits.
+*/
+ gen8_de_irq_handler(i915, disp_ctl);
+ enable_rpm_wakeref_asserts(i915);
+}
+
static inline void gen11_master_irq_enable(void __iomem * const regs)
{
raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
@@ -3144,20 +3165,7 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
/* Find, clear, then process each source of interrupt. */
gen11_gt_irq_handler(i915, master_ctl);
-
- /* IRQs are synced during runtime_suspend, we don't require a wakeref */
- if (master_ctl & GEN11_DISPLAY_IRQ) {
- const u32 disp_ctl = raw_reg_read(regs, GEN11_DISPLAY_INT_CTL);
-
- disable_rpm_wakeref_asserts(i915);
- /*
-* GEN11_DISPLAY_INT_CTL has same format as GEN8_MASTER_IRQ
-* for the display related bits.
-*/
- gen8_de_irq_handler(i915, disp_ctl);
- enable_rpm_wakeref_asserts(i915);
- }
-
+ gen11_display_irq_handler(i915, master_ctl);
gu_misc_iir = gen11_gu_misc_irq_ack(regs, master_ctl);
gen11_master_irq_enable(regs);
--
2.17.1
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Re: [Intel-gfx] [PATCH 2/2] drm/i915: pass dev_priv to i915_gem_cleanup_stolen
Quoting Matthew Auld (2018-09-20 15:27:07) > It really wants dev_priv anyway, also now matches i915_gem_init_stolen. > > Signed-off-by: Matthew Auld > Cc: Joonas Lahtinen > Cc: Tvrtko Ursulin > Reviewed-by: Tvrtko Ursulin Reviewed-by: Chris Wilson As a bonus, start feeding in s/dev_priv/i915/? -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 06/10] drm/i915/icl: Streamline guc irq handling
The returning of iir through function parameter is eyesore.
Make guc irq acking inline and return the iir directly, handling
the empty iir exception early. We can then omit passing the
master control to guc handler as the iir now contains everything
we need.
Cc: Chris Wilson
Cc: Dhinakaran Pandiyan
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_irq.c | 38 -
1 file changed, 18 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index c35576f9c3f5..e9034d6d87b0 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3088,36 +3088,34 @@ gen11_gt_irq_handler(struct drm_i915_private * const
i915,
spin_unlock(>irq_lock);
}
-static void
-gen11_gu_misc_irq_ack(struct drm_i915_private *dev_priv, const u32 master_ctl,
- u32 *iir)
+static inline u32
+gen11_gu_misc_irq_ack(void __iomem * const regs, const u32 master_ctl)
{
- void __iomem * const regs = dev_priv->regs;
+ u32 iir;
if (!(master_ctl & GEN11_GU_MISC_IRQ))
- return;
+ return 0;
+
+ iir = raw_reg_read(regs, GEN11_GU_MISC_IIR);
+ if (likely(iir))
+ raw_reg_write(regs, GEN11_GU_MISC_IIR, iir);
+ else
+ DRM_ERROR("GU_MISC iir blank!\n");
- *iir = raw_reg_read(regs, GEN11_GU_MISC_IIR);
- if (likely(*iir))
- raw_reg_write(regs, GEN11_GU_MISC_IIR, *iir);
+ return iir;
}
static void
gen11_gu_misc_irq_handler(struct drm_i915_private *dev_priv,
- const u32 master_ctl, const u32 iir)
+ const u32 iir)
{
- if (!(master_ctl & GEN11_GU_MISC_IRQ))
- return;
-
- if (unlikely(!iir)) {
- DRM_ERROR("GU_MISC iir blank!\n");
+ if (!iir)
return;
- }
if (iir & GEN11_GU_MISC_GSE)
- intel_opregion_asle_intr(dev_priv);
- else
- DRM_ERROR("Unexpected GU_MISC interrupt 0x%x\n", iir);
+ return intel_opregion_asle_intr(dev_priv);
+
+ DRM_ERROR("Unexpected GU_MISC interrupt 0x%x\n", iir);
}
static inline void gen11_master_irq_enable(void __iomem * const regs)
@@ -3160,11 +3158,11 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
enable_rpm_wakeref_asserts(i915);
}
- gen11_gu_misc_irq_ack(i915, master_ctl, _misc_iir);
+ gu_misc_iir = gen11_gu_misc_irq_ack(regs, master_ctl);
gen11_master_irq_enable(regs);
- gen11_gu_misc_irq_handler(i915, master_ctl, gu_misc_iir);
+ gen11_gu_misc_irq_handler(i915, gu_misc_iir);
return master_ctl ? IRQ_HANDLED : IRQ_NONE;
}
--
2.17.1
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[Intel-gfx] [PATCH 04/10] drm/i915/icl: Add helper to enable/disable master irq
Add static inline helpers to master irq control. Related
comments become superfluous and can be removed.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_irq.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 27395a90bbef..89d76e7f4d00 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3120,6 +3120,16 @@ gen11_gu_misc_irq_handler(struct drm_i915_private
*dev_priv,
DRM_ERROR("Unexpected GU_MISC interrupt 0x%x\n", iir);
}
+static inline void gen11_master_irq_enable(void __iomem * const regs)
+{
+ raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
+}
+
+static inline void gen11_master_irq_disable(void __iomem * const regs)
+{
+ raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, 0);
+}
+
static irqreturn_t gen11_irq_handler(int irq, void *arg)
{
struct drm_i915_private * const i915 = to_i915(arg);
@@ -3130,9 +3140,7 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
if (!intel_irqs_enabled(i915))
return IRQ_NONE;
- /* Disable interrupts. */
- raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, 0);
-
+ gen11_master_irq_disable(regs);
master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ) & ~GEN11_MASTER_IRQ;
/* Find, clear, then process each source of interrupt. */
@@ -3153,8 +3161,7 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
gen11_gu_misc_irq_ack(i915, master_ctl, _misc_iir);
- /* Enable interrupts. */
- raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
+ gen11_master_irq_enable(regs);
gen11_gu_misc_irq_handler(i915, master_ctl, gu_misc_iir);
--
2.17.1
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[Intel-gfx] [PATCH 10/10] drm/i915/icl: Only ack irq identities we did handle
If we ack the identities immediately after they have been
handled, it should unblock next interrupt accumulation
in the gathering register earlier. It also allows us to
remove time based polling of valid bit. If we don't get a valid
sample now, we will likely get a valid sample on next interrupt,
which will be generated due to skipping the ack. The downside
is that we will have as many ack writes as there were identities
handled.
Leave small retry loop for safety and with debugs to see if we
ever encounter read with valid not set.
Cc: Daniele Ceraolo Spurio
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_irq.c | 26 +++---
1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 27116e3f21af..beb9fe4abf1f 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2965,22 +2965,18 @@ gen11_gt_engine_identity(struct drm_i915_private *
const i915,
const unsigned int bank, const unsigned int bit)
{
void __iomem * const regs = i915->regs;
- u32 timeout_ts;
- u32 ident;
+ u32 ident, retry = 0;
lockdep_assert_held(>irq_lock);
raw_reg_write(regs, GEN11_IIR_REG_SELECTOR(bank), BIT(bit));
- /*
-* NB: Specs do not specify how long to spin wait,
-* so we do ~100us as an educated guess.
-*/
- timeout_ts = (local_clock() >> 10) + 100;
do {
ident = raw_reg_read(regs, GEN11_INTR_IDENTITY_REG(bank));
- } while (!(ident & GEN11_INTR_DATA_VALID) &&
-!time_after32(local_clock() >> 10, timeout_ts));
+ } while (!(ident & GEN11_INTR_DATA_VALID) && ++retry <= 10);
+
+ if (unlikely(GEM_SHOW_DEBUG() && retry))
+ WARN_ONCE(1, "INTR_IDENTITY took %u reads to settle\n", retry);
if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) {
DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
@@ -3031,9 +3027,6 @@ gen11_gt_identity_handler(struct drm_i915_private * const
i915,
const u8 instance = GEN11_INTR_ENGINE_INSTANCE(identity);
const u16 intr = GEN11_INTR_ENGINE_INTR(identity);
- if (unlikely(!intr))
- return;
-
if (class <= COPY_ENGINE_CLASS)
return gen11_engine_irq_handler(i915, class, instance, intr);
@@ -3065,11 +3058,14 @@ gen11_gt_bank_handler(struct drm_i915_private * const
i915,
const u32 ident = gen11_gt_engine_identity(i915,
bank, bit);
+ if (unlikely(!ident))
+ continue;
+
gen11_gt_identity_handler(i915, ident);
- }
- /* Clear must be after shared has been served for engine */
- raw_reg_write(regs, GEN11_GT_INTR_DW(bank), intr_dw);
+ /* Clear must be after shared has been served for engine */
+ raw_reg_write(regs, GEN11_GT_INTR_DW(bank), BIT(bit));
+ }
}
static void
--
2.17.1
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[Intel-gfx] [PATCH 01/10] drm/i915/icl: No need to ack intr through master control
All other master control register bits, except the enable, are read only and they are level indications of the second level interrupt status. Only touch enable bit and rectify the comment. Cc: Chris Wilson Cc: Dhinakaran Pandiyan Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 10f28a2ee2e6..3d8c53bcbedb 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3156,8 +3156,8 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg) gen11_gu_misc_irq_ack(i915, master_ctl, _misc_iir); - /* Acknowledge and enable interrupts. */ - raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ | master_ctl); + /* Enable interrupts. */ + raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ); gen11_gu_misc_irq_handler(i915, master_ctl, gu_misc_iir); -- 2.17.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 08/10] drm/i915/icl: Handle GT interrupts after enabling master
Don't keep master disabled while we handle the current interrupts. This should help a little on latency of generating the next interrupt. Suggested-by: Chris Wilson Cc: Chris Wilson Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_irq.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 506cfd048dd6..b4992d397c5d 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3163,13 +3163,12 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg) master_ctl = gen11_master_irq_disable(regs); - /* Find, clear, then process each source of interrupt. */ - gen11_gt_irq_handler(i915, master_ctl); gen11_display_irq_handler(i915, master_ctl); gu_misc_iir = gen11_gu_misc_irq_ack(regs, master_ctl); gen11_master_irq_enable(regs); + gen11_gt_irq_handler(i915, master_ctl); gen11_gu_misc_irq_handler(i915, gu_misc_iir); return master_ctl ? IRQ_HANDLED : IRQ_NONE; -- 2.17.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 00/10] ICL interrupt handling improvements
Hi, This series brings gen11 interrupt handling closer to what we have with previous gens. Namely the early releasing of master intr to reduce interrupt latency. Also cleanups in guc interrupts and identity selector handling are included. Code size shrinks a little: add/remove: 0/0 grow/shrink: 0/4 up/down: 0/-156 (-156) Function old new delta gen11_irq_postinstall651 623 -28 gen11_irq_reset 17111681 -30 gen11_irq_handler880 836 -44 gen11_gt_engine_identity 224 170 -54 Total: Before=1281048, After=1280892, chg -0.01% Interrupt handling latency is improved generally as measured with gem_exec_nop, the odd one in the bunch being basic-sequential which suffers almost 11%. The oddity is that the sequential, which is same test with longer timeout, showing 2% improvement. Testname diff-% basic-series -26.051 basic-parallel -24.589 basic-sequent-a 10.729 default -24.738 signal-default -11.749 render -22.221 signal-render-13.250 bsd -16.422 signal-bsd -9.931 blt -22.721 signal-blt -5.241 vebox-22.526 signal-all -4.839 series -2.249 parallel -2.747 sequential -2.137 forked-sequent-i -24.196 forked-sequent-a 2.789 chained-sequen-i -2.351 chained-sequen-a 3.262 context-sequen-i -5.904 context-sequen-a 2.128 preempt-default -3.972 preempt-render0.503 preempt-bsd -2.355 preempt-blt -1.822 preempt-vebox-2.757 poll-default 0.384 poll-render -0.753 poll-bsd 0.552 poll-blt -0.532 poll-vebox -0.867 poll-sequential 2.865 -Mika Mika Kuoppala (10): drm/i915/icl: No need to ack intr through master control drm/i915/icl: Disable master intr early drm/i915/icl: No need to early bailout on interrupt drm/i915/icl: Add helper to enable/disable master irq drm/i915/icl: Trim down posting reads on master intr control drm/i915/icl: Streamline guc irq handling drm/i915/icl: Make own function for display irq handler drm/i915/icl: Handle GT interrupts after enabling master drm/i915/icl: Handle display interrupts after enabling master drm/i915/icl: Only ack irq identities we did handle drivers/gpu/drm/i915/i915_irq.c | 134 1 file changed, 69 insertions(+), 65 deletions(-) -- 2.17.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 03/10] drm/i915/icl: No need to early bailout on interrupt
Getting interrupt without any second level indications
is unlikely. So there is no real advantage to bailout early
as all the second level handlers can handle empty master
control status.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_irq.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 1e05ffe16816..27395a90bbef 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3134,10 +3134,6 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, 0);
master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ) & ~GEN11_MASTER_IRQ;
- if (!master_ctl) {
- raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
- return IRQ_NONE;
- }
/* Find, clear, then process each source of interrupt. */
gen11_gt_irq_handler(i915, master_ctl);
@@ -3162,7 +3158,7 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
gen11_gu_misc_irq_handler(i915, master_ctl, gu_misc_iir);
- return IRQ_HANDLED;
+ return master_ctl ? IRQ_HANDLED : IRQ_NONE;
}
static void i915_reset_device(struct drm_i915_private *dev_priv,
--
2.17.1
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[Intel-gfx] [PATCH 09/10] drm/i915/icl: Handle display interrupts after enabling master
Don't keep master disabled while handling display interrupts. This should help a little with latency of generating the next interrupt. Cc: Ville Syrjälä Cc: Chris Wilson Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_irq.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index b4992d397c5d..27116e3f21af 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3162,13 +3162,11 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg) return IRQ_NONE; master_ctl = gen11_master_irq_disable(regs); - - gen11_display_irq_handler(i915, master_ctl); gu_misc_iir = gen11_gu_misc_irq_ack(regs, master_ctl); - gen11_master_irq_enable(regs); gen11_gt_irq_handler(i915, master_ctl); + gen11_display_irq_handler(i915, master_ctl); gen11_gu_misc_irq_handler(i915, gu_misc_iir); return master_ctl ? IRQ_HANDLED : IRQ_NONE; -- 2.17.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: don't assume struct page in i915_sg_trim
Quoting Matthew Auld (2018-09-20 15:27:06) > Which means we can now also put it to work in fake_get_huge_pages. > > Signed-off-by: Matthew Auld > Cc: Tvrtko Ursulin Can we take this into account for selftests/scatterlist.c? Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC] drm/i915: GEM_WARN_ON considered harmful
Ping!
Any comments here?
Main goal was to allow GEM_WARN_ON as a statement, plus also protect
uses in if statements, which there are some who I think don't expect the
branch to completely disappear.
Regards,
Tvrtko
On 07/09/2018 12:53, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
GEM_WARN_ON currently has dangerous semantics where it is completely
compiled out on !GEM_DEBUG builds. This can leave users who expect it to
be more like a WARN_ON, just without a warning in non-debug builds, in
complete ignorance.
Another gotcha with it is that it cannot be used as a statement. Which is
again different from a standard kernel WARN_ON.
This patch fixes both problems by making it behave as one would expect.
It can now be used both as an expression and as statement, and also the
condition evaluates properly in all builds - code under the conditional
will therefore not unexpectedly disappear.
To satisfy call sites which really want the code under the conditional to
completely disappear, we add GEM_DEBUG_WARN_ON and convert some of the
callers to it. This one can also be used as both expression and statement.
From the above it follows GEM_DEBUG_WARN_ON should be used in situations
where we are certain the condition will be hit during development, but at
a place in code where error can be handled to the benefit of not crashing
the machine.
GEM_WARN_ON on the other hand should be used where condition may happen in
production and we just want to distinguish the level of debugging output
emitted between the production and debug build.
Signed-off-by: Tvrtko Ursulin
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Matthew Auld
Cc: Mika Kuoppala
---
Quickly put together and compile tested only!
---
drivers/gpu/drm/i915/i915_gem.h | 4 +++-
drivers/gpu/drm/i915/i915_vma.c | 8
drivers/gpu/drm/i915/intel_engine_cs.c | 8
drivers/gpu/drm/i915/intel_lrc.c | 8
drivers/gpu/drm/i915/intel_workarounds.c | 2 +-
5 files changed, 16 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.h b/drivers/gpu/drm/i915/i915_gem.h
index 599c4f6eb1ea..b0e4b976880c 100644
--- a/drivers/gpu/drm/i915/i915_gem.h
+++ b/drivers/gpu/drm/i915/i915_gem.h
@@ -47,17 +47,19 @@ struct drm_i915_private;
#define GEM_DEBUG_DECL(var) var
#define GEM_DEBUG_EXEC(expr) expr
#define GEM_DEBUG_BUG_ON(expr) GEM_BUG_ON(expr)
+#define GEM_DEBUG_WARN_ON(expr) GEM_WARN_ON(expr)
#else
#define GEM_SHOW_DEBUG() (0)
#define GEM_BUG_ON(expr) BUILD_BUG_ON_INVALID(expr)
-#define GEM_WARN_ON(expr) (BUILD_BUG_ON_INVALID(expr), 0)
+#define GEM_WARN_ON(expr) ({ unlikely(!!(expr)); })
#define GEM_DEBUG_DECL(var)
#define GEM_DEBUG_EXEC(expr) do { } while (0)
#define GEM_DEBUG_BUG_ON(expr)
+#define GEM_DEBUG_WARN_ON(expr) ({ BUILD_BUG_ON_INVALID(expr); 0; })
#endif
#if IS_ENABLED(CONFIG_DRM_I915_TRACE_GEM)
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 31efc971a3a8..82652c3d1bed 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -305,12 +305,12 @@ int i915_vma_bind(struct i915_vma *vma, enum
i915_cache_level cache_level,
GEM_BUG_ON(!drm_mm_node_allocated(>node));
GEM_BUG_ON(vma->size > vma->node.size);
- if (GEM_WARN_ON(range_overflows(vma->node.start,
- vma->node.size,
- vma->vm->total)))
+ if (GEM_DEBUG_WARN_ON(range_overflows(vma->node.start,
+ vma->node.size,
+ vma->vm->total)))
return -ENODEV;
- if (GEM_WARN_ON(!flags))
+ if (GEM_DEBUG_WARN_ON(!flags))
return -EINVAL;
bind_flags = 0;
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c
b/drivers/gpu/drm/i915/intel_engine_cs.c
index 10cd051ba29e..8dbdb18b2668 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -273,13 +273,13 @@ intel_engine_setup(struct drm_i915_private *dev_priv,
BUILD_BUG_ON(MAX_ENGINE_CLASS >= BIT(GEN11_ENGINE_CLASS_WIDTH));
BUILD_BUG_ON(MAX_ENGINE_INSTANCE >= BIT(GEN11_ENGINE_INSTANCE_WIDTH));
- if (GEM_WARN_ON(info->class > MAX_ENGINE_CLASS))
+ if (GEM_DEBUG_WARN_ON(info->class > MAX_ENGINE_CLASS))
return -EINVAL;
- if (GEM_WARN_ON(info->instance > MAX_ENGINE_INSTANCE))
+ if (GEM_DEBUG_WARN_ON(info->instance > MAX_ENGINE_INSTANCE))
return -EINVAL;
- if (GEM_WARN_ON(dev_priv->engine_class[info->class][info->instance]))
+ if
(GEM_DEBUG_WARN_ON(dev_priv->engine_class[info->class][info->instance]))
return -EINVAL;
GEM_BUG_ON(dev_priv->engine[id]);
@@ -399,7 +399,7 @@ int intel_engines_init(struct drm_i915_private *dev_priv)
err = -EINVAL;
err_id = id;
- if (GEM_WARN_ON(!init))
+
[Intel-gfx] [PATCH 1/2] drm/i915: don't assume struct page in i915_sg_trim
Which means we can now also put it to work in fake_get_huge_pages.
Signed-off-by: Matthew Auld
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c | 4 +++-
drivers/gpu/drm/i915/selftests/huge_pages.c | 2 ++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index a94d5a308c4d..b79362bbd97b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2506,7 +2506,9 @@ static bool i915_sg_trim(struct sg_table *orig_st)
new_sg = new_st.sgl;
for_each_sg(orig_st->sgl, sg, orig_st->nents, i) {
sg_set_page(new_sg, sg_page(sg), sg->length, 0);
- /* called before being DMA mapped, no need to copy sg->dma_* */
+ sg_dma_address(new_sg) = sg_dma_address(sg);
+ sg_dma_len(new_sg) = sg_dma_len(sg);
+
new_sg = sg_next(new_sg);
}
GEM_BUG_ON(new_sg); /* Should walk exactly nents and hit the end */
diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c
b/drivers/gpu/drm/i915/selftests/huge_pages.c
index e272127783fe..8d03f64eabd7 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -235,6 +235,8 @@ static int fake_get_huge_pages(struct drm_i915_gem_object
*obj)
sg = sg_next(sg);
} while (1);
+ i915_sg_trim(st);
+
obj->mm.madv = I915_MADV_DONTNEED;
__i915_gem_object_set_pages(obj, st, sg_page_sizes);
--
2.17.1
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[Intel-gfx] [PATCH 2/2] drm/i915: pass dev_priv to i915_gem_cleanup_stolen
It really wants dev_priv anyway, also now matches i915_gem_init_stolen.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Tvrtko Ursulin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h| 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c| 2 +-
drivers/gpu/drm/i915/i915_gem_stolen.c | 4 +---
3 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7d4daa7412f1..41f1082da122 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3340,7 +3340,7 @@ int i915_gem_stolen_insert_node_in_range(struct
drm_i915_private *dev_priv,
void i915_gem_stolen_remove_node(struct drm_i915_private *dev_priv,
struct drm_mm_node *node);
int i915_gem_init_stolen(struct drm_i915_private *dev_priv);
-void i915_gem_cleanup_stolen(struct drm_device *dev);
+void i915_gem_cleanup_stolen(struct drm_i915_private *dev_priv);
struct drm_i915_gem_object *
i915_gem_object_create_stolen(struct drm_i915_private *dev_priv,
resource_size_t size);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 4877d4d582c2..56c7f8637311 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3005,7 +3005,7 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private
*dev_priv)
arch_phys_wc_del(ggtt->mtrr);
io_mapping_fini(>iomap);
- i915_gem_cleanup_stolen(_priv->drm);
+ i915_gem_cleanup_stolen(dev_priv);
}
static unsigned int gen6_get_total_gtt_size(u16 snb_gmch_ctl)
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c
b/drivers/gpu/drm/i915/i915_gem_stolen.c
index 53440bf87650..f29a7ff7c362 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -167,10 +167,8 @@ static int i915_adjust_stolen(struct drm_i915_private
*dev_priv,
return 0;
}
-void i915_gem_cleanup_stolen(struct drm_device *dev)
+void i915_gem_cleanup_stolen(struct drm_i915_private *dev_priv)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
-
if (!drm_mm_initialized(_priv->mm.stolen))
return;
--
2.17.1
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