[Intel-gfx] ✓ Fi.CI.IGT: success for HuC Update for BXT (rev2)

[Patchwork]

== Series Details ==

Series: HuC Update for BXT (rev2)
URL   : https://patchwork.freedesktop.org/series/53776/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5288_full -> Patchwork_11053_full


Summary
---

  **WARNING**

  Minor unknown changes coming with Patchwork_11053_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_11053_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_11053_full:

### IGT changes ###

 Warnings 

  * igt@pm_rc6_residency@rc6-accuracy:
- shard-apl:  PASS -> SKIP

  
Known issues


  Here are the changes found in Patchwork_11053_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@kms_busy@extended-modeset-hang-newfb-render-a:
- shard-skl:  NOTRUN -> DMESG-WARN [fdo#107956] +1

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-glk:  PASS -> FAIL [fdo#108145]

  * igt@kms_ccs@pipe-b-crc-primary-rotation-180:
- {shard-iclb}:   NOTRUN -> FAIL [fdo#107725]

  * igt@kms_chv_cursor_fail@pipe-b-256x256-bottom-edge:
- shard-skl:  NOTRUN -> FAIL [fdo#104671] +1

  * igt@kms_color@pipe-b-ctm-green-to-red:
- shard-skl:  NOTRUN -> FAIL [fdo#107201]

  * igt@kms_cursor_crc@cursor-128x128-onscreen:
- shard-skl:  NOTRUN -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-256x85-sliding:
- shard-glk:  PASS -> FAIL [fdo#103232] +1

  * igt@kms_cursor_crc@cursor-64x21-onscreen:
- shard-apl:  PASS -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-64x64-sliding:
- {shard-iclb}:   NOTRUN -> FAIL [fdo#103232] +1

  * igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-apl:  PASS -> FAIL [fdo#103191] / [fdo#103232]

  * igt@kms_draw_crc@draw-method-xrgb-pwrite-untiled:
- shard-skl:  PASS -> FAIL [fdo#108472]

  * igt@kms_draw_crc@draw-method-xrgb-render-untiled:
- shard-skl:  PASS -> FAIL [fdo#103184]

  * igt@kms_flip@flip-vs-expired-vblank:
- shard-apl:  PASS -> FAIL [fdo#102887] / [fdo#105363]

  * igt@kms_flip@modeset-vs-vblank-race:
- shard-glk:  PASS -> FAIL [fdo#103060]

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
- shard-apl:  PASS -> FAIL [fdo#103167]

  * igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-pwrite:
- shard-skl:  PASS -> FAIL [fdo#103167] / [fdo#105682]

  * igt@kms_frontbuffer_tracking@fbc-stridechange:
- shard-skl:  NOTRUN -> FAIL [fdo#105683]

  * igt@kms_frontbuffer_tracking@fbc-suspend:
- {shard-iclb}:   PASS -> INCOMPLETE [fdo#107713]

  * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-render:
- shard-skl:  PASS -> FAIL [fdo#103167] +2

  * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-wc:
- {shard-iclb}:   PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +1

  * igt@kms_plane@pixel-format-pipe-b-planes:
- shard-skl:  NOTRUN -> DMESG-WARN [fdo#106885]

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl:  PASS -> FAIL [fdo#107815] / [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-c-alpha-basic:
- shard-skl:  NOTRUN -> FAIL [fdo#107815] / [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb:
- shard-skl:  NOTRUN -> FAIL [fdo#108145] +1

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
- shard-apl:  PASS -> FAIL [fdo#103166] +2

  * igt@kms_psr@no_drrs:
- {shard-iclb}:   PASS -> FAIL [fdo#108341]

  * {igt@kms_rotation_crc@multiplane-rotation-cropping-top}:
- shard-glk:  PASS -> DMESG-WARN [fdo#105763] / [fdo#106538]

  * igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
- {shard-iclb}:   PASS -> DMESG-WARN [fdo#107724] +1

  * igt@kms_vblank@pipe-c-ts-continuation-suspend:
- shard-kbl:  PASS -> INCOMPLETE [fdo#103665]

  * igt@pm_rpm@gem-execbuf-stress:
- shard-skl:  PASS -> INCOMPLETE [fdo#107803] / [fdo#107807]

  
 Possible fixes 

  * igt@gem_eio@in-flight-suspend:
- {shard-iclb}:   INCOMPLETE [fdo#107713] -> PASS +1

  * igt@kms_busy@extended-pageflip-hang-newfb-render-a:
- shard-apl:  DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a:
- shard-kbl:  DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
- shard-glk:  DMESG-WARN [fdo#107956] -> PASS
- {shard-iclb}:   DMESG-WARN [fdo#107956] -> PASS +1

  * igt@kms_color@pipe-b-degamma:
- shard-skl:  FAIL [fdo#104782

Re: [Intel-gfx] [PATCH 5/5] drm/dp/mst: Provide better debugs for NAK replies

[Dhinakaran Pandiyan]

On Fri, 2018-12-07 at 16:57 -0800, Dhinakaran Pandiyan wrote:
> On Fri, 2018-09-28 at 21:04 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä 
> > 
> > Decode the NAK reply fields to make it easier to parse the logs.
> 
> A lot better than seeing the error codes. 
> 
> 
> 0-day's found a conflicting definition that's missing an undef. With
> that addressed, 
> Reviewed-by: Dhinakaran Pandiyan 
> > 
> > Signed-off-by: Ville Syrjälä 
> > ---
> >  drivers/gpu/drm/drm_dp_mst_topology.c | 65
> > ++-
> >  include/drm/drm_dp_helper.h   |  1 +
> >  2 files changed, 65 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
> > b/drivers/gpu/drm/drm_dp_mst_topology.c
> > index c0f754364cc7..1178c1655f9a 100644
> > --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> > +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> > @@ -66,6 +66,64 @@ static bool drm_dp_validate_guid(struct
> > drm_dp_mst_topology_mgr *mgr,
> >  static int drm_dp_mst_register_i2c_bus(struct drm_dp_aux *aux);
> >  static void drm_dp_mst_unregister_i2c_bus(struct drm_dp_aux *aux);
> >  static void drm_dp_mst_kick_tx(struct drm_dp_mst_topology_mgr
> > *mgr);
> > +
> > +#define STR(x) [DP_ ## x] = #x
> > +
> > +static const char *drm_dp_mst_req_type_str(u8 req_type)
> > +{
> > +   static const char * const req_type_str[] = {
> > +   STR(GET_MSG_TRANSACTION_VERSION),
> > +   STR(LINK_ADDRESS),
> > +   STR(CONNECTION_STATUS_NOTIFY),
> > +   STR(ENUM_PATH_RESOURCES),
> > +   STR(ALLOCATE_PAYLOAD),
> > +   STR(QUERY_PAYLOAD),
> > +   STR(RESOURCE_STATUS_NOTIFY),
> > +   STR(CLEAR_PAYLOAD_ID_TABLE),
> > +   STR(REMOTE_DPCD_READ),
> > +   STR(REMOTE_DPCD_WRITE),
> > +   STR(REMOTE_I2C_READ),
> > +   STR(REMOTE_I2C_WRITE),
> > +   STR(POWER_UP_PHY),
> > +   STR(POWER_DOWN_PHY),
> > +   STR(SINK_EVENT_NOTIFY),
> > +   STR(QUERY_STREAM_ENC_STATUS),
> > +   };
> > +
> > +   if (req_type >= ARRAY_SIZE(req_type_str) ||
> > +   !req_type_str[req_type])
> > +   return "unknown";
> > +
> > +   return req_type_str[req_type];
> > +}

drm_dp_sideband_parse_reply() could also use the decoded string.

-DK

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Re: [Intel-gfx] [PATCH 5/5] drm/dp/mst: Provide better debugs for NAK replies

[Dhinakaran Pandiyan]

On Fri, 2018-09-28 at 21:04 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> Decode the NAK reply fields to make it easier to parse the logs.
A lot better than seeing the error codes. 


0-day's found a conflicting definition that's missing an undef. With
that addressed, 
Reviewed-by: Dhinakaran Pandiyan 
> 
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/drm_dp_mst_topology.c | 65
> ++-
>  include/drm/drm_dp_helper.h   |  1 +
>  2 files changed, 65 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
> b/drivers/gpu/drm/drm_dp_mst_topology.c
> index c0f754364cc7..1178c1655f9a 100644
> --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> @@ -66,6 +66,64 @@ static bool drm_dp_validate_guid(struct
> drm_dp_mst_topology_mgr *mgr,
>  static int drm_dp_mst_register_i2c_bus(struct drm_dp_aux *aux);
>  static void drm_dp_mst_unregister_i2c_bus(struct drm_dp_aux *aux);
>  static void drm_dp_mst_kick_tx(struct drm_dp_mst_topology_mgr *mgr);
> +
> +#define STR(x) [DP_ ## x] = #x
> +
> +static const char *drm_dp_mst_req_type_str(u8 req_type)
> +{
> + static const char * const req_type_str[] = {
> + STR(GET_MSG_TRANSACTION_VERSION),
> + STR(LINK_ADDRESS),
> + STR(CONNECTION_STATUS_NOTIFY),
> + STR(ENUM_PATH_RESOURCES),
> + STR(ALLOCATE_PAYLOAD),
> + STR(QUERY_PAYLOAD),
> + STR(RESOURCE_STATUS_NOTIFY),
> + STR(CLEAR_PAYLOAD_ID_TABLE),
> + STR(REMOTE_DPCD_READ),
> + STR(REMOTE_DPCD_WRITE),
> + STR(REMOTE_I2C_READ),
> + STR(REMOTE_I2C_WRITE),
> + STR(POWER_UP_PHY),
> + STR(POWER_DOWN_PHY),
> + STR(SINK_EVENT_NOTIFY),
> + STR(QUERY_STREAM_ENC_STATUS),
> + };
> +
> + if (req_type >= ARRAY_SIZE(req_type_str) ||
> + !req_type_str[req_type])
> + return "unknown";
> +
> + return req_type_str[req_type];
> +}
> +
> +#undef STR
> +#define STR(x) [DP_NAK_ ## x] = #x
> +
> +static const char *drm_dp_mst_nak_reason_str(u8 nak_reason)
> +{
> + static const char * const nak_reason_str[] = {
> + STR(WRITE_FAILURE),
> + STR(INVALID_READ),
> + STR(CRC_FAILURE),
> + STR(BAD_PARAM),
> + STR(DEFER),
> + STR(LINK_FAILURE),
> + STR(NO_RESOURCES),
> + STR(DPCD_FAIL),
> + STR(I2C_NAK),
> + STR(ALLOCATE_FAIL),
> + };
> +
> + if (nak_reason >= ARRAY_SIZE(nak_reason_str) ||
> + !nak_reason_str[nak_reason])
> + return "unknown";
> +
> + return nak_reason_str[nak_reason];
> +}
> +
> +#undef STR
> +
>  /* sideband msg handling */
>  static u8 drm_dp_msg_header_crc4(const uint8_t *data, size_t
> num_nibbles)
>  {
> @@ -2349,7 +2407,12 @@ static int drm_dp_mst_handle_down_rep(struct
> drm_dp_mst_topology_mgr *mgr)
>  
>   drm_dp_sideband_parse_reply(&mgr->down_rep_recv,
> &txmsg->reply);
>   if (txmsg->reply.reply_type == DP_REPLY_NAK) {
> - DRM_DEBUG_KMS("Got NAK reply: req 0x%02x,
> reason 0x%02x, nak data 0x%02x\n", txmsg->reply.req_type, txmsg-
> >reply.u.nak.reason, txmsg->reply.u.nak.nak_data);
> + DRM_DEBUG_KMS("Got NAK reply: req 0x%02x (%s),
> reason 0x%02x (%s), nak data 0x%02x\n",
> +   txmsg->reply.req_type,
> +   drm_dp_mst_req_type_str(txmsg-
> >reply.req_type),
> +   txmsg->reply.u.nak.reason,
> +   drm_dp_mst_nak_reason_str(txmsg-
> >reply.u.nak.reason),
> +   txmsg->reply.u.nak.nak_data);
>   }
>  
>   memset(&mgr->down_rep_recv, 0, sizeof(struct
> drm_dp_sideband_msg_rx));
> diff --git a/include/drm/drm_dp_helper.h
> b/include/drm/drm_dp_helper.h
> index 2a0fd9d7066e..2453767246fb 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -918,6 +918,7 @@
>  #define DP_PEER_DEVICE_DP_LEGACY_CONV0x4
>  
>  /* DP 1.2 MST sideband request names DP 1.2a Table 2-80 */
> +#define DP_GET_MSG_TRANSACTION_VERSION   0x00 /* DP 1.3 */
>  #define DP_LINK_ADDRESS  0x01
>  #define DP_CONNECTION_STATUS_NOTIFY  0x02
>  #define DP_ENUM_PATH_RESOURCES   0x10

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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [01/10] dma-buf: add new dma_fence_chain container v4

[Patchwork]

== Series Details ==

Series: series starting with [01/10] dma-buf: add new dma_fence_chain container 
v4
URL   : https://patchwork.freedesktop.org/series/53758/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5287_full -> Patchwork_11051_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Known issues


  Here are the changes found in Patchwork_11051_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing:
- shard-skl:  PASS -> FAIL [fdo#107815] / [fdo#108470]

  * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
- shard-skl:  NOTRUN -> DMESG-WARN [fdo#107956]

  * igt@kms_chv_cursor_fail@pipe-a-256x256-left-edge:
- {shard-iclb}:   PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +3

  * igt@kms_cursor_crc@cursor-128x128-suspend:
- {shard-iclb}:   NOTRUN -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-256x85-offscreen:
- shard-skl:  PASS -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-64x21-onscreen:
- shard-apl:  PASS -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-apl:  PASS -> FAIL [fdo#103191] / [fdo#103232]

  * igt@kms_draw_crc@draw-method-xrgb-render-untiled:
- shard-skl:  PASS -> FAIL [fdo#103184] +1

  * igt@kms_draw_crc@draw-method-xrgb-render-ytiled:
- {shard-iclb}:   PASS -> WARN [fdo#108336] +1

  * igt@kms_flip@basic-flip-vs-wf_vblank:
- {shard-iclb}:   PASS -> DMESG-WARN [fdo#107724] +8

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-gtt:
- {shard-iclb}:   PASS -> DMESG-FAIL [fdo#107720] / [fdo#107724]

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt:
- {shard-iclb}:   PASS -> FAIL [fdo#103167]

  * igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
- shard-skl:  NOTRUN -> FAIL [fdo#105683]

  * igt@kms_panel_fitting@legacy:
- shard-skl:  NOTRUN -> FAIL [fdo#105456]

  * {igt@kms_plane@pixel-format-pipe-b-planes-source-clamping}:
- shard-apl:  PASS -> FAIL [fdo#108948]
- shard-skl:  NOTRUN -> DMESG-WARN [fdo#106885]

  * igt@kms_plane@pixel-format-pipe-c-planes:
- shard-glk:  PASS -> FAIL [fdo#103166]

  * igt@kms_plane_alpha_blend@pipe-b-alpha-transparant-fb:
- {shard-iclb}:   PASS -> DMESG-FAIL [fdo#107724] +5

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
- {shard-iclb}:   PASS -> FAIL [fdo#103166]

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
- shard-apl:  PASS -> FAIL [fdo#103166]

  * igt@kms_universal_plane@universal-plane-pipe-b-functional:
- {shard-iclb}:   PASS -> DMESG-FAIL [fdo#103166] / [fdo#107724]

  * igt@pm_rpm@pc8-residency:
- shard-skl:  SKIP -> INCOMPLETE [fdo#107807]

  * igt@pm_rpm@system-suspend:
- {shard-iclb}:   PASS -> DMESG-WARN [fdo#108654]

  * igt@pm_rpm@universal-planes:
- {shard-iclb}:   NOTRUN -> DMESG-WARN [fdo#108654] / [fdo#108756]

  * {igt@runner@aborted}:
- {shard-iclb}:   NOTRUN -> FAIL [fdo#108654] / [fdo#108756]

  
 Possible fixes 

  * igt@gem_exec_nop@basic-series:
- shard-snb:  INCOMPLETE [fdo#105411] -> PASS

  * igt@kms_busy@basic-modeset-a:
- shard-apl:  DMESG-WARN [fdo#103558] / [fdo#105602] -> PASS +8

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
- shard-glk:  DMESG-WARN [fdo#107956] -> PASS
- {shard-iclb}:   DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-glk:  FAIL [fdo#108145] -> PASS +1

  * igt@kms_color@pipe-b-ctm-green-to-red:
- shard-skl:  FAIL [fdo#107201] -> PASS

  * igt@kms_color@pipe-b-degamma:
- shard-skl:  FAIL [fdo#104782] -> PASS

  * igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions-varying-size:
- {shard-iclb}:   DMESG-WARN [fdo#107724] -> PASS +9

  * igt@kms_cursor_legacy@pipe-c-single-move:
- shard-skl:  INCOMPLETE -> PASS

  * igt@kms_draw_crc@draw-method-rgb565-render-untiled:
- {shard-iclb}:   WARN [fdo#108336] -> PASS +2

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt:
- {shard-iclb}:   DMESG-FAIL [fdo#107720] / [fdo#107724] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-suspend:
- {shard-iclb}:   DMESG-FAIL [fdo#107724] -> PASS +4
- shard-snb:  DMESG-WARN [fdo#102365] -> PASS

  * igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
- {shard-iclb}:   FAIL [fdo#105683] -> PASS

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff:
- {shard-iclb}:   FAIL [fdo#103167] -> PASS

  * igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
- {shard-iclb}:   FAIL [fdo#103166] -> PASS +1

  * igt@kms_psr@no_drrs:
- {shar

Re: [Intel-gfx] [PATCH 4/5] drm/dp/mst: Provide defines for ACK vs. NAK reply type

[Dhinakaran Pandiyan]

On Fri, 2018-09-28 at 21:04 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> Make the code a bit easier to read by providing symbolic names
> for the reply_type (ACK vs. NAK). Also clean up some brace stuff
> while at it.
> 
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/drm_dp_mst_topology.c | 26 +--
> ---
>  include/drm/drm_dp_helper.h   |  4 
>  2 files changed, 17 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
> b/drivers/gpu/drm/drm_dp_mst_topology.c
> index a0652fc166c6..c0f754364cc7 100644
> --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> @@ -567,7 +567,7 @@ static bool drm_dp_sideband_parse_reply(struct
> drm_dp_sideband_msg_rx *raw,
>   msg->reply_type = (raw->msg[0] & 0x80) >> 7;
>   msg->req_type = (raw->msg[0] & 0x7f);
>  
> - if (msg->reply_type) {
> + if (msg->reply_type == DP_REPLY_NAK) {
>   memcpy(msg->u.nak.guid, &raw->msg[1], 16);
>   msg->u.nak.reason = raw->msg[17];
>   msg->u.nak.nak_data = raw->msg[18];
> @@ -1614,9 +1614,9 @@ static void drm_dp_send_link_address(struct
> drm_dp_mst_topology_mgr *mgr,
>   if (ret > 0) {
>   int i;
>  
> - if (txmsg->reply.reply_type == 1)
> + if (txmsg->reply.reply_type == DP_REPLY_NAK) {
>   DRM_DEBUG_KMS("link address nak received\n");
> - else {
> + } else {
>   DRM_DEBUG_KMS("link address reply: %d\n",
> txmsg->reply.u.link_addr.nports);
>   for (i = 0; i < txmsg-
> >reply.u.link_addr.nports; i++) {
>   DRM_DEBUG_KMS("port %d: input %d, pdt:
> %d, pn: %d, dpcd_rev: %02x, mcs: %d, ddps: %d, ldps %d, sdp %d/%d\n",
> i,
> @@ -1665,9 +1665,9 @@ static int
> drm_dp_send_enum_path_resources(struct drm_dp_mst_topology_mgr *mgr,
>  
>   ret = drm_dp_mst_wait_tx_reply(mstb, txmsg);
>   if (ret > 0) {
> - if (txmsg->reply.reply_type == 1)
> + if (txmsg->reply.reply_type == DP_REPLY_NAK) {
>   DRM_DEBUG_KMS("enum path resources nak
> received\n");
> - else {
> + } else {
>   if (port->port_num != txmsg-
> >reply.u.path_resources.port_number)
>   DRM_ERROR("got incorrect port in
> response\n");
>   DRM_DEBUG_KMS("enum path resources %d: %d
> %d\n", txmsg->reply.u.path_resources.port_number, txmsg-
> >reply.u.path_resources.full_payload_bw_number,
> @@ -1755,9 +1755,9 @@ static int drm_dp_payload_send_msg(struct
> drm_dp_mst_topology_mgr *mgr,
>  
>   ret = drm_dp_mst_wait_tx_reply(mstb, txmsg);
>   if (ret > 0) {
> - if (txmsg->reply.reply_type == 1) {
> + if (txmsg->reply.reply_type == DP_REPLY_NAK)
>   ret = -EINVAL;
> - } else
> + else
>   ret = 0;
>   }
>   kfree(txmsg);
> @@ -1789,7 +1789,7 @@ int drm_dp_send_power_updown_phy(struct
> drm_dp_mst_topology_mgr *mgr,
>  
>   ret = drm_dp_mst_wait_tx_reply(port->parent, txmsg);
>   if (ret > 0) {
> - if (txmsg->reply.reply_type == 1)
> + if (txmsg->reply.reply_type == DP_REPLY_NAK)
>   ret = -EINVAL;
>   else
>   ret = 0;
> @@ -2026,9 +2026,9 @@ static int drm_dp_send_dpcd_write(struct
> drm_dp_mst_topology_mgr *mgr,
>  
>   ret = drm_dp_mst_wait_tx_reply(mstb, txmsg);
>   if (ret > 0) {
> - if (txmsg->reply.reply_type == 1) {
> + if (txmsg->reply.reply_type == DP_REPLY_NAK)
>   ret = -EINVAL;
> - } else
> + else
>   ret = 0;
>   }
>   kfree(txmsg);
> @@ -2041,7 +2041,7 @@ static int drm_dp_encode_up_ack_reply(struct
> drm_dp_sideband_msg_tx *msg, u8 req
>  {
>   struct drm_dp_sideband_msg_reply_body reply;
>  
> - reply.reply_type = 0;
> + reply.reply_type = DP_REPLY_ACK;
>   reply.req_type = req_type;
>   drm_dp_encode_sideband_reply(&reply, msg);
>   return 0;
> @@ -2348,7 +2348,7 @@ static int drm_dp_mst_handle_down_rep(struct
> drm_dp_mst_topology_mgr *mgr)
>   }
>  
>   drm_dp_sideband_parse_reply(&mgr->down_rep_recv,
> &txmsg->reply);
> - if (txmsg->reply.reply_type == 1) {
> + if (txmsg->reply.reply_type == DP_REPLY_NAK) {
>   DRM_DEBUG_KMS("Got NAK reply: req 0x%02x,
> reason 0x%02x, nak data 0x%02x\n", txmsg->reply.req_type, txmsg-
> >reply.u.nak.reason, txmsg->reply.u.nak.nak_data);
>   }
>  
> @@ -3306,7 +3306,7 @@ static int drm_dp_mst_i2c_xfer(struct
> i2c_adapter *adapter, struct i2c_msg *msgs
>   ret = drm_dp_mst_wait_tx_reply(mstb, txmsg);
>   if (ret > 0) {
>  
> - if (txmsg->reply.reply_type == 1) { /* got a 

[Intel-gfx] ✓ Fi.CI.IGT: success for igt: add timeline test cases (rev3)

[Patchwork]

== Series Details ==

Series: igt: add timeline test cases (rev3)
URL   : https://patchwork.freedesktop.org/series/53743/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5287_full -> IGTPW_2138_full


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/53743/revisions/3/mbox/

Known issues


  Here are the changes found in IGTPW_2138_full that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_fence@basic-await-default:
- shard-hsw:  PASS -> FAIL [fdo#10]

  * igt@kms_color@pipe-c-legacy-gamma:
- shard-apl:  PASS -> FAIL [fdo#104782]

  * igt@kms_cursor_crc@cursor-256x256-dpms:
- shard-glk:  PASS -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-kbl:  PASS -> FAIL [fdo#103191] / [fdo#103232] +1

  * igt@kms_cursor_crc@cursor-64x64-sliding:
- shard-apl:  PASS -> FAIL [fdo#103232] +2
- shard-kbl:  PASS -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-apl:  PASS -> FAIL [fdo#103191] / [fdo#103232] +1

  * igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-glk:  PASS -> FAIL [fdo#105363]

  * igt@kms_flip@dpms-vs-vblank-race-interruptible:
- shard-hsw:  PASS -> FAIL [fdo#103060]

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
- shard-apl:  PASS -> FAIL [fdo#103167] +4

  * igt@kms_frontbuffer_tracking@fbc-1p-rte:
- shard-apl:  PASS -> FAIL [fdo#103167] / [fdo#105682]

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move:
- shard-glk:  PASS -> FAIL [fdo#103167] +7

  * igt@kms_plane@plane-position-covered-pipe-b-planes:
- shard-glk:  PASS -> FAIL [fdo#103166] +1

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
- shard-glk:  PASS -> FAIL [fdo#108145]

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
- shard-apl:  PASS -> FAIL [fdo#103166] +2
- shard-kbl:  PASS -> FAIL [fdo#103166] +1

  * igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend:
- shard-kbl:  PASS -> INCOMPLETE [fdo#103665]

  
 Possible fixes 

  * igt@gem_exec_nop@basic-series:
- shard-snb:  INCOMPLETE [fdo#105411] -> PASS

  * igt@kms_busy@basic-modeset-a:
- shard-apl:  DMESG-WARN [fdo#103558] / [fdo#105602] -> PASS +7

  * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c:
- shard-hsw:  DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
- shard-apl:  DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
- shard-glk:  FAIL [fdo#108145] -> PASS

  * igt@kms_cursor_crc@cursor-128x42-sliding:
- shard-apl:  FAIL [fdo#103232] -> PASS +2

  * igt@kms_cursor_crc@cursor-256x85-sliding:
- shard-glk:  FAIL [fdo#103232] -> PASS +2

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-apl:  FAIL [fdo#103167] -> PASS +1
- shard-kbl:  FAIL [fdo#103167] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite:
- shard-glk:  FAIL [fdo#103167] -> PASS +1

  * igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-snb:  DMESG-WARN [fdo#102365] -> PASS

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
- shard-apl:  FAIL [fdo#103166] -> PASS +1
- shard-kbl:  FAIL [fdo#103166] -> PASS

  * igt@kms_vblank@pipe-c-ts-continuation-suspend:
- shard-kbl:  INCOMPLETE [fdo#103665] -> PASS

  
 Warnings 

  * igt@i915_suspend@shrink:
- shard-snb:  DMESG-WARN [fdo#108784] -> INCOMPLETE [fdo#105411] / 
[fdo#106886]
- shard-hsw:  DMESG-WARN [fdo#108784] -> INCOMPLETE [fdo#103540] / 
[fdo#106886]

  * igt@kms_plane@plane-position-covered-pipe-b-planes:
- shard-apl:  DMESG-WARN [fdo#103558] / [fdo#105602] -> FAIL 
[fdo#103166]

  
  [fdo#102365]: https://bugs.freedesktop.org/show_bug.cgi?id=102365
  [fdo#103060]: https://bugs.freedesktop.org/show_bug.cgi?id=103060
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
  [fdo#105602]: https:/

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Flush GPU relocs harder for gen3

[Patchwork]

== Series Details ==

Series: drm/i915: Flush GPU relocs harder for gen3
URL   : https://patchwork.freedesktop.org/series/53751/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5287_full -> Patchwork_11050_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Known issues


  Here are the changes found in Patchwork_11050_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing:
- shard-skl:  PASS -> FAIL [fdo#107815] / [fdo#108470]

  * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
- shard-skl:  NOTRUN -> DMESG-WARN [fdo#107956] +1

  * igt@kms_chv_cursor_fail@pipe-c-128x128-left-edge:
- shard-skl:  NOTRUN -> FAIL [fdo#104671]

  * igt@kms_cursor_crc@cursor-128x128-onscreen:
- shard-skl:  NOTRUN -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-128x128-random:
- shard-glk:  PASS -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-128x128-suspend:
- shard-skl:  NOTRUN -> INCOMPLETE [fdo#104108]
- {shard-iclb}:   NOTRUN -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-256x85-offscreen:
- shard-skl:  PASS -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-64x21-onscreen:
- shard-apl:  PASS -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-apl:  PASS -> FAIL [fdo#103191] / [fdo#103232]

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk:  PASS -> FAIL [fdo#105363]

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move:
- shard-glk:  PASS -> FAIL [fdo#103167]

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt:
- {shard-iclb}:   PASS -> FAIL [fdo#103167] +2

  * igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
- shard-skl:  NOTRUN -> FAIL [fdo#105683]

  * igt@kms_panel_fitting@legacy:
- shard-skl:  NOTRUN -> FAIL [fdo#105456]

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- {shard-iclb}:   PASS -> INCOMPLETE [fdo#107713]

  * {igt@kms_plane@pixel-format-pipe-b-planes-source-clamping}:
- shard-skl:  NOTRUN -> DMESG-WARN [fdo#106885]

  * igt@kms_plane@pixel-format-pipe-c-planes:
- shard-glk:  PASS -> FAIL [fdo#103166]

  * {igt@kms_plane@pixel-format-pipe-c-planes-source-clamping}:
- shard-apl:  PASS -> FAIL [fdo#108948]

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
- shard-glk:  PASS -> FAIL [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl:  NOTRUN -> FAIL [fdo#108145] +1

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
- shard-apl:  PASS -> FAIL [fdo#103166]

  * {igt@kms_rotation_crc@multiplane-rotation-cropping-top}:
- shard-kbl:  PASS -> DMESG-FAIL [fdo#108950]

  * igt@perf@blocking:
- shard-hsw:  PASS -> FAIL [fdo#102252]

  * igt@pm_rpm@gem-pread:
- shard-skl:  PASS -> INCOMPLETE [fdo#107807]

  * igt@pm_rpm@modeset-lpsp-stress:
- {shard-iclb}:   PASS -> DMESG-WARN [fdo#108654]

  * igt@pm_rpm@modeset-lpsp-stress-no-wait:
- {shard-iclb}:   PASS -> DMESG-WARN [fdo#107724]

  * {igt@runner@aborted}:
- {shard-iclb}:   NOTRUN -> FAIL [fdo#108654]

  
 Possible fixes 

  * igt@gem_exec_nop@basic-series:
- shard-snb:  INCOMPLETE [fdo#105411] -> PASS

  * igt@kms_busy@basic-modeset-a:
- shard-apl:  DMESG-WARN [fdo#103558] / [fdo#105602] -> PASS +8

  * igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions-varying-size:
- {shard-iclb}:   DMESG-WARN [fdo#107724] -> PASS +13

  * igt@kms_cursor_legacy@pipe-c-single-move:
- shard-skl:  INCOMPLETE -> PASS

  * igt@kms_draw_crc@draw-method-rgb565-render-untiled:
- {shard-iclb}:   WARN [fdo#108336] -> PASS +3

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt:
- {shard-iclb}:   DMESG-FAIL [fdo#107720] / [fdo#107724] -> PASS +1

  * igt@kms_frontbuffer_tracking@fbc-suspend:
- {shard-iclb}:   DMESG-FAIL [fdo#107724] -> PASS +4
- shard-snb:  DMESG-WARN [fdo#102365] -> PASS

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-apl:  FAIL [fdo#108145] -> PASS

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
- shard-glk:  FAIL [fdo#108145] -> PASS +2

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl:  FAIL [fdo#107815] -> PASS

  * igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
- {shard-iclb}:   FAIL [fdo#103166] -> PASS +1

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
- shard-glk:  FAIL [fdo#103166] -> PASS

  * igt@kms_rotation_crc@sprite-rotation-180:
- {shard-iclb}:   DMESG-WARN [fdo#107724] / [fdo#108336] -> PASS 

Re: [Intel-gfx] [PATCH 2/5] drm/dp/mst: Validate REMOTE_I2C_READ harder

[Dhinakaran Pandiyan]

On Fri, 2018-09-28 at 21:04 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> Make sure i2c msgs we're asked to transfer conform to the
> requirements of REMOTE_I2C_READ. We were only checking that the
> last message is a read, but we must also check that the preceding
> messages are all writes. Also check that the length of each
> message isn't too long.

Right, the syntax for i2c_remote_read allows only 8 bits for length.
Reviewed-by: Dhinakaran Pandiyan 


> 
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/drm_dp_mst_topology.c | 25 ++---
>  1 file changed, 18 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
> b/drivers/gpu/drm/drm_dp_mst_topology.c
> index 3b400eab18a2..a0652fc166c6 100644
> --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> @@ -3239,6 +3239,23 @@ void drm_dp_mst_topology_mgr_destroy(struct
> drm_dp_mst_topology_mgr *mgr)
>  }
>  EXPORT_SYMBOL(drm_dp_mst_topology_mgr_destroy);
>  
> +static bool remote_i2c_read_ok(const struct i2c_msg msgs[], int num)
> +{
> + int i;
> +
> + if (num - 1 > DP_REMOTE_I2C_READ_MAX_TRANSACTIONS)
> + return false;
> +
> + for (i = 0; i < num - 1; i++) {
> + if (msgs[i].flags & I2C_M_RD ||
> + msgs[i].len > 0xff)
> + return false;
> + }
> +
> + return msgs[num - 1].flags & I2C_M_RD &&
> + msgs[num - 1].len <= 0xff;
> +}
> +
>  /* I2C device */
>  static int drm_dp_mst_i2c_xfer(struct i2c_adapter *adapter, struct
> i2c_msg *msgs,
>  int num)
> @@ -3248,7 +3265,6 @@ static int drm_dp_mst_i2c_xfer(struct
> i2c_adapter *adapter, struct i2c_msg *msgs
>   struct drm_dp_mst_branch *mstb;
>   struct drm_dp_mst_topology_mgr *mgr = port->mgr;
>   unsigned int i;
> - bool reading = false;
>   struct drm_dp_sideband_msg_req_body msg;
>   struct drm_dp_sideband_msg_tx *txmsg = NULL;
>   int ret;
> @@ -3257,12 +3273,7 @@ static int drm_dp_mst_i2c_xfer(struct
> i2c_adapter *adapter, struct i2c_msg *msgs
>   if (!mstb)
>   return -EREMOTEIO;
>  
> - /* construct i2c msg */
> - /* see if last msg is a read */
> - if (msgs[num - 1].flags & I2C_M_RD)
> - reading = true;
> -
> - if (!reading || (num - 1 >
> DP_REMOTE_I2C_READ_MAX_TRANSACTIONS)) {
> + if (!remote_i2c_read_ok(msgs, num)) {
>   DRM_DEBUG_KMS("Unsupported I2C transaction for MST
> device\n");
>   ret = -EIO;
>   goto out;

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Re: [Intel-gfx] [PATCH 1/5] drm/dp/mst: Configure no_stop_bit correctly for remote i2c xfers

[Dhinakaran Pandiyan]

On Fri, 2018-12-07 at 12:45 -0800, Dhinakaran Pandiyan wrote:
> On Fri, 2018-09-28 at 21:03 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä 
> > 
> > We aren't supposed to force a stop+start between every i2c msg
> > when performing multi message transfers. This should eg. cause
> > the DDC segment address to be reset back to 0 between writing
> > the segment address and reading the actual EDID extension block.
> > 
> > To quote the E-DDC spec:
> > "... this standard requires that the segment pointer be
> >  reset to 00h when a NO ACK or a STOP condition is received."
> 
> Related question, do you know why the segment and ddc addresses are
> defined as 0x30 and 0x50? The E-DDC spec says they should be at 0x60
> and 0xA0/0xA1.
> 
> > 
> > Since we're going to touch this might as well consult the
> > I2C_M_STOP flag to determine whether we want to force the stop
> > or not.
> 
> Reviewing this took a lot of spec reading than I expected.
> 
> Setting the no_stop_bit after writing the segment address makes
> sense.
> I have one concern though. drm_do_probe_ddc_edid does not make use of
> the I2C_M_STOP flag, which in turn means we won't reset the
> no_stop_bit
> at the end of edid read. Pass the i2c stop flag from the caller?
> 
Never mind, the no_stop_bit is relevant only between i2c writes.
Reviewed-by: Dhinakaran Pandiyan 

> 
> > 
> > Cc: Brian Vincent 
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=108081
> > Signed-off-by: Ville Syrjälä 
> > ---
> >  drivers/gpu/drm/drm_dp_mst_topology.c | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
> > b/drivers/gpu/drm/drm_dp_mst_topology.c
> > index 5ff1d79b86c4..3b400eab18a2 100644
> > --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> > +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> > @@ -3276,6 +3276,7 @@ static int drm_dp_mst_i2c_xfer(struct
> > i2c_adapter *adapter, struct i2c_msg *msgs
> > msg.u.i2c_read.transactions[i].i2c_dev_id =
> > msgs[i].addr;
> > msg.u.i2c_read.transactions[i].num_bytes = msgs[i].len;
> > msg.u.i2c_read.transactions[i].bytes = msgs[i].buf;
> > +   msg.u.i2c_read.transactions[i].no_stop_bit =
> > !(msgs[i].flags & I2C_M_STOP);
> > }
> > msg.u.i2c_read.read_i2c_device_id = msgs[num - 1].addr;
> > msg.u.i2c_read.num_bytes_read = msgs[num - 1].len;

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[Intel-gfx] linux-firmware PR for BXT HUC

[Srivatsa, Anusha]

Hi Josh, Kyle, Ben,

Kindly add the below i915 changes to linux-firmware.git-

The following changes since commit 1baa34868b2c0a004dc595b20678145e3fff83e7:

  Merge branch 'nxp_mc' of https://github.com/NXP/linux-firmware (2018-10-26 
08:13:19 -0400)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-firmware BXT_HUC

for you to fetch changes up to 69f153bbc2c44eb581c1f8c7cecd4d878e4e727a:

  firmware/huc/bxt: Add huC Update for BXT (2018-11-28 10:33:57 -0800)


Anusha Srivatsa (1):
  firmware/huc/bxt: Add huC Update for BXT

 WHENCE|   3 +++
 i915/bxt_huc_ver01_8_2893.bin | Bin 0 -> 146880 bytes
 2 files changed, 3 insertions(+)
 create mode 100644 i915/bxt_huc_ver01_8_2893.bin

Thanks,
Anusha
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Re: [Intel-gfx] [PATCH v3 2/3] drm/i915: replace IS_GEN with IS_GEN(..., N)

[Lucas De Marchi]

On Fri, Dec 07, 2018 at 11:30:28AM +, Tvrtko Ursulin wrote:
> 
> On 07/12/2018 01:17, Lucas De Marchi wrote:
> > On Thu, Dec 6, 2018 at 4:37 AM Tvrtko Ursulin
> >  wrote:
> > > 
> > > 
> > > On 06/12/2018 06:11, Lucas De Marchi wrote:
> > > > Define IS_GEN() similarly to our IS_GEN_RANGE(). but use gen instead of
> > > > gen_mask to do the comparison. Now callers can pass then gen as a 
> > > > parameter,
> > > 
> > > Since you are calling it out here, I assume there is some good reason to
> > > replace gen_mask with gen?
> > 
> > Because in this version we don't have the commit removing gen from the
> > device info.
> 
> You had that? Totally don't remember.. what was the goal of that?

Derive the same info from mask. gen = ffs(gen_mask) + 1, or something
like that.

Checking again I had actually removed only the macro INTEL_GEN, not the
struct member. Probably because we use that than I thought we would.

> 
> > Checking gen instead of gen_mask is both simpler and generates smaller
> > code (although
> > the difference is negligible, ~100 bytes)
> 
> Ok fair, and easy enough to change back once per SKU work rekindles.

why would you need to change it back for per-SKU work? The compiler
won't do anything smarter because of using the bitfield (provided this
series is applied, which already merges IS_GEN8() || IS_GEN9() and the
like).


Lucas De Marchi

> 
> Back to the point, for this particular rename, I don't see the big
> attractiveness on it's own so I defer to comments from others.
> 
> Regards,
> 
> Tvrtko
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Re: [Intel-gfx] [PATCH 1/5] drm/dp/mst: Configure no_stop_bit correctly for remote i2c xfers

[Dhinakaran Pandiyan]

On Fri, 2018-09-28 at 21:03 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> We aren't supposed to force a stop+start between every i2c msg
> when performing multi message transfers. This should eg. cause
> the DDC segment address to be reset back to 0 between writing
> the segment address and reading the actual EDID extension block.
> 
> To quote the E-DDC spec:
> "... this standard requires that the segment pointer be
>  reset to 00h when a NO ACK or a STOP condition is received."
Related question, do you know why the segment and ddc addresses are
defined as 0x30 and 0x50? The E-DDC spec says they should be at 0x60
and 0xA0/0xA1.

> 
> Since we're going to touch this might as well consult the
> I2C_M_STOP flag to determine whether we want to force the stop
> or not.
Reviewing this took a lot of spec reading than I expected.

Setting the no_stop_bit after writing the segment address makes sense.
I have one concern though. drm_do_probe_ddc_edid does not make use of
the I2C_M_STOP flag, which in turn means we won't reset the no_stop_bit
at the end of edid read. Pass the i2c stop flag from the caller?


> 
> Cc: Brian Vincent 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=108081
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/drm_dp_mst_topology.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
> b/drivers/gpu/drm/drm_dp_mst_topology.c
> index 5ff1d79b86c4..3b400eab18a2 100644
> --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> @@ -3276,6 +3276,7 @@ static int drm_dp_mst_i2c_xfer(struct
> i2c_adapter *adapter, struct i2c_msg *msgs
>   msg.u.i2c_read.transactions[i].i2c_dev_id =
> msgs[i].addr;
>   msg.u.i2c_read.transactions[i].num_bytes = msgs[i].len;
>   msg.u.i2c_read.transactions[i].bytes = msgs[i].buf;
> + msg.u.i2c_read.transactions[i].no_stop_bit =
> !(msgs[i].flags & I2C_M_STOP);
>   }
>   msg.u.i2c_read.read_i2c_device_id = msgs[num - 1].addr;
>   msg.u.i2c_read.num_bytes_read = msgs[num - 1].len;

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[Intel-gfx] ✓ Fi.CI.BAT: success for HuC Update for BXT (rev2)

[Patchwork]

== Series Details ==

Series: HuC Update for BXT (rev2)
URL   : https://patchwork.freedesktop.org/series/53776/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5288 -> Patchwork_11053


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/53776/revisions/2/mbox/

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_11053:

### IGT changes ###

 Warnings 

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c:
- {fi-kbl-7567u}: SKIP -> PASS +33

  
Known issues


  Here are the changes found in Patchwork_11053 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_create@basic-files:
- fi-bsw-kefka:   PASS -> DMESG-FAIL [fdo#108656]

  * igt@i915_module_load@reload:
- fi-blb-e6850:   PASS -> INCOMPLETE [fdo#107718]

  * {igt@runner@aborted}:
- fi-bsw-kefka:   NOTRUN -> FAIL [fdo#108656]

  
 Possible fixes 

  * igt@i915_module_load@reload-with-fault-injection:
- {fi-kbl-7567u}: DMESG-WARN [fdo#105602] / [fdo#108529] -> PASS +1

  * igt@i915_selftest@live_contexts:
- fi-bsw-n3050:   DMESG-FAIL [fdo#108656] -> PASS

  * igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy:   DMESG-WARN [fdo#102614] -> PASS

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
- fi-cfl-8109u:   INCOMPLETE [fdo#106070] / [fdo#108126] -> PASS

  * igt@pm_rpm@module-reload:
- {fi-kbl-7567u}: DMESG-WARN [fdo#108529] -> PASS

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
  [fdo#106070]: https://bugs.freedesktop.org/show_bug.cgi?id=106070
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#108126]: https://bugs.freedesktop.org/show_bug.cgi?id=108126
  [fdo#108529]: https://bugs.freedesktop.org/show_bug.cgi?id=108529
  [fdo#108656]: https://bugs.freedesktop.org/show_bug.cgi?id=108656


Participating hosts (50 -> 44)
--

  Missing(6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-ctg-p8600 


Build changes
-

* Linux: CI_DRM_5288 -> Patchwork_11053

  CI_DRM_5288: cf6669d4c0e52b024d8aea90fbe2c80841e67e59 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4743: edb2db2cf2b6665d7ba3fa9117263302f6307a4f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_11053: 19692ff6e9fca3f5771de8f308fab00b412d66d7 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

19692ff6e9fc HAX Enable HuC testing without GuC submission
e4c10064cd1a drm/i915/huc: Update the HuC version for BXT

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11053/
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Skip the ERR_PTR error state (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Skip the ERR_PTR error state (rev2)
URL   : https://patchwork.freedesktop.org/series/53732/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5282_full -> Patchwork_11047_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Known issues


  Here are the changes found in Patchwork_11047_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_schedule@pi-ringfull-render:
- shard-glk:  NOTRUN -> FAIL [fdo#103158]

  * igt@gem_ppgtt@blt-vs-render-ctxn:
- shard-skl:  NOTRUN -> TIMEOUT [fdo#108039]

  * igt@gem_userptr_blits@readonly-unsync:
- shard-kbl:  PASS -> TIMEOUT [fdo#108887]

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-glk:  PASS -> FAIL [fdo#108145]

  * igt@kms_chv_cursor_fail@pipe-c-128x128-left-edge:
- shard-skl:  NOTRUN -> FAIL [fdo#104671]

  * igt@kms_cursor_crc@cursor-128x128-onscreen:
- shard-skl:  NOTRUN -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-256x85-sliding:
- shard-glk:  PASS -> FAIL [fdo#103232] +1

  * igt@kms_draw_crc@draw-method-xrgb-pwrite-untiled:
- shard-skl:  PASS -> FAIL [fdo#108472]

  * igt@kms_draw_crc@draw-method-xrgb-render-untiled:
- shard-skl:  NOTRUN -> FAIL [fdo#103184]

  * igt@kms_flip@flip-vs-expired-vblank:
- shard-skl:  NOTRUN -> FAIL [fdo#105363]

  * igt@kms_flip@modeset-vs-vblank-race-interruptible:
- shard-hsw:  PASS -> DMESG-WARN [fdo#102614]

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-skl:  NOTRUN -> FAIL [fdo#103167] +1

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu:
- shard-skl:  NOTRUN -> FAIL [fdo#105682]

  * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-wc:
- {shard-iclb}:   PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +1

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc:
- {shard-iclb}:   PASS -> FAIL [fdo#103167]

  * igt@kms_plane@pixel-format-pipe-a-planes:
- shard-skl:  NOTRUN -> FAIL [fdo#103166]

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-skl:  NOTRUN -> FAIL [fdo#108145] +4

  * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
- shard-skl:  NOTRUN -> FAIL [fdo#107815] / [fdo#108145]

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
- shard-skl:  NOTRUN -> FAIL [fdo#103166] / [fdo#107815]

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
- {shard-iclb}:   PASS -> FAIL [fdo#103166]

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
- shard-apl:  PASS -> FAIL [fdo#103166]

  * igt@kms_rmfb@rmfb-ioctl:
- {shard-iclb}:   PASS -> DMESG-WARN [fdo#107724] +3

  * {igt@kms_rotation_crc@multiplane-rotation-cropping-top}:
- shard-glk:  PASS -> DMESG-FAIL [fdo#105763] / [fdo#106538]

  * igt@pm_rpm@debugfs-read:
- {shard-iclb}:   PASS -> DMESG-WARN [fdo#108654]

  * igt@pm_rpm@gem-execbuf-stress:
- shard-skl:  PASS -> INCOMPLETE [fdo#107803] / [fdo#107807]

  
 Possible fixes 

  * igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing:
- shard-skl:  FAIL [fdo#107815] / [fdo#108470] -> PASS

  * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a:
- shard-skl:  DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
- shard-glk:  DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_cursor_crc@cursor-256x85-offscreen:
- shard-skl:  FAIL [fdo#103232] -> PASS

  * igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-glk:  FAIL [fdo#103232] -> PASS +1

  * igt@kms_flip@flip-vs-expired-vblank:
- {shard-iclb}:   FAIL [fdo#105363] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-apl:  FAIL [fdo#103167] -> PASS

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
- {shard-iclb}:   FAIL [fdo#103167] -> PASS +3

  * {igt@kms_plane@pixel-format-pipe-c-planes-source-clamping}:
- shard-apl:  FAIL [fdo#108948] -> PASS

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
- shard-glk:  FAIL [fdo#108145] -> PASS +1

  * igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
- {shard-iclb}:   FAIL [fdo#103166] -> PASS

  * {igt@kms_rotation_crc@multiplane-rotation-cropping-top}:
- shard-kbl:  DMESG-FAIL [fdo#108950] -> PASS

  * igt@perf@polling:
- shard-hsw:  FAIL [fdo#102252] -> PASS

  * igt@pm_rpm@debugfs-forcewake-user:
- shard-skl:  INCOMPLETE [fdo#107807] -> PASS

  * igt@pm_rpm@dpms-non-lpsp:
- shard-skl:  INCOMPLETE [fdo#107807] -> SKIP

  * igt@pm_rpm@gem-mmap-gtt:
- {shard-iclb}:

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Remove dead update_wm_pre assignment from SKL wm code

[Ville Syrjälä]

On Thu, Nov 29, 2018 at 10:30:37PM -0800, Rodrigo Vivi wrote:
> On Tue, Nov 13, 2018 at 07:23:30PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä 
> > 
> > SKL+ do not use crtc_state->update_wm_pre, so there is absolutely no
> > point it setting it. crtc_state->update_wm_pre only exists as a
> > temporary hack for pre-g4x platforms until we redo their
> > watermarks to be be atomic.
> > 
> > Cc: Stanislav Lisovskiy 
> > Signed-off-by: Ville Syrjälä 
> 
> Reviewed-by: Rodrigo Vivi 

Thanks. Series pushed.

> 
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 6 --
> >  1 file changed, 6 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c 
> > b/drivers/gpu/drm/i915/intel_pm.c
> > index 5d823bdc63a9..9801412062cc 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -5473,12 +5473,6 @@ skl_compute_wm(struct drm_atomic_state *state)
> >  
> > if (changed)
> > results->dirty_pipes |= drm_crtc_mask(crtc);
> > -
> > -   if ((results->dirty_pipes & drm_crtc_mask(crtc)) == 0)
> > -   /* This pipe's WM's did not change */
> > -   continue;
> > -
> > -   intel_cstate->update_wm_pre = true;
> > }
> >  
> > skl_print_wm_changes(state);
> > -- 
> > 2.18.1
> > 
> > ___
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Intel
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[Intel-gfx] [PATCH 2/2] HAX Enable HuC testing without GuC submission

[Anusha]

From: Michal Wajdeczko 

This will let the driver decide where GuC can be used

Signed-off-by: Michal Wajdeczko 
---
 drivers/gpu/drm/i915/i915_params.h | 2 +-
 drivers/gpu/drm/i915/intel_uc.c| 3 +++
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_params.h 
b/drivers/gpu/drm/i915/i915_params.h
index 7e56c516c815..c681537bcb92 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -45,7 +45,7 @@ struct drm_printer;
param(int, disable_power_well, -1) \
param(int, enable_ips, 1) \
param(int, invert_brightness, 0) \
-   param(int, enable_guc, 0) \
+   param(int, enable_guc, -1) \
param(int, guc_log_level, -1) \
param(char *, guc_firmware_path, NULL) \
param(char *, huc_firmware_path, NULL) \
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index b34c318b238d..4cc42e0645f3 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -64,6 +64,9 @@ static int __get_platform_enable_guc(struct drm_i915_private 
*i915)
 
/* Any platform specific fine-tuning can be done here */
 
+   /* HAX: Do not enable GuC submission in auto mode */
+   enable_guc &= ~ENABLE_GUC_SUBMISSION;
+
return enable_guc;
 }
 
-- 
2.19.2

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[Intel-gfx] [PATCH 0/2] HuC Update for BXT

[Anusha]

The following changes since commit 1baa34868b2c0a004dc595b20678145e3fff83e7:

  Merge branch 'nxp_mc' of https://github.com/NXP/linux-firmware (2018-10-26 
08:13:19 -0400)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-firmware BXT_HUC

for you to fetch changes up to 69f153bbc2c44eb581c1f8c7cecd4d878e4e727a:

  firmware/huc/bxt: Add huC Update for BXT (2018-11-28 10:33:57 -0800)


Anusha Srivatsa (1):
  firmware/huc/bxt: Add huC Update for BXT

 WHENCE|   3 +++
 i915/bxt_huc_ver01_8_2893.bin | Bin 0 -> 146880 bytes
 2 files changed, 3 insertions(+)
 create mode 100644 i915/bxt_huc_ver01_8_2893.bin

Anusha Srivatsa (2):
  firmware/huc/BXT: Update the HuC version
  HAX enable HuC for CI

 drivers/gpu/drm/i915/i915_params.h  | 2 +-
 drivers/gpu/drm/i915/intel_huc_fw.c | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

-- 
2.19.1

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[Intel-gfx] [PATCH 1/2] drm/i915/huc: Update the HuC version for BXT

[Anusha]

From: Anusha Srivatsa 

We have an update for HuC for BXT.
Load the latest version.

v2: Change the subject.

Cc: Rodrigo Vivi 
Signed-off-by: Anusha Srivatsa 
---
 drivers/gpu/drm/i915/intel_huc_fw.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c 
b/drivers/gpu/drm/i915/intel_huc_fw.c
index f93d2384d482..9612227b3c44 100644
--- a/drivers/gpu/drm/i915/intel_huc_fw.c
+++ b/drivers/gpu/drm/i915/intel_huc_fw.c
@@ -23,8 +23,8 @@
  */
 
 #define BXT_HUC_FW_MAJOR 01
-#define BXT_HUC_FW_MINOR 07
-#define BXT_BLD_NUM 1398
+#define BXT_HUC_FW_MINOR 8
+#define BXT_BLD_NUM 2893
 
 #define SKL_HUC_FW_MAJOR 01
 #define SKL_HUC_FW_MINOR 07
-- 
2.19.2

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Re: [Intel-gfx] [PATCH] drm/i915/icl: Skip DSI path in DDI vswing programming.

[Dhinakaran Pandiyan]

On Fri, 2018-12-07 at 16:07 +0200, Imre Deak wrote:
> Hi DK,
> 
> On Thu, Dec 06, 2018 at 03:43:55PM -0800, Dhinakaran Pandiyan wrote:
> > DSI implements it's own pre_enable hook, encoder output type is
> > never
> > DSI.
> > 
> > Cc: Manasi Navare 
> > Cc: Paulo Zanoni 
> > Cc: James Ausmus 
> > Fixes: fb5c8e9d4350 ("drm/i915/icl: Implement voltage swing
> > programming sequence for Combo PHY DDI")
> > Signed-off-by: Dhinakaran Pandiyan 
> > ---
> >  drivers/gpu/drm/i915/intel_ddi.c | 9 ++---
> >  1 file changed, 2 insertions(+), 7 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > b/drivers/gpu/drm/i915/intel_ddi.c
> > index f3e1d6a0b7dd..5792632fa6a3 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -2489,13 +2489,8 @@ static void
> > icl_ddi_combo_vswing_program(struct drm_i915_private *dev_priv,
> > /* Set DisableTap2 and DisableTap3 if MIPI DSI
> >  * Clear DisableTap2 and DisableTap3 for all other Ports
> >  */
> > -   if (type == INTEL_OUTPUT_DSI) {
> > -   val |= TAP2_DISABLE;
> > -   val |= TAP3_DISABLE;
> > -   } else {
> > -   val &= ~TAP2_DISABLE;
> > -   val &= ~TAP3_DISABLE;
> > -   }
> > +   val &= ~TAP2_DISABLE;
> > +   val &= ~TAP3_DISABLE;
> 
> note that Clint's patch at
> https://patchwork.freedesktop.org/patch/265848/
> solves this as well. We could minimize the churn by applying only
> that.
Absolutely. Thanks for pointing it out.


-DK

> 
> > I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val);
> >  
> > /* Program PORT_TX_DW2 */
> > -- 
> > 2.17.1
> > 
> > ___
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

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Re: [Intel-gfx] [PATCH] drm/i915: Clear bogus DMC BIOS/debug power well requests

[Imre Deak]

On Fri, Dec 07, 2018 at 07:13:05PM +0200, Ville Syrjälä wrote:
> On Thu, Dec 06, 2018 at 02:23:00PM +0200, Imre Deak wrote:
> > On Wed, Dec 05, 2018 at 10:20:23PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä 
> > > 
> > > The DMC firmware is confused and forces on the BIOS and debug
> > > power well requests for PW1 and MISC IO on some platforms. On
> > > BXT I measured this to waste about 10mW in the freeze system
> > > suspend state with the SoC in s0. I didn't get conclusive
> > > numbers for s0ix on account of the power consumption being
> > > much more noisy than in s0.
> > > 
> > > This is pretty much undoing part of commit 42d9366d41a9
> > > ("drm/i915/gen9+: Don't remove secondary power well requests")
> > > where we stopped sanitizing the DMCs bogus request bits.
> > > 
> > > Cc: Imre Deak 
> > > Cc: Rodrigo Vivi 
> > > Signed-off-by: Ville Syrjälä 
> > 
> > Thanks for the effort for clarifying this.
> > 
> > The justification in 42d9366d41a9 for not removing the PW#1 and MISC_IO 
> > driver
> > request bits is not too solid, I admit. Bspec 4230 has this to say about 
> > them
> > (for SKL, but same in practice for the rest):
> > 
> > """
> > 4. Disable Power Well 1 (PG1) and Misc IO Power
> > 
> > Clear PWR_WELL_CTL Power Well 1 Request to 0b. Do not clear Misc IO 
> > Power Request.
> > Wait for 10us. Do not poll for the power well to disable. Other clients 
> > may be keeping it enabled.
> > """
> > 
> > With MISC_IO we would clearly do the opposite in this patch wrt. the spec.
> > 
> > With PW#1 it's unclear if the spec means only the driver's request bit or 
> > all
> > of them, but "other clients may be keeping it enabled" suggests to me it 
> > means
> > only the driver's request bit. OTOH removing only the driver's request bit
> > alone doesn't make sense due to DMC forcing on the BIOS (and debug) request
> > bits anyway.
> > 
> > I opened a BSpec update request to clarify this, I suggest waiting for an
> > update there before going ahead with this change.
> > 
> > > ---
> > >  drivers/gpu/drm/i915/intel_runtime_pm.c | 35 +++--
> > >  1 file changed, 33 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
> > > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > index 4350a5270423..6e349181dd1c 100644
> > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> 
> > > @@ -417,6 +430,24 @@ static void hsw_power_well_disable(struct 
> > > drm_i915_private *dev_priv,
> > >  
> > >   val = I915_READ(regs->driver);
> > >   I915_WRITE(regs->driver, val & ~HSW_PWR_WELL_CTL_REQ(pw_idx));
> > > + /*
> > > +  * On SKL-CNL DMC firmware forces on the BIOS request.
> > > +  * This wastes a bit of power so clear it.
> > > +  */
> > > + if (INTEL_GEN(dev_priv) < 11 &&
> > > + (id == SKL_DISP_PW_1 || id == SKL_DISP_PW_MISC_IO)) {
> > > + val = I915_READ(regs->bios);
> > > + I915_WRITE(regs->bios, val & ~HSW_PWR_WELL_CTL_REQ(pw_idx));
> > > + }
> > > + /*
> > > +  * On BXT DMC firmware forces on the debug request.
> > > +  * This wastes a bit of power so clear it.
> > > +  */
> > > + if (IS_BROXTON(dev_priv) &&
> > > + (id == SKL_DISP_PW_1 || id == SKL_DISP_PW_MISC_IO)) {
> > 
> > No MISC_IO on BXT, so is this just for symmetry with the above if-block?
> 
> Just copy-pasted it so got it in both. I can drop the misc-io here if
> you prefer that.

Yes imo, it's clearer that way. With that it's
Reviewed-by: Imre Deak 

provided the change wouldn't be NAKed by the pending BSpec update, but I
doubt it would. Let's still wait for an update.

> 
> > 
> > > + val = I915_READ(regs->debug);
> > > + I915_WRITE(regs->debug, val & ~HSW_PWR_WELL_CTL_REQ(pw_idx));
> > > + }
> > >   hsw_wait_for_power_well_disable(dev_priv, power_well);
> > >  }
> > >  
> > > -- 
> > > 2.18.1
> > > 
> 
> -- 
> Ville Syrjälä
> Intel
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: Fix pipe config mismatch warnings (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/icl: Fix pipe config mismatch warnings (rev2)
URL   : https://patchwork.freedesktop.org/series/53727/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5282_full -> Patchwork_11045_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Known issues


  Here are the changes found in Patchwork_11045_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ppgtt@blt-vs-render-ctxn:
- shard-skl:  NOTRUN -> TIMEOUT [fdo#108039]

  * igt@kms_busy@basic-modeset-a:
- shard-apl:  PASS -> DMESG-WARN [fdo#103558] / [fdo#105602] +8

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-glk:  PASS -> FAIL [fdo#108145]

  * igt@kms_chv_cursor_fail@pipe-c-128x128-left-edge:
- shard-skl:  NOTRUN -> FAIL [fdo#104671]

  * igt@kms_cursor_crc@cursor-128x128-onscreen:
- shard-skl:  NOTRUN -> FAIL [fdo#103232]

  * igt@kms_draw_crc@draw-method-xrgb-render-untiled:
- shard-skl:  NOTRUN -> FAIL [fdo#103184]

  * igt@kms_flip@blocking-wf_vblank:
- shard-kbl:  PASS -> DMESG-WARN [fdo#103558] / [fdo#105602] +8

  * igt@kms_flip@flip-vs-expired-vblank:
- shard-glk:  PASS -> FAIL [fdo#102887] / [fdo#105363]

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu:
- shard-skl:  NOTRUN -> FAIL [fdo#105682] +1

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-skl:  NOTRUN -> FAIL [fdo#103167]

  * igt@kms_plane@pixel-format-pipe-a-planes:
- shard-skl:  NOTRUN -> FAIL [fdo#103166]

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-apl:  PASS -> FAIL [fdo#108145]
- shard-skl:  NOTRUN -> FAIL [fdo#108145] +4

  * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
- shard-skl:  NOTRUN -> FAIL [fdo#107815] / [fdo#108145]

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
- shard-skl:  NOTRUN -> FAIL [fdo#103166] / [fdo#107815]

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
- shard-apl:  PASS -> FAIL [fdo#103166]

  * {igt@kms_rotation_crc@multiplane-rotation-cropping-top}:
- shard-glk:  PASS -> DMESG-FAIL [fdo#105763] / [fdo#106538]

  * igt@pm_rpm@cursor-dpms:
- shard-skl:  PASS -> INCOMPLETE [fdo#107807]

  * igt@pm_rpm@gem-pread:
- {shard-iclb}:   PASS -> DMESG-WARN [fdo#107724] +3

  * igt@pm_rpm@modeset-lpsp:
- {shard-iclb}:   PASS -> INCOMPLETE [fdo#108840]

  
 Possible fixes 

  * igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing:
- shard-skl:  FAIL [fdo#107815] / [fdo#108470] -> PASS

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
- shard-apl:  DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
- shard-glk:  FAIL [fdo#108145] -> PASS

  * igt@kms_ccs@pipe-c-bad-pixel-format:
- {shard-iclb}:   DMESG-WARN [fdo#107724] -> PASS +9

  * igt@kms_color@pipe-b-degamma:
- shard-skl:  FAIL [fdo#104782] -> PASS

  * igt@kms_cursor_crc@cursor-256x85-offscreen:
- shard-skl:  FAIL [fdo#103232] -> PASS

  * igt@kms_cursor_crc@cursor-64x21-onscreen:
- shard-apl:  FAIL [fdo#103232] -> PASS

  * igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-glk:  FAIL [fdo#103232] -> PASS +1
- shard-apl:  FAIL [fdo#103191] / [fdo#103232] -> PASS

  * igt@kms_draw_crc@draw-method-rgb565-blt-untiled:
- {shard-iclb}:   WARN [fdo#108336] -> PASS

  * igt@kms_draw_crc@draw-method-rgb565-mmap-wc-ytiled:
- shard-skl:  FAIL [fdo#103184] -> PASS

  * igt@kms_flip@flip-vs-expired-vblank:
- {shard-iclb}:   FAIL [fdo#105363] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
- {shard-iclb}:   DMESG-FAIL [fdo#107724] -> PASS +1

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
- shard-apl:  FAIL [fdo#103167] -> PASS +1
- shard-glk:  FAIL [fdo#103167] -> PASS +1

  * igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-pwrite:
- shard-skl:  FAIL [fdo#103167] / [fdo#105682] -> PASS

  * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-render:
- shard-skl:  FAIL [fdo#103167] -> PASS +2

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
- {shard-iclb}:   FAIL [fdo#103167] -> PASS +5

  * {igt@kms_plane@pixel-format-pipe-c-planes-source-clamping}:
- shard-apl:  FAIL [fdo#108948] -> PASS

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl:  FAIL [fdo#107815] / [fdo#108145] -> PASS

  * igt@kms_plane_lowres@pipe-b-tiling-none:
- {shard-iclb}:   DMESG-WARN [fdo#107724] / [fdo#108336] -> PASS +4

  * igt@kms_plane_multiple@atomic-pipe-a-tiling-

[Intel-gfx] ✗ Fi.CI.BAT: failure for drivers/base: use a worker for sysfs unbind (rev2)

[Patchwork]

== Series Details ==

Series: drivers/base: use a worker for sysfs unbind (rev2)
URL   : https://patchwork.freedesktop.org/series/53734/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_5288 -> Patchwork_11052


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_11052 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_11052, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/53734/revisions/2/mbox/

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_11052:

### IGT changes ###

 Possible regressions 

  * igt@i915_module_load@reload-no-display:
- fi-skl-6700hq:  PASS -> INCOMPLETE
- fi-skl-6700k2:  PASS -> INCOMPLETE
- fi-skl-iommu:   PASS -> INCOMPLETE
- fi-kbl-7560u:   PASS -> INCOMPLETE
- fi-pnv-d510:NOTRUN -> INCOMPLETE
- fi-whl-u:   PASS -> INCOMPLETE
- fi-bwr-2160:PASS -> INCOMPLETE
- fi-kbl-r:   PASS -> INCOMPLETE
- fi-blb-e6850:   PASS -> INCOMPLETE
- {fi-kbl-7567u}: PASS -> INCOMPLETE
- fi-skl-6260u:   PASS -> INCOMPLETE
- fi-snb-2600:PASS -> INCOMPLETE
- fi-hsw-peppy:   PASS -> INCOMPLETE
- {fi-icl-u3}:NOTRUN -> INCOMPLETE
- fi-ilk-650: PASS -> INCOMPLETE
- fi-skl-6770hq:  PASS -> INCOMPLETE
- fi-cfl-guc: PASS -> INCOMPLETE
- fi-ivb-3770:PASS -> INCOMPLETE
- fi-snb-2520m:   PASS -> INCOMPLETE
- fi-cfl-8700k:   PASS -> INCOMPLETE
- {fi-kbl-7500u}: PASS -> INCOMPLETE
- fi-ivb-3520m:   PASS -> INCOMPLETE
- fi-hsw-4770:PASS -> INCOMPLETE
- fi-kbl-guc: PASS -> INCOMPLETE
- fi-skl-guc: PASS -> INCOMPLETE
- fi-bdw-5557u:   PASS -> INCOMPLETE
- fi-cfl-8109u:   NOTRUN -> INCOMPLETE
- fi-hsw-4770r:   PASS -> INCOMPLETE

  * {igt@runner@aborted}:
- fi-ilk-650: NOTRUN -> FAIL
- fi-pnv-d510:NOTRUN -> FAIL
- fi-cfl-8109u:   NOTRUN -> FAIL
- fi-hsw-peppy:   NOTRUN -> FAIL
- fi-glk-dsi: NOTRUN -> FAIL
- fi-snb-2520m:   NOTRUN -> FAIL
- fi-hsw-4770:NOTRUN -> FAIL
- {fi-kbl-7500u}: NOTRUN -> FAIL
- fi-skl-6700hq:  NOTRUN -> FAIL
- fi-ivb-3770:NOTRUN -> FAIL
- fi-kbl-7560u:   NOTRUN -> FAIL
- fi-bxt-dsi: NOTRUN -> FAIL
- fi-byt-j1900:   NOTRUN -> FAIL
- fi-skl-iommu:   NOTRUN -> FAIL
- fi-cfl-guc: NOTRUN -> FAIL
- fi-skl-guc: NOTRUN -> FAIL
- fi-bsw-n3050:   NOTRUN -> FAIL
- fi-cfl-8700k:   NOTRUN -> FAIL
- fi-kbl-8809g:   NOTRUN -> FAIL
- fi-apl-guc: NOTRUN -> FAIL
- fi-kbl-r:   NOTRUN -> FAIL
- fi-bdw-5557u:   NOTRUN -> FAIL
- fi-bwr-2160:NOTRUN -> FAIL
- fi-skl-6770hq:  NOTRUN -> FAIL
- fi-kbl-guc: NOTRUN -> FAIL
- fi-ivb-3520m:   NOTRUN -> FAIL
- fi-snb-2600:NOTRUN -> FAIL
- fi-skl-6260u:   NOTRUN -> FAIL

  
Known issues


  Here are the changes found in Patchwork_11052 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_module_load@reload-no-display:
- fi-apl-guc: PASS -> INCOMPLETE [fdo#103927]
- fi-byt-j1900:   PASS -> INCOMPLETE [fdo#102657]
- fi-skl-6600u:   PASS -> INCOMPLETE [fdo#104108]
- fi-kbl-8809g:   PASS -> INCOMPLETE [fdo#103665]
- fi-glk-j4005:   PASS -> INCOMPLETE [fdo#103359] / [k.org#198133]
- fi-bsw-n3050:   PASS -> INCOMPLETE [fdo#105876]
- fi-byt-n2820:   PASS -> INCOMPLETE [fdo#102657]
- fi-bxt-j4205:   PASS -> INCOMPLETE [fdo#103927]
- fi-bxt-dsi: PASS -> INCOMPLETE [fdo#103927]
- fi-glk-dsi: PASS -> INCOMPLETE [fdo#103359] / [k.org#198133]

  
 Possible fixes 

  * igt@gem_ctx_create@basic-files:
- fi-bsw-n3050:   FAIL [fdo#108656] -> PASS

  * igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy:   DMESG-WARN [fdo#102614] -> PASS

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
- fi-cfl-8109u:   INCOMPLETE [fdo#106070] / [fdo#108126] -> PASS

  
 Warnings 

  * igt@kms_chamelium@common-hpd-after-suspend:
- {fi-kbl-7567u}: DMESG-WARN [fdo#103558] / [fdo#105079] / [fdo#105602] 
-> DMESG-FAIL [fdo#105079]

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#102657]: https://bugs.freedesktop.org/show_bug.

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: Push EMIT_INVALIDATE at request start to backends

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Push EMIT_INVALIDATE at request 
start to backends
URL   : https://patchwork.freedesktop.org/series/53729/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5282_full -> Patchwork_11044_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Known issues


  Here are the changes found in Patchwork_11044_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_schedule@pi-ringfull-render:
- shard-glk:  NOTRUN -> FAIL [fdo#103158]

  * igt@gem_ppgtt@blt-vs-render-ctxn:
- shard-skl:  NOTRUN -> TIMEOUT [fdo#108039]

  * igt@gem_softpin@noreloc-s3:
- {shard-iclb}:   PASS -> INCOMPLETE [fdo#107713]

  * igt@kms_cursor_crc@cursor-256x256-random:
- shard-apl:  PASS -> INCOMPLETE [fdo#103927]

  * igt@kms_draw_crc@draw-method-xrgb-mmap-wc-ytiled:
- shard-skl:  NOTRUN -> FAIL [fdo#103184]

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
- shard-glk:  PASS -> FAIL [fdo#103167]

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu:
- shard-skl:  NOTRUN -> FAIL [fdo#103167] +2

  * igt@kms_plane@pixel-format-pipe-a-planes:
- shard-skl:  NOTRUN -> FAIL [fdo#103166]

  * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
- shard-skl:  NOTRUN -> FAIL [fdo#107815] / [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb:
- shard-skl:  NOTRUN -> FAIL [fdo#108145] +2

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl:  PASS -> FAIL [fdo#107815]

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
- shard-apl:  PASS -> FAIL [fdo#103166] +1

  * igt@kms_plane_scaling@pipe-b-scaler-with-rotation:
- {shard-iclb}:   PASS -> DMESG-WARN [fdo#107724]

  * igt@kms_psr@no_drrs:
- {shard-iclb}:   PASS -> FAIL [fdo#108341]

  * igt@pm_rpm@fences:
- shard-skl:  PASS -> INCOMPLETE [fdo#107807] +1

  * igt@pm_rpm@sysfs-read:
- {shard-iclb}:   PASS -> INCOMPLETE [fdo#107713] / [fdo#108840]

  
 Possible fixes 

  * igt@gem_userptr_blits@readonly-unsync:
- shard-skl:  TIMEOUT [fdo#108887] -> PASS

  * igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
- shard-glk:  FAIL [fdo#108145] -> PASS

  * igt@kms_ccs@pipe-c-bad-pixel-format:
- {shard-iclb}:   DMESG-WARN [fdo#107724] -> PASS +8

  * igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-glk:  FAIL [fdo#103232] -> PASS +1

  * igt@kms_draw_crc@draw-method-rgb565-blt-untiled:
- {shard-iclb}:   WARN [fdo#108336] -> PASS

  * igt@kms_flip@flip-vs-expired-vblank:
- {shard-iclb}:   FAIL [fdo#105363] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
- {shard-iclb}:   DMESG-FAIL [fdo#107724] -> PASS +1

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-apl:  FAIL [fdo#103167] -> PASS

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
- {shard-iclb}:   FAIL [fdo#103167] -> PASS +3

  * {igt@kms_plane@pixel-format-pipe-c-planes-source-clamping}:
- shard-apl:  FAIL [fdo#108948] -> PASS

  * igt@kms_plane_lowres@pipe-b-tiling-none:
- {shard-iclb}:   DMESG-WARN [fdo#107724] / [fdo#108336] -> PASS +4

  * igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
- {shard-iclb}:   FAIL [fdo#103166] -> PASS

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
- shard-glk:  FAIL [fdo#103166] -> PASS

  * {igt@kms_rotation_crc@multiplane-rotation-cropping-top}:
- shard-kbl:  DMESG-FAIL [fdo#108950] -> PASS

  * igt@kms_universal_plane@universal-plane-pipe-c-functional:
- {shard-iclb}:   DMESG-FAIL [fdo#103166] / [fdo#107724] -> PASS

  * igt@kms_vblank@pipe-c-ts-continuation-suspend:
- shard-kbl:  INCOMPLETE [fdo#103665] -> PASS

  * igt@perf@polling:
- shard-hsw:  FAIL [fdo#102252] -> PASS

  * igt@pm_rpm@debugfs-forcewake-user:
- shard-skl:  INCOMPLETE [fdo#107807] -> PASS

  * igt@pm_rpm@dpms-non-lpsp:
- shard-skl:  INCOMPLETE [fdo#107807] -> SKIP

  * igt@pm_rpm@gem-mmap-gtt:
- {shard-iclb}:   DMESG-WARN [fdo#108654] -> PASS

  
 Warnings 

  * igt@kms_cursor_crc@cursor-64x64-dpms:
- {shard-iclb}:   DMESG-WARN [fdo#107724] / [fdo#108336] -> FAIL 
[fdo#103232]

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102252]: https://bugs.freedesktop.org/show_bug.cgi?id=102252
  [fdo#103158]: https://bugs.freedesktop.org/show_bug.cgi?id=103158
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915/intel_dsi_vbt: Add support for PMIC mipi sequences

[Ville Syrjälä]

On Thu, Dec 06, 2018 at 02:47:05PM +0100, Hans de Goede wrote:
> Add support for PMIC mipi sequences using the new
> intel_soc_pmic_exec_mipi_pmic_seq_element function.

Please document somewhere which machines you've found to need
this (commit msg should be sufficient I suppose). Can make it
much easier to respond to bug reports like "my machine X with
DSI doesn't work".

> 
> Signed-off-by: Hans de Goede 
> ---
>  drivers/gpu/drm/i915/intel_dsi_vbt.c | 5 +
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c 
> b/drivers/gpu/drm/i915/intel_dsi_vbt.c
> index f27af47c6e49..6a2ed1ca72e0 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c
> @@ -29,6 +29,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -371,7 +372,11 @@ static const u8 *mipi_exec_spi(struct intel_dsi 
> *intel_dsi, const u8 *data)
>  
>  static const u8 *mipi_exec_pmic(struct intel_dsi *intel_dsi, const u8 *data)
>  {
> +#ifdef CONFIG_PMIC_OPREGION
> + intel_soc_pmic_exec_mipi_pmic_seq_element(data);
> +#else
>   DRM_DEBUG_KMS("Skipping PMIC element execution\n");
> +#endif
>  
>   return data + 15;
>  }
> -- 
> 2.19.2

-- 
Ville Syrjälä
Intel
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drivers/base: use a worker for sysfs unbind (rev2)

[Patchwork]

== Series Details ==

Series: drivers/base: use a worker for sysfs unbind (rev2)
URL   : https://patchwork.freedesktop.org/series/53734/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
ae9ec5f5e6bb drivers/base: use a worker for sysfs unbind
-:93: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch 
author 'Daniel Vetter '

total: 0 errors, 1 warnings, 0 checks, 51 lines checked

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Re: [Intel-gfx] [PATCH] drm/i915: Clear bogus DMC BIOS/debug power well requests

[Ville Syrjälä]

On Thu, Dec 06, 2018 at 02:23:00PM +0200, Imre Deak wrote:
> On Wed, Dec 05, 2018 at 10:20:23PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä 
> > 
> > The DMC firmware is confused and forces on the BIOS and debug
> > power well requests for PW1 and MISC IO on some platforms. On
> > BXT I measured this to waste about 10mW in the freeze system
> > suspend state with the SoC in s0. I didn't get conclusive
> > numbers for s0ix on account of the power consumption being
> > much more noisy than in s0.
> > 
> > This is pretty much undoing part of commit 42d9366d41a9
> > ("drm/i915/gen9+: Don't remove secondary power well requests")
> > where we stopped sanitizing the DMCs bogus request bits.
> > 
> > Cc: Imre Deak 
> > Cc: Rodrigo Vivi 
> > Signed-off-by: Ville Syrjälä 
> 
> Thanks for the effort for clarifying this.
> 
> The justification in 42d9366d41a9 for not removing the PW#1 and MISC_IO driver
> request bits is not too solid, I admit. Bspec 4230 has this to say about them
> (for SKL, but same in practice for the rest):
> 
> """
> 4. Disable Power Well 1 (PG1) and Misc IO Power
> 
> Clear PWR_WELL_CTL Power Well 1 Request to 0b. Do not clear Misc IO Power 
> Request.
> Wait for 10us. Do not poll for the power well to disable. Other clients 
> may be keeping it enabled.
> """
> 
> With MISC_IO we would clearly do the opposite in this patch wrt. the spec.
> 
> With PW#1 it's unclear if the spec means only the driver's request bit or all
> of them, but "other clients may be keeping it enabled" suggests to me it means
> only the driver's request bit. OTOH removing only the driver's request bit
> alone doesn't make sense due to DMC forcing on the BIOS (and debug) request
> bits anyway.
> 
> I opened a BSpec update request to clarify this, I suggest waiting for an
> update there before going ahead with this change.
> 
> > ---
> >  drivers/gpu/drm/i915/intel_runtime_pm.c | 35 +++--
> >  1 file changed, 33 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
> > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 4350a5270423..6e349181dd1c 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c

> > @@ -417,6 +430,24 @@ static void hsw_power_well_disable(struct 
> > drm_i915_private *dev_priv,
> >  
> > val = I915_READ(regs->driver);
> > I915_WRITE(regs->driver, val & ~HSW_PWR_WELL_CTL_REQ(pw_idx));
> > +   /*
> > +* On SKL-CNL DMC firmware forces on the BIOS request.
> > +* This wastes a bit of power so clear it.
> > +*/
> > +   if (INTEL_GEN(dev_priv) < 11 &&
> > +   (id == SKL_DISP_PW_1 || id == SKL_DISP_PW_MISC_IO)) {
> > +   val = I915_READ(regs->bios);
> > +   I915_WRITE(regs->bios, val & ~HSW_PWR_WELL_CTL_REQ(pw_idx));
> > +   }
> > +   /*
> > +* On BXT DMC firmware forces on the debug request.
> > +* This wastes a bit of power so clear it.
> > +*/
> > +   if (IS_BROXTON(dev_priv) &&
> > +   (id == SKL_DISP_PW_1 || id == SKL_DISP_PW_MISC_IO)) {
> 
> No MISC_IO on BXT, so is this just for symmetry with the above if-block?

Just copy-pasted it so got it in both. I can drop the misc-io here if
you prefer that.

> 
> > +   val = I915_READ(regs->debug);
> > +   I915_WRITE(regs->debug, val & ~HSW_PWR_WELL_CTL_REQ(pw_idx));
> > +   }
> > hsw_wait_for_power_well_disable(dev_priv, power_well);
> >  }
> >  
> > -- 
> > 2.18.1
> > 

-- 
Ville Syrjälä
Intel
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/10] dma-buf: add new dma_fence_chain container v4

[Patchwork]

== Series Details ==

Series: series starting with [01/10] dma-buf: add new dma_fence_chain container 
v4
URL   : https://patchwork.freedesktop.org/series/53758/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5287 -> Patchwork_11051


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/53758/revisions/1/mbox/

Known issues


  Here are the changes found in Patchwork_11051 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live_execlists:
- fi-apl-guc: PASS -> INCOMPLETE [fdo#103927] / [fdo#108622]

  * {igt@runner@aborted}:
- fi-apl-guc: NOTRUN -> FAIL [fdo#108866]

  
 Possible fixes 

  * igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy:   DMESG-WARN [fdo#102614] -> PASS

  
 Warnings 

  * igt@kms_chamelium@common-hpd-after-suspend:
- {fi-kbl-7567u}: DMESG-FAIL [fdo#105079] -> DMESG-WARN [fdo#103558] / 
[fdo#105079] / [fdo#105602]

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#105079]: https://bugs.freedesktop.org/show_bug.cgi?id=105079
  [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
  [fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622
  [fdo#108866]: https://bugs.freedesktop.org/show_bug.cgi?id=108866


Participating hosts (51 -> 44)
--

  Additional (1): fi-glk-dsi 
  Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-ctg-p8600 fi-icl-u3 fi-pnv-d510 


Build changes
-

* Linux: CI_DRM_5287 -> Patchwork_11051

  CI_DRM_5287: 1f240056ad2a4b4b4f174f652202dd7d9e7d0fed @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4743: edb2db2cf2b6665d7ba3fa9117263302f6307a4f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_11051: 5764fd06525a74522e006d9c2557f45b79aacc40 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

5764fd06525a drm/amdgpu: update version for timeline syncobj support in amdgpu
d7acbef7aace drm/syncobj: add timeline signal ioctl for syncobj v2
2bfecbc0d56d drm/syncobj: add transition iotcls between binary and timeline v2
7f1a4f6776c3 drm/amdgpu: add timeline support in amdgpu CS v2
977f0460 drm/syncobj: use the timeline point in drm_syncobj_find_fence v3
8e372b020ffc drm/syncobj: add timeline payload query ioctl v4
f0b35725d260 drm/syncobj: add support for timeline point wait v8
6616db23ca6c drm/syncobj: add new drm_syncobj_add_point interface v2
5f4564feb12b drm/syncobj: remove drm_syncobj_cb and cleanup
3403ae806a28 dma-buf: add new dma_fence_chain container v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11051/
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[Intel-gfx] ✓ Fi.CI.BAT: success for igt: add timeline test cases (rev3)

[Patchwork]

== Series Details ==

Series: igt: add timeline test cases (rev3)
URL   : https://patchwork.freedesktop.org/series/53743/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5287 -> IGTPW_2138


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/53743/revisions/3/mbox/

Possible new issues
---

  Here are the unknown changes that may have been introduced in IGTPW_2138:

### IGT changes ###

 Possible regressions 

  * igt@kms_flip@basic-flip-vs-wf_vblank:
- {fi-icl-u3}:PASS -> INCOMPLETE

  
Known issues


  Here are the changes found in IGTPW_2138 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@prime_vgem@basic-fence-flip:
- fi-ilk-650: PASS -> FAIL [fdo#104008]

  
 Possible fixes 

  * igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy:   DMESG-WARN [fdo#102614] -> PASS

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#104008]: https://bugs.freedesktop.org/show_bug.cgi?id=104008


Participating hosts (51 -> 46)
--

  Additional (1): fi-glk-dsi 
  Missing(6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-ctg-p8600 


Build changes
-

* IGT: IGT_4743 -> IGTPW_2138

  CI_DRM_5287: 1f240056ad2a4b4b4f174f652202dd7d9e7d0fed @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_2138: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2138/
  IGT_4743: edb2db2cf2b6665d7ba3fa9117263302f6307a4f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools



== Testlist changes ==

+++ 114 lines
--- 0 lines

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2138/
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/10] dma-buf: add new dma_fence_chain container v4

[Patchwork]

== Series Details ==

Series: series starting with [01/10] dma-buf: add new dma_fence_chain container 
v4
URL   : https://patchwork.freedesktop.org/series/53758/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: dma-buf: add new dma_fence_chain container v4
Okay!

Commit: drm/syncobj: remove drm_syncobj_cb and cleanup
-O:drivers/gpu/drm/drm_syncobj.c:123:6: warning: symbol 
'drm_syncobj_add_callback' was not declared. Should it be static?
-O:drivers/gpu/drm/drm_syncobj.c:132:6: warning: symbol 
'drm_syncobj_remove_callback' was not declared. Should it be static?

Commit: drm/syncobj: add new drm_syncobj_add_point interface v2
Okay!

Commit: drm/syncobj: add support for timeline point wait v8
+./include/linux/slab.h:665:13: error: not a function 

Commit: drm/syncobj: add timeline payload query ioctl v4
Okay!

Commit: drm/syncobj: use the timeline point in drm_syncobj_find_fence v3
Okay!

Commit: drm/amdgpu: add timeline support in amdgpu CS v2
+./include/linux/slab.h:665:13: error: not a function 

Commit: drm/syncobj: add transition iotcls between binary and timeline v2
+./include/linux/slab.h:332:43: warning: dubious: x & !y

Commit: drm/syncobj: add timeline signal ioctl for syncobj v2
+./include/linux/slab.h:665:13: error: not a function 
+./include/linux/slab.h:665:13: error: not a function 

Commit: drm/amdgpu: update version for timeline syncobj support in amdgpu
Okay!

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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/10] dma-buf: add new dma_fence_chain container v4

[Patchwork]

== Series Details ==

Series: series starting with [01/10] dma-buf: add new dma_fence_chain container 
v4
URL   : https://patchwork.freedesktop.org/series/53758/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
3403ae806a28 dma-buf: add new dma_fence_chain container v4
-:12: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description 
(prefer a maximum 75 chars per line)
#12: 
v2: properly document dma_fence_chain_for_each, add dma_fence_chain_find_seqno,

-:31: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#31: 
new file mode 100644

-:36: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier 
tag in line 1
#36: FILE: drivers/dma-buf/dma-fence-chain.c:1:
+/*

-:94: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#94: FILE: drivers/dma-buf/dma-fence-chain.c:59:
+   while ((prev = dma_fence_chain_get_prev(chain))) {
+

-:156: ERROR:CODE_INDENT: code indent should use tabs where possible
#156: FILE: drivers/dma-buf/dma-fence-chain.c:121:
+return "dma_fence_chain";$

-:156: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#156: FILE: drivers/dma-buf/dma-fence-chain.c:121:
+return "dma_fence_chain";$

-:161: ERROR:CODE_INDENT: code indent should use tabs where possible
#161: FILE: drivers/dma-buf/dma-fence-chain.c:126:
+return "unbound";$

-:161: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#161: FILE: drivers/dma-buf/dma-fence-chain.c:126:
+return "unbound";$

-:283: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier 
tag in line 1
#283: FILE: include/linux/dma-fence-chain.h:1:
+/*

-:318: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#318: FILE: include/linux/dma-fence-chain.h:36:
+   spinlock_t lock;

-:352: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'iter' - possible 
side-effects?
#352: FILE: include/linux/dma-fence-chain.h:70:
+#define dma_fence_chain_for_each(iter, head)   \
+   for (iter = dma_fence_get(head); iter; \
+iter = dma_fence_chain_walk(head))

-:352: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'head' - possible 
side-effects?
#352: FILE: include/linux/dma-fence-chain.h:70:
+#define dma_fence_chain_for_each(iter, head)   \
+   for (iter = dma_fence_get(head); iter; \
+iter = dma_fence_chain_walk(head))

-:363: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch 
author 'Christian König '

total: 2 errors, 7 warnings, 4 checks, 328 lines checked
5f4564feb12b drm/syncobj: remove drm_syncobj_cb and cleanup
-:77: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#77: FILE: drivers/gpu/drm/drm_syncobj.c:107:
+   wait->fence = dma_fence_get(

-:217: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch 
author 'Christian König '

total: 0 errors, 1 warnings, 1 checks, 186 lines checked
6616db23ca6c drm/syncobj: add new drm_syncobj_add_point interface v2
-:86: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch 
author 'Christian König '

total: 0 errors, 1 warnings, 0 checks, 60 lines checked
f0b35725d260 drm/syncobj: add support for timeline point wait v8
-:11: WARNING:TYPO_SPELLING: 'seperate' may be misspelled - perhaps 'separate'?
#11: 
add seperate ioctl for timeline point wait, otherwise break uapi.

-:54: CHECK:SPACING: spaces preferred around that '|' (ctx:VxV)
#54: FILE: drivers/gpu/drm/drm_ioctl.c:679:
+ DRM_UNLOCKED|DRM_RENDER_ALLOW),
  ^

-:163: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "!points"
#163: FILE: drivers/gpu/drm/drm_syncobj.c:680:
+   if (points == NULL)

-:324: CHECK:LINE_SPACING: Please don't use multiple blank lines
#324: FILE: drivers/gpu/drm/drm_syncobj.c:998:
+
+

-:356: CHECK:LINE_SPACING: Please don't use multiple blank lines
#356: FILE: include/uapi/drm/drm.h:763:
+
+

total: 0 errors, 1 warnings, 4 checks, 302 lines checked
8e372b020ffc drm/syncobj: add timeline payload query ioctl v4
-:44: CHECK:SPACING: spaces preferred around that '|' (ctx:VxV)
#44: FILE: drivers/gpu/drm/drm_ioctl.c:685:
+ DRM_UNLOCKED|DRM_RENDER_ALLOW),
  ^

-:114: CHECK:LINE_SPACING: Please don't use multiple blank lines
#114: FILE: include/uapi/drm/drm.h:777:
+
+

total: 0 errors, 0 warnings, 2 checks, 84 lines checked
977f0460 drm/syncobj: use the timeline point in drm_syncobj_find_fence v3
-:77: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch 
author 'Christian König '

total: 0 errors, 1 warnings, 0 checks, 56 lines checked
7f1a4f6776c3 drm/amdgpu: add timeline support in amdgpu CS v2
-:43: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned'
#43: FILE: drivers/gpu/drm/amd/amdgpu/amdgpu.h:467:
+   unsignednum_post_deps;

-:121: CHECK:LINE_SPACING: Please don't u

Re: [Intel-gfx] [PATCH] drm/i915/icl: Fix pipe config mismatch warnings

[kbuild test robot]

Hi Stanislav,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on next-20181207]
[cannot apply to v4.20-rc5]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Stanislav-Lisovskiy/drm-i915-icl-Fix-pipe-config-mismatch-warnings/20181207-234855
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-x073-201848 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386 

All warnings (new ones prefixed by >>):

   drivers/gpu/drm/i915/icl_dsi.c: In function 
'gen11_dsi_calc_transcoder_timings':
>> drivers/gpu/drm/i915/icl_dsi.c:843:6: warning: initialization discards 
>> 'const' qualifier from pointer target type [-Wdiscarded-qualifiers]
 &pipe_config->base.adjusted_mode;
 ^
   drivers/gpu/drm/i915/icl_dsi.c:845:18: warning: unused variable 'dsi_trans' 
[-Wunused-variable]
 enum transcoder dsi_trans;
 ^
   drivers/gpu/drm/i915/icl_dsi.c:844:12: warning: unused variable 'port' 
[-Wunused-variable]
 enum port port;
   ^~~~
   drivers/gpu/drm/i915/icl_dsi.c:840:27: warning: unused variable 'dev_priv' 
[-Wunused-variable]
 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  ^~~~

vim +/const +843 drivers/gpu/drm/i915/icl_dsi.c

   834  
   835  static
   836  void
   837  gen11_dsi_calc_transcoder_timings(struct intel_encoder *encoder,
   838   const struct intel_crtc_state 
*pipe_config)
   839  {
   840  struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
   841  struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
   842  struct drm_display_mode *adjusted_mode =
 > 843  
 > &pipe_config->base.adjusted_mode;
   844  enum port port;
   845  enum transcoder dsi_trans;
   846  /* horizontal timings */
   847  u16 htotal, hactive, hsync_start, hsync_end, hsync_size;
   848  u16 hfront_porch, hback_porch;
   849  /* vertical timings */
   850  u16 vtotal, vactive, vsync_start, vsync_end, vsync_shift;
   851  
   852  hactive = adjusted_mode->crtc_hdisplay;
   853  htotal = adjusted_mode->crtc_htotal;
   854  hsync_start = adjusted_mode->crtc_hsync_start;
   855  hsync_end = adjusted_mode->crtc_hsync_end;
   856  hsync_size  = hsync_end - hsync_start;
   857  hfront_porch = (adjusted_mode->crtc_hsync_start -
   858  adjusted_mode->crtc_hdisplay);
   859  hback_porch = (adjusted_mode->crtc_htotal -
   860 adjusted_mode->crtc_hsync_end);
   861  vactive = adjusted_mode->crtc_vdisplay;
   862  vtotal = adjusted_mode->crtc_vtotal;
   863  vsync_start = adjusted_mode->crtc_vsync_start;
   864  vsync_end = adjusted_mode->crtc_vsync_end;
   865  vsync_shift = hsync_start - htotal / 2;
   866  
   867  if (intel_dsi->dual_link) {
   868  hactive /= 2;
   869  if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK)
   870  hactive += intel_dsi->pixel_overlap;
   871  htotal /= 2;
   872  }
   873  
   874  /* TRANS_HSYNC register to be programmed only for video mode */
   875  if (intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE) {
   876  
   877  if (intel_dsi->dual_link) {
   878  hsync_start /= 2;
   879  hsync_end /= 2;
   880  }
   881  }
   882  
   883  adjusted_mode->crtc_hdisplay = hactive;
   884  adjusted_mode->crtc_htotal = htotal;
   885  adjusted_mode->crtc_hsync_start = hsync_start;
   886  adjusted_mode->crtc_hsync_end = hsync_end;
   887  adjusted_mode->crtc_vdisplay = vactive;
   888  adjusted_mode->crtc_vtotal = vtotal;
   889  adjusted_mode->crtc_vsync_start = vsync_start;
   890  adjusted_mode->crtc_vsync_end = vsync_end;
   891  }
   892  

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Flush GPU relocs harder for gen3

[Patchwork]

== Series Details ==

Series: drm/i915: Flush GPU relocs harder for gen3
URL   : https://patchwork.freedesktop.org/series/53751/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5287 -> Patchwork_11050


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/53751/revisions/1/mbox/

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_11050:

### IGT changes ###

 Possible regressions 

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- {fi-icl-u3}:PASS -> INCOMPLETE

  
Known issues


  Here are the changes found in Patchwork_11050 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850:   PASS -> INCOMPLETE [fdo#107718]

  
 Possible fixes 

  * igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy:   DMESG-WARN [fdo#102614] -> PASS

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718


Participating hosts (51 -> 45)
--

  Additional (1): fi-glk-dsi 
  Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-ctg-p8600 fi-icl-y 


Build changes
-

* Linux: CI_DRM_5287 -> Patchwork_11050

  CI_DRM_5287: 1f240056ad2a4b4b4f174f652202dd7d9e7d0fed @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4743: edb2db2cf2b6665d7ba3fa9117263302f6307a4f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_11050: f17c6fbe1857e4d105505c4c0261d0cf2f2e69c3 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

f17c6fbe1857 drm/i915: Flush GPU relocs harder for gen3

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11050/
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[Intel-gfx] [PATCH] drivers/base: use a worker for sysfs unbind

[Daniel Vetter]

Drivers might want to remove some sysfs files, which needs the same
locks and ends up angering lockdep. Relevant snippet of the stack
trace:

  kernfs_remove_by_name_ns+0x3b/0x80
  bus_remove_driver+0x92/0xa0
  acpi_video_unregister+0x24/0x40
  i915_driver_unload+0x42/0x130 [i915]
  i915_pci_remove+0x19/0x30 [i915]
  pci_device_remove+0x36/0xb0
  device_release_driver_internal+0x185/0x250
  unbind_store+0xaf/0x180
  kernfs_fop_write+0x104/0x190

I've stumbled over this because some new patches by Ram connect the
snd-hda-intel unload (where we do use sysfs unbind) with the locking
chains in the i915 unload code (but without creating a new loop),
which upset our CI. But the bug is already there and can be easily
reproduced by unbind i915 directly.

No idea whether this is the correct place to fix this, should at least
get CI happy again.

Note that the bus locking is already done by device_release_driver ->
device_release_driver_internal, so I dropped that part. Also note that
we don't recheck that the device is still bound by the same driver,
but neither does the current code do that without races. And I figured
that's a obscure enough corner case to not bother.

Cc: Ramalingam C 
Signed-off-by: Daniel Vetter 
---
 drivers/base/bus.c | 35 +--
 1 file changed, 29 insertions(+), 6 deletions(-)

diff --git a/drivers/base/bus.c b/drivers/base/bus.c
index 8bfd27ec73d6..2cc18545918a 100644
--- a/drivers/base/bus.c
+++ b/drivers/base/bus.c
@@ -174,22 +174,45 @@ static const struct kset_uevent_ops bus_uevent_ops = {
 
 static struct kset *bus_kset;
 
+struct unbind_work {
+   struct work_struct work;
+   struct device *dev;
+};
+
+void unbind_work_fn(struct work_struct *work)
+{
+   struct unbind_work *unbind_work =
+   container_of(work, struct unbind_work, work);
+
+   device_release_driver_internal(unbind_work->dev, NULL,
+  unbind_work->dev->parent);
+   put_device(unbind_work->dev);
+   kfree(unbind_work);
+}
+
 /* Manually detach a device from its associated driver. */
 static ssize_t unbind_store(struct device_driver *drv, const char *buf,
size_t count)
 {
struct bus_type *bus = bus_get(drv->bus);
+   struct unbind_work *unbind_work;
struct device *dev;
int err = -ENODEV;
 
dev = bus_find_device_by_name(bus, NULL, buf);
if (dev && dev->driver == drv) {
-   if (dev->parent && dev->bus->need_parent_lock)
-   device_lock(dev->parent);
-   device_release_driver(dev);
-   if (dev->parent && dev->bus->need_parent_lock)
-   device_unlock(dev->parent);
-   err = count;
+   unbind_work = kmalloc(sizeof(*unbind_work), GFP_KERNEL);
+   if (unbind_work) {
+   unbind_work->dev = dev;
+   get_device(dev);
+   INIT_WORK(&unbind_work->work, unbind_work_fn);
+
+   schedule_work(&unbind_work->work);
+
+   err = count;
+   } else {
+   err = -ENOMEM;
+   }
}
put_device(dev);
bus_put(bus);
-- 
2.20.0.rc1

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[Intel-gfx] [PATCH i-g-t] igt: add timeline test cases v2

[Chunming Zhou]

v2: adapt to new transfer ioctl

Signed-off-by: Chunming Zhou 
---
 include/drm-uapi/drm.h   |   33 ++
 lib/igt_syncobj.c|  206 
 lib/igt_syncobj.h|   19 +
 tests/meson.build|1 +
 tests/syncobj_timeline.c | 1051 ++
 5 files changed, 1310 insertions(+)
 create mode 100644 tests/syncobj_timeline.c

diff --git a/include/drm-uapi/drm.h b/include/drm-uapi/drm.h
index 85c685a2..dcd245d9 100644
--- a/include/drm-uapi/drm.h
+++ b/include/drm-uapi/drm.h
@@ -731,6 +731,8 @@ struct drm_syncobj_handle {
 
 #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)
 #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1)
+/* wait for time point to become available */
+#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2)
 struct drm_syncobj_wait {
__u64 handles;
/* absolute timeout */
@@ -741,11 +743,38 @@ struct drm_syncobj_wait {
__u32 pad;
 };
 
+struct drm_syncobj_timeline_wait {
+__u64 handles;
+/* wait on specific timeline point for every handles*/
+__u64 points;
+/* absolute timeout */
+__s64 timeout_nsec;
+__u32 count_handles;
+__u32 flags;
+__u32 first_signaled; /* only valid when not waiting all */
+__u32 pad;
+};
+
 struct drm_syncobj_array {
__u64 handles;
__u32 count_handles;
__u32 pad;
 };
+struct drm_syncobj_timeline_array {
+   __u64 handles;
+   __u64 points;
+   __u32 count_handles;
+   __u32 pad;
+};
+
+struct drm_syncobj_transfer {
+__u32 src_handle;
+__u32 dst_handle;
+__u64 src_point;
+__u64 dst_point;
+__u32 flags;
+__u32 pad;
+};
 
 /* Query current scanout sequence number */
 struct drm_crtc_get_sequence {
@@ -902,6 +931,10 @@ extern "C" {
 #define DRM_IOCTL_MODE_LIST_LESSEESDRM_IOWR(0xC7, struct 
drm_mode_list_lessees)
 #define DRM_IOCTL_MODE_GET_LEASE   DRM_IOWR(0xC8, struct 
drm_mode_get_lease)
 #define DRM_IOCTL_MODE_REVOKE_LEASEDRM_IOWR(0xC9, struct 
drm_mode_revoke_lease)
+#define DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT DRM_IOWR(0xCA, struct 
drm_syncobj_timeline_wait)
+#define DRM_IOCTL_SYNCOBJ_QUERY DRM_IOWR(0xCB, struct 
drm_syncobj_timeline_array)
+#define DRM_IOCTL_SYNCOBJ_TRANSFERDRM_IOWR(0xCC, struct 
drm_syncobj_transfer)
+#define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNALDRM_IOWR(0xCD, struct 
drm_syncobj_timeline_array)
 
 /**
  * Device specific ioctls should only be in their respective headers
diff --git a/lib/igt_syncobj.c b/lib/igt_syncobj.c
index d9114ca8..efa2adc4 100644
--- a/lib/igt_syncobj.c
+++ b/lib/igt_syncobj.c
@@ -286,3 +286,209 @@ syncobj_signal(int fd, uint32_t *handles, uint32_t count)
 {
igt_assert_eq(__syncobj_signal(fd, handles, count), 0);
 }
+
+static int
+__syncobj_timeline_signal(int fd, uint32_t *handles, uint64_t *points, 
uint32_t count)
+{
+   struct drm_syncobj_timeline_array array = { 0 };
+   int err = 0;
+
+   array.handles = to_user_pointer(handles);
+   array.points = to_user_pointer(points);
+   array.count_handles = count;
+   if (drmIoctl(fd, DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL, &array))
+   err = -errno;
+   return err;
+}
+
+/**
+ * syncobj_signal:
+ * @fd: The DRM file descriptor.
+ * @handles: Array of syncobj handles to signal
+ * @points: List of point of handles to signal.
+ * @count: Count of syncobj handles.
+ *
+ * Signal a set of syncobjs.
+ */
+void
+syncobj_timeline_signal(int fd, uint32_t *handles, uint64_t *points, uint32_t 
count)
+{
+   igt_assert_eq(__syncobj_timeline_signal(fd, handles, points, count), 0);
+}
+int
+__syncobj_timeline_wait_ioctl(int fd, struct drm_syncobj_timeline_wait *args)
+{
+   int err = 0;
+   if (drmIoctl(fd, DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT, args))
+   err = -errno;
+   return err;
+}
+static int
+__syncobj_timeline_wait(int fd, uint32_t *handles, uint64_t *points,
+   unsigned num_handles,
+   int64_t timeout_nsec, unsigned flags,
+   uint32_t *first_signaled)
+{
+   struct drm_syncobj_timeline_wait args;
+   int ret;
+
+   args.handles = to_user_pointer(handles);
+   args.points = (uint64_t)to_user_pointer(points);
+   args.timeout_nsec = timeout_nsec;
+   args.count_handles = num_handles;
+   args.flags = flags;
+   args.first_signaled = 0;
+   args.pad = 0;
+
+   ret = drmIoctl(fd, DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT, &args);
+   if (ret < 0)
+   return -errno;
+
+   if (first_signaled)
+   *first_signaled = args.first_signaled;
+
+   return ret;
+}
+int
+syncobj_timeline_wait_err(int fd, uint32_t *handles, uint64_t *points,
+ unsigned num_handles,
+ int64_t timeout_nsec, unsigned flags)
+{
+   return __syncobj_timeline_wait(fd, handles, points, num_handles,
+

[Intel-gfx] [PATCH libdrm 7/7] add syncobj timeline tests v3

[Chunming Zhou]

v2: drop DRM_SYNCOBJ_CREATE_TYPE_TIMELINE, fix timeout calculation,
fix some warnings
v3: add export/import and cpu signal testing cases

Signed-off-by: Chunming Zhou 
Signed-off-by: Christian König 
---
 tests/amdgpu/Makefile.am |   3 +-
 tests/amdgpu/amdgpu_test.c   |  12 ++
 tests/amdgpu/amdgpu_test.h   |  21 +++
 tests/amdgpu/meson.build |   2 +-
 tests/amdgpu/syncobj_tests.c | 290 +++
 5 files changed, 326 insertions(+), 2 deletions(-)
 create mode 100644 tests/amdgpu/syncobj_tests.c

diff --git a/tests/amdgpu/Makefile.am b/tests/amdgpu/Makefile.am
index 447ff217..d3fbe2bb 100644
--- a/tests/amdgpu/Makefile.am
+++ b/tests/amdgpu/Makefile.am
@@ -33,4 +33,5 @@ amdgpu_test_SOURCES = \
vcn_tests.c \
uve_ib.h \
deadlock_tests.c \
-   vm_tests.c
+   vm_tests.c \
+   syncobj_tests.c
diff --git a/tests/amdgpu/amdgpu_test.c b/tests/amdgpu/amdgpu_test.c
index ebf44098..ff1448f3 100644
--- a/tests/amdgpu/amdgpu_test.c
+++ b/tests/amdgpu/amdgpu_test.c
@@ -56,6 +56,7 @@
 #define UVD_ENC_TESTS_STR "UVD ENC Tests"
 #define DEADLOCK_TESTS_STR "Deadlock Tests"
 #define VM_TESTS_STR "VM Tests"
+#define SYNCOBJ_TIMELINE_TESTS_STR "SYNCOBJ TIMELINE Tests"
 
 /**
  *  Open handles for amdgpu devices
@@ -116,6 +117,12 @@ static CU_SuiteInfo suites[] = {
.pCleanupFunc = suite_vm_tests_clean,
.pTests = vm_tests,
},
+   {
+   .pName = SYNCOBJ_TIMELINE_TESTS_STR,
+   .pInitFunc = suite_syncobj_timeline_tests_init,
+   .pCleanupFunc = suite_syncobj_timeline_tests_clean,
+   .pTests = syncobj_timeline_tests,
+   },
 
CU_SUITE_INFO_NULL,
 };
@@ -165,6 +172,11 @@ static Suites_Active_Status suites_active_stat[] = {
.pName = VM_TESTS_STR,
.pActive = suite_vm_tests_enable,
},
+   {
+   .pName = SYNCOBJ_TIMELINE_TESTS_STR,
+   .pActive = suite_syncobj_timeline_tests_enable,
+   },
+
 };
 
 
diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h
index af81eea8..24d64b64 100644
--- a/tests/amdgpu/amdgpu_test.h
+++ b/tests/amdgpu/amdgpu_test.h
@@ -194,6 +194,27 @@ CU_BOOL suite_vm_tests_enable(void);
  */
 extern CU_TestInfo vm_tests[];
 
+/**
+ * Initialize syncobj timeline test suite
+ */
+int suite_syncobj_timeline_tests_init();
+
+/**
+ * Deinitialize syncobj timeline test suite
+ */
+int suite_syncobj_timeline_tests_clean();
+
+/**
+ * Decide if the suite is enabled by default or not.
+ */
+CU_BOOL suite_syncobj_timeline_tests_enable(void);
+
+/**
+ * Tests in syncobj timeline test suite
+ */
+extern CU_TestInfo syncobj_timeline_tests[];
+
+
 /**
  * Helper functions
  */
diff --git a/tests/amdgpu/meson.build b/tests/amdgpu/meson.build
index 4c1237c6..3ceec715 100644
--- a/tests/amdgpu/meson.build
+++ b/tests/amdgpu/meson.build
@@ -24,7 +24,7 @@ if dep_cunit.found()
 files(
   'amdgpu_test.c', 'basic_tests.c', 'bo_tests.c', 'cs_tests.c',
   'vce_tests.c', 'uvd_enc_tests.c', 'vcn_tests.c', 'deadlock_tests.c',
-  'vm_tests.c',
+  'vm_tests.c', 'syncobj_tests.c',
 ),
 dependencies : [dep_cunit, dep_threads],
 include_directories : [inc_root, inc_drm, 
include_directories('../../amdgpu')],
diff --git a/tests/amdgpu/syncobj_tests.c b/tests/amdgpu/syncobj_tests.c
new file mode 100644
index ..a0c627d7
--- /dev/null
+++ b/tests/amdgpu/syncobj_tests.c
@@ -0,0 +1,290 @@
+/*
+ * Copyright 2017 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+*/
+
+#include "CUnit/Basic.h"
+
+#include "amdgpu_test.h"
+#include "amdgpu_drm.h"
+#include "amdgpu_internal.h"
+#include 
+
+static  amdgpu_device_handle device_handle;
+static  uint32_t  major_version;
+static  uint32_t  minor_version;
+
+static void amdgpu_syncobj_timeline_test(v

[Intel-gfx] [PATCH libdrm 6/7] expose timeline signal/export/import interfaces v2

[Chunming Zhou]

v2: adapt to new one transfer ioctl

Signed-off-by: Chunming Zhou 
---
 amdgpu/amdgpu-symbol-check |  3 ++
 amdgpu/amdgpu.h| 51 +++
 amdgpu/amdgpu_cs.c | 62 ++
 3 files changed, 116 insertions(+)

diff --git a/amdgpu/amdgpu-symbol-check b/amdgpu/amdgpu-symbol-check
index 4553736f..255d25e5 100755
--- a/amdgpu/amdgpu-symbol-check
+++ b/amdgpu/amdgpu-symbol-check
@@ -48,10 +48,13 @@ amdgpu_cs_signal_semaphore
 amdgpu_cs_submit
 amdgpu_cs_submit_raw
 amdgpu_cs_syncobj_export_sync_file
+amdgpu_cs_syncobj_export_sync_file2
 amdgpu_cs_syncobj_import_sync_file
+amdgpu_cs_syncobj_import_sync_file2
 amdgpu_cs_syncobj_query
 amdgpu_cs_syncobj_reset
 amdgpu_cs_syncobj_signal
+amdgpu_cs_syncobj_timeline_signal
 amdgpu_cs_syncobj_timeline_wait
 amdgpu_cs_syncobj_wait
 amdgpu_cs_wait_fences
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 330658a0..5536d2d5 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -1469,6 +1469,23 @@ int amdgpu_cs_syncobj_reset(amdgpu_device_handle dev,
 int amdgpu_cs_syncobj_signal(amdgpu_device_handle dev,
 const uint32_t *syncobjs, uint32_t syncobj_count);
 
+/**
+ * Signal kernel timeline sync objects.
+ *
+ * \param dev   - \c [in] device handle
+ * \param syncobjs  - \c [in] array of sync object handles
+ * \param points   - \c [in] array of timeline points
+ * \param syncobj_count - \c [in] number of handles in syncobjs
+ *
+ * \return   0 on success\n
+ *  <0 - Negative POSIX Error code
+ *
+*/
+int amdgpu_cs_syncobj_timeline_signal(amdgpu_device_handle dev,
+ const uint32_t *syncobjs,
+ uint64_t *points,
+ uint32_t syncobj_count);
+
 /**
  *  Wait for one or all sync objects to signal.
  *
@@ -1586,7 +1603,41 @@ int 
amdgpu_cs_syncobj_export_sync_file(amdgpu_device_handle dev,
 int amdgpu_cs_syncobj_import_sync_file(amdgpu_device_handle dev,
   uint32_t syncobj,
   int sync_file_fd);
+/**
+ *  Export kernel timeline sync object to a sync_file.
+ *
+ * \param   dev- \c [in] device handle
+ * \param   syncobj- \c [in] sync object handle
+ * \param   point  - \c [in] timeline point
+ * \param   flags  - \c [in] flags
+ * \param   sync_file_fd - \c [out] sync_file file descriptor.
+ *
+ * \return   0 on success\n
+ *  <0 - Negative POSIX Error code
+ *
+ */
+int amdgpu_cs_syncobj_export_sync_file2(amdgpu_device_handle dev,
+   uint32_t syncobj,
+   uint64_t point,
+   uint32_t flags,
+   int *sync_file_fd);
 
+/**
+ *  Import kernel timeline sync object from a sync_file.
+ *
+ * \param   dev- \c [in] device handle
+ * \param   syncobj- \c [in] sync object handle
+ * \param   point  - \c [in] timeline point
+ * \param   sync_file_fd - \c [in] sync_file file descriptor.
+ *
+ * \return   0 on success\n
+ *  <0 - Negative POSIX Error code
+ *
+ */
+int amdgpu_cs_syncobj_import_sync_file2(amdgpu_device_handle dev,
+   uint32_t syncobj,
+   uint64_t point,
+   int sync_file_fd);
 /**
  * Export an amdgpu fence as a handle (syncobj or fd).
  *
diff --git a/amdgpu/amdgpu_cs.c b/amdgpu/amdgpu_cs.c
index e4a547c6..f9feee60 100644
--- a/amdgpu/amdgpu_cs.c
+++ b/amdgpu/amdgpu_cs.c
@@ -649,6 +649,18 @@ drm_public int 
amdgpu_cs_syncobj_signal(amdgpu_device_handle dev,
return drmSyncobjSignal(dev->fd, syncobjs, syncobj_count);
 }
 
+drm_public int amdgpu_cs_syncobj_timeline_signal(amdgpu_device_handle dev,
+const uint32_t *syncobjs,
+uint64_t *points,
+uint32_t syncobj_count)
+{
+   if (NULL == dev)
+   return -EINVAL;
+
+   return drmSyncobjTimelineSignal(dev->fd, syncobjs,
+   points, syncobj_count);
+}
+
 drm_public int amdgpu_cs_syncobj_wait(amdgpu_device_handle dev,
  uint32_t *handles, unsigned num_handles,
  int64_t timeout_nsec, unsigned flags,
@@ -724,6 +736,56 @@ drm_public int 
amdgpu_cs_syncobj_import_sync_file(amdgpu_device_handle dev,
return drmSyncobjImportSyncFile(dev->fd, syncobj, sync_file_fd);
 }
 
+drm_public int amdgpu_cs_syncobj_export_sync_file2(amdgpu_device_handle dev,
+  uint32_t syncobj,
+  uint64_t point,
+  uint32_t fl

[Intel-gfx] [PATCH libdrm 5/7] add timeline signal/transfer ioctls v2

[Chunming Zhou]

v2: use one transfer ioctl

Signed-off-by: Chunming Zhou 
---
 xf86drm.c | 33 +
 xf86drm.h |  6 ++
 2 files changed, 39 insertions(+)

diff --git a/xf86drm.c b/xf86drm.c
index 9816b3b2..2a089616 100644
--- a/xf86drm.c
+++ b/xf86drm.c
@@ -4278,6 +4278,21 @@ drm_public int drmSyncobjSignal(int fd, const uint32_t 
*handles,
 return ret;
 }
 
+drm_public int drmSyncobjTimelineSignal(int fd, const uint32_t *handles,
+   uint64_t *points, uint32_t handle_count)
+{
+struct drm_syncobj_timeline_array args;
+int ret;
+
+memclear(args);
+args.handles = (uintptr_t)handles;
+args.points = (uint64_t)(uintptr_t)points;
+args.count_handles = handle_count;
+
+ret = drmIoctl(fd, DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL, &args);
+return ret;
+}
+
 drm_public int drmSyncobjTimelineWait(int fd, uint32_t *handles, uint64_t 
*points,
  unsigned num_handles,
  int64_t timeout_nsec, unsigned flags,
@@ -4320,4 +4335,22 @@ drm_public int drmSyncobjQuery(int fd, uint32_t 
*handles, uint64_t *points,
 return 0;
 }
 
+drm_public int drmSyncobjTransfer(int fd,
+ uint32_t dst_handle, uint64_t dst_point,
+ uint32_t src_handle, uint64_t src_point,
+ uint32_t flags)
+{
+struct drm_syncobj_transfer args;
+int ret;
+
+memclear(args);
+args.src_handle = src_handle;
+args.dst_handle = dst_handle;
+args.src_point = src_point;
+args.dst_point = dst_point;
+args.flags = flags;
+
+ret = drmIoctl(fd, DRM_IOCTL_SYNCOBJ_TRANSFER, &args);
 
+return ret;
+}
diff --git a/xf86drm.h b/xf86drm.h
index 49a40633..799d9b9e 100644
--- a/xf86drm.h
+++ b/xf86drm.h
@@ -875,12 +875,18 @@ extern int drmSyncobjWait(int fd, uint32_t *handles, 
unsigned num_handles,
  uint32_t *first_signaled);
 extern int drmSyncobjReset(int fd, const uint32_t *handles, uint32_t 
handle_count);
 extern int drmSyncobjSignal(int fd, const uint32_t *handles, uint32_t 
handle_count);
+extern int drmSyncobjTimelineSignal(int fd, const uint32_t *handles,
+   uint64_t *points, uint32_t handle_count);
 extern int drmSyncobjTimelineWait(int fd, uint32_t *handles, uint64_t *points,
  unsigned num_handles,
  int64_t timeout_nsec, unsigned flags,
  uint32_t *first_signaled);
 extern int drmSyncobjQuery(int fd, uint32_t *handles, uint64_t *points,
   uint32_t handle_count);
+extern int drmSyncobjTransfer(int fd,
+ uint32_t dst_handle, uint64_t dst_point,
+ uint32_t src_handle, uint64_t src_point,
+ uint32_t flags);
 
 #if defined(__cplusplus)
 }
-- 
2.17.1

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[Intel-gfx] [PATCH libdrm 4/7] wrap syncobj timeline query/wait APIs for amdgpu v3

[Chunming Zhou]

v2: symbos are stored in lexical order.
v3: drop export/import and extra query indirection

Signed-off-by: Chunming Zhou 
Signed-off-by: Christian König 
---
 amdgpu/amdgpu-symbol-check |  2 ++
 amdgpu/amdgpu.h| 39 ++
 amdgpu/amdgpu_cs.c | 23 ++
 3 files changed, 64 insertions(+)

diff --git a/amdgpu/amdgpu-symbol-check b/amdgpu/amdgpu-symbol-check
index 6f5e0f95..4553736f 100755
--- a/amdgpu/amdgpu-symbol-check
+++ b/amdgpu/amdgpu-symbol-check
@@ -49,8 +49,10 @@ amdgpu_cs_submit
 amdgpu_cs_submit_raw
 amdgpu_cs_syncobj_export_sync_file
 amdgpu_cs_syncobj_import_sync_file
+amdgpu_cs_syncobj_query
 amdgpu_cs_syncobj_reset
 amdgpu_cs_syncobj_signal
+amdgpu_cs_syncobj_timeline_wait
 amdgpu_cs_syncobj_wait
 amdgpu_cs_wait_fences
 amdgpu_cs_wait_semaphore
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index dc51659a..330658a0 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -1489,6 +1489,45 @@ int amdgpu_cs_syncobj_wait(amdgpu_device_handle dev,
   int64_t timeout_nsec, unsigned flags,
   uint32_t *first_signaled);
 
+/**
+ *  Wait for one or all sync objects on their points to signal.
+ *
+ * \param   dev- \c [in] self-explanatory
+ * \param   handles - \c [in] array of sync object handles
+ * \param   points - \c [in] array of sync points to wait
+ * \param   num_handles - \c [in] self-explanatory
+ * \param   timeout_nsec - \c [in] self-explanatory
+ * \param   flags   - \c [in] a bitmask of DRM_SYNCOBJ_WAIT_FLAGS_*
+ * \param   first_signaled - \c [in] self-explanatory
+ *
+ * \return   0 on success\n
+ *  -ETIME - Timeout
+ *  <0 - Negative POSIX Error code
+ *
+ */
+int amdgpu_cs_syncobj_timeline_wait(amdgpu_device_handle dev,
+   uint32_t *handles, uint64_t *points,
+   unsigned num_handles,
+   int64_t timeout_nsec, unsigned flags,
+   uint32_t *first_signaled);
+/**
+ *  Query sync objects payloads.
+ *
+ * \param   dev- \c [in] self-explanatory
+ * \param   handles - \c [in] array of sync object handles
+ * \param   points - \c [out] array of sync points returned, which presents
+ * syncobj payload.
+ * \param   num_handles - \c [in] self-explanatory
+ *
+ * \return   0 on success\n
+ *  -ETIME - Timeout
+ *  <0 - Negative POSIX Error code
+ *
+ */
+int amdgpu_cs_syncobj_query(amdgpu_device_handle dev,
+   uint32_t *handles, uint64_t *points,
+   unsigned num_handles);
+
 /**
  *  Export kernel sync object to shareable fd.
  *
diff --git a/amdgpu/amdgpu_cs.c b/amdgpu/amdgpu_cs.c
index 3b8231aa..e4a547c6 100644
--- a/amdgpu/amdgpu_cs.c
+++ b/amdgpu/amdgpu_cs.c
@@ -661,6 +661,29 @@ drm_public int amdgpu_cs_syncobj_wait(amdgpu_device_handle 
dev,
  flags, first_signaled);
 }
 
+drm_public int amdgpu_cs_syncobj_timeline_wait(amdgpu_device_handle dev,
+  uint32_t *handles, uint64_t 
*points,
+  unsigned num_handles,
+  int64_t timeout_nsec, unsigned 
flags,
+  uint32_t *first_signaled)
+{
+   if (NULL == dev)
+   return -EINVAL;
+
+   return drmSyncobjTimelineWait(dev->fd, handles, points, num_handles,
+ timeout_nsec, flags, first_signaled);
+}
+
+drm_public int amdgpu_cs_syncobj_query(amdgpu_device_handle dev,
+  uint32_t *handles, uint64_t *points,
+  unsigned num_handles)
+{
+   if (NULL == dev)
+   return -EINVAL;
+
+   return drmSyncobjQuery(dev->fd, handles, points, num_handles);
+}
+
 drm_public int amdgpu_cs_export_syncobj(amdgpu_device_handle dev,
uint32_t handle,
int *shared_fd)
-- 
2.17.1

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[Intel-gfx] [PATCH libdrm 3/7] add timeline wait/query ioctl v2

[Chunming Zhou]

v2: drop export/import

Signed-off-by: Chunming Zhou 
---
 xf86drm.c | 44 
 xf86drm.h |  6 ++
 2 files changed, 50 insertions(+)

diff --git a/xf86drm.c b/xf86drm.c
index 71ad54ba..9816b3b2 100644
--- a/xf86drm.c
+++ b/xf86drm.c
@@ -4277,3 +4277,47 @@ drm_public int drmSyncobjSignal(int fd, const uint32_t 
*handles,
 ret = drmIoctl(fd, DRM_IOCTL_SYNCOBJ_SIGNAL, &args);
 return ret;
 }
+
+drm_public int drmSyncobjTimelineWait(int fd, uint32_t *handles, uint64_t 
*points,
+ unsigned num_handles,
+ int64_t timeout_nsec, unsigned flags,
+ uint32_t *first_signaled)
+{
+struct drm_syncobj_timeline_wait args;
+int ret;
+
+memclear(args);
+args.handles = (uintptr_t)handles;
+args.points = (uint64_t)(uintptr_t)points;
+args.timeout_nsec = timeout_nsec;
+args.count_handles = num_handles;
+args.flags = flags;
+
+ret = drmIoctl(fd, DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT, &args);
+if (ret < 0)
+return -errno;
+
+if (first_signaled)
+*first_signaled = args.first_signaled;
+return ret;
+}
+
+
+drm_public int drmSyncobjQuery(int fd, uint32_t *handles, uint64_t *points,
+  uint32_t handle_count)
+{
+struct drm_syncobj_timeline_array args;
+int ret;
+
+memclear(args);
+args.handles = (uintptr_t)handles;
+args.points = (uint64_t)(uintptr_t)points;
+args.count_handles = handle_count;
+
+ret = drmIoctl(fd, DRM_IOCTL_SYNCOBJ_QUERY, &args);
+if (ret)
+return ret;
+return 0;
+}
+
+
diff --git a/xf86drm.h b/xf86drm.h
index 7773d71a..49a40633 100644
--- a/xf86drm.h
+++ b/xf86drm.h
@@ -875,6 +875,12 @@ extern int drmSyncobjWait(int fd, uint32_t *handles, 
unsigned num_handles,
  uint32_t *first_signaled);
 extern int drmSyncobjReset(int fd, const uint32_t *handles, uint32_t 
handle_count);
 extern int drmSyncobjSignal(int fd, const uint32_t *handles, uint32_t 
handle_count);
+extern int drmSyncobjTimelineWait(int fd, uint32_t *handles, uint64_t *points,
+ unsigned num_handles,
+ int64_t timeout_nsec, unsigned flags,
+ uint32_t *first_signaled);
+extern int drmSyncobjQuery(int fd, uint32_t *handles, uint64_t *points,
+  uint32_t handle_count);
 
 #if defined(__cplusplus)
 }
-- 
2.17.1

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[Intel-gfx] [PATCH libdrm 2/7] addr cs chunk for syncobj timeline

[Chunming Zhou]

Signed-off-by: Chunming Zhou 
---
 include/drm/amdgpu_drm.h | 9 +
 1 file changed, 9 insertions(+)

diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index 1ceec56d..a3c067dd 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -517,6 +517,8 @@ struct drm_amdgpu_gem_va {
 #define AMDGPU_CHUNK_ID_SYNCOBJ_IN  0x04
 #define AMDGPU_CHUNK_ID_SYNCOBJ_OUT 0x05
 #define AMDGPU_CHUNK_ID_BO_HANDLES  0x06
+#define AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_WAIT0x07
+#define AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_SIGNAL  0x08
 
 struct drm_amdgpu_cs_chunk {
__u32   chunk_id;
@@ -592,6 +594,13 @@ struct drm_amdgpu_cs_chunk_sem {
__u32 handle;
 };
 
+struct drm_amdgpu_cs_chunk_syncobj {
+   __u32 handle;
+   __u32 flags;
+   __u64 point;
+};
+
+
 #define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ 0
 #define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD  1
 #define AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD2
-- 
2.17.1

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[Intel-gfx] [PATCH libdrm 1/7] new syncobj extension v3

[Chunming Zhou]

v2: drop not implemented IOCTLs and flags
v3: add transfer/signal ioctls

Signed-off-by: Chunming Zhou 
Signed-off-by: Christian König 
---
 include/drm/drm.h | 35 +++
 1 file changed, 35 insertions(+)

diff --git a/include/drm/drm.h b/include/drm/drm.h
index 85c685a2..26f51bca 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -729,8 +729,18 @@ struct drm_syncobj_handle {
__u32 pad;
 };
 
+struct drm_syncobj_transfer {
+__u32 src_handle;
+__u32 dst_handle;
+__u64 src_point;
+__u64 dst_point;
+__u32 flags;
+__u32 pad;
+};
+
 #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)
 #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1)
+#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2)
 struct drm_syncobj_wait {
__u64 handles;
/* absolute timeout */
@@ -741,12 +751,31 @@ struct drm_syncobj_wait {
__u32 pad;
 };
 
+struct drm_syncobj_timeline_wait {
+__u64 handles;
+/* wait on specific timeline point for every handles*/
+__u64 points;
+/* absolute timeout */
+__s64 timeout_nsec;
+__u32 count_handles;
+__u32 flags;
+__u32 first_signaled; /* only valid when not waiting all */
+__u32 pad;
+};
+
 struct drm_syncobj_array {
__u64 handles;
__u32 count_handles;
__u32 pad;
 };
 
+struct drm_syncobj_timeline_array {
+__u64 handles;
+__u64 points;
+__u32 count_handles;
+__u32 pad;
+};
+
 /* Query current scanout sequence number */
 struct drm_crtc_get_sequence {
__u32 crtc_id;  /* requested crtc_id */
@@ -903,6 +932,12 @@ extern "C" {
 #define DRM_IOCTL_MODE_GET_LEASE   DRM_IOWR(0xC8, struct 
drm_mode_get_lease)
 #define DRM_IOCTL_MODE_REVOKE_LEASEDRM_IOWR(0xC9, struct 
drm_mode_revoke_lease)
 
+#define DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT DRM_IOWR(0xCA, struct 
drm_syncobj_timeline_wait)
+#define DRM_IOCTL_SYNCOBJ_QUERY DRM_IOWR(0xCB, struct 
drm_syncobj_timeline_array)
+#define DRM_IOCTL_SYNCOBJ_TRANSFER DRM_IOWR(0xCC, struct 
drm_syncobj_transfer)
+#define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL   DRM_IOWR(0xCD, struct 
drm_syncobj_timeline_array)
+
+
 /**
  * Device specific ioctls should only be in their respective headers
  * The device specific ioctl range is from 0x40 to 0x9f.
-- 
2.17.1

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[Intel-gfx] [PATCH 07/10] drm/amdgpu: add timeline support in amdgpu CS v2

[Chunming Zhou]

syncobj wait/signal operation is appending in command submission.
v2: separate to two kinds in/out_deps functions

Signed-off-by: Chunming Zhou 
Cc: Daniel Rakos 
Cc: Jason Ekstrand 
Cc: Bas Nieuwenhuizen 
Cc: Dave Airlie 
Cc: Christian König 
Cc: Chris Wilson 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h|  10 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 147 +
 include/uapi/drm/amdgpu_drm.h  |   8 ++
 3 files changed, 140 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 42f882c633ee..f9160ea1396a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -545,6 +545,12 @@ struct amdgpu_cs_chunk {
void*kdata;
 };
 
+struct amdgpu_cs_post_dep {
+   struct drm_syncobj *syncobj;
+   struct dma_fence_chain *chain;
+   u64 point;
+};
+
 struct amdgpu_cs_parser {
struct amdgpu_device*adev;
struct drm_file *filp;
@@ -574,8 +580,8 @@ struct amdgpu_cs_parser {
/* user fence */
struct amdgpu_bo_list_entry uf_entry;
 
-   unsigned num_post_dep_syncobjs;
-   struct drm_syncobj **post_dep_syncobjs;
+   unsignednum_post_deps;
+   struct amdgpu_cs_post_dep   *post_deps;
 };
 
 static inline u32 amdgpu_get_ib_value(struct amdgpu_cs_parser *p,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index dc54e9efd910..580f1ea27157 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -213,6 +213,8 @@ static int amdgpu_cs_parser_init(struct amdgpu_cs_parser 
*p, union drm_amdgpu_cs
case AMDGPU_CHUNK_ID_DEPENDENCIES:
case AMDGPU_CHUNK_ID_SYNCOBJ_IN:
case AMDGPU_CHUNK_ID_SYNCOBJ_OUT:
+   case AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_WAIT:
+   case AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_SIGNAL:
break;
 
default:
@@ -792,9 +794,11 @@ static void amdgpu_cs_parser_fini(struct amdgpu_cs_parser 
*parser, int error,
ttm_eu_backoff_reservation(&parser->ticket,
   &parser->validated);
 
-   for (i = 0; i < parser->num_post_dep_syncobjs; i++)
-   drm_syncobj_put(parser->post_dep_syncobjs[i]);
-   kfree(parser->post_dep_syncobjs);
+   for (i = 0; i < parser->num_post_deps; i++) {
+   drm_syncobj_put(parser->post_deps[i].syncobj);
+   kfree(parser->post_deps[i].chain);
+   }
+   kfree(parser->post_deps);
 
dma_fence_put(parser->fence);
 
@@ -1100,13 +1104,18 @@ static int amdgpu_cs_process_fence_dep(struct 
amdgpu_cs_parser *p,
 }
 
 static int amdgpu_syncobj_lookup_and_add_to_sync(struct amdgpu_cs_parser *p,
-uint32_t handle)
+uint32_t handle, u64 point,
+u64 flags)
 {
-   int r;
struct dma_fence *fence;
-   r = drm_syncobj_find_fence(p->filp, handle, 0, 0, &fence);
-   if (r)
+   int r;
+
+   r = drm_syncobj_find_fence(p->filp, handle, point, flags, &fence);
+   if (r) {
+   DRM_ERROR("syncobj %u failed to find fence @ %llu (%d)!\n",
+ handle, point, r);
return r;
+   }
 
r = amdgpu_sync_fence(p->adev, &p->job->sync, fence, true);
dma_fence_put(fence);
@@ -1117,46 +1126,115 @@ static int 
amdgpu_syncobj_lookup_and_add_to_sync(struct amdgpu_cs_parser *p,
 static int amdgpu_cs_process_syncobj_in_dep(struct amdgpu_cs_parser *p,
struct amdgpu_cs_chunk *chunk)
 {
+   struct drm_amdgpu_cs_chunk_sem *deps;
unsigned num_deps;
int i, r;
-   struct drm_amdgpu_cs_chunk_sem *deps;
 
deps = (struct drm_amdgpu_cs_chunk_sem *)chunk->kdata;
num_deps = chunk->length_dw * 4 /
sizeof(struct drm_amdgpu_cs_chunk_sem);
+   for (i = 0; i < num_deps; ++i) {
+   r = amdgpu_syncobj_lookup_and_add_to_sync(p, deps[i].handle,
+ 0, 0);
+   if (r)
+   return r;
+   }
+
+   return 0;
+}
 
+
+static int amdgpu_cs_process_syncobj_timeline_in_dep(struct amdgpu_cs_parser 
*p,
+struct amdgpu_cs_chunk 
*chunk)
+{
+   struct drm_amdgpu_cs_chunk_syncobj *syncobj_deps;
+   unsigned num_deps;
+   int i, r;
+
+   syncobj_deps = (struct drm_amdgpu_cs_chunk_syncobj *)chunk->kdata;
+   num_deps = chunk->length_dw * 4 /
+   sizeof(struct drm_amdgpu_cs_chunk_syncobj);
for (i = 0; i < num_deps; ++i) {
-   r = amdgpu_syncobj_lookup_and_add_to_sync(p, deps[i].handle)

[Intel-gfx] [PATCH 10/10] drm/amdgpu: update version for timeline syncobj support in amdgpu

[Chunming Zhou]

Signed-off-by: Chunming Zhou 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 8de55f7f1a3a..cafafdb1d03f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -71,9 +71,10 @@
  * - 3.25.0 - Add support for sensor query info (stable pstate sclk/mclk).
  * - 3.26.0 - GFX9: Process AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE.
  * - 3.27.0 - Add new chunk to to AMDGPU_CS to enable BO_LIST creation.
+ * - 3.28.0 - Add syncobj timeline support to AMDGPU_CS.
  */
 #define KMS_DRIVER_MAJOR   3
-#define KMS_DRIVER_MINOR   27
+#define KMS_DRIVER_MINOR   28
 #define KMS_DRIVER_PATCHLEVEL  0
 
 int amdgpu_vram_limit = 0;
-- 
2.17.1

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[Intel-gfx] [PATCH 08/10] drm/syncobj: add transition iotcls between binary and timeline v2

[Chunming Zhou]

we need to import/export timeline point.

v2: unify to one transfer ioctl

Signed-off-by: Chunming Zhou 
---
 drivers/gpu/drm/drm_internal.h |  2 +
 drivers/gpu/drm/drm_ioctl.c|  2 +
 drivers/gpu/drm/drm_syncobj.c  | 79 ++
 include/uapi/drm/drm.h | 10 +
 4 files changed, 93 insertions(+)

diff --git a/drivers/gpu/drm/drm_internal.h b/drivers/gpu/drm/drm_internal.h
index dab4d5936441..06c2adc4950e 100644
--- a/drivers/gpu/drm/drm_internal.h
+++ b/drivers/gpu/drm/drm_internal.h
@@ -176,6 +176,8 @@ int drm_syncobj_handle_to_fd_ioctl(struct drm_device *dev, 
void *data,
   struct drm_file *file_private);
 int drm_syncobj_fd_to_handle_ioctl(struct drm_device *dev, void *data,
   struct drm_file *file_private);
+int drm_syncobj_transfer_ioctl(struct drm_device *dev, void *data,
+  struct drm_file *file_private);
 int drm_syncobj_wait_ioctl(struct drm_device *dev, void *data,
   struct drm_file *file_private);
 int drm_syncobj_timeline_wait_ioctl(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index 7578ef6dc1d1..e9d4bed12783 100644
--- a/drivers/gpu/drm/drm_ioctl.c
+++ b/drivers/gpu/drm/drm_ioctl.c
@@ -673,6 +673,8 @@ static const struct drm_ioctl_desc drm_ioctls[] = {
  DRM_UNLOCKED|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF(DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE, 
drm_syncobj_fd_to_handle_ioctl,
  DRM_UNLOCKED|DRM_RENDER_ALLOW),
+   DRM_IOCTL_DEF(DRM_IOCTL_SYNCOBJ_TRANSFER, drm_syncobj_transfer_ioctl,
+ DRM_UNLOCKED|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF(DRM_IOCTL_SYNCOBJ_WAIT, drm_syncobj_wait_ioctl,
  DRM_UNLOCKED|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF(DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT, 
drm_syncobj_timeline_wait_ioctl,
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index 282982e58dbd..82f0ab96813e 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -670,6 +670,85 @@ drm_syncobj_fd_to_handle_ioctl(struct drm_device *dev, 
void *data,
&args->handle);
 }
 
+static int drm_syncobj_binary_to_timeline(struct drm_file *file_private,
+ struct drm_syncobj_transfer *args)
+{
+   struct drm_syncobj *timeline_syncobj = NULL;
+   struct dma_fence *fence;
+   struct dma_fence_chain *chain;
+   int ret;
+
+   timeline_syncobj = drm_syncobj_find(file_private, args->dst_handle);
+   if (!timeline_syncobj) {
+   return -ENOENT;
+   }
+   ret = drm_syncobj_find_fence(file_private, args->src_handle, 0, 0,
+&fence);
+   if (ret)
+   goto err;
+   chain = kzalloc(sizeof(struct dma_fence_chain), GFP_KERNEL);
+   if (!chain) {
+   ret = -ENOMEM;
+   goto err1;
+   }
+   drm_syncobj_add_point(timeline_syncobj, chain, fence, args->dst_point);
+err1:
+   dma_fence_put(fence);
+err:
+   drm_syncobj_put(timeline_syncobj);
+
+   return ret;
+}
+
+static int
+drm_syncobj_timeline_to_binary(struct drm_file *file_private,
+  struct drm_syncobj_transfer *args)
+{
+   struct drm_syncobj *binary_syncobj = NULL;
+   struct dma_fence *fence;
+   int ret;
+
+   binary_syncobj = drm_syncobj_find(file_private, args->dst_handle);
+   if (!binary_syncobj)
+   return -ENOENT;
+   ret = drm_syncobj_find_fence(file_private, args->src_handle,
+args->src_point, args->flags, &fence);
+   if (ret)
+   goto err;
+   drm_syncobj_replace_fence(binary_syncobj, fence);
+   dma_fence_put(fence);
+err:
+   drm_syncobj_put(binary_syncobj);
+
+   return ret;
+}
+int
+drm_syncobj_transfer_ioctl(struct drm_device *dev, void *data,
+  struct drm_file *file_private)
+{
+   struct drm_syncobj_transfer *args = data;
+   int ret;
+
+   if (!drm_core_check_feature(dev, DRIVER_SYNCOBJ))
+   return -ENODEV;
+
+   if (args->pad)
+   return -EINVAL;
+
+   if (args->src_point && args->dst_point)
+   return -EINVAL;
+
+   if (!args->src_point && !args->dst_point)
+   return -EINVAL;
+
+   if (!args->src_point)
+   ret = drm_syncobj_binary_to_timeline(file_private, args);
+   else
+   ret = drm_syncobj_timeline_to_binary(file_private, args);
+
+   return ret;
+}
+
 static void syncobj_wait_fence_func(struct dma_fence *fence,
struct dma_fence_cb *cb)
 {
diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h
index b2c36f2b2599..4c1e2e6579fa 100644
--- a/include/uapi/drm/drm.h
+++ b/include/uapi/drm/drm.h
@@ 

[Intel-gfx] [PATCH 09/10] drm/syncobj: add timeline signal ioctl for syncobj v2

[Chunming Zhou]

v2: individually allocate chain array, since chain node is free independently.

Signed-off-by: Chunming Zhou 
---
 drivers/gpu/drm/drm_internal.h |  2 +
 drivers/gpu/drm/drm_ioctl.c|  2 +
 drivers/gpu/drm/drm_syncobj.c  | 81 ++
 include/uapi/drm/drm.h |  1 +
 4 files changed, 86 insertions(+)

diff --git a/drivers/gpu/drm/drm_internal.h b/drivers/gpu/drm/drm_internal.h
index 06c2adc4950e..d7a19bd89cb2 100644
--- a/drivers/gpu/drm/drm_internal.h
+++ b/drivers/gpu/drm/drm_internal.h
@@ -186,6 +186,8 @@ int drm_syncobj_reset_ioctl(struct drm_device *dev, void 
*data,
struct drm_file *file_private);
 int drm_syncobj_signal_ioctl(struct drm_device *dev, void *data,
 struct drm_file *file_private);
+int drm_syncobj_timeline_signal_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file_private);
 int drm_syncobj_query_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_private);
 
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index e9d4bed12783..a50dc62dc87b 100644
--- a/drivers/gpu/drm/drm_ioctl.c
+++ b/drivers/gpu/drm/drm_ioctl.c
@@ -683,6 +683,8 @@ static const struct drm_ioctl_desc drm_ioctls[] = {
  DRM_UNLOCKED|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF(DRM_IOCTL_SYNCOBJ_SIGNAL, drm_syncobj_signal_ioctl,
  DRM_UNLOCKED|DRM_RENDER_ALLOW),
+   DRM_IOCTL_DEF(DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL, 
drm_syncobj_timeline_signal_ioctl,
+ DRM_UNLOCKED|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF(DRM_IOCTL_SYNCOBJ_QUERY, drm_syncobj_query_ioctl,
  DRM_UNLOCKED|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF(DRM_IOCTL_CRTC_GET_SEQUENCE, drm_crtc_get_sequence_ioctl, 
DRM_UNLOCKED),
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index 82f0ab96813e..84a52da5ed7b 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -1178,6 +1178,87 @@ drm_syncobj_signal_ioctl(struct drm_device *dev, void 
*data,
return ret;
 }
 
+int
+drm_syncobj_timeline_signal_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file_private)
+{
+   struct drm_syncobj_timeline_array *args = data;
+   struct drm_syncobj **syncobjs;
+   struct dma_fence_chain **chains;
+   uint64_t *points;
+   uint32_t i, j, timeline_count = 0;
+   int ret;
+
+   if (!drm_core_check_feature(dev, DRIVER_SYNCOBJ))
+   return -EOPNOTSUPP;
+
+   if (args->pad != 0)
+   return -EINVAL;
+
+   if (args->count_handles == 0)
+   return -EINVAL;
+
+   ret = drm_syncobj_array_find(file_private,
+u64_to_user_ptr(args->handles),
+args->count_handles,
+&syncobjs);
+   if (ret < 0)
+   return ret;
+
+   points = kmalloc_array(args->count_handles, sizeof(*points),
+  GFP_KERNEL);
+   if (!points) {
+   ret = -ENOMEM;
+   goto out;
+   }
+   if (!u64_to_user_ptr(args->points)) {
+   memset(points, 0, args->count_handles * sizeof(uint64_t));
+   } else if (copy_from_user(points, u64_to_user_ptr(args->points),
+ sizeof(uint64_t) * args->count_handles)) {
+   ret = -EFAULT;
+   goto err_points;
+   }
+
+
+   for (i = 0; i < args->count_handles; i++) {
+   if (points[i])
+   timeline_count++;
+   }
+   chains = kmalloc_array(timeline_count, sizeof(void *), GFP_KERNEL);
+   if (!chains) {
+   ret = -ENOMEM;
+   goto err_points;
+   }
+   for (i = 0; i < timeline_count; i++) {
+   chains[i] = kzalloc(sizeof(struct dma_fence_chain), GFP_KERNEL);
+   if (!chains[i]) {
+   for (j = 0; j < i; j++)
+   kfree(chains[j]);
+   ret = -ENOMEM;
+   goto err_chains;
+   }
+   }
+
+   for (i = 0, j = 0; i < args->count_handles; i++) {
+   if (points[i]) {
+   struct dma_fence *fence = dma_fence_get_stub();
+
+   drm_syncobj_add_point(syncobjs[i], chains[j++],
+ fence, points[i]);
+   dma_fence_put(fence);
+   } else
+   drm_syncobj_assign_null_handle(syncobjs[i]);
+   }
+err_chains:
+   kfree(chains);
+err_points:
+   kfree(points);
+out:
+   drm_syncobj_array_free(syncobjs, args->count_handles);
+
+   return ret;
+}
+
 int drm_syncobj_query_ioctl(struct drm_device *dev, void *data,
struct d

[Intel-gfx] [PATCH 06/10] drm/syncobj: use the timeline point in drm_syncobj_find_fence v3

[Chunming Zhou]

From: Christian König 

Implement finding the right timeline point in drm_syncobj_find_fence.

v2: return -EINVAL when the point is not submitted yet.
v3: fix reference counting bug, add flags handling as well

Signed-off-by: Christian König 
---
 drivers/gpu/drm/drm_syncobj.c | 43 ---
 1 file changed, 40 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index f97fa00ca1d0..282982e58dbd 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -231,16 +231,53 @@ int drm_syncobj_find_fence(struct drm_file *file_private,
   struct dma_fence **fence)
 {
struct drm_syncobj *syncobj = drm_syncobj_find(file_private, handle);
-   int ret = 0;
+   struct syncobj_wait_entry wait;
+   int ret;
 
if (!syncobj)
return -ENOENT;
 
*fence = drm_syncobj_fence_get(syncobj);
-   if (!*fence) {
+   drm_syncobj_put(syncobj);
+
+   if (*fence) {
+   ret = dma_fence_chain_find_seqno(fence, point);
+   if (!ret)
+   return 0;
+   dma_fence_put(*fence);
+   } else {
ret = -EINVAL;
}
-   drm_syncobj_put(syncobj);
+
+   if (!(flags & DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT))
+   return ret;
+
+   memset(&wait, 0, sizeof(wait));
+   wait.task = current;
+   wait.point = point;
+   drm_syncobj_fence_add_wait(syncobj, &wait);
+
+   do {
+   set_current_state(TASK_INTERRUPTIBLE);
+   if (wait.fence) {
+   ret = 0;
+   break;
+   }
+
+   if (signal_pending(current)) {
+   ret = -ERESTARTSYS;
+   break;
+   }
+
+   schedule();
+   } while (1);
+
+   __set_current_state(TASK_RUNNING);
+   *fence = wait.fence;
+
+   if (wait.node.next)
+   drm_syncobj_remove_wait(syncobj, &wait);
+
return ret;
 }
 EXPORT_SYMBOL(drm_syncobj_find_fence);
-- 
2.17.1

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[Intel-gfx] [PATCH 05/10] drm/syncobj: add timeline payload query ioctl v4

[Chunming Zhou]

user mode can query timeline payload.
v2: check return value of copy_to_user
v3: handle querying entry by entry
v4: rebase on new chain container, simplify interface

Signed-off-by: Chunming Zhou 
Cc: Daniel Rakos 
Cc: Jason Ekstrand 
Cc: Bas Nieuwenhuizen 
Cc: Dave Airlie 
Cc: Christian König 
Cc: Chris Wilson 
---
 drivers/gpu/drm/drm_internal.h |  2 ++
 drivers/gpu/drm/drm_ioctl.c|  2 ++
 drivers/gpu/drm/drm_syncobj.c  | 43 ++
 include/uapi/drm/drm.h | 10 
 4 files changed, 57 insertions(+)

diff --git a/drivers/gpu/drm/drm_internal.h b/drivers/gpu/drm/drm_internal.h
index 18b41e10195c..dab4d5936441 100644
--- a/drivers/gpu/drm/drm_internal.h
+++ b/drivers/gpu/drm/drm_internal.h
@@ -184,6 +184,8 @@ int drm_syncobj_reset_ioctl(struct drm_device *dev, void 
*data,
struct drm_file *file_private);
 int drm_syncobj_signal_ioctl(struct drm_device *dev, void *data,
 struct drm_file *file_private);
+int drm_syncobj_query_ioctl(struct drm_device *dev, void *data,
+   struct drm_file *file_private);
 
 /* drm_framebuffer.c */
 void drm_framebuffer_print_info(struct drm_printer *p, unsigned int indent,
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index a9a17ed35cc4..7578ef6dc1d1 100644
--- a/drivers/gpu/drm/drm_ioctl.c
+++ b/drivers/gpu/drm/drm_ioctl.c
@@ -681,6 +681,8 @@ static const struct drm_ioctl_desc drm_ioctls[] = {
  DRM_UNLOCKED|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF(DRM_IOCTL_SYNCOBJ_SIGNAL, drm_syncobj_signal_ioctl,
  DRM_UNLOCKED|DRM_RENDER_ALLOW),
+   DRM_IOCTL_DEF(DRM_IOCTL_SYNCOBJ_QUERY, drm_syncobj_query_ioctl,
+ DRM_UNLOCKED|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF(DRM_IOCTL_CRTC_GET_SEQUENCE, drm_crtc_get_sequence_ioctl, 
DRM_UNLOCKED),
DRM_IOCTL_DEF(DRM_IOCTL_CRTC_QUEUE_SEQUENCE, 
drm_crtc_queue_sequence_ioctl, DRM_UNLOCKED),
DRM_IOCTL_DEF(DRM_IOCTL_MODE_CREATE_LEASE, drm_mode_create_lease_ioctl, 
DRM_MASTER|DRM_UNLOCKED),
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index 348079bb0965..f97fa00ca1d0 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -1061,3 +1061,46 @@ drm_syncobj_signal_ioctl(struct drm_device *dev, void 
*data,
 
return ret;
 }
+
+int drm_syncobj_query_ioctl(struct drm_device *dev, void *data,
+   struct drm_file *file_private)
+{
+   struct drm_syncobj_timeline_array *args = data;
+   struct drm_syncobj **syncobjs;
+   uint64_t __user *points = u64_to_user_ptr(args->points);
+   uint32_t i;
+   int ret;
+
+   if (!drm_core_check_feature(dev, DRIVER_SYNCOBJ))
+   return -ENODEV;
+
+   if (args->pad != 0)
+   return -EINVAL;
+
+   if (args->count_handles == 0)
+   return -EINVAL;
+
+   ret = drm_syncobj_array_find(file_private,
+u64_to_user_ptr(args->handles),
+args->count_handles,
+&syncobjs);
+   if (ret < 0)
+   return ret;
+
+   for (i = 0; i < args->count_handles; i++) {
+   struct dma_fence_chain *chain;
+   struct dma_fence *fence;
+   uint64_t point;
+
+   fence = drm_syncobj_fence_get(syncobjs[i]);
+   chain = to_dma_fence_chain(fence);
+   point = chain ? fence->seqno : 0;
+   ret = copy_to_user(&points[i], &point, sizeof(uint64_t));
+   ret = ret ? -EFAULT : 0;
+   if (ret)
+   break;
+   }
+   drm_syncobj_array_free(syncobjs, args->count_handles);
+
+   return ret;
+}
diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h
index 0092111d002c..b2c36f2b2599 100644
--- a/include/uapi/drm/drm.h
+++ b/include/uapi/drm/drm.h
@@ -767,6 +767,14 @@ struct drm_syncobj_array {
__u32 pad;
 };
 
+struct drm_syncobj_timeline_array {
+   __u64 handles;
+   __u64 points;
+   __u32 count_handles;
+   __u32 pad;
+};
+
+
 /* Query current scanout sequence number */
 struct drm_crtc_get_sequence {
__u32 crtc_id;  /* requested crtc_id */
@@ -924,6 +932,8 @@ extern "C" {
 #define DRM_IOCTL_MODE_REVOKE_LEASEDRM_IOWR(0xC9, struct 
drm_mode_revoke_lease)
 
 #define DRM_IOCTL_SYNCOBJ_TIMELINE_WAITDRM_IOWR(0xCA, struct 
drm_syncobj_timeline_wait)
+#define DRM_IOCTL_SYNCOBJ_QUERYDRM_IOWR(0xCB, struct 
drm_syncobj_timeline_array)
+
 /**
  * Device specific ioctls should only be in their respective headers
  * The device specific ioctl range is from 0x40 to 0x9f.
-- 
2.17.1

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[Intel-gfx] [PATCH 04/10] drm/syncobj: add support for timeline point wait v8

[Chunming Zhou]

points array is one-to-one match with syncobjs array.
v2:
add seperate ioctl for timeline point wait, otherwise break uapi.
v3:
userspace can specify two kinds waits::
a. Wait for time point to be completed.
b. and wait for time point to become available
v4:
rebase
v5:
add comment for xxx_WAIT_AVAILABLE
v6: rebase and rework on new container
v7: drop _WAIT_COMPLETED, it is the default anyway
v8: correctly handle garbage collected fences

Signed-off-by: Chunming Zhou 
Signed-off-by: Christian König 
Cc: Daniel Rakos 
Cc: Jason Ekstrand 
Cc: Bas Nieuwenhuizen 
Cc: Dave Airlie 
Cc: Chris Wilson 
---
 drivers/gpu/drm/drm_internal.h |   2 +
 drivers/gpu/drm/drm_ioctl.c|   2 +
 drivers/gpu/drm/drm_syncobj.c  | 153 ++---
 include/uapi/drm/drm.h |  15 
 4 files changed, 143 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/drm_internal.h b/drivers/gpu/drm/drm_internal.h
index c7a7d7ce5d1c..18b41e10195c 100644
--- a/drivers/gpu/drm/drm_internal.h
+++ b/drivers/gpu/drm/drm_internal.h
@@ -178,6 +178,8 @@ int drm_syncobj_fd_to_handle_ioctl(struct drm_device *dev, 
void *data,
   struct drm_file *file_private);
 int drm_syncobj_wait_ioctl(struct drm_device *dev, void *data,
   struct drm_file *file_private);
+int drm_syncobj_timeline_wait_ioctl(struct drm_device *dev, void *data,
+   struct drm_file *file_private);
 int drm_syncobj_reset_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_private);
 int drm_syncobj_signal_ioctl(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index 94bd872d56c4..a9a17ed35cc4 100644
--- a/drivers/gpu/drm/drm_ioctl.c
+++ b/drivers/gpu/drm/drm_ioctl.c
@@ -675,6 +675,8 @@ static const struct drm_ioctl_desc drm_ioctls[] = {
  DRM_UNLOCKED|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF(DRM_IOCTL_SYNCOBJ_WAIT, drm_syncobj_wait_ioctl,
  DRM_UNLOCKED|DRM_RENDER_ALLOW),
+   DRM_IOCTL_DEF(DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT, 
drm_syncobj_timeline_wait_ioctl,
+ DRM_UNLOCKED|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF(DRM_IOCTL_SYNCOBJ_RESET, drm_syncobj_reset_ioctl,
  DRM_UNLOCKED|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF(DRM_IOCTL_SYNCOBJ_SIGNAL, drm_syncobj_signal_ioctl,
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index 51f798e2194f..348079bb0965 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -61,6 +61,7 @@ struct syncobj_wait_entry {
struct task_struct *task;
struct dma_fence *fence;
struct dma_fence_cb fence_cb;
+   u64point;
 };
 
 static void syncobj_wait_syncobj_func(struct drm_syncobj *syncobj,
@@ -95,6 +96,8 @@ EXPORT_SYMBOL(drm_syncobj_find);
 static void drm_syncobj_fence_add_wait(struct drm_syncobj *syncobj,
   struct syncobj_wait_entry *wait)
 {
+   struct dma_fence *fence;
+
if (wait->fence)
return;
 
@@ -103,11 +106,15 @@ static void drm_syncobj_fence_add_wait(struct drm_syncobj 
*syncobj,
 * have the lock, try one more time just to be sure we don't add a
 * callback when a fence has already been set.
 */
-   if (syncobj->fence)
-   wait->fence = dma_fence_get(
-   rcu_dereference_protected(syncobj->fence, 1));
-   else
+   fence = dma_fence_get(rcu_dereference_protected(syncobj->fence, 1));
+   if (!fence || dma_fence_chain_find_seqno(&fence, wait->point)) {
+   dma_fence_put(fence);
list_add_tail(&wait->node, &syncobj->cb_list);
+   } else if (!fence) {
+   wait->fence = dma_fence_get_stub();
+   } else {
+   wait->fence = fence;
+   }
spin_unlock(&syncobj->lock);
 }
 
@@ -148,10 +155,8 @@ void drm_syncobj_add_point(struct drm_syncobj *syncobj,
dma_fence_chain_init(chain, prev, fence, point);
rcu_assign_pointer(syncobj->fence, &chain->base);
 
-   list_for_each_entry_safe(cur, tmp, &syncobj->cb_list, node) {
-   list_del_init(&cur->node);
+   list_for_each_entry_safe(cur, tmp, &syncobj->cb_list, node)
syncobj_wait_syncobj_func(syncobj, cur);
-   }
spin_unlock(&syncobj->lock);
 
/* Walk the chain once to trigger garbage collection */
@@ -182,10 +187,8 @@ void drm_syncobj_replace_fence(struct drm_syncobj *syncobj,
rcu_assign_pointer(syncobj->fence, fence);
 
if (fence != old_fence) {
-   list_for_each_entry_safe(cur, tmp, &syncobj->cb_list, node) {
-   list_del_init(&cur->node);
+   list_for_each_entry_safe(cur, tmp, &syncobj->cb_list, node)
syncobj_wait_syncobj_func(syncobj, cur);
-   }
}
 
spin_

[Intel-gfx] [PATCH 03/10] drm/syncobj: add new drm_syncobj_add_point interface v2

[Chunming Zhou]

From: Christian König 

Use the dma_fence_chain object to create a timeline of fence objects
instead of just replacing the existing fence.

v2: rebase and cleanup

Signed-off-by: Christian König 
---
 drivers/gpu/drm/drm_syncobj.c | 37 +++
 include/drm/drm_syncobj.h |  5 +
 2 files changed, 42 insertions(+)

diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index e19525af0cce..51f798e2194f 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -122,6 +122,43 @@ static void drm_syncobj_remove_wait(struct drm_syncobj 
*syncobj,
spin_unlock(&syncobj->lock);
 }
 
+/**
+ * drm_syncobj_add_point - add new timeline point to the syncobj
+ * @syncobj: sync object to add timeline point do
+ * @chain: chain node to use to add the point
+ * @fence: fence to encapsulate in the chain node
+ * @point: sequence number to use for the point
+ *
+ * Add the chain node as new timeline point to the syncobj.
+ */
+void drm_syncobj_add_point(struct drm_syncobj *syncobj,
+  struct dma_fence_chain *chain,
+  struct dma_fence *fence,
+  uint64_t point)
+{
+   struct syncobj_wait_entry *cur, *tmp;
+   struct dma_fence *prev;
+
+   dma_fence_get(fence);
+
+   spin_lock(&syncobj->lock);
+
+   prev = rcu_dereference_protected(syncobj->fence,
+lockdep_is_held(&syncobj->lock));
+   dma_fence_chain_init(chain, prev, fence, point);
+   rcu_assign_pointer(syncobj->fence, &chain->base);
+
+   list_for_each_entry_safe(cur, tmp, &syncobj->cb_list, node) {
+   list_del_init(&cur->node);
+   syncobj_wait_syncobj_func(syncobj, cur);
+   }
+   spin_unlock(&syncobj->lock);
+
+   /* Walk the chain once to trigger garbage collection */
+   dma_fence_chain_for_each(prev, fence);
+}
+EXPORT_SYMBOL(drm_syncobj_add_point);
+
 /**
  * drm_syncobj_replace_fence - replace fence in a sync object.
  * @syncobj: Sync object to replace fence in
diff --git a/include/drm/drm_syncobj.h b/include/drm/drm_syncobj.h
index 7c6ed845c70d..8acb4ae4f311 100644
--- a/include/drm/drm_syncobj.h
+++ b/include/drm/drm_syncobj.h
@@ -27,6 +27,7 @@
 #define __DRM_SYNCOBJ_H__
 
 #include "linux/dma-fence.h"
+#include "linux/dma-fence-chain.h"
 
 /**
  * struct drm_syncobj - sync object.
@@ -110,6 +111,10 @@ drm_syncobj_fence_get(struct drm_syncobj *syncobj)
 
 struct drm_syncobj *drm_syncobj_find(struct drm_file *file_private,
 u32 handle);
+void drm_syncobj_add_point(struct drm_syncobj *syncobj,
+  struct dma_fence_chain *chain,
+  struct dma_fence *fence,
+  uint64_t point);
 void drm_syncobj_replace_fence(struct drm_syncobj *syncobj,
   struct dma_fence *fence);
 int drm_syncobj_find_fence(struct drm_file *file_private,
-- 
2.17.1

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[Intel-gfx] [PATCH 02/10] drm/syncobj: remove drm_syncobj_cb and cleanup

[Chunming Zhou]

From: Christian König 

This completes "drm/syncobj: Drop add/remove_callback from driver
interface" and cleans up the implementation a bit.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/drm_syncobj.c | 91 ---
 include/drm/drm_syncobj.h | 21 
 2 files changed, 30 insertions(+), 82 deletions(-)

diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index db30a0e89db8..e19525af0cce 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -56,6 +56,16 @@
 #include "drm_internal.h"
 #include 
 
+struct syncobj_wait_entry {
+   struct list_head node;
+   struct task_struct *task;
+   struct dma_fence *fence;
+   struct dma_fence_cb fence_cb;
+};
+
+static void syncobj_wait_syncobj_func(struct drm_syncobj *syncobj,
+ struct syncobj_wait_entry *wait);
+
 /**
  * drm_syncobj_find - lookup and reference a sync object.
  * @file_private: drm file private pointer
@@ -82,58 +92,33 @@ struct drm_syncobj *drm_syncobj_find(struct drm_file 
*file_private,
 }
 EXPORT_SYMBOL(drm_syncobj_find);
 
-static void drm_syncobj_add_callback_locked(struct drm_syncobj *syncobj,
-   struct drm_syncobj_cb *cb,
-   drm_syncobj_func_t func)
+static void drm_syncobj_fence_add_wait(struct drm_syncobj *syncobj,
+  struct syncobj_wait_entry *wait)
 {
-   cb->func = func;
-   list_add_tail(&cb->node, &syncobj->cb_list);
-}
-
-static int drm_syncobj_fence_get_or_add_callback(struct drm_syncobj *syncobj,
-struct dma_fence **fence,
-struct drm_syncobj_cb *cb,
-drm_syncobj_func_t func)
-{
-   int ret;
-
-   *fence = drm_syncobj_fence_get(syncobj);
-   if (*fence)
-   return 1;
+   if (wait->fence)
+   return;
 
spin_lock(&syncobj->lock);
/* We've already tried once to get a fence and failed.  Now that we
 * have the lock, try one more time just to be sure we don't add a
 * callback when a fence has already been set.
 */
-   if (syncobj->fence) {
-   *fence = dma_fence_get(rcu_dereference_protected(syncobj->fence,
-
lockdep_is_held(&syncobj->lock)));
-   ret = 1;
-   } else {
-   *fence = NULL;
-   drm_syncobj_add_callback_locked(syncobj, cb, func);
-   ret = 0;
-   }
+   if (syncobj->fence)
+   wait->fence = dma_fence_get(
+   rcu_dereference_protected(syncobj->fence, 1));
+   else
+   list_add_tail(&wait->node, &syncobj->cb_list);
spin_unlock(&syncobj->lock);
-
-   return ret;
 }
 
-void drm_syncobj_add_callback(struct drm_syncobj *syncobj,
- struct drm_syncobj_cb *cb,
- drm_syncobj_func_t func)
+static void drm_syncobj_remove_wait(struct drm_syncobj *syncobj,
+   struct syncobj_wait_entry *wait)
 {
-   spin_lock(&syncobj->lock);
-   drm_syncobj_add_callback_locked(syncobj, cb, func);
-   spin_unlock(&syncobj->lock);
-}
+   if (!wait->node.next)
+   return;
 
-void drm_syncobj_remove_callback(struct drm_syncobj *syncobj,
-struct drm_syncobj_cb *cb)
-{
spin_lock(&syncobj->lock);
-   list_del_init(&cb->node);
+   list_del_init(&wait->node);
spin_unlock(&syncobj->lock);
 }
 
@@ -148,7 +133,7 @@ void drm_syncobj_replace_fence(struct drm_syncobj *syncobj,
   struct dma_fence *fence)
 {
struct dma_fence *old_fence;
-   struct drm_syncobj_cb *cur, *tmp;
+   struct syncobj_wait_entry *cur, *tmp;
 
if (fence)
dma_fence_get(fence);
@@ -162,7 +147,7 @@ void drm_syncobj_replace_fence(struct drm_syncobj *syncobj,
if (fence != old_fence) {
list_for_each_entry_safe(cur, tmp, &syncobj->cb_list, node) {
list_del_init(&cur->node);
-   cur->func(syncobj, cur);
+   syncobj_wait_syncobj_func(syncobj, cur);
}
}
 
@@ -608,13 +593,6 @@ drm_syncobj_fd_to_handle_ioctl(struct drm_device *dev, 
void *data,
&args->handle);
 }
 
-struct syncobj_wait_entry {
-   struct task_struct *task;
-   struct dma_fence *fence;
-   struct dma_fence_cb fence_cb;
-   struct drm_syncobj_cb syncobj_cb;
-};
-
 static void syncobj_wait_fence_func(struct dma_fence *fence,
struct dma_fence_cb *cb)
 {
@@ -625,11 +603,8 @@ static void syncobj_wait_fence_func(struct dma_fence 
*

[Intel-gfx] [PATCH 01/10] dma-buf: add new dma_fence_chain container v4

[Chunming Zhou]

From: Christian König 

Lockless container implementation similar to a dma_fence_array, but with
only two elements per node and automatic garbage collection.

v2: properly document dma_fence_chain_for_each, add dma_fence_chain_find_seqno,
drop prev reference during garbage collection if it's not a chain fence.
v3: use head and iterator for dma_fence_chain_for_each
v4: fix reference count in dma_fence_chain_enable_signaling

Signed-off-by: Christian König 
---
 drivers/dma-buf/Makefile  |   3 +-
 drivers/dma-buf/dma-fence-chain.c | 241 ++
 include/linux/dma-fence-chain.h   |  81 ++
 3 files changed, 324 insertions(+), 1 deletion(-)
 create mode 100644 drivers/dma-buf/dma-fence-chain.c
 create mode 100644 include/linux/dma-fence-chain.h

diff --git a/drivers/dma-buf/Makefile b/drivers/dma-buf/Makefile
index 0913a6ccab5a..1f006e083eb9 100644
--- a/drivers/dma-buf/Makefile
+++ b/drivers/dma-buf/Makefile
@@ -1,4 +1,5 @@
-obj-y := dma-buf.o dma-fence.o dma-fence-array.o reservation.o seqno-fence.o
+obj-y := dma-buf.o dma-fence.o dma-fence-array.o dma-fence-chain.o \
+reservation.o seqno-fence.o
 obj-$(CONFIG_SYNC_FILE)+= sync_file.o
 obj-$(CONFIG_SW_SYNC)  += sw_sync.o sync_debug.o
 obj-$(CONFIG_UDMABUF)  += udmabuf.o
diff --git a/drivers/dma-buf/dma-fence-chain.c 
b/drivers/dma-buf/dma-fence-chain.c
new file mode 100644
index ..0c5e3c902fa0
--- /dev/null
+++ b/drivers/dma-buf/dma-fence-chain.c
@@ -0,0 +1,241 @@
+/*
+ * fence-chain: chain fences together in a timeline
+ *
+ * Copyright (C) 2018 Advanced Micro Devices, Inc.
+ * Authors:
+ * Christian König 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include 
+
+static bool dma_fence_chain_enable_signaling(struct dma_fence *fence);
+
+/**
+ * dma_fence_chain_get_prev - use RCU to get a reference to the previous fence
+ * @chain: chain node to get the previous node from
+ *
+ * Use dma_fence_get_rcu_safe to get a reference to the previous fence of the
+ * chain node.
+ */
+static struct dma_fence *dma_fence_chain_get_prev(struct dma_fence_chain 
*chain)
+{
+   struct dma_fence *prev;
+
+   rcu_read_lock();
+   prev = dma_fence_get_rcu_safe(&chain->prev);
+   rcu_read_unlock();
+   return prev;
+}
+
+/**
+ * dma_fence_chain_walk - chain walking function
+ * @fence: current chain node
+ *
+ * Walk the chain to the next node. Returns the next fence or NULL if we are at
+ * the end of the chain. Garbage collects chain nodes which are already
+ * signaled.
+ */
+struct dma_fence *dma_fence_chain_walk(struct dma_fence *fence)
+{
+   struct dma_fence_chain *chain, *prev_chain;
+   struct dma_fence *prev, *replacement, *tmp;
+
+   chain = to_dma_fence_chain(fence);
+   if (!chain) {
+   dma_fence_put(fence);
+   return NULL;
+   }
+
+   while ((prev = dma_fence_chain_get_prev(chain))) {
+
+   prev_chain = to_dma_fence_chain(prev);
+   if (prev_chain) {
+   if (!dma_fence_is_signaled(prev_chain->fence))
+   break;
+
+   replacement = dma_fence_chain_get_prev(prev_chain);
+   } else {
+   if (!dma_fence_is_signaled(prev))
+   break;
+
+   replacement = NULL;
+   }
+
+   tmp = cmpxchg(&chain->prev, prev, replacement);
+   if (tmp == prev)
+   dma_fence_put(tmp);
+   else
+   dma_fence_put(replacement);
+   dma_fence_put(prev);
+   }
+
+   dma_fence_put(fence);
+   return prev;
+}
+EXPORT_SYMBOL(dma_fence_chain_walk);
+
+/**
+ * dma_fence_chain_find_seqno - find fence chain node by seqno
+ * @pfence: pointer to the chain node where to start
+ * @seqno: the sequence number to search for
+ *
+ * Advance the fence pointer to the chain node which will signal this sequence
+ * number. If no sequence number is provided then this is a no-op.
+ *
+ * Returns EINVAL if the fence is not a chain node or the sequence number has
+ * not yet advanced far enough.
+ */
+int dma_fence_chain_find_seqno(struct dma_fence **pfence, uint64_t seqno)
+{
+   struct dma_fence_chain *chain;
+
+   if (!seqno)
+   return 0;
+
+   chain = to_dma_fence_chain(*pfence);
+   if (!chain || chain->base.seqno < seqno)
+   return -EINVAL;
+
+   dma_fence_chain_for_each(*pfence, &chain->base) {
+   if ((*pf

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Flush GPU relocs harder for gen3

[Patchwork]

== Series Details ==

Series: drm/i915: Flush GPU relocs harder for gen3
URL   : https://patchwork.freedesktop.org/series/53751/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
f17c6fbe1857 drm/i915: Flush GPU relocs harder for gen3
-:14: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ 
chars of sha1> ("")' - ie: 'commit 7fa28e146994 ("drm/i915: Write 
GPU relocs harder with gen3")'
#14: 
References: 7fa28e146994 ("drm/i915: Write GPU relocs harder with gen3")

total: 1 errors, 0 warnings, 0 checks, 50 lines checked

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[Intel-gfx] ✓ Fi.CI.IGT: success for Change KVMGT into self loadable module (rev4)

[Patchwork]

== Series Details ==

Series: Change KVMGT into self loadable module (rev4)
URL   : https://patchwork.freedesktop.org/series/53379/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5280_full -> Patchwork_11043_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Known issues


  Here are the changes found in Patchwork_11043_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_schedule@pi-ringfull-render:
- shard-glk:  NOTRUN -> FAIL [fdo#103158]

  * {igt@kms_plane@pixel-format-pipe-b-planes-source-clamping}:
- shard-glk:  PASS -> FAIL [fdo#108948]

  * igt@kms_plane@plane-position-covered-pipe-c-planes:
- shard-glk:  PASS -> FAIL [fdo#103166]

  * igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
- shard-apl:  PASS -> FAIL [fdo#103166]

  * {igt@kms_rotation_crc@multiplane-rotation-cropping-top}:
- shard-kbl:  PASS -> DMESG-WARN [fdo#105604]
- shard-glk:  PASS -> DMESG-WARN [fdo#105763] / [fdo#106538]

  * igt@kms_setmode@basic:
- shard-apl:  PASS -> FAIL [fdo#99912]

  
 Possible fixes 

  * igt@kms_busy@basic-modeset-a:
- shard-apl:  DMESG-WARN [fdo#103558] / [fdo#105602] -> PASS +9

  * igt@kms_busy@extended-modeset-hang-newfb-render-b:
- shard-kbl:  DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_cursor_crc@cursor-128x128-sliding:
- shard-apl:  FAIL [fdo#103232] -> PASS +2

  * igt@kms_cursor_crc@cursor-256x256-dpms:
- shard-glk:  FAIL [fdo#103232] -> PASS

  * igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-apl:  FAIL [fdo#103191] / [fdo#103232] -> PASS

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk:  FAIL [fdo#105363] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-cpu:
- shard-glk:  FAIL [fdo#103167] -> PASS +1

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
- shard-apl:  FAIL [fdo#103167] -> PASS

  * igt@kms_plane@pixel-format-pipe-c-planes:
- shard-glk:  FAIL [fdo#103166] -> PASS +1

  * igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
- shard-apl:  FAIL [fdo#103166] -> PASS

  
 Warnings 

  * igt@kms_content_protection@legacy:
- shard-apl:  FAIL [fdo#108597] -> INCOMPLETE [fdo#103927]

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103158]: https://bugs.freedesktop.org/show_bug.cgi?id=103158
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
  [fdo#105604]: https://bugs.freedesktop.org/show_bug.cgi?id=105604
  [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
  [fdo#106538]: https://bugs.freedesktop.org/show_bug.cgi?id=106538
  [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
  [fdo#108597]: https://bugs.freedesktop.org/show_bug.cgi?id=108597
  [fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (7 -> 5)
--

  Missing(2): shard-skl shard-iclb 


Build changes
-

* Linux: CI_DRM_5280 -> Patchwork_11043

  CI_DRM_5280: 6047933c2fafdfd42353d735b213e74826d5a939 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4743: edb2db2cf2b6665d7ba3fa9117263302f6307a4f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_11043: 4517d0efeed2dfbf726017b688f12a5ba479e6ec @ 
git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ 
git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11043/
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Re: [Intel-gfx] [PATCH v8 09/35] drm/i915: Implement HDCP2.2 link integrity check

[Daniel Vetter]

On Fri, Dec 07, 2018 at 12:16:11PM +0530, C, Ramalingam wrote:
> 
> On 12/6/2018 6:57 PM, Daniel Vetter wrote:
> > On Tue, Nov 27, 2018 at 04:13:07PM +0530, Ramalingam C wrote:
> > > Implements the link integrity check once in 500mSec.
> > > 
> > > Once encryption is enabled, an ongoing Link Integrity Check is
> > > performed by the HDCP Receiver to check that cipher synchronization
> > > is maintained between the HDCP Transmitter and the HDCP Receiver.
> > > 
> > > On the detection of synchronization lost, the HDCP Receiver must assert
> > > the corresponding bits of the RxStatus register. The Transmitter polls
> > > the RxStatus register and it may initiate re-authentication.
> > > 
> > > v2:
> > >Rebased.
> > > v3:
> > >No Changes.
> > > v4:
> > >enum check_link_response is used check the link status [Uma]
> > > v5:
> > >Rebased as part of patch reordering.
> > > v6:
> > >Required members of intel_hdcp is defined [Sean Paul]
> > > v7:
> > >hdcp2_check_link is cancelled at required places.
> > > v8:
> > >Rebased for the component i/f changes.
> > >Errors due to the sinks are reported as DEBUG logs.
> > > 
> > > Signed-off-by: Ramalingam C 
> > > Reviewed-by: Uma Shankar 
> > > ---
> > >   drivers/gpu/drm/i915/intel_display.c | 11 +++--
> > >   drivers/gpu/drm/i915/intel_drv.h |  5 +++
> > >   drivers/gpu/drm/i915/intel_hdcp.c| 83 
> > > +++-
> > >   include/drm/drm_hdcp.h   |  8 
> > >   4 files changed, 103 insertions(+), 4 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_display.c 
> > > b/drivers/gpu/drm/i915/intel_display.c
> > > index e9f4e22b2a4e..fc63babce165 100644
> > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > @@ -15833,15 +15833,20 @@ static void intel_hpd_poll_fini(struct 
> > > drm_device *dev)
> > >   {
> > >   struct intel_connector *connector;
> > >   struct drm_connector_list_iter conn_iter;
> > > + struct intel_hdcp *hdcp;
> > >   /* Kill all the work that may have been queued by hpd. */
> > >   drm_connector_list_iter_begin(dev, &conn_iter);
> > >   for_each_intel_connector_iter(connector, &conn_iter) {
> > > + hdcp = &connector->hdcp;
> > > +
> > >   if (connector->modeset_retry_work.func)
> > >   
> > > cancel_work_sync(&connector->modeset_retry_work);
> > > - if (connector->hdcp.shim) {
> > > - cancel_delayed_work_sync(&connector->hdcp.check_work);
> > > - cancel_work_sync(&connector->hdcp.prop_work);
> > > + if (hdcp->shim) {
> > > + cancel_delayed_work_sync(&hdcp->check_work);
> > > + cancel_work_sync(&hdcp->prop_work);
> > > + if (hdcp->hdcp2_supported)
> > > + 
> > > cancel_delayed_work_sync(&hdcp->hdcp2_check_work);
> > Locking of these workers is always tricky ... why can't we use the same
> > worker for both checking hdcp2 and hdcp1 link status?
> 
> Doable similar to how we are doing hdcp_enable. Needs the tracking of the 
> spec in
> use to pick proper timeout and functions.

Yeah we definitely want separate enable/disable functions for hdcp1 and
hdcp2. I was thinking of only sharing the content_protection status logic,
and the worker scheduling logic. That looks the same, and imo that's the
tricky part. I.e. separate the drm interfacing side more from the hdcp hw
flow.

> I will look into it.
> 
> > 
> > Of course need to use the right timeout and call the right functions, but
> > I think gives us less duplication in the complicated code.
> > 
> > 
> > >   }
> > >   }
> > >   drm_connector_list_iter_end(&conn_iter);
> > > diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> > > b/drivers/gpu/drm/i915/intel_drv.h
> > > index 24d258488efe..e6e32bf52568 100644
> > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > @@ -403,6 +403,9 @@ struct intel_hdcp_shim {
> > >*/
> > >   int (*config_stream_type)(struct intel_digital_port 
> > > *intel_dig_port,
> > > void *buf, size_t size);
> > > +
> > > + /* HDCP2.2 Link Integrity Check */
> > > + int (*check_2_2_link)(struct intel_digital_port *intel_dig_port);
> > >   };
> > >   struct intel_hdcp {
> > > @@ -445,6 +448,8 @@ struct intel_hdcp {
> > >* over re-Auth has to be triggered.
> > >*/
> > >   u32 seq_num_m;
> > > +
> > > + struct delayed_work hdcp2_check_work;
> > >   };
> > >   struct intel_connector {
> > > diff --git a/drivers/gpu/drm/i915/intel_hdcp.c 
> > > b/drivers/gpu/drm/i915/intel_hdcp.c
> > > index 679f3c164582..98b112395a5a 100644
> > > --- a/drivers/gpu/drm/i915/intel_hdcp.c
> > > +++ b/drivers/gpu/drm/i915/intel_hdcp.c
> > > @@ -1626,6 +1626,81 @@ static int _intel_hdcp2_disable(struct 
> > > intel

Re: [Intel-gfx] [PATCH v8 06/35] drm/i915: Enable and Disable of HDCP2.2

[Daniel Vetter]

On Fri, Dec 07, 2018 at 11:52:21AM +0530, C, Ramalingam wrote:
> 
> On 12/6/2018 4:00 PM, Daniel Vetter wrote:
> > On Tue, Nov 27, 2018 at 04:13:04PM +0530, Ramalingam C wrote:
> > > Considering that HDCP2.2 is more secure than HDCP1.4, When a setup
> > > supports HDCP2.2 and HDCP1.4, HDCP2.2 will be enabled.
> > > 
> > > When HDCP2.2 enabling fails and HDCP1.4 is supported, HDCP1.4 is
> > > enabled.
> > > 
> > > This change implements a sequence of enabling and disabling of
> > > HDCP2.2 authentication and HDCP2.2 port encryption.
> > Patch series suggestion for next time around: First build out the helper
> > functions, then time them into the big picture like here. Personally I
> > think that makes it easier to understand, but it's kinda personal choice.
> 
> Tried that already. But bisecting will give warnings as "defined but unused
> functions"
> 
> Hence moved to this approach.

Ah right, that's the annoying part with that approach. I tend to just
ignore that until the series is built up (it's just a warning), but good
point. As mentioned, there's pro/cons to each approach.
-Daniel

> 
> > I guess this here works too.
> > 
> > > v2:
> > >Included few optimization suggestions [Chris Wilson]
> > >Commit message is updated as per the rebased version.
> > >intel_wait_for_register is used instead of wait_for. [Chris Wilson]
> > > v3:
> > >No changes.
> > > v4:
> > >Extra comment added and Style issue fixed [Uma]
> > > v5:
> > >Rebased as part of patch reordering.
> > >HDCP2 encryption status is tracked.
> > >HW state check is moved into WARN_ON [Daniel]
> > > v6:
> > >Redefined the mei service functions as per comp redesign.
> > >Merged patches related to hdcp2.2 enabling and disabling [Sean Paul].
> > >Required shim functionality is defined [Sean Paul]
> > > v7:
> > >Return values are handles [Uma]
> > >Realigned the code.
> > >Check for comp_master is removed.
> > > v8:
> > >HDCP2.2 is attempted only if mei interface is up.
> > >Adjust to the new interface
> > >Avoid bool usage in struct [Tomas]
> > > 
> > > Signed-off-by: Ramalingam C 
> > > ---
> > >   drivers/gpu/drm/i915/intel_drv.h  |   5 +
> > >   drivers/gpu/drm/i915/intel_hdcp.c | 223 
> > > +++---
> > >   2 files changed, 214 insertions(+), 14 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> > > b/drivers/gpu/drm/i915/intel_drv.h
> > > index bde82f3ada85..3e9f21d23442 100644
> > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > @@ -383,6 +383,10 @@ struct intel_hdcp_shim {
> > >   /* Detects the HDCP protocol(DP/HDMI) required on the port */
> > >   enum mei_hdcp_wired_protocol (*hdcp_protocol)(void);
> > > +
> > > + /* Detects whether Panel is HDCP2.2 capable */
> > > + int (*hdcp_2_2_capable)(struct intel_digital_port *intel_dig_port,
> > > + bool *capable);
> > >   };
> > >   struct intel_hdcp {
> > > @@ -396,6 +400,7 @@ struct intel_hdcp {
> > >   /* HDCP2.2 related definitions */
> > >   /* Flag indicates whether this connector supports HDCP2.2 or 
> > > not. */
> > >   u8 hdcp2_supported;
> > > + u8 hdcp2_in_use;
> > >   /*
> > >* Content Stream Type defined by content owner. TYPE0(0x0) 
> > > content can
> > > diff --git a/drivers/gpu/drm/i915/intel_hdcp.c 
> > > b/drivers/gpu/drm/i915/intel_hdcp.c
> > > index 760780f1105c..c1bd1ccd47cd 100644
> > > --- a/drivers/gpu/drm/i915/intel_hdcp.c
> > > +++ b/drivers/gpu/drm/i915/intel_hdcp.c
> > > @@ -79,6 +79,43 @@ bool intel_hdcp_capable(struct intel_connector 
> > > *connector)
> > >   return capable;
> > >   }
> > > +/* At present whether mei_hdcp component is binded with i915 master 
> > > component */
> > > +static bool intel_hdcp2_mei_binded(struct intel_connector *connector)
> > > +{
> > > + struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> > > + struct i915_hdcp_component_master *comp = dev_priv->hdcp_comp;
> > > +
> > > + mutex_lock(&comp->mutex);
> > > + if (!comp->ops || !comp->dev) {
> > > + mutex_unlock(&comp->mutex);
> > > + return false;
> > > + }
> > > + mutex_unlock(&comp->mutex);
> > > +
> > > + return true;
> > > +}
> > > +
> > > +/* Is HDCP2.2 capable on Platform and Sink */
> > > +static bool intel_hdcp2_capable(struct intel_connector *connector)
> > > +{
> > > + struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
> > > + struct intel_hdcp *hdcp = &connector->hdcp;
> > > + bool capable = false;
> > > +
> > > + /* I915 support for HDCP2.2 */
> > > + if (!hdcp->hdcp2_supported)
> > > + return false;
> > > +
> > > + /* MEI services for HDCP2.2 */
> > > + if (!intel_hdcp2_mei_binded(connector))
> > > + return false;
> > Why do we still need this with component? Driver load should be stalled
> > out until it's all there, that was kinda the entire point o

Re: [Intel-gfx] [PATCH v8 05/35] drm/i915: MEI interface definition

[Daniel Vetter]

On Fri, Dec 07, 2018 at 04:18:25PM +0530, C, Ramalingam wrote:
> 
> On 12/7/2018 11:22 AM, C, Ramalingam wrote:
> > 
> > 
> > On 12/6/2018 3:53 PM, Daniel Vetter wrote:
> > > On Tue, Nov 27, 2018 at 04:13:03PM +0530, Ramalingam C wrote:
> > > > Defining the mei-i915 interface functions and initialization of
> > > > the interface.
> > > > 
> > > > Signed-off-by: Ramalingam C
> > > > Signed-off-by: Tomas Winkler
> > > > ---
> > > >   drivers/gpu/drm/i915/i915_drv.h   |   2 +
> > > >   drivers/gpu/drm/i915/intel_drv.h  |   7 +
> > > >   drivers/gpu/drm/i915/intel_hdcp.c | 442 
> > > > +-
> > > >   include/drm/i915_component.h  |  71 ++
> > > >   4 files changed, 521 insertions(+), 1 deletion(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h 
> > > > b/drivers/gpu/drm/i915/i915_drv.h
> > > > index f763b30f98d9..b68bc980b7cd 100644
> > > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > > @@ -2015,6 +2015,8 @@ struct drm_i915_private {
> > > > struct i915_pmu pmu;
> > > > +   struct i915_hdcp_component_master *hdcp_comp;
> > > > +
> > > > /*
> > > >  * NOTE: This is the dri1/ums dungeon, don't add stuff here. 
> > > > Your patch
> > > >  * will be rejected. Instead look for a better place.
> > > > diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> > > > b/drivers/gpu/drm/i915/intel_drv.h
> > > > index 85a526598096..bde82f3ada85 100644
> > > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > > @@ -29,6 +29,7 @@
> > > >   #include 
> > > >   #include 
> > > >   #include 
> > > > +#include 
> > > >   #include 
> > > >   #include "i915_drv.h"
> > > >   #include 
> > > > @@ -379,6 +380,9 @@ struct intel_hdcp_shim {
> > > > /* Detects panel's hdcp capability. This is optional for HDMI. 
> > > > */
> > > > int (*hdcp_capable)(struct intel_digital_port *intel_dig_port,
> > > > bool *hdcp_capable);
> > > > +
> > > > +   /* Detects the HDCP protocol(DP/HDMI) required on the port */
> > > > +   enum mei_hdcp_wired_protocol (*hdcp_protocol)(void);
> > > Looking ahead, this seems hardwired to constant return value? Or why do we
> > > need a function here?
> > This is hardwired based on the connector type(DP/HDMI).
> > Since we have the shim for hdcp's connector based work, I have added this 
> > function.
> > 
> > Could have done this just with connector_type check, but in that way whole 
> > hdcp_shim
> > can be done in that way. So going with the larger design here.
> > > >   };
> > > >   struct intel_hdcp {
> > > > @@ -399,6 +403,9 @@ struct intel_hdcp {
> > > >  * content can flow only through a link protected by HDCP2.2.
> > > >  */
> > > > u8 content_type;
> > > > +
> > > > +   /* mei interface related information */
> > > > +   struct mei_hdcp_data mei_data;
> > > >   };
> > > >   struct intel_connector {
> > > > diff --git a/drivers/gpu/drm/i915/intel_hdcp.c 
> > > > b/drivers/gpu/drm/i915/intel_hdcp.c
> > > > index 99dddb540958..760780f1105c 100644
> > > > --- a/drivers/gpu/drm/i915/intel_hdcp.c
> > > > +++ b/drivers/gpu/drm/i915/intel_hdcp.c
> > > > @@ -8,14 +8,20 @@
> > > >   #include 
> > > >   #include 
> > > > +#include 
> > > >   #include 
> > > >   #include 
> > > > +#include 
> > > >   #include "intel_drv.h"
> > > >   #include "i915_reg.h"
> > > >   #define KEY_LOAD_TRIES5
> > > >   #define TIME_FOR_ENCRYPT_STATUS_CHANGE50
> > > > +#define GET_MEI_DDI_INDEX(p) ({\
> > > > +   typeof(p) __p = (p);   \
> > > > +   __p == PORT_A ? MEI_DDI_A : (enum mei_hdcp_ddi)__p;\
> > > > +})
> > > >   static
> > > >   bool intel_hdcp_is_ksv_valid(u8 *ksv)
> > > > @@ -833,6 +839,417 @@ bool is_hdcp_supported(struct drm_i915_private 
> > > > *dev_priv, enum port port)
> > > > !IS_CHERRYVIEW(dev_priv) && port < PORT_E);
> > > >   }
> > > > +static __attribute__((unused)) int
> > > > +hdcp2_prepare_ake_init(struct intel_connector *connector,
> > > > +  struct hdcp2_ake_init *ake_data)
> > > > +{
> > > > +   struct mei_hdcp_data *data = &connector->hdcp.mei_data;
> > > > +   struct drm_i915_private *dev_priv = 
> > > > to_i915(connector->base.dev);
> > > > +   struct i915_hdcp_component_master *comp = dev_priv->hdcp_comp;
> > > > +   int ret;
> > > > +
> > > > +   if (!comp)
> > > > +   return -EINVAL;
> > > > +
> > > > +   mutex_lock(&comp->mutex);
> > > > +   if (!comp->ops || !comp->dev) {
> > > > +   mutex_unlock(&comp->mutex);
> > > > +   return -EINVAL;
> > > > +   }
> > > > +
> > > > +   if (data->port == MEI_DDI_INVALID_PORT && connector->encoder)
> > > > +   data->port = 
> > > > GET_MEI_DDI_INDEX(connector->encoder->port);
> > > > +
> > > > +   /* Clear ME FW i

Re: [Intel-gfx] [PATCH v8 05/35] drm/i915: MEI interface definition

[Daniel Vetter]

On Fri, Dec 07, 2018 at 11:22:44AM +0530, C, Ramalingam wrote:
> 
> On 12/6/2018 3:53 PM, Daniel Vetter wrote:
> > On Tue, Nov 27, 2018 at 04:13:03PM +0530, Ramalingam C wrote:
> > > Defining the mei-i915 interface functions and initialization of
> > > the interface.
> > > 
> > > Signed-off-by: Ramalingam C 
> > > Signed-off-by: Tomas Winkler 
> > > ---
> > >   drivers/gpu/drm/i915/i915_drv.h   |   2 +
> > >   drivers/gpu/drm/i915/intel_drv.h  |   7 +
> > >   drivers/gpu/drm/i915/intel_hdcp.c | 442 
> > > +-
> > >   include/drm/i915_component.h  |  71 ++
> > >   4 files changed, 521 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.h 
> > > b/drivers/gpu/drm/i915/i915_drv.h
> > > index f763b30f98d9..b68bc980b7cd 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > @@ -2015,6 +2015,8 @@ struct drm_i915_private {
> > >   struct i915_pmu pmu;
> > > + struct i915_hdcp_component_master *hdcp_comp;
> > > +
> > >   /*
> > >* NOTE: This is the dri1/ums dungeon, don't add stuff here. 
> > > Your patch
> > >* will be rejected. Instead look for a better place.
> > > diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> > > b/drivers/gpu/drm/i915/intel_drv.h
> > > index 85a526598096..bde82f3ada85 100644
> > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > @@ -29,6 +29,7 @@
> > >   #include 
> > >   #include 
> > >   #include 
> > > +#include 
> > >   #include 
> > >   #include "i915_drv.h"
> > >   #include 
> > > @@ -379,6 +380,9 @@ struct intel_hdcp_shim {
> > >   /* Detects panel's hdcp capability. This is optional for HDMI. 
> > > */
> > >   int (*hdcp_capable)(struct intel_digital_port *intel_dig_port,
> > >   bool *hdcp_capable);
> > > +
> > > + /* Detects the HDCP protocol(DP/HDMI) required on the port */
> > > + enum mei_hdcp_wired_protocol (*hdcp_protocol)(void);
> > Looking ahead, this seems hardwired to constant return value? Or why do we
> > need a function here?
> 
> This is hardwired based on the connector type(DP/HDMI).
> Since we have the shim for hdcp's connector based work, I have added this 
> function.
> 
> Could have done this just with connector_type check, but in that way whole 
> hdcp_shim
> can be done in that way. So going with the larger design here.

If it's hardwired then just make it a hardwired struct member. As long as
it's all const, we can mix data an function pointers. If you have runtime
variable data, then it's better to split it out from the ops structure, so
that we can keep ops read-only and protected against possible exploits
(any function pointers are a high-value target in the kernel).

> 
> > 
> > >   };
> > >   struct intel_hdcp {
> > > @@ -399,6 +403,9 @@ struct intel_hdcp {
> > >* content can flow only through a link protected by HDCP2.2.
> > >*/
> > >   u8 content_type;
> > > +
> > > + /* mei interface related information */
> > > + struct mei_hdcp_data mei_data;
> > >   };
> > >   struct intel_connector {
> > > diff --git a/drivers/gpu/drm/i915/intel_hdcp.c 
> > > b/drivers/gpu/drm/i915/intel_hdcp.c
> > > index 99dddb540958..760780f1105c 100644
> > > --- a/drivers/gpu/drm/i915/intel_hdcp.c
> > > +++ b/drivers/gpu/drm/i915/intel_hdcp.c
> > > @@ -8,14 +8,20 @@
> > >   #include 
> > >   #include 
> > > +#include 
> > >   #include 
> > >   #include 
> > > +#include 
> > >   #include "intel_drv.h"
> > >   #include "i915_reg.h"
> > >   #define KEY_LOAD_TRIES  5
> > >   #define TIME_FOR_ENCRYPT_STATUS_CHANGE  50
> > > +#define GET_MEI_DDI_INDEX(p) ({\
> > > + typeof(p) __p = (p);   \
> > > + __p == PORT_A ? MEI_DDI_A : (enum mei_hdcp_ddi)__p;\
> > > +})
> > >   static
> > >   bool intel_hdcp_is_ksv_valid(u8 *ksv)
> > > @@ -833,6 +839,417 @@ bool is_hdcp_supported(struct drm_i915_private 
> > > *dev_priv, enum port port)
> > >   !IS_CHERRYVIEW(dev_priv) && port < PORT_E);
> > >   }
> > > +static __attribute__((unused)) int
> > > +hdcp2_prepare_ake_init(struct intel_connector *connector,
> > > +struct hdcp2_ake_init *ake_data)
> > > +{
> > > + struct mei_hdcp_data *data = &connector->hdcp.mei_data;
> > > + struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> > > + struct i915_hdcp_component_master *comp = dev_priv->hdcp_comp;
> > > + int ret;
> > > +
> > > + if (!comp)
> > > + return -EINVAL;
> > > +
> > > + mutex_lock(&comp->mutex);
> > > + if (!comp->ops || !comp->dev) {
> > > + mutex_unlock(&comp->mutex);
> > > + return -EINVAL;
> > > + }
> > > +
> > > + if (data->port == MEI_DDI_INVALID_PORT && connector->encoder)
> > > + data->port = GET_MEI_DDI_INDEX(connector->encoder->port);
> > > +
> > > + /* Clear ME FW instance for the port, just incase */
> > > + comp->ops->cl

[Intel-gfx] [PATCH v2 2/3] ACPI / PMIC: Implement exec_mipi_pmic_seq_element for CHT Whiskey Cove PMIC

[Andy Shevchenko]

> Implement the exec_mipi_pmic_seq_element callback for the CHT Whiskey Cove
> PMIC.

> On some CHT devices this fixes the LCD panel not lighting up when it was
> not initialized by the GOP, because an external monitor was plugged in and
> the GOP initialized only the external monitor.

> + /* byte 0 aka PMIC Flag is reserved */
> + i2c_client_address  = get_unaligned_le16(data + 1);
> + reg_address = get_unaligned_le32(data + 3);
> + value   = get_unaligned_le32(data + 7);
> + mask= get_unaligned_le32(data + 11);
> +

> + if (i2c_client_address > 255 || reg_address > 255) {

Hmm... I would rather like to see hexadecimal for addresses and decimal for
something like countable value for data.

> + pr_warn("%s warning addresses too big client 0x%x reg 0x%x\n",
> + __func__, i2c_client_address, reg_address);
> + return;
> + }
> +
> + address = (i2c_client_address << 8) | reg_address;
> + regmap_update_bits(regmap, address, mask, value);
> +}

-- 
With Best Regards,
Andy Shevchenko


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Re: [Intel-gfx] [PATCH v8 04/35] drm/i915: Initialize HDCP2.2

[Daniel Vetter]

On Fri, Dec 07, 2018 at 10:24:26AM +0530, C, Ramalingam wrote:
> 
> On 12/6/2018 3:33 PM, Daniel Vetter wrote:
> > On Tue, Nov 27, 2018 at 04:13:02PM +0530, Ramalingam C wrote:
> > > Add the HDCP2.2 initialization to the existing HDCP1.4 stack.
> > With the comments below addressed the commit message is a bit untrue,
> > since this just wires up a basic hdcp2_supported flag in a few places.
> > Please make that clear.
> > 
> > > v2:
> > >mei interface handle is protected with mutex. [Chris Wilson]
> > > v3:
> > >Notifiers are used for the mei interface state.
> > > v4:
> > >Poll for mei client device state
> > >Error msg for out of mem [Uma]
> > >Inline req for init function removed [Uma]
> > > v5:
> > >Rebase as Part of reordering.
> > >Component is used for the I915 and MEI_HDCP interface [Daniel]
> > > v6:
> > >HDCP2.2 uses the I915 component master to communicate with mei_hdcp
> > >   - [Daniel]
> > >Required HDCP2.2 variables defined [Sean Paul]
> > > v7:
> > >intel_hdcp2.2_init returns void [Uma]
> > >Realigning the codes.
> > > v8:
> > >Avoid using bool structure members.
> > >MEI interface related changes are moved into separate patch.
> > >Commit msg is updated accordingly.
> > >intel_hdcp_exit is defined and used from i915_unload
> > > 
> > > Signed-off-by: Ramalingam C 
> > > ---
> > >   drivers/gpu/drm/i915/i915_drv.c   |   2 +
> > >   drivers/gpu/drm/i915/intel_dp.c   |   3 +-
> > >   drivers/gpu/drm/i915/intel_drv.h  |  16 +++-
> > >   drivers/gpu/drm/i915/intel_hdcp.c | 172 
> > > --
> > >   drivers/gpu/drm/i915/intel_hdmi.c |   2 +-
> > >   5 files changed, 130 insertions(+), 65 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.c 
> > > b/drivers/gpu/drm/i915/i915_drv.c
> > > index b1d23c73c147..fbedd5024afe 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.c
> > > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > > @@ -1755,6 +1755,8 @@ void i915_driver_unload(struct drm_device *dev)
> > >   disable_rpm_wakeref_asserts(dev_priv);
> > > + intel_hdcp_exit(dev_priv);
> > This smells like a separate patch. Needs to be split out. Looking at the
> > implementation of intel_hdcp_exit I think it's papering over some unload
> > trouble. We should be shutting down all the outputs on driver unload,
> > which mei should be triggering (with the component stuff), which means
> > this code should be unecessary. But I'm not sure.
> > 
> > Either way needs to be split out, but I think proper solution is to drop
> > it.
> 
> As we discussed, during v7-->v8 i changed the component usage such that it 
> wont affect i915 load/unload.
> During the first connector init, component master will be added. And during 
> the mei_client dev and driver binding,
> component will be added hence the binding will happen with interface 
> initialization from mei.
> 
> Upon HDCP2.2 request, component binding will be checked before attempting for 
> HDCP2.2 auth.
> So component master unbind triggered due to mei component_del, will teardown 
> the HDCP2.2 capability of the I915.
> 
> So in case of I915 unload trigger, from whatsoever reason, we need to clear 
> the HDCP activities and bring down
> the i915_hdcp_component_master and the interface with mei. For this purpose 
> only intel_hdcp_exit is written here.

Summarizing our irc discussion:

- I like the component usage of v7 much more.

- I still don't think we have a use-case for loading/unloading mei_hdcp on
  demand, or at least not in lockstep with i915.ko:
  - CrOS won't use ME
  - usual linux distros don't care about content protection, so won't even
enable the MEI_HDCP driver
  - iotg/embedded either wants it (and then probably always) or doesn't
want it (in which case it won't be built in). Plus embedded tends to
have all built-in drivers anyway, so they all load in order.

  And I don't want to review the validation coverage and locking and
  runtime consequences of making this possible, since I'm lazy :-)

- I looked lockdep splat in v7 again in more detail. It's not actually an
  issue with component usage, but just unlucky to now run into a
  preexisting issue: Any driver you unbind through the sysfs file will
  generate a lockdep splat if it removes any sysfs files itself. That's a
  pre-existing bug, easily reproduced by unbinding i915.

  Only thing new is that component connects the snd-hda-intel and i915
  unload sequence through the component lock (but does _not_ create a
  loop), and since we unbind snd-hda-intel through sysfs and i919
  unregisters _lots_ of sysfs files lockdep now sees the cycle. It's
  always been there.

  I'm working on a separate patch to fix this.

Cheers, Daniel
> 
> > 
> > > +
> > >   i915_driver_unregister(dev_priv);
> > >   if (i915_gem_suspend(dev_priv))
> > > diff --git a/drivers/gpu/drm/i915/intel_dp.c 
> > > b/drivers/gpu/drm/i915/intel_dp.c
> > > index 18e3a5a3d873..ac62af073688 10

Re: [Intel-gfx] [RFT i-g-t 1/2] tests/gem_shrink: Background, direct and OOM shrinker plus userptr tests

[Tvrtko Ursulin]

On 07/12/2018 14:06, Chris Wilson wrote:

Quoting Tvrtko Ursulin (2018-12-07 14:04:05)

From: Tvrtko Ursulin 

...

Signed-off-by: Tvrtko Ursulin 
---
  lib/igt_core.c  |  18 +++
  lib/igt_core.h  |   1 +
  tests/i915/gem_shrink.c | 299 
  3 files changed, 318 insertions(+)

diff --git a/lib/igt_core.c b/lib/igt_core.c
index 64883d6402af..d8fa0c83e279 100644
--- a/lib/igt_core.c
+++ b/lib/igt_core.c
@@ -1680,6 +1680,24 @@ void igt_stop_helper(struct igt_helper_process *proc)
 assert(helper_was_alive(proc, status));
  }
  
+/**

+ * igt_try_stop_helper:
+ * @proc: #igt_helper_process structure
+ *
+ * Terminates a helper process if it is still running.
+ */
+void igt_try_stop_helper(struct igt_helper_process *proc)


General thoughtless comment about try_func is that usually report a
bool.


Okay, another TODO item. First I wanted to call them __igt_stop_helper 
which would have avoided it. :)


But in general no need to pay too much attention for now, I am only 
using it for CI access.


Hitting the nested lock path is proving to be tricky, locally it only 
manages a handful of times per run. And since it is nested we cannot 
count on lockdep to stop things. Userptr half also regressed in so it's 
not triggering much shrinking any longer. :I


So perhaps strength in (CI) numbers shows something new. Or not..

Regards,

Tvrtko
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Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for igt: add timeline test cases (rev2)

[Koenig, Christian]

Am 07.12.18 um 14:58 schrieb Daniel Vetter:
> On Fri, Dec 7, 2018 at 11:29 AM Chris Wilson  wrote:
>> Quoting Patchwork (2018-12-07 10:27:46)
>>> == Series Details ==
>>>
>>> Series: igt: add timeline test cases (rev2)
>>> URL   : https://patchwork.freedesktop.org/series/53743/
>>> State : failure
>>>
>>> == Summary ==
>>>
>>> CI Bug Log - changes from CI_DRM_5281 -> IGTPW_2133
>>> 
>>>
>>> Summary
>>> ---
>>>
>>>**FAILURE**
>>>
>>>Serious unknown changes coming with IGTPW_2133 absolutely need to be
>>>verified manually.
>>>
>>>If you think the reported changes have nothing to do with the changes
>>>introduced in IGTPW_2133, please notify your bug team to allow them
>>>to document this new failure mode, which will reduce false positives in 
>>> CI.
>>>
>>>External URL: 
>>> https://patchwork.freedesktop.org/api/1.0/series/53743/revisions/2/mbox/
>>>
>>> Possible new issues
>>> ---
>>>
>>>Here are the unknown changes that may have been introduced in IGTPW_2133:
>>>
>>> ### IGT changes ###
>>>
>>>  Possible regressions 
>>>
>>>* igt@amdgpu/amd_basic@userptr:
>>>  - fi-kbl-8809g:   PASS -> DMESG-WARN
>> What fortuitous timing! Maybe you would like to take a stab at the
>> use-after-free in amdgpu's mmu_notifier.
> Adding Christian König.

Philip Yang is already working on this. We want to replace the MMU notifier 
with HMM as soon as possible.

Christian.

> -Daniel

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Re: [Intel-gfx] [PATCH v8 03/35] linux/mei: Header for mei_hdcp driver interface

[Daniel Vetter]

On Fri, Dec 07, 2018 at 07:23:06PM +0530, C, Ramalingam wrote:
> Hi,
> 
> In one of the offline discussion Tomas has shared his review comments on v8.

Let's please have all review here on the mailing list for better
coordination. Playing a game of telephone isn't efficient.

> So I am sharing the abstract of his suggestions here for the discussion and 
> for the agreement of interface in the community.
> Tomas please correct/add if I am missing any points.
> 
> 1. Remove the include/linux/mei_hdcp.h to make the i915-mei interface
>more generic.
> 1. Move the definition of the struct mei_hdcp_data to i915 and
>mei_hdcp.c and pass the void* in the ops' functions.

I don't get this. Using void * instead of the actual type we're passing
isn't more generic, it's just less safe. If we later on need to extend the
api contract between mei_hdcp and i915 we can always do that. Like we
already do with the i915/snd-hda-intel component contract in
i915_component.h and drm_audio_component.h.

Aside: Header names for the audio interface are maybe not the best, this
isn't primarily a component thing. So maybe call it
i915_mei_hdcp_interface.h and stuff all the structures/function pointers
that define the interface between the two drivers in there. Or some other
suitable name you like better.

> 2. Move the conversion of enum port value to mei_ddi_port value
>into mei_hdcp.c. Let I915 pass the enum port value as such.

logical port 2 physical register index mapping tends to shift around and
is always highly machine specific. As long as we do it consistently
somewhere we should be good. Seems fine to me.

> 3. Modified local definition of the struct mei_hdcp_data will looks
>like

No local defintions of structures please. Otherwise I'm ok with whatever
gets the job done.

> 4.
> 
>+/* hdcp data per port */
>+struct hdcp_port_data {
>+ short int port;
>+ u8 port_type;
>+ u8 protocol;
>+ u16 k;
>+ u32 seq_num_m;
>+ struct hdcp2_streamid_type *streams;
>  };
> 
> 2. Add K-Doc compliant commenting in the mei_hdcp.c

If you do that, please include the relevant comments into the drm/i915
docbook, like we do already with the audio stuff.

> I have implemented these changes and posted for intel-gfx-trybot. Just incase 
> anyone wants to
> refer the code please look at https://patchwork.freedesktop.org/series/53655/ 
> .
> Not shared on #intel-gfx as further review discussions are on-going on 
> intel-gfx.

As discussed, no void * in the interface, and we definitely need a shared
header for ops/data structures. We want the compiler to help us catch when
one side of this i915/mei_hdcp api contract changes as much as possible.
All the other changes seem reasonable.

Thanks, Daniel

> 

> --Ram
> 
> On 11/27/2018 4:13 PM, Ramalingam C wrote:
> > Data structures and Enum for the I915-MEI_HDCP interface are defined
> > at 
> > 
> > v2:
> >Rebased.
> > v3:
> >mei_cl_device is removed from mei_hdcp_data [Tomas]
> > v4:
> >Comment style and typo fixed [Uma]
> > v5:
> >Rebased.
> > v6:
> >No changes.
> > v7:
> >Remove redundant text from the License header
> >Change uintXX_t type to uXX_t types
> >Remove unneeded include to mei_cl_bus.h
> >Coding style fixed [Uma]
> > V8:
> >Tab cleanup
> >Fix kdoc and namespaces
> >Update MAINTAINERS
> > 
> > Signed-off-by: Ramalingam C 
> > Signed-off-by: Tomas Winkler 
> > Reviewed-by: Uma Shankar 
> > ---
> >   MAINTAINERS  |  1 +
> >   include/linux/mei_hdcp.h | 91 
> > 
> >   2 files changed, 92 insertions(+)
> >   create mode 100644 include/linux/mei_hdcp.h
> > 
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 1026150ae90f..2fd6555bf040 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -7540,6 +7540,7 @@ L:linux-ker...@vger.kernel.org
> >   S:Supported
> >   F:include/uapi/linux/mei.h
> >   F:include/linux/mei_cl_bus.h
> > +F: include/linux/mei_hdcp.h
> >   F:drivers/misc/mei/*
> >   F:drivers/watchdog/mei_wdt.c
> >   F:Documentation/misc-devices/mei/*
> > diff --git a/include/linux/mei_hdcp.h b/include/linux/mei_hdcp.h
> > new file mode 100644
> > index ..716123003dd1
> > --- /dev/null
> > +++ b/include/linux/mei_hdcp.h
> > @@ -0,0 +1,91 @@
> > +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
> > +/*
> > + * Copyright © 2017-2018 Intel Corporation
> > + *
> > + * Authors:
> > + * Ramalingam C 
> > + */
> > +
> > +#ifndef _LINUX_MEI_HDCP_H
> > +#define _LINUX_MEI_HDCP_H
> > +
> > +/**
> > + * enum mei_hdcp_ddi - The physical digital display interface (DDI)
> > + * available on the platform
> > + * @MEI_DDI_INVALID_PORT: Not a valid port
> > + * @MEI_DDI_RANGE_BEGIN: Beginning of the valid DDI port range
> > + * @MEI_DDI_B: Port DDI B
> > + * @MEI_DDI_C: Port DDI C
> > + * @MEI_DDI_D: Port DDI

Re: [Intel-gfx] [PATCH] drm/i915: Flush GPU relocs harder for gen3

[Joonas Lahtinen]

Quoting Chris Wilson (2018-12-07 15:40:37)
> Adding an extra MI_STORE_DWORD_IMM to the gpu relocation path for gen3
> was good, but still not good enough. To survive 24+ hours under test we
> needed to perform not one, not two but three extra store-dw. Doing so
> for each GPU relocation was a little unsightly and since we need to
> worry about userspace hitting the same issues, we should apply the dummy
> store-dw into the EMIT_FLUSH.
> 
> Fixes: 7dd4f6729f92 ("drm/i915: Async GPU relocation processing")
> References: 7fa28e146994 ("drm/i915: Write GPU relocs harder with gen3")
> Testcase: igt/gem_tiled_fence_blits # blb/pnv
> Signed-off-by: Chris Wilson 
> Cc: Joonas Lahtinen 

As we're not going to be adding read-only scratch pages for Gen2 (I
think it's a few generations too old to have it :P), this is:

Reviewed-by: Joonas Lahtinen 

Regards, Joonas

> ---
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c |  7 +--
>  drivers/gpu/drm/i915/intel_ringbuffer.c| 15 ---
>  2 files changed, 13 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
> b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 10a4afb4f235..786d719e652d 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1268,7 +1268,7 @@ relocate_entry(struct i915_vma *vma,
> else if (gen >= 4)
> len = 4;
> else
> -   len = 6;
> +   len = 3;
>  
> batch = reloc_gpu(eb, vma, len);
> if (IS_ERR(batch))
> @@ -1309,11 +1309,6 @@ relocate_entry(struct i915_vma *vma,
> *batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
> *batch++ = addr;
> *batch++ = target_offset;
> -
> -   /* And again for good measure (blb/pnv) */
> -   *batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
> -   *batch++ = addr;
> -   *batch++ = target_offset;
> }
>  
> goto out;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c 
> b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 74a4d587c312..02f6a9b81083 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -69,19 +69,28 @@ unsigned int intel_ring_update_space(struct intel_ring 
> *ring)
>  static int
>  gen2_render_ring_flush(struct i915_request *rq, u32 mode)
>  {
> +   unsigned int num_store_dw;
> u32 cmd, *cs;
>  
> cmd = MI_FLUSH;
> -
> +   num_store_dw = 0;
> if (mode & EMIT_INVALIDATE)
> cmd |= MI_READ_FLUSH;
> +   if (mode & EMIT_FLUSH)
> +   num_store_dw = 4;
>  
> -   cs = intel_ring_begin(rq, 2);
> +   cs = intel_ring_begin(rq, 2 + 3 * num_store_dw);
> if (IS_ERR(cs))
> return PTR_ERR(cs);
>  
> *cs++ = cmd;
> -   *cs++ = MI_NOOP;
> +   while (num_store_dw--) {
> +   *cs++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
> +   *cs++ = i915_scratch_offset(rq->i915);
> +   *cs++ = 0;
> +   }
> +   *cs++ = MI_FLUSH | MI_NO_WRITE_FLUSH;
> +
> intel_ring_advance(rq, cs);
>  
> return 0;
> -- 
> 2.20.0.rc2
> 
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Re: [Intel-gfx] [PATCH] drm/i915/icl: Skip DSI path in DDI vswing programming.

[Imre Deak]

Hi DK,

On Thu, Dec 06, 2018 at 03:43:55PM -0800, Dhinakaran Pandiyan wrote:
> DSI implements it's own pre_enable hook, encoder output type is never
> DSI.
> 
> Cc: Manasi Navare 
> Cc: Paulo Zanoni 
> Cc: James Ausmus 
> Fixes: fb5c8e9d4350 ("drm/i915/icl: Implement voltage swing programming 
> sequence for Combo PHY DDI")
> Signed-off-by: Dhinakaran Pandiyan 
> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 9 ++---
>  1 file changed, 2 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c 
> b/drivers/gpu/drm/i915/intel_ddi.c
> index f3e1d6a0b7dd..5792632fa6a3 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2489,13 +2489,8 @@ static void icl_ddi_combo_vswing_program(struct 
> drm_i915_private *dev_priv,
>   /* Set DisableTap2 and DisableTap3 if MIPI DSI
>* Clear DisableTap2 and DisableTap3 for all other Ports
>*/
> - if (type == INTEL_OUTPUT_DSI) {
> - val |= TAP2_DISABLE;
> - val |= TAP3_DISABLE;
> - } else {
> - val &= ~TAP2_DISABLE;
> - val &= ~TAP3_DISABLE;
> - }
> + val &= ~TAP2_DISABLE;
> + val &= ~TAP3_DISABLE;

note that Clint's patch at
https://patchwork.freedesktop.org/patch/265848/
solves this as well. We could minimize the churn by applying only that.

>   I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val);
>  
>   /* Program PORT_TX_DW2 */
> -- 
> 2.17.1
> 
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Re: [Intel-gfx] [RFT i-g-t 1/2] tests/gem_shrink: Background, direct and OOM shrinker plus userptr tests

[Chris Wilson]

Quoting Tvrtko Ursulin (2018-12-07 14:04:05)
> From: Tvrtko Ursulin 
> 
> ...
> 
> Signed-off-by: Tvrtko Ursulin 
> ---
>  lib/igt_core.c  |  18 +++
>  lib/igt_core.h  |   1 +
>  tests/i915/gem_shrink.c | 299 
>  3 files changed, 318 insertions(+)
> 
> diff --git a/lib/igt_core.c b/lib/igt_core.c
> index 64883d6402af..d8fa0c83e279 100644
> --- a/lib/igt_core.c
> +++ b/lib/igt_core.c
> @@ -1680,6 +1680,24 @@ void igt_stop_helper(struct igt_helper_process *proc)
> assert(helper_was_alive(proc, status));
>  }
>  
> +/**
> + * igt_try_stop_helper:
> + * @proc: #igt_helper_process structure
> + *
> + * Terminates a helper process if it is still running.
> + */
> +void igt_try_stop_helper(struct igt_helper_process *proc)

General thoughtless comment about try_func is that usually report a
bool.
-Chris
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[Intel-gfx] [RFT i-g-t 1/2] tests/gem_shrink: Background, direct and OOM shrinker plus userptr tests

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

...

Signed-off-by: Tvrtko Ursulin 
---
 lib/igt_core.c  |  18 +++
 lib/igt_core.h  |   1 +
 tests/i915/gem_shrink.c | 299 
 3 files changed, 318 insertions(+)

diff --git a/lib/igt_core.c b/lib/igt_core.c
index 64883d6402af..d8fa0c83e279 100644
--- a/lib/igt_core.c
+++ b/lib/igt_core.c
@@ -1680,6 +1680,24 @@ void igt_stop_helper(struct igt_helper_process *proc)
assert(helper_was_alive(proc, status));
 }
 
+/**
+ * igt_try_stop_helper:
+ * @proc: #igt_helper_process structure
+ *
+ * Terminates a helper process if it is still running.
+ */
+void igt_try_stop_helper(struct igt_helper_process *proc)
+{
+   int status;
+
+   /* failure here means the pid is already dead and so waiting is safe */
+   kill(proc->pid, proc->use_SIGKILL ? SIGKILL : SIGTERM);
+
+   status = igt_wait_helper(proc);
+   if (!helper_was_alive(proc, status))
+   igt_debug("Helper died too early with status=%d\n", status);
+}
+
 static void children_exit_handler(int sig)
 {
int status;
diff --git a/lib/igt_core.h b/lib/igt_core.h
index 6f8c3852a686..beec34667524 100644
--- a/lib/igt_core.h
+++ b/lib/igt_core.h
@@ -795,6 +795,7 @@ bool __igt_fork_helper(struct igt_helper_process *proc);
for (; __igt_fork_helper(proc); exit(0))
 int igt_wait_helper(struct igt_helper_process *proc);
 void igt_stop_helper(struct igt_helper_process *proc);
+void igt_try_stop_helper(struct igt_helper_process *proc);
 
 /* exit handler code */
 
diff --git a/tests/i915/gem_shrink.c b/tests/i915/gem_shrink.c
index c8e05814ee70..2c8e8f9453d2 100644
--- a/tests/i915/gem_shrink.c
+++ b/tests/i915/gem_shrink.c
@@ -26,6 +26,9 @@
  *
  * Exercise the shrinker by overallocating GEM objects
  */
+#include 
+#include 
+#include 
 
 #include "igt.h"
 #include "igt_gt.h"
@@ -366,6 +369,287 @@ static void reclaim(unsigned engine, int timeout)
close(fd);
 }
 
+static unsigned long get_meminfo(const char *info, const char *tag)
+{
+   const char *str;
+   unsigned long val;
+
+   str = strstr(info, tag);
+   if (str && sscanf(str + strlen(tag), " %lu", &val) == 1)
+   return val >> 10;
+
+   igt_warn("Unrecognised /proc/meminfo field: '%s'\n", tag);
+   return 0;
+}
+
+static unsigned long get_avail_ram_mb(void)
+{
+   int fd;
+   int ret;
+   char buf[4096];
+   unsigned long ram;
+
+   fd = open("/proc/meminfo", O_RDONLY);
+   igt_assert_fd(fd);
+
+   ret = read(fd, buf, sizeof(buf));
+   igt_assert(ret >= 0);
+
+   close(fd);
+
+   ram = get_meminfo(buf, "MemAvailable:");
+   ram += get_meminfo(buf, "Buffers:");
+   ram += get_meminfo(buf, "Cached:");
+   ram += get_meminfo(buf, "SwapCached:");
+
+   return ram;
+}
+
+struct test {
+#define TEST_BO(1)
+#define TEST_USERPTR   (2)
+   unsigned int flags;
+   int fd;
+};
+
+static uint32_t __get_pages(int fd, unsigned long alloc)
+{
+   uint32_t handle = gem_create(fd, alloc);
+
+   gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, 0);
+   gem_madvise(fd, handle, I915_MADV_DONTNEED);
+
+   return handle;
+}
+
+struct test_obj {
+   void *ptr;
+   uint32_t handle;
+};
+
+static void
+__get_userptr(int fd, struct test_obj *obj, unsigned long sz)
+{
+   struct local_i915_gem_userptr userptr = { };
+   void *ptr;
+
+   igt_assert_eq(sz & 4095, 0);
+
+   ptr = mmap(NULL, sz, PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+   assert(ptr != MAP_FAILED);
+
+   userptr.user_size = sz;
+   userptr.user_ptr = to_user_pointer(ptr);
+   do_ioctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &userptr);
+
+   gem_set_domain(fd, userptr.handle, I915_GEM_DOMAIN_GTT, 0);
+   gem_madvise(fd, userptr.handle, I915_MADV_DONTNEED);
+
+   obj->ptr = ptr;
+   obj->handle = userptr.handle;
+}
+
+#define PAGE_SIZE 4096
+static void *mempressure(void *arg)
+{
+   struct test_obj *list = NULL;
+   struct test *test = arg;
+   const unsigned int sz_mb = 2;
+   const unsigned int sz = sz_mb << 20;
+   unsigned int n = 0, max = 0;
+   unsigned int blocks;
+
+   while (true) {
+   unsigned long ram_mb = get_avail_ram_mb();
+
+   if (!list) {
+   blocks = ram_mb / sz_mb;
+   list = calloc(blocks, sizeof(*list));
+   igt_assert(list);
+   } else if (ram_mb < 256) {
+   blocks = max + 1;
+   }
+
+   if (list[n].ptr || list[n].handle) {
+   if (test->flags & TEST_USERPTR) {
+   munmap(list[n].ptr, sz);
+   gem_close(test->fd, list[n].handle);
+   } else if (test->flags & TEST_BO) {
+   gem_close(test->fd, list[n].handle);
+   } else {
+  

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for igt: add timeline test cases (rev2)

[Daniel Vetter]

On Fri, Dec 7, 2018 at 11:29 AM Chris Wilson  wrote:
>
> Quoting Patchwork (2018-12-07 10:27:46)
> > == Series Details ==
> >
> > Series: igt: add timeline test cases (rev2)
> > URL   : https://patchwork.freedesktop.org/series/53743/
> > State : failure
> >
> > == Summary ==
> >
> > CI Bug Log - changes from CI_DRM_5281 -> IGTPW_2133
> > 
> >
> > Summary
> > ---
> >
> >   **FAILURE**
> >
> >   Serious unknown changes coming with IGTPW_2133 absolutely need to be
> >   verified manually.
> >
> >   If you think the reported changes have nothing to do with the changes
> >   introduced in IGTPW_2133, please notify your bug team to allow them
> >   to document this new failure mode, which will reduce false positives in 
> > CI.
> >
> >   External URL: 
> > https://patchwork.freedesktop.org/api/1.0/series/53743/revisions/2/mbox/
> >
> > Possible new issues
> > ---
> >
> >   Here are the unknown changes that may have been introduced in IGTPW_2133:
> >
> > ### IGT changes ###
> >
> >  Possible regressions 
> >
> >   * igt@amdgpu/amd_basic@userptr:
> > - fi-kbl-8809g:   PASS -> DMESG-WARN
>
> What fortuitous timing! Maybe you would like to take a stab at the
> use-after-free in amdgpu's mmu_notifier.

Adding Christian König.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
___
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Re: [Intel-gfx] [PATCH v8 03/35] linux/mei: Header for mei_hdcp driver interface

[C, Ramalingam]

Hi,

In one of the offline discussion Tomas has shared his review comments on v8.
So I am sharing the abstract of his suggestions here for the discussion and for 
the agreement of interface in the community.
Tomas please correct/add if I am missing any points.

1. Remove the include/linux/mei_hdcp.h to make the i915-mei interface
   more generic.
1. Move the definition of the struct mei_hdcp_data to i915 and
   mei_hdcp.c and pass the void* in the ops' functions.
2. Move the conversion of enum port value to mei_ddi_port value
   into mei_hdcp.c. Let I915 pass the enum port value as such.
3. Modified local definition of the struct mei_hdcp_data will looks
   like
4.

   +/* hdcp data per port */
   +struct hdcp_port_data {
   + short int port;
   + u8 port_type;
   + u8 protocol;
   + u16 k;
   + u32 seq_num_m;
   + struct hdcp2_streamid_type *streams;
 };

2. Add K-Doc compliant commenting in the mei_hdcp.c

I have implemented these changes and posted for intel-gfx-trybot. Just incase 
anyone wants to
refer the code please look at https://patchwork.freedesktop.org/series/53655/ .
Not shared on #intel-gfx as further review discussions are on-going on 
intel-gfx.

--Ram

On 11/27/2018 4:13 PM, Ramalingam C wrote:

Data structures and Enum for the I915-MEI_HDCP interface are defined
at 

v2:
   Rebased.
v3:
   mei_cl_device is removed from mei_hdcp_data [Tomas]
v4:
   Comment style and typo fixed [Uma]
v5:
   Rebased.
v6:
   No changes.
v7:
   Remove redundant text from the License header
   Change uintXX_t type to uXX_t types
   Remove unneeded include to mei_cl_bus.h
   Coding style fixed [Uma]
V8:
   Tab cleanup
   Fix kdoc and namespaces
   Update MAINTAINERS

Signed-off-by: Ramalingam C 
Signed-off-by: Tomas Winkler 
Reviewed-by: Uma Shankar 
---
  MAINTAINERS  |  1 +
  include/linux/mei_hdcp.h | 91 
  2 files changed, 92 insertions(+)
  create mode 100644 include/linux/mei_hdcp.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 1026150ae90f..2fd6555bf040 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7540,6 +7540,7 @@ L:linux-ker...@vger.kernel.org
  S:Supported
  F:include/uapi/linux/mei.h
  F:include/linux/mei_cl_bus.h
+F: include/linux/mei_hdcp.h
  F:drivers/misc/mei/*
  F:drivers/watchdog/mei_wdt.c
  F:Documentation/misc-devices/mei/*
diff --git a/include/linux/mei_hdcp.h b/include/linux/mei_hdcp.h
new file mode 100644
index ..716123003dd1
--- /dev/null
+++ b/include/linux/mei_hdcp.h
@@ -0,0 +1,91 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
+/*
+ * Copyright © 2017-2018 Intel Corporation
+ *
+ * Authors:
+ * Ramalingam C 
+ */
+
+#ifndef _LINUX_MEI_HDCP_H
+#define _LINUX_MEI_HDCP_H
+
+/**
+ * enum mei_hdcp_ddi - The physical digital display interface (DDI)
+ * available on the platform
+ * @MEI_DDI_INVALID_PORT: Not a valid port
+ * @MEI_DDI_RANGE_BEGIN: Beginning of the valid DDI port range
+ * @MEI_DDI_B: Port DDI B
+ * @MEI_DDI_C: Port DDI C
+ * @MEI_DDI_D: Port DDI D
+ * @MEI_DDI_E: Port DDI E
+ * @MEI_DDI_F: Port DDI F
+ * @MEI_DDI_A: Port DDI A
+ * @MEI_DDI_RANGE_END: End of the valid DDI port range
+ */
+enum mei_hdcp_ddi {
+   MEI_DDI_INVALID_PORT = 0x00,
+
+   MEI_DDI_RANGE_BEGIN = 0x01,
+   MEI_DDI_B   = 0x01,
+   MEI_DDI_C   = 0x02,
+   MEI_DDI_D   = 0x03,
+   MEI_DDI_E   = 0x04,
+   MEI_DDI_F   = 0x05,
+   MEI_DDI_A   = 0x07,
+   MEI_DDI_RANGE_END   = MEI_DDI_A,
+};
+
+/**
+ * enum mei_hdcp_port_type - The types of HDCP 2.2 ports supported
+ *
+ * @MEI_HDCP_PORT_TYPE_INVALID: Invalid port
+ * @MEI_HDCP_PORT_TYPE_INTEGRATED: ports that are integrated into Intel HW
+ * @MEI_HDCP_PORT_TYPE_LSPCON: discrete wired Tx port with LSPCON (HDMI 2.0)
+ * @MEI_HDCP_PORT_TYPE_CPDP: discrete wired Tx port using the CPDP (DP 1.3)
+ */
+enum mei_hdcp_port_type {
+   MEI_HDCP_PORT_TYPE_INVALID= 0x00,
+   MEI_HDCP_PORT_TYPE_INTEGRATED = 0x01,
+   MEI_HDCP_PORT_TYPE_LSPCON = 0x02,
+   MEI_HDCP_PORT_TYPE_CPDP   = 0x03,
+};
+
+/*
+ * enum mei_hdcp_wired_protocol - Supported integrated wired HDCP protocol.
+ * @HDCP_PROTOCOL_INVALID: invalid type
+ * @HDCP_PROTOCOL_HDMI: HDMI
+ * @HDCP_PROTOCOL_DP: DP
+ *
+ * Based on this value, Minor difference needed between wired specifications
+ * are handled.
+ */
+enum mei_hdcp_wired_protocol {
+   MEI_HDCP_PROTOCOL_INVALID,
+   MEI_HDCP_PROTOCOL_HDMI,
+   MEI_HDCP_PROTOCOL_DP
+};
+
+/**
+ * struct mei_hdcp_data - Input data to the mei_hdcp APIs
+ * @port: The physical port (ddi).
+ * @port_type: The port type.
+ * @protocol: The Protocol on the port.
+ * @k: Number of streams transmitted on the port.
+ * In case of HDMI & DP SST, a single stream will be
+ * transmitted on the port.
+ * @seq_num_m: A sequence number of RepeaterAuth_Stream_Manage m

[Intel-gfx] ✓ Fi.CI.IGT: success for Use intel_* types more consistently

[Patchwork]

== Series Details ==

Series: Use intel_* types more consistently
URL   : https://patchwork.freedesktop.org/series/53705/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5279_full -> Patchwork_11042_full


Summary
---

  **WARNING**

  Minor unknown changes coming with Patchwork_11042_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_11042_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_11042_full:

### IGT changes ###

 Warnings 

  * igt@tools_test@sysfs_l3_parity:
- shard-hsw:  PASS -> SKIP

  
Known issues


  Here are the changes found in Patchwork_11042_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@kms_cursor_crc@cursor-256x256-dpms:
- shard-glk:  PASS -> FAIL [fdo#103232]
- shard-apl:  PASS -> FAIL [fdo#103232] +2

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-hsw:  PASS -> FAIL [fdo#102887]

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
- shard-glk:  PASS -> FAIL [fdo#103167] +1

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
- shard-glk:  PASS -> FAIL [fdo#108145]

  * igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
- shard-glk:  PASS -> FAIL [fdo#103166]

  * {igt@kms_rotation_crc@multiplane-rotation-cropping-top}:
- shard-kbl:  PASS -> DMESG-FAIL [fdo#108950]
- shard-glk:  PASS -> DMESG-WARN [fdo#105763] / [fdo#106538]

  
 Possible fixes 

  * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a:
- shard-snb:  DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_cursor_crc@cursor-128x128-random:
- shard-apl:  FAIL [fdo#103232] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-glk:  FAIL [fdo#103167] -> PASS

  * {igt@kms_plane@pixel-format-pipe-b-planes-source-clamping}:
- shard-apl:  FAIL [fdo#108948] -> PASS

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
- shard-apl:  FAIL [fdo#103166] -> PASS

  * igt@kms_setmode@basic:
- shard-apl:  FAIL [fdo#99912] -> PASS

  * igt@kms_vblank@pipe-c-ts-continuation-suspend:
- shard-kbl:  INCOMPLETE [fdo#103665] -> PASS

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
  [fdo#106538]: https://bugs.freedesktop.org/show_bug.cgi?id=106538
  [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
  [fdo#108950]: https://bugs.freedesktop.org/show_bug.cgi?id=108950
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (7 -> 5)
--

  Missing(2): shard-skl shard-iclb 


Build changes
-

* Linux: CI_DRM_5279 -> Patchwork_11042

  CI_DRM_5279: 8c3dbdac21ef5357bfa9b11da9b2bd1baedc4962 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4743: edb2db2cf2b6665d7ba3fa9117263302f6307a4f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_11042: 3c31c0ac3fda554cb4383098e3f8ee4611720567 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ 
git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11042/
___
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[Intel-gfx] ✓ Fi.CI.IGT: success for New DDB allocation algorithm (rev2)

[Patchwork]

== Series Details ==

Series: New DDB allocation algorithm (rev2)
URL   : https://patchwork.freedesktop.org/series/53682/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5279_full -> Patchwork_11041_full


Summary
---

  **WARNING**

  Minor unknown changes coming with Patchwork_11041_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_11041_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_11041_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb:
- {shard-iclb}:   PASS -> FAIL +11

  
 Warnings 

  * igt@kms_plane_lowres@pipe-c-tiling-yf:
- {shard-iclb}:   PASS -> SKIP +1

  * igt@tools_test@tools_test:
- shard-glk:  PASS -> SKIP

  
Known issues


  Here are the changes found in Patchwork_11041_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_schedule@pi-ringfull-blt:
- shard-skl:  NOTRUN -> FAIL [fdo#103158]

  * igt@gem_softpin@noreloc-s3:
- shard-skl:  PASS -> INCOMPLETE [fdo#104108] / [fdo#107773]

  * igt@i915_suspend@fence-restore-untiled:
- {shard-iclb}:   PASS -> INCOMPLETE [fdo#107713]

  * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a:
- shard-skl:  NOTRUN -> DMESG-WARN [fdo#107956]

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-glk:  PASS -> FAIL [fdo#108145]

  * igt@kms_cursor_crc@cursor-128x128-sliding:
- shard-apl:  PASS -> FAIL [fdo#103232] +1

  * igt@kms_cursor_crc@cursor-256x256-sliding:
- {shard-iclb}:   NOTRUN -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-256x85-sliding:
- shard-glk:  PASS -> FAIL [fdo#103232] +2

  * igt@kms_cursor_crc@cursor-size-change:
- {shard-iclb}:   PASS -> FAIL [fdo#103232]

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
- shard-hsw:  PASS -> FAIL [fdo#105767]

  * igt@kms_draw_crc@draw-method-rgb565-mmap-wc-ytiled:
- shard-skl:  PASS -> FAIL [fdo#103184]

  * igt@kms_draw_crc@draw-method-xrgb-render-untiled:
- shard-skl:  NOTRUN -> FAIL [fdo#103184]

  * igt@kms_fbcon_fbt@psr:
- shard-skl:  NOTRUN -> FAIL [fdo#107882]

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
- shard-glk:  PASS -> FAIL [fdo#103167] +1

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-gtt:
- shard-apl:  SKIP -> INCOMPLETE [fdo#103927]

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu:
- shard-skl:  NOTRUN -> FAIL [fdo#105682] +1

  * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-render:
- shard-skl:  PASS -> FAIL [fdo#103167] +3

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-skl:  NOTRUN -> FAIL [fdo#103167]

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
- {shard-iclb}:   PASS -> FAIL [fdo#103167] +3

  * igt@kms_plane@pixel-format-pipe-a-planes:
- shard-skl:  NOTRUN -> FAIL [fdo#103166]

  * igt@kms_plane@pixel-format-pipe-c-planes:
- {shard-iclb}:   NOTRUN -> FAIL [fdo#103166]

  * {igt@kms_plane@pixel-format-pipe-c-planes-source-clamping}:
- shard-apl:  PASS -> FAIL [fdo#108948]

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl:  PASS -> FAIL [fdo#107815] / [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-b-alpha-transparant-fb:
- shard-skl:  NOTRUN -> FAIL [fdo#108145] +2

  * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
- shard-skl:  NOTRUN -> FAIL [fdo#107815] / [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl:  PASS -> FAIL [fdo#107815]

  * igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
- shard-glk:  PASS -> FAIL [fdo#103166]

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
- shard-apl:  PASS -> FAIL [fdo#103166]
- {shard-iclb}:   PASS -> FAIL [fdo#103166]

  * igt@kms_sysfs_edid_timing:
- shard-skl:  NOTRUN -> FAIL [fdo#100047]

  * igt@pm_backlight@fade_with_suspend:
- shard-skl:  NOTRUN -> FAIL [fdo#107847]

  * igt@pm_rpm@basic-rte:
- {shard-iclb}:   PASS -> DMESG-WARN [fdo#108654]

  * igt@pm_rpm@debugfs-read:
- shard-skl:  PASS -> INCOMPLETE [fdo#107807] +2

  
 Possible fixes 

  * igt@gem_userptr_blits@readonly-unsync:
- shard-skl:  TIMEOUT [fdo#108887] -> PASS

  * igt@gem_workarounds@suspend-resume-fd:
- shard-skl:  INCOMPLETE [fdo#10410

[Intel-gfx] [PATCH] drm/i915: Flush GPU relocs harder for gen3

[Chris Wilson]

Adding an extra MI_STORE_DWORD_IMM to the gpu relocation path for gen3
was good, but still not good enough. To survive 24+ hours under test we
needed to perform not one, not two but three extra store-dw. Doing so
for each GPU relocation was a little unsightly and since we need to
worry about userspace hitting the same issues, we should apply the dummy
store-dw into the EMIT_FLUSH.

Fixes: 7dd4f6729f92 ("drm/i915: Async GPU relocation processing")
References: 7fa28e146994 ("drm/i915: Write GPU relocs harder with gen3")
Testcase: igt/gem_tiled_fence_blits # blb/pnv
Signed-off-by: Chris Wilson 
Cc: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |  7 +--
 drivers/gpu/drm/i915/intel_ringbuffer.c| 15 ---
 2 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 10a4afb4f235..786d719e652d 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1268,7 +1268,7 @@ relocate_entry(struct i915_vma *vma,
else if (gen >= 4)
len = 4;
else
-   len = 6;
+   len = 3;
 
batch = reloc_gpu(eb, vma, len);
if (IS_ERR(batch))
@@ -1309,11 +1309,6 @@ relocate_entry(struct i915_vma *vma,
*batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
*batch++ = addr;
*batch++ = target_offset;
-
-   /* And again for good measure (blb/pnv) */
-   *batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
-   *batch++ = addr;
-   *batch++ = target_offset;
}
 
goto out;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c 
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 74a4d587c312..02f6a9b81083 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -69,19 +69,28 @@ unsigned int intel_ring_update_space(struct intel_ring 
*ring)
 static int
 gen2_render_ring_flush(struct i915_request *rq, u32 mode)
 {
+   unsigned int num_store_dw;
u32 cmd, *cs;
 
cmd = MI_FLUSH;
-
+   num_store_dw = 0;
if (mode & EMIT_INVALIDATE)
cmd |= MI_READ_FLUSH;
+   if (mode & EMIT_FLUSH)
+   num_store_dw = 4;
 
-   cs = intel_ring_begin(rq, 2);
+   cs = intel_ring_begin(rq, 2 + 3 * num_store_dw);
if (IS_ERR(cs))
return PTR_ERR(cs);
 
*cs++ = cmd;
-   *cs++ = MI_NOOP;
+   while (num_store_dw--) {
+   *cs++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
+   *cs++ = i915_scratch_offset(rq->i915);
+   *cs++ = 0;
+   }
+   *cs++ = MI_FLUSH | MI_NO_WRITE_FLUSH;
+
intel_ring_advance(rq, cs);
 
return 0;
-- 
2.20.0.rc2

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Re: [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Push EMIT_INVALIDATE at request start to backends

[Chris Wilson]

Quoting Patchwork (2018-12-07 11:28:17)
> == Series Details ==
> 
> Series: series starting with [1/3] drm/i915: Push EMIT_INVALIDATE at request 
> start to backends
> URL   : https://patchwork.freedesktop.org/series/53729/
> State : success
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_5282 -> Patchwork_11044
> 
> 
> Summary
> ---
> 
>   **SUCCESS**
> 
>   No regressions found.

With all fingers crossed, pushed.
-Chris
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Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Compile fix for 64b dma-fence seqno

[Chris Wilson]

Quoting Mika Kuoppala (2018-12-07 12:43:43)
> Patchwork  writes:
> 
> > == Series Details ==
> >
> > Series: drm/i915: Compile fix for 64b dma-fence seqno
> > URL   : https://patchwork.freedesktop.org/series/53750/
> > State : failure
> >
> > == Summary ==
> >
> > CALLscripts/checksyscalls.sh
> >   DESCEND  objtool
> >   CHK include/generated/compile.h
> >   CC [M]  drivers/gpu/drm/i915/i915_gem_context.o
> > In file included from ./include/linux/list.h:9:0,
> >  from ./include/linux/agp_backend.h:33,
> >  from ./include/drm/drmP.h:35,
> >  from drivers/gpu/drm/i915/i915_gem_context.c:89:
> > drivers/gpu/drm/i915/i915_gem_context.c: In function 
> > ‘last_request_on_engine’:
> > drivers/gpu/drm/i915/i915_gem_context.c:652:13: error: format ‘%llu’ 
> > expects argument of type ‘long long unsigned int’, but argument 5 has type 
> > ‘unsigned int’ [-Werror=format=]
> >GEM_TRACE("last request for %s on engine %s: %llx:%llu\n",
> >  ^
> 
> Please BAT, fast forward to present?

Takes manual intervention to restore compilation it seems.

Applied to drm-misc-next, thanks for the fixup.
-Chris
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: Skip DSI path in DDI vswing programming.

[Patchwork]

== Series Details ==

Series: drm/i915/icl: Skip DSI path in DDI vswing programming.
URL   : https://patchwork.freedesktop.org/series/53703/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5279_full -> Patchwork_11040_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_11040_full:

### IGT changes ###

 Possible regressions 

  * igt@perf@oa-exponents:
- {shard-iclb}:   PASS -> FAIL

  
Known issues


  Here are the changes found in Patchwork_11040_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@kms_atomic_transition@1x-modeset-transitions:
- {shard-iclb}:   PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +9

  * igt@kms_cursor_crc@cursor-256x256-dpms:
- shard-apl:  PASS -> FAIL [fdo#103232] +1

  * igt@kms_cursor_crc@cursor-256x256-sliding:
- {shard-iclb}:   NOTRUN -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-apl:  PASS -> FAIL [fdo#103191] / [fdo#103232]

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-glk:  PASS -> FAIL [fdo#103167] +1

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
- {shard-iclb}:   PASS -> DMESG-FAIL [fdo#107724] +3

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
- {shard-iclb}:   PASS -> FAIL [fdo#103167] +3

  * igt@kms_plane@pixel-format-pipe-c-planes:
- {shard-iclb}:   NOTRUN -> FAIL [fdo#103166]

  * {igt@kms_plane@pixel-format-pipe-c-planes-source-clamping}:
- shard-apl:  PASS -> FAIL [fdo#108948]

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
- shard-glk:  PASS -> FAIL [fdo#108145] +1

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
- shard-apl:  PASS -> FAIL [fdo#103166]
- {shard-iclb}:   PASS -> FAIL [fdo#103166]
- shard-glk:  PASS -> FAIL [fdo#103166]

  * {igt@kms_rotation_crc@multiplane-rotation-cropping-top}:
- shard-kbl:  PASS -> DMESG-FAIL [fdo#108950]

  * igt@kms_universal_plane@universal-plane-pipe-b-sanity:
- {shard-iclb}:   PASS -> DMESG-WARN [fdo#107724] +18

  * igt@pm_rpm@fences-dpms:
- {shard-iclb}:   PASS -> DMESG-WARN [fdo#108654]

  
 Possible fixes 

  * igt@kms_atomic@test_only:
- {shard-iclb}:   DMESG-WARN [fdo#107724] -> PASS +22

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
- shard-glk:  DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_cursor_crc@cursor-128x128-random:
- shard-apl:  FAIL [fdo#103232] -> PASS

  * igt@kms_draw_crc@draw-method-xrgb-mmap-gtt-ytiled:
- {shard-iclb}:   WARN [fdo#108336] -> PASS +3

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move:
- {shard-iclb}:   DMESG-FAIL [fdo#107724] -> PASS +10

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-glk:  FAIL [fdo#103167] -> PASS

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt:
- {shard-iclb}:   FAIL [fdo#103167] -> PASS +1

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu:
- {shard-iclb}:   DMESG-WARN [fdo#107724] / [fdo#108336] -> PASS +10

  * {igt@kms_plane@pixel-format-pipe-b-planes-source-clamping}:
- shard-apl:  FAIL [fdo#108948] -> PASS

  * igt@kms_plane@pixel-format-pipe-c-planes:
- shard-glk:  FAIL [fdo#103166] -> PASS

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- {shard-iclb}:   INCOMPLETE [fdo#107713] -> PASS

  * igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
- shard-glk:  FAIL [fdo#108145] -> PASS

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
- {shard-iclb}:   FAIL [fdo#103166] -> PASS

  * igt@pm_rpm@legacy-planes-dpms:
- {shard-iclb}:   INCOMPLETE [fdo#108840] -> PASS

  * igt@pm_rpm@modeset-non-lpsp-stress-no-wait:
- {shard-iclb}:   INCOMPLETE [fdo#108840] -> SKIP

  
 Warnings 

  * igt@kms_ccs@pipe-a-crc-primary-rotation-180:
- {shard-iclb}:   FAIL [fdo#107725] -> DMESG-WARN [fdo#107724] / 
[fdo#108336]

  * igt@kms_cursor_crc@cursor-256x85-onscreen:
- {shard-iclb}:   DMESG-WARN [fdo#107724] / [fdo#108336] -> FAIL 
[fdo#103232]

  * igt@kms_cursor_crc@cursor-64x21-random:
- {shard-iclb}:   FAIL [fdo#103232] -> DMESG-WARN [fdo#107724] / 
[fdo#108336] +1

  * igt@kms_plane@pixel-format-pipe-a-planes:
- {shard-iclb}:   DMESG-WARN [fdo#107724] / [fdo#108336] -> FAIL 
[fdo#103166]

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=1031

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Skip the ERR_PTR error state (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Skip the ERR_PTR error state (rev2)
URL   : https://patchwork.freedesktop.org/series/53732/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5282 -> Patchwork_11047


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/53732/revisions/2/mbox/

Known issues


  Here are the changes found in Patchwork_11047 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_suspend@basic-s4-devices:
- fi-ivb-3520m:   PASS -> FAIL [fdo#108880]
- fi-blb-e6850:   PASS -> INCOMPLETE [fdo#107718]

  
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#108880]: https://bugs.freedesktop.org/show_bug.cgi?id=108880


Participating hosts (51 -> 44)
--

  Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-ctg-p8600 fi-icl-y 


Build changes
-

* Linux: CI_DRM_5282 -> Patchwork_11047

  CI_DRM_5282: d63c50f2b014037b43c1c0f108c61e0a31ede3c1 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4743: edb2db2cf2b6665d7ba3fa9117263302f6307a4f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_11047: e19dd9bad91dc49daa6ef5afe39b2a67222a57b2 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

e19dd9bad91d drm/i915: Skip the ERR_PTR error state

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11047/
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Re: [Intel-gfx] [PATCH v3] drm/i915: Skip the ERR_PTR error state

[Tvrtko Ursulin]

On 07/12/2018 11:05, Chris Wilson wrote:

Although commit fb6f0b64e455 ("drm/i915: Prevent machine hang from
Broxton's vtd w/a and error capture") applied cleanly after a 24 month
hiatus, the code had moved on with new methods for peeking and fetching
the captured gpu info. Make sure we catch all uses of the stashed error
state and avoid dereferencing the error pointer.

v2: Move error pointer determination into i915_gpu_capture_state
v3: Restore early check to avoid capturing and then throwing away
subsequent GPU error states.

Fixes: fb6f0b64e455 ("drm/i915: Prevent machine hang from Broxton's vtd w/a and 
error capture")
Signed-off-by: Chris Wilson 
Cc: Tvrtko Ursulin 
Cc: Joonas Lahtinen 
---
  drivers/gpu/drm/i915/i915_debugfs.c   | 12 +---
  drivers/gpu/drm/i915/i915_gpu_error.c | 23 ++-
  drivers/gpu/drm/i915/i915_sysfs.c |  4 +++-
  3 files changed, 26 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 38dcee1ca062..40a61ef9aac1 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -984,8 +984,8 @@ static int i915_gpu_info_open(struct inode *inode, struct 
file *file)
intel_runtime_pm_get(i915);
gpu = i915_capture_gpu_state(i915);
intel_runtime_pm_put(i915);
-   if (!gpu)
-   return -ENOMEM;
+   if (IS_ERR(gpu))
+   return PTR_ERR(gpu);
  
  	file->private_data = gpu;

return 0;
@@ -1018,7 +1018,13 @@ i915_error_state_write(struct file *filp,
  
  static int i915_error_state_open(struct inode *inode, struct file *file)

  {
-   file->private_data = i915_first_error_state(inode->i_private);
+   struct i915_gpu_state *error;
+
+   error = i915_first_error_state(inode->i_private);
+   if (IS_ERR(error))
+   return PTR_ERR(error);
+
+   file->private_data  = error;
return 0;
  }
  
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c

index 07465123c166..3f9ce403c755 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1907,9 +1907,16 @@ i915_capture_gpu_state(struct drm_i915_private *i915)
  {
struct i915_gpu_state *error;
  
+	/* Check if GPU capture has been disabled */

+   error = READ_ONCE(i915->gpu_error.first_error);
+   if (IS_ERR(error))
+   return error;
+
error = kzalloc(sizeof(*error), GFP_ATOMIC);
-   if (!error)
-   return NULL;
+   if (!error) {
+   i915_disable_error_state(i915, -ENOMEM);
+   return ERR_PTR(-ENOMEM);
+   }
  
  	kref_init(&error->ref);

error->i915 = i915;
@@ -1945,11 +1952,8 @@ void i915_capture_error_state(struct drm_i915_private 
*i915,
return;
  
  	error = i915_capture_gpu_state(i915);

-   if (!error) {
-   DRM_DEBUG_DRIVER("out of memory, not capturing error state\n");
-   i915_disable_error_state(i915, -ENOMEM);
+   if (IS_ERR(error))
return;
-   }
  
  	i915_error_capture_msg(i915, error, engine_mask, error_msg);

DRM_INFO("%s\n", error->error_msg);
@@ -1987,7 +1991,7 @@ i915_first_error_state(struct drm_i915_private *i915)
  
  	spin_lock_irq(&i915->gpu_error.lock);

error = i915->gpu_error.first_error;
-   if (error)
+   if (!IS_ERR_OR_NULL(error))
i915_gpu_state_get(error);
spin_unlock_irq(&i915->gpu_error.lock);
  
@@ -2000,10 +2004,11 @@ void i915_reset_error_state(struct drm_i915_private *i915)
  
  	spin_lock_irq(&i915->gpu_error.lock);

error = i915->gpu_error.first_error;
-   i915->gpu_error.first_error = NULL;
+   if (error != ERR_PTR(-ENODEV)) /* if disabled, always disabled */
+   i915->gpu_error.first_error = NULL;
spin_unlock_irq(&i915->gpu_error.lock);
  
-	if (!IS_ERR(error))

+   if (!IS_ERR_OR_NULL(error))
i915_gpu_state_put(error);
  }
  
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c

index 535caebd9813..c0cfe7ae2ba5 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -521,7 +521,9 @@ static ssize_t error_state_read(struct file *filp, struct 
kobject *kobj,
ssize_t ret;
  
  	gpu = i915_first_error_state(i915);

-   if (gpu) {
+   if (IS_ERR(gpu)) {
+   ret = PTR_ERR(gpu);
+   } else if (gpu) {
ret = i915_gpu_state_copy_to_buffer(gpu, buf, off, count);
i915_gpu_state_put(gpu);
} else {



Reviewed-by: Tvrtko Ursulin 

Regards,

Tvrtko
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Re: [Intel-gfx] [PATCH] drm/i915: Compile fix for 64b dma-fence seqno

[Chris Wilson]

Quoting Mika Kuoppala (2018-12-07 12:34:28)
> Many errs of the form:
> drivers/gpu/drm/i915/selftests/intel_hangcheck.c: In function 
> ‘__igt_reset_evict_vma’:
> ./include/linux/kern_levels.h:5:18: error: format ‘%x’ expects argument of 
> type ‘unsigned int’, but argum
> 
> Fixes: b312d8ca3a7c ("dma-buf: make fence sequence numbers 64 bit v2")
> Cc: Christian König 
> Cc: Chunming Zhou 
> Cc: Chris Wilson 
> Cc: Joonas Lahtinen 
> Signed-off-by: Mika Kuoppala 

Looks good. Patchwork tried to apply this to its last known good tree
and so failed.

Reviewed-by: Chris Wilson 

Please try applying to drm-misc-next.
-Chris
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Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Compile fix for 64b dma-fence seqno

[Mika Kuoppala]

Patchwork  writes:

> == Series Details ==
>
> Series: drm/i915: Compile fix for 64b dma-fence seqno
> URL   : https://patchwork.freedesktop.org/series/53750/
> State : failure
>
> == Summary ==
>
> CALLscripts/checksyscalls.sh
>   DESCEND  objtool
>   CHK include/generated/compile.h
>   CC [M]  drivers/gpu/drm/i915/i915_gem_context.o
> In file included from ./include/linux/list.h:9:0,
>  from ./include/linux/agp_backend.h:33,
>  from ./include/drm/drmP.h:35,
>  from drivers/gpu/drm/i915/i915_gem_context.c:89:
> drivers/gpu/drm/i915/i915_gem_context.c: In function ‘last_request_on_engine’:
> drivers/gpu/drm/i915/i915_gem_context.c:652:13: error: format ‘%llu’ expects 
> argument of type ‘long long unsigned int’, but argument 5 has type ‘unsigned 
> int’ [-Werror=format=]
>GEM_TRACE("last request for %s on engine %s: %llx:%llu\n",
>  ^

Please BAT, fast forward to present?
-Mika
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Re: [Intel-gfx] [PATCH] drm/i915: Compile fix for 64b dma-fence seqno

[Koenig, Christian]

Am 07.12.18 um 13:34 schrieb Mika Kuoppala:
> Many errs of the form:
> drivers/gpu/drm/i915/selftests/intel_hangcheck.c: In function 
> ‘__igt_reset_evict_vma’:
> ./include/linux/kern_levels.h:5:18: error: format ‘%x’ expects argument of 
> type ‘unsigned int’, but argum
>
> Fixes: b312d8ca3a7c ("dma-buf: make fence sequence numbers 64 bit v2")
> Cc: Christian König 
> Cc: Chunming Zhou 
> Cc: Chris Wilson 
> Cc: Joonas Lahtinen 
> Signed-off-by: Mika Kuoppala 

Ah, crap! No I see my mistake.

I searched for dereferences of a fence object, but in this case the 
fence object is embedded in a parent object.

Patch is Acked-by: Christian König , but there 
are probably a couple of more cases like this I missed.

Christian.

> ---
>   drivers/gpu/drm/i915/i915_gem.c  |  4 ++--
>   drivers/gpu/drm/i915/i915_gem_context.c  |  8 
>   drivers/gpu/drm/i915/i915_request.c  | 12 ++--
>   drivers/gpu/drm/i915/intel_lrc.c |  6 +++---
>   drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 14 +++---
>   5 files changed, 22 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index d36a9755ad91..649847b87e41 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3187,7 +3187,7 @@ i915_gem_reset_request(struct intel_engine_cs *engine,
>*/
>   
>   if (i915_request_completed(request)) {
> - GEM_TRACE("%s pardoned global=%d (fence %llx:%d), current %d\n",
> + GEM_TRACE("%s pardoned global=%d (fence %llx:%lld), current 
> %d\n",
> engine->name, request->global_seqno,
> request->fence.context, request->fence.seqno,
> intel_engine_get_seqno(engine));
> @@ -3311,7 +3311,7 @@ static void nop_submit_request(struct i915_request 
> *request)
>   {
>   unsigned long flags;
>   
> - GEM_TRACE("%s fence %llx:%d -> -EIO\n",
> + GEM_TRACE("%s fence %llx:%lld -> -EIO\n",
> request->engine->name,
> request->fence.context, request->fence.seqno);
>   dma_fence_set_error(&request->fence, -EIO);
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c 
> b/drivers/gpu/drm/i915/i915_gem_context.c
> index 371c07087095..4ec386950f75 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -649,7 +649,7 @@ last_request_on_engine(struct i915_timeline *timeline,
>   rq = i915_gem_active_raw(&timeline->last_request,
>&engine->i915->drm.struct_mutex);
>   if (rq && rq->engine == engine) {
> - GEM_TRACE("last request for %s on engine %s: %llx:%d\n",
> + GEM_TRACE("last request for %s on engine %s: %llx:%llu\n",
> timeline->name, engine->name,
> rq->fence.context, rq->fence.seqno);
>   GEM_BUG_ON(rq->timeline != timeline);
> @@ -686,14 +686,14 @@ static bool engine_has_kernel_context_barrier(struct 
> intel_engine_cs *engine)
>* switch-to-kernel-context?
>*/
>   if (!i915_timeline_sync_is_later(barrier, &rq->fence)) {
> - GEM_TRACE("%s needs barrier for %llx:%d\n",
> + GEM_TRACE("%s needs barrier for %llx:%lld\n",
> ring->timeline->name,
> rq->fence.context,
> rq->fence.seqno);
>   return false;
>   }
>   
> - GEM_TRACE("%s has barrier after %llx:%d\n",
> + GEM_TRACE("%s has barrier after %llx:%lld\n",
> ring->timeline->name,
> rq->fence.context,
> rq->fence.seqno);
> @@ -749,7 +749,7 @@ int i915_gem_switch_to_kernel_context(struct 
> drm_i915_private *i915)
>   if (prev->gem_context == i915->kernel_context)
>   continue;
>   
> - GEM_TRACE("add barrier on %s for %llx:%d\n",
> + GEM_TRACE("add barrier on %s for %llx:%lld\n",
> engine->name,
> prev->fence.context,
> prev->fence.seqno);
> diff --git a/drivers/gpu/drm/i915/i915_request.c 
> b/drivers/gpu/drm/i915/i915_request.c
> index ca95ab2f4cfa..cefefc11d922 100644
> --- a/drivers/gpu/drm/i915/i915_request.c
> +++ b/drivers/gpu/drm/i915/i915_request.c
> @@ -270,7 +270,7 @@ static void free_capture_list(struct i915_request 
> *request)
>   static void __retire_engine_request(struct intel_engine_cs *engine,
>   struct i915_request *rq)
>   {
> - GEM_TRACE("%s(%s) fence %llx:%d, global=%d, current %d\n",
> + GEM_TRACE("%s(%s) fence %llx:%lld, global=%d, current %d\n",
> _

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Compile fix for 64b dma-fence seqno

[Patchwork]

== Series Details ==

Series: drm/i915: Compile fix for 64b dma-fence seqno
URL   : https://patchwork.freedesktop.org/series/53750/
State : failure

== Summary ==

CALLscripts/checksyscalls.sh
  DESCEND  objtool
  CHK include/generated/compile.h
  CC [M]  drivers/gpu/drm/i915/i915_gem_context.o
In file included from ./include/linux/list.h:9:0,
 from ./include/linux/agp_backend.h:33,
 from ./include/drm/drmP.h:35,
 from drivers/gpu/drm/i915/i915_gem_context.c:89:
drivers/gpu/drm/i915/i915_gem_context.c: In function ‘last_request_on_engine’:
drivers/gpu/drm/i915/i915_gem_context.c:652:13: error: format ‘%llu’ expects 
argument of type ‘long long unsigned int’, but argument 5 has type ‘unsigned 
int’ [-Werror=format=]
   GEM_TRACE("last request for %s on engine %s: %llx:%llu\n",
 ^
drivers/gpu/drm/i915/i915_gem_context.c:654:25:
  rq->fence.context, rq->fence.seqno);
 ~~~
./include/linux/kernel.h:682:33: note: in definition of macro 
‘__trace_printk_check_format’
   trace_printk_check_format(fmt, ##args);  \
 ^~~
./include/linux/kernel.h:719:3: note: in expansion of macro ‘do_trace_printk’
   do_trace_printk(fmt, ##__VA_ARGS__); \
   ^~~
drivers/gpu/drm/i915/i915_gem.h:66:24: note: in expansion of macro 
‘trace_printk’
 #define GEM_TRACE(...) trace_printk(__VA_ARGS__)
^~~~
drivers/gpu/drm/i915/i915_gem_context.c:652:3: note: in expansion of macro 
‘GEM_TRACE’
   GEM_TRACE("last request for %s on engine %s: %llx:%llu\n",
   ^
drivers/gpu/drm/i915/i915_gem_context.c:652:13: error: format ‘%llu’ expects 
argument of type ‘long long unsigned int’, but argument 6 has type ‘unsigned 
int’ [-Werror=format=]
   GEM_TRACE("last request for %s on engine %s: %llx:%llu\n",
 ^
drivers/gpu/drm/i915/i915_gem_context.c:654:25:
  rq->fence.context, rq->fence.seqno);
 ~~~
./include/linux/kernel.h:735:29: note: in definition of macro ‘do_trace_printk’
   __trace_printk(_THIS_IP_, fmt, ##args);   \
 ^~~
drivers/gpu/drm/i915/i915_gem.h:66:24: note: in expansion of macro 
‘trace_printk’
 #define GEM_TRACE(...) trace_printk(__VA_ARGS__)
^~~~
drivers/gpu/drm/i915/i915_gem_context.c:652:3: note: in expansion of macro 
‘GEM_TRACE’
   GEM_TRACE("last request for %s on engine %s: %llx:%llu\n",
   ^
drivers/gpu/drm/i915/i915_gem_context.c: In function 
‘engine_has_kernel_context_barrier’:
drivers/gpu/drm/i915/i915_gem_context.c:689:14: error: format ‘%lld’ expects 
argument of type ‘long long int’, but argument 4 has type ‘unsigned int’ 
[-Werror=format=]
GEM_TRACE("%s needs barrier for %llx:%lld\n",
  ^
drivers/gpu/drm/i915/i915_gem_context.c:692:7:
   rq->fence.seqno);
   ~~~
./include/linux/kernel.h:682:33: note: in definition of macro 
‘__trace_printk_check_format’
   trace_printk_check_format(fmt, ##args);  \
 ^~~
./include/linux/kernel.h:719:3: note: in expansion of macro ‘do_trace_printk’
   do_trace_printk(fmt, ##__VA_ARGS__); \
   ^~~
drivers/gpu/drm/i915/i915_gem.h:66:24: note: in expansion of macro 
‘trace_printk’
 #define GEM_TRACE(...) trace_printk(__VA_ARGS__)
^~~~
drivers/gpu/drm/i915/i915_gem_context.c:689:4: note: in expansion of macro 
‘GEM_TRACE’
GEM_TRACE("%s needs barrier for %llx:%lld\n",
^
drivers/gpu/drm/i915/i915_gem_context.c:689:14: error: format ‘%lld’ expects 
argument of type ‘long long int’, but argument 5 has type ‘unsigned int’ 
[-Werror=format=]
GEM_TRACE("%s needs barrier for %llx:%lld\n",
  ^
drivers/gpu/drm/i915/i915_gem_context.c:692:7:
   rq->fence.seqno);
   ~~~
./include/linux/kernel.h:735:29: note: in definition of macro ‘do_trace_printk’
   __trace_printk(_THIS_IP_, fmt, ##args);   \
 ^~~
drivers/gpu/drm/i915/i915_gem.h:66:24: note: in expansion of macro 
‘trace_printk’
 #define GEM_TRACE(...) trace_printk(__VA_ARGS__)
^~~~
drivers/gpu/drm/i915/i915_gem_context.c:689:4: note: in expansion of macro 
‘GEM_TRACE’
GEM_TRACE("%s needs barrier for %llx:%lld\n",
^
drivers/gpu/drm/i915/i915_gem_context.c:696:13: error: format ‘%lld’ expects 
argument of type ‘long long int’, but argument 4 has type ‘unsigned int’ 
[-Werror=format=]
   GEM_TRACE("%s has barrier after %llx:%lld\n",
 ^
drivers/gpu/drm/i915/i915_gem_context.c:699:6:
  rq->fence.seqno);
  ~~~
./include/linux/kernel.h:682:33: note: in definition of macro 
‘__trace_printk_check_format’
   trace_printk_check_format(fmt, ##args);  \
 ^~~
./include/linux/kernel.h:719:3: note: in expansion of macro ‘do_trace_printk’
   do_trace_printk(fmt, ##__VA_ARGS

Re: [Intel-gfx] [PATCH] drm/i915/icl: Forcibly evict stale csb entries

[Mika Kuoppala]

Chris Wilson  writes:

> Quoting Mika Kuoppala (2018-12-05 13:46:12)
>>  static void nop_submission_tasklet(unsigned long data)
>> @@ -1015,6 +1025,19 @@ static void process_csb(struct intel_engine_cs 
>> *engine)
>> } while (head != tail);
>>  
>> execlists->csb_head = head;
>> +
>> +   /*
>> +* Gen11 has proven to fail wrt global observation point between
>> +* entry and tail update, failing on the ordering and thus
>> +* we see an old entry in the context status buffer.
>> +*
>> +* Forcibly evict out entries for the next gpu csb update,
>> +* to increase the odds that we get a fresh entries with non
>> +* working hardware. The cost for doing so comes out mostly with
>> +* the wash as hardware, working or not, will need to do the
>> +* invalidation before.
>> +*/
>> +   invalidate_csb_entries(&buf[0], &buf[GEN8_CSB_ENTRIES - 1]);
>
> If it works, this is a stroke of genius.
>
> If we hypothesize that the GPU did write the CSB entries before the head
> pointer and inserted a Global Observation point beforehand, then we
> theorize that they merely forgot the cc protocol, the writes to system memory 
> is
> correctly, but unordered into the cpu cache.
>
> By using the clflush to evict our used cacheline, on the next pass we
> will pull in that CSB entry cacheline back in from memory (ordered by
> the rmb used for the ringbuffer) and so, if the HW engineer's
> insistence that they did remember their wmb, the CSB entries will be
> coherent with the head pointer.
>
> So we remove one piece of the puzzle at what should be negligible cost,
> Reviewed-by: Chris Wilson 

Thank you for review and kind words, pushed.
-Mika
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Re: [Intel-gfx] linux-next: build failure after merge of the drm-misc tree

[Koenig, Christian]

Hi Stephen,

yeah, that is a known problem. I missed the change during rebase of the 
revert.

Please see patch "2312f9842854 drm/v3d: fix broken build" which is 
already in drm-misc-next and fixes the issue.

Christian.

Am 06.12.18 um 03:32 schrieb Stephen Rothwell:
> Hi all,
>
> After merging the drm-misc tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
>
> drivers/gpu/drm/v3d/v3d_gem.c: In function 'v3d_submit_tfu_ioctl':
> drivers/gpu/drm/v3d/v3d_gem.c:719:3: error: too many arguments to function 
> 'drm_syncobj_replace_fence'
> drm_syncobj_replace_fence(sync_out, 0, sched_done_fence);
> ^
> In file included from drivers/gpu/drm/v3d/v3d_gem.c:5:
> include/drm/drm_syncobj.h:134:6: note: declared here
>   void drm_syncobj_replace_fence(struct drm_syncobj *syncobj,
>^
>
> Caused by commit
>
>0b258ed1a219 ("drm: revert "expand replace_fence to support timeline point 
> v2"")
>
> interacting with commit
>
>1584f16ca96e ("drm/v3d: Add support for submitting jobs to the TFU")
>
> I have used the drm-misc tree from next-20181205 for today.
>

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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/selftests: Compile fix for 64b dma-fence seqno

[Patchwork]

== Series Details ==

Series: drm/i915/selftests: Compile fix for 64b dma-fence seqno
URL   : https://patchwork.freedesktop.org/series/53749/
State : failure

== Summary ==

CALLscripts/checksyscalls.sh
  DESCEND  objtool
  CHK include/generated/compile.h
  CC [M]  drivers/gpu/drm/i915/intel_hangcheck.o
In file included from ./include/linux/printk.h:7:0,
 from ./include/linux/kernel.h:14,
 from ./include/asm-generic/bug.h:18,
 from ./arch/x86/include/asm/bug.h:47,
 from ./include/linux/bug.h:5,
 from ./include/linux/mmdebug.h:5,
 from ./include/linux/gfp.h:5,
 from ./include/linux/slab.h:15,
 from ./include/linux/io-mapping.h:22,
 from drivers/gpu/drm/i915/i915_drv.h:36,
 from drivers/gpu/drm/i915/intel_hangcheck.c:25:
drivers/gpu/drm/i915/selftests/intel_hangcheck.c: In function 
‘__igt_reset_engine’:
./include/linux/kern_levels.h:5:18: error: format ‘%llx’ expects argument of 
type ‘long long unsigned int’, but argument 3 has type ‘unsigned int’ 
[-Werror=format=]
 #define KERN_SOH "\001"  /* ASCII Start Of Header */
  ^
./include/linux/kern_levels.h:11:18: note: in expansion of macro ‘KERN_SOH’
 #define KERN_ERR KERN_SOH "3" /* error conditions */
  ^~~~
./include/linux/printk.h:308:9: note: in expansion of macro ‘KERN_ERR’
  printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
 ^~~~
drivers/gpu/drm/i915/selftests/intel_hangcheck.c:453:6: note: in expansion of 
macro ‘pr_err’
  pr_err("%s: Failed to start request %llx, at %x\n",
  ^~
In file included from drivers/gpu/drm/i915/intel_hangcheck.c:480:0:
drivers/gpu/drm/i915/selftests/intel_hangcheck.c:453:45: note: format string is 
defined here
  pr_err("%s: Failed to start request %llx, at %x\n",
  ~~~^
  %x
In file included from ./include/linux/printk.h:7:0,
 from ./include/linux/kernel.h:14,
 from ./include/asm-generic/bug.h:18,
 from ./arch/x86/include/asm/bug.h:47,
 from ./include/linux/bug.h:5,
 from ./include/linux/mmdebug.h:5,
 from ./include/linux/gfp.h:5,
 from ./include/linux/slab.h:15,
 from ./include/linux/io-mapping.h:22,
 from drivers/gpu/drm/i915/i915_drv.h:36,
 from drivers/gpu/drm/i915/intel_hangcheck.c:25:
drivers/gpu/drm/i915/selftests/intel_hangcheck.c: In function 
‘__igt_reset_engines’:
./include/linux/kern_levels.h:5:18: error: format ‘%llx’ expects argument of 
type ‘long long unsigned int’, but argument 3 has type ‘unsigned int’ 
[-Werror=format=]
 #define KERN_SOH "\001"  /* ASCII Start Of Header */
  ^
./include/linux/kern_levels.h:11:18: note: in expansion of macro ‘KERN_SOH’
 #define KERN_ERR KERN_SOH "3" /* error conditions */
  ^~~~
./include/linux/printk.h:308:9: note: in expansion of macro ‘KERN_ERR’
  printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
 ^~~~
drivers/gpu/drm/i915/selftests/intel_hangcheck.c:731:6: note: in expansion of 
macro ‘pr_err’
  pr_err("%s: Failed to start request %llx, at %x\n",
  ^~
In file included from drivers/gpu/drm/i915/intel_hangcheck.c:480:0:
drivers/gpu/drm/i915/selftests/intel_hangcheck.c:731:45: note: format string is 
defined here
  pr_err("%s: Failed to start request %llx, at %x\n",
  ~~~^
  %x
In file included from ./include/linux/printk.h:7:0,
 from ./include/linux/kernel.h:14,
 from ./include/asm-generic/bug.h:18,
 from ./arch/x86/include/asm/bug.h:47,
 from ./include/linux/bug.h:5,
 from ./include/linux/mmdebug.h:5,
 from ./include/linux/gfp.h:5,
 from ./include/linux/slab.h:15,
 from ./include/linux/io-mapping.h:22,
 from drivers/gpu/drm/i915/i915_drv.h:36,
 from drivers/gpu/drm/i915/intel_hangcheck.c:25:
drivers/gpu/drm/i915/selftests/intel_hangcheck.c: In function ‘igt_reset_wait’:
./include/linux/kern_levels.h:5:18: error: format ‘%llx’ expects argument of 
type ‘long long unsigned int’, but argument 3 has type ‘unsigned int’ 
[-Werror=format=]
 #define KERN_SOH "\001"  /* ASCII Start Of Header */
  ^
./include/linux/kern_levels.h:11:18: note: in expansion of macro ‘KERN_SOH’
 #define KERN_ERR KERN_SOH "3" /* error conditions */
  ^~~~
./include/linux/printk.h:308:9: note: in expansion of macro ‘KERN_ERR’
  printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
 ^~~~
drivers/gpu/drm/i915/selftests/intel_hangcheck.c:930:3: note: in expansion of 
macro ‘pr_err’
   pr_err("%s: Failed to start reque

[Intel-gfx] [PATCH] drm/i915: Compile fix for 64b dma-fence seqno

[Mika Kuoppala]

Many errs of the form:
drivers/gpu/drm/i915/selftests/intel_hangcheck.c: In function 
‘__igt_reset_evict_vma’:
./include/linux/kern_levels.h:5:18: error: format ‘%x’ expects argument of type 
‘unsigned int’, but argum

Fixes: b312d8ca3a7c ("dma-buf: make fence sequence numbers 64 bit v2")
Cc: Christian König 
Cc: Chunming Zhou 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Signed-off-by: Mika Kuoppala 
---
 drivers/gpu/drm/i915/i915_gem.c  |  4 ++--
 drivers/gpu/drm/i915/i915_gem_context.c  |  8 
 drivers/gpu/drm/i915/i915_request.c  | 12 ++--
 drivers/gpu/drm/i915/intel_lrc.c |  6 +++---
 drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 14 +++---
 5 files changed, 22 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index d36a9755ad91..649847b87e41 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3187,7 +3187,7 @@ i915_gem_reset_request(struct intel_engine_cs *engine,
 */
 
if (i915_request_completed(request)) {
-   GEM_TRACE("%s pardoned global=%d (fence %llx:%d), current %d\n",
+   GEM_TRACE("%s pardoned global=%d (fence %llx:%lld), current 
%d\n",
  engine->name, request->global_seqno,
  request->fence.context, request->fence.seqno,
  intel_engine_get_seqno(engine));
@@ -3311,7 +3311,7 @@ static void nop_submit_request(struct i915_request 
*request)
 {
unsigned long flags;
 
-   GEM_TRACE("%s fence %llx:%d -> -EIO\n",
+   GEM_TRACE("%s fence %llx:%lld -> -EIO\n",
  request->engine->name,
  request->fence.context, request->fence.seqno);
dma_fence_set_error(&request->fence, -EIO);
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c 
b/drivers/gpu/drm/i915/i915_gem_context.c
index 371c07087095..4ec386950f75 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -649,7 +649,7 @@ last_request_on_engine(struct i915_timeline *timeline,
rq = i915_gem_active_raw(&timeline->last_request,
 &engine->i915->drm.struct_mutex);
if (rq && rq->engine == engine) {
-   GEM_TRACE("last request for %s on engine %s: %llx:%d\n",
+   GEM_TRACE("last request for %s on engine %s: %llx:%llu\n",
  timeline->name, engine->name,
  rq->fence.context, rq->fence.seqno);
GEM_BUG_ON(rq->timeline != timeline);
@@ -686,14 +686,14 @@ static bool engine_has_kernel_context_barrier(struct 
intel_engine_cs *engine)
 * switch-to-kernel-context?
 */
if (!i915_timeline_sync_is_later(barrier, &rq->fence)) {
-   GEM_TRACE("%s needs barrier for %llx:%d\n",
+   GEM_TRACE("%s needs barrier for %llx:%lld\n",
  ring->timeline->name,
  rq->fence.context,
  rq->fence.seqno);
return false;
}
 
-   GEM_TRACE("%s has barrier after %llx:%d\n",
+   GEM_TRACE("%s has barrier after %llx:%lld\n",
  ring->timeline->name,
  rq->fence.context,
  rq->fence.seqno);
@@ -749,7 +749,7 @@ int i915_gem_switch_to_kernel_context(struct 
drm_i915_private *i915)
if (prev->gem_context == i915->kernel_context)
continue;
 
-   GEM_TRACE("add barrier on %s for %llx:%d\n",
+   GEM_TRACE("add barrier on %s for %llx:%lld\n",
  engine->name,
  prev->fence.context,
  prev->fence.seqno);
diff --git a/drivers/gpu/drm/i915/i915_request.c 
b/drivers/gpu/drm/i915/i915_request.c
index ca95ab2f4cfa..cefefc11d922 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -270,7 +270,7 @@ static void free_capture_list(struct i915_request *request)
 static void __retire_engine_request(struct intel_engine_cs *engine,
struct i915_request *rq)
 {
-   GEM_TRACE("%s(%s) fence %llx:%d, global=%d, current %d\n",
+   GEM_TRACE("%s(%s) fence %llx:%lld, global=%d, current %d\n",
  __func__, engine->name,
  rq->fence.context, rq->fence.seqno,
  rq->global_seqno,
@@ -332,7 +332,7 @@ static void i915_request_retire(struct i915_request 
*request)
 {
struct i915_gem_active *active, *next;
 
-   GEM_TRACE("%s fence %llx:%d, global=%d, current %d\n",
+   GEM_TRACE("%s fence %llx:%lld, global=%d, current %d\n",
  request->engine->name,

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Compile fix for 64b dma-fence seqno

[Chris Wilson]

Quoting Chris Wilson (2018-12-07 12:22:40)
> Many errs of the form:
> drivers/gpu/drm/i915/selftests/intel_hangcheck.c: In function 
> ‘__igt_reset_evict_vma’:
> ./include/linux/kern_levels.h:5:18: error: format ‘%x’ expects argument of 
> type ‘unsigned int’, but argum

Wait, there's more!
-Chris
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Re: [Intel-gfx] [PATCH] drm/i915/selftests: Compile fix for 64b dma-fence seqno

[Koenig, Christian]

Am 07.12.18 um 13:22 schrieb Chris Wilson:
> Many errs of the form:
> drivers/gpu/drm/i915/selftests/intel_hangcheck.c: In function 
> ‘__igt_reset_evict_vma’:
> ./include/linux/kern_levels.h:5:18: error: format ‘%x’ expects argument of 
> type ‘unsigned int’, but argum
>
> Fixes: b312d8ca3a7c ("dma-buf: make fence sequence numbers 64 bit v2")
> Signed-off-by: Chris Wilson 
> Cc: Christian König 
> Cc: Chunming Zhou 
> Cc: Mika Kuoppala 
> Cc: Joonas Lahtinen 

Reviewed-by: Christian König 

> ---
>   drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 12 ++--
>   1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c 
> b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> index 60a4bd9405be..34e200d32b7d 100644
> --- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> +++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> @@ -450,7 +450,7 @@ static int __igt_reset_engine(struct drm_i915_private 
> *i915, bool active)
>   if (!wait_until_running(&h, rq)) {
>   struct drm_printer p = 
> drm_info_printer(i915->drm.dev);
>   
> - pr_err("%s: Failed to start request %x, 
> at %x\n",
> + pr_err("%s: Failed to start request 
> %llx, at %x\n",
>  __func__, rq->fence.seqno, 
> hws_seqno(&h, rq));
>   intel_engine_dump(engine, &p,
> "%s\n", engine->name);
> @@ -728,7 +728,7 @@ static int __igt_reset_engines(struct drm_i915_private 
> *i915,
>   if (!wait_until_running(&h, rq)) {
>   struct drm_printer p = 
> drm_info_printer(i915->drm.dev);
>   
> - pr_err("%s: Failed to start request %x, 
> at %x\n",
> + pr_err("%s: Failed to start request 
> %llx, at %x\n",
>  __func__, rq->fence.seqno, 
> hws_seqno(&h, rq));
>   intel_engine_dump(engine, &p,
> "%s\n", engine->name);
> @@ -927,7 +927,7 @@ static int igt_reset_wait(void *arg)
>   if (!wait_until_running(&h, rq)) {
>   struct drm_printer p = drm_info_printer(i915->drm.dev);
>   
> - pr_err("%s: Failed to start request %x, at %x\n",
> + pr_err("%s: Failed to start request %llx, at %x\n",
>  __func__, rq->fence.seqno, hws_seqno(&h, rq));
>   intel_engine_dump(rq->engine, &p, "%s\n", rq->engine->name);
>   
> @@ -1106,7 +1106,7 @@ static int __igt_reset_evict_vma(struct 
> drm_i915_private *i915,
>   if (!wait_until_running(&h, rq)) {
>   struct drm_printer p = drm_info_printer(i915->drm.dev);
>   
> - pr_err("%s: Failed to start request %x, at %x\n",
> + pr_err("%s: Failed to start request %llx, at %x\n",
>  __func__, rq->fence.seqno, hws_seqno(&h, rq));
>   intel_engine_dump(rq->engine, &p, "%s\n", rq->engine->name);
>   
> @@ -1301,7 +1301,7 @@ static int igt_reset_queue(void *arg)
>   if (!wait_until_running(&h, prev)) {
>   struct drm_printer p = 
> drm_info_printer(i915->drm.dev);
>   
> - pr_err("%s(%s): Failed to start request %x, at 
> %x\n",
> + pr_err("%s(%s): Failed to start request %llx, 
> at %x\n",
>  __func__, engine->name,
>  prev->fence.seqno, hws_seqno(&h, prev));
>   intel_engine_dump(engine, &p,
> @@ -1412,7 +1412,7 @@ static int igt_handle_error(void *arg)
>   if (!wait_until_running(&h, rq)) {
>   struct drm_printer p = drm_info_printer(i915->drm.dev);
>   
> - pr_err("%s: Failed to start request %x, at %x\n",
> + pr_err("%s: Failed to start request %llx, at %x\n",
>  __func__, rq->fence.seqno, hws_seqno(&h, rq));
>   intel_engine_dump(rq->engine, &p, "%s\n", rq->engine->name);
>   

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[Intel-gfx] ✗ Fi.CI.BAT: failure for drivers/base: use a worker for sysfs unbind

[Patchwork]

== Series Details ==

Series: drivers/base: use a worker for sysfs unbind
URL   : https://patchwork.freedesktop.org/series/53734/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_5282 -> Patchwork_11046


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_11046 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_11046, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/53734/revisions/1/mbox/

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_11046:

### IGT changes ###

 Possible regressions 

  * igt@i915_module_load@reload-no-display:
- fi-skl-6700hq:  PASS -> INCOMPLETE
- fi-skl-6700k2:  PASS -> INCOMPLETE
- fi-skl-iommu:   PASS -> INCOMPLETE
- fi-kbl-7560u:   PASS -> INCOMPLETE
- fi-pnv-d510:PASS -> INCOMPLETE
- fi-whl-u:   PASS -> INCOMPLETE
- fi-bwr-2160:PASS -> INCOMPLETE
- fi-kbl-r:   PASS -> INCOMPLETE
- {fi-kbl-7567u}: PASS -> INCOMPLETE
- fi-skl-6260u:   PASS -> INCOMPLETE
- fi-snb-2600:PASS -> INCOMPLETE
- fi-hsw-peppy:   PASS -> INCOMPLETE
- fi-ilk-650: PASS -> INCOMPLETE
- fi-skl-6770hq:  PASS -> INCOMPLETE
- fi-cfl-guc: PASS -> INCOMPLETE
- fi-ivb-3770:PASS -> INCOMPLETE
- fi-snb-2520m:   PASS -> INCOMPLETE
- fi-cfl-8700k:   PASS -> INCOMPLETE
- {fi-kbl-7500u}: PASS -> INCOMPLETE
- fi-ivb-3520m:   PASS -> INCOMPLETE
- fi-hsw-4770:PASS -> INCOMPLETE
- fi-kbl-guc: PASS -> INCOMPLETE
- fi-skl-guc: PASS -> INCOMPLETE
- fi-bdw-5557u:   PASS -> INCOMPLETE
- fi-cfl-8109u:   PASS -> INCOMPLETE
- fi-hsw-4770r:   PASS -> INCOMPLETE

  * {igt@runner@aborted}:
- fi-ilk-650: NOTRUN -> FAIL
- fi-pnv-d510:NOTRUN -> FAIL
- fi-hsw-peppy:   NOTRUN -> FAIL
- fi-glk-dsi: NOTRUN -> FAIL
- fi-hsw-4770:NOTRUN -> FAIL
- fi-bxt-j4205:   NOTRUN -> FAIL
- fi-skl-6700hq:  NOTRUN -> FAIL
- fi-whl-u:   NOTRUN -> FAIL
- fi-ivb-3770:NOTRUN -> FAIL
- fi-kbl-7560u:   NOTRUN -> FAIL
- fi-bxt-dsi: NOTRUN -> FAIL
- fi-byt-j1900:   NOTRUN -> FAIL
- fi-skl-iommu:   NOTRUN -> FAIL
- fi-cfl-guc: NOTRUN -> FAIL
- fi-glk-j4005:   NOTRUN -> FAIL
- fi-skl-guc: NOTRUN -> FAIL
- fi-bsw-n3050:   NOTRUN -> FAIL
- fi-cfl-8700k:   NOTRUN -> FAIL
- fi-hsw-4770r:   NOTRUN -> FAIL
- fi-skl-6600u:   NOTRUN -> FAIL
- fi-kbl-8809g:   NOTRUN -> FAIL
- fi-apl-guc: NOTRUN -> FAIL
- fi-kbl-r:   NOTRUN -> FAIL
- fi-bdw-5557u:   NOTRUN -> FAIL
- fi-bwr-2160:NOTRUN -> FAIL
- fi-byt-n2820:   NOTRUN -> FAIL
- fi-skl-6770hq:  NOTRUN -> FAIL
- fi-ivb-3520m:   NOTRUN -> FAIL
- fi-snb-2600:NOTRUN -> FAIL
- fi-skl-6260u:   NOTRUN -> FAIL

  
Known issues


  Here are the changes found in Patchwork_11046 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850:   PASS -> INCOMPLETE [fdo#107718]

  * igt@i915_module_load@reload-no-display:
- fi-apl-guc: PASS -> INCOMPLETE [fdo#103927]
- fi-byt-j1900:   PASS -> INCOMPLETE [fdo#102657]
- fi-skl-6600u:   PASS -> INCOMPLETE [fdo#104108]
- fi-kbl-8809g:   PASS -> INCOMPLETE [fdo#103665]
- fi-glk-j4005:   PASS -> INCOMPLETE [fdo#103359] / [k.org#198133]
- fi-bsw-n3050:   PASS -> INCOMPLETE [fdo#105876]
- fi-byt-n2820:   PASS -> INCOMPLETE [fdo#102657]
- fi-bxt-j4205:   PASS -> INCOMPLETE [fdo#103927]
- fi-bxt-dsi: PASS -> INCOMPLETE [fdo#103927]
- fi-glk-dsi: PASS -> INCOMPLETE [fdo#103359] / [k.org#198133]

  * igt@kms_busy@basic-flip-b:
- fi-gdg-551: PASS -> FAIL [fdo#103182]

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102657]: https://bugs.freedesktop.org/show_bug.cgi?id=102657
  [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#105876]: https://bugs.freedesktop.org/show_bug.cgi?id=105876
  [fdo#10771

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drivers/base: use a worker for sysfs unbind

[Chris Wilson]

Quoting Patchwork (2018-12-07 12:15:14)
> == Series Details ==
> 
> Series: drivers/base: use a worker for sysfs unbind
> URL   : https://patchwork.freedesktop.org/series/53734/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_5282 -> Patchwork_11046
> 
> 
> Summary
> ---
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_11046 absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_11046, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: 
> https://patchwork.freedesktop.org/api/1.0/series/53734/revisions/1/mbox/
> 
> Possible new issues
> ---
> 
>   Here are the unknown changes that may have been introduced in 
> Patchwork_11046:
> 
> ### IGT changes ###
> 
>  Possible regressions 
> 
>   * igt@i915_module_load@reload-no-display:
> - fi-skl-6700hq:  PASS -> INCOMPLETE

Do we need to hold a reference to the entire driver tree? Or perhaps an
ordered wq.
-Chris
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[Intel-gfx] [PATCH] drm/i915/selftests: Compile fix for 64b dma-fence seqno

[Chris Wilson]

Many errs of the form:
drivers/gpu/drm/i915/selftests/intel_hangcheck.c: In function 
‘__igt_reset_evict_vma’:
./include/linux/kern_levels.h:5:18: error: format ‘%x’ expects argument of type 
‘unsigned int’, but argum

Fixes: b312d8ca3a7c ("dma-buf: make fence sequence numbers 64 bit v2")
Signed-off-by: Chris Wilson 
Cc: Christian König 
Cc: Chunming Zhou 
Cc: Mika Kuoppala 
Cc: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c 
b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
index 60a4bd9405be..34e200d32b7d 100644
--- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
+++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
@@ -450,7 +450,7 @@ static int __igt_reset_engine(struct drm_i915_private 
*i915, bool active)
if (!wait_until_running(&h, rq)) {
struct drm_printer p = 
drm_info_printer(i915->drm.dev);
 
-   pr_err("%s: Failed to start request %x, 
at %x\n",
+   pr_err("%s: Failed to start request 
%llx, at %x\n",
   __func__, rq->fence.seqno, 
hws_seqno(&h, rq));
intel_engine_dump(engine, &p,
  "%s\n", engine->name);
@@ -728,7 +728,7 @@ static int __igt_reset_engines(struct drm_i915_private 
*i915,
if (!wait_until_running(&h, rq)) {
struct drm_printer p = 
drm_info_printer(i915->drm.dev);
 
-   pr_err("%s: Failed to start request %x, 
at %x\n",
+   pr_err("%s: Failed to start request 
%llx, at %x\n",
   __func__, rq->fence.seqno, 
hws_seqno(&h, rq));
intel_engine_dump(engine, &p,
  "%s\n", engine->name);
@@ -927,7 +927,7 @@ static int igt_reset_wait(void *arg)
if (!wait_until_running(&h, rq)) {
struct drm_printer p = drm_info_printer(i915->drm.dev);
 
-   pr_err("%s: Failed to start request %x, at %x\n",
+   pr_err("%s: Failed to start request %llx, at %x\n",
   __func__, rq->fence.seqno, hws_seqno(&h, rq));
intel_engine_dump(rq->engine, &p, "%s\n", rq->engine->name);
 
@@ -1106,7 +1106,7 @@ static int __igt_reset_evict_vma(struct drm_i915_private 
*i915,
if (!wait_until_running(&h, rq)) {
struct drm_printer p = drm_info_printer(i915->drm.dev);
 
-   pr_err("%s: Failed to start request %x, at %x\n",
+   pr_err("%s: Failed to start request %llx, at %x\n",
   __func__, rq->fence.seqno, hws_seqno(&h, rq));
intel_engine_dump(rq->engine, &p, "%s\n", rq->engine->name);
 
@@ -1301,7 +1301,7 @@ static int igt_reset_queue(void *arg)
if (!wait_until_running(&h, prev)) {
struct drm_printer p = 
drm_info_printer(i915->drm.dev);
 
-   pr_err("%s(%s): Failed to start request %x, at 
%x\n",
+   pr_err("%s(%s): Failed to start request %llx, 
at %x\n",
   __func__, engine->name,
   prev->fence.seqno, hws_seqno(&h, prev));
intel_engine_dump(engine, &p,
@@ -1412,7 +1412,7 @@ static int igt_handle_error(void *arg)
if (!wait_until_running(&h, rq)) {
struct drm_printer p = drm_info_printer(i915->drm.dev);
 
-   pr_err("%s: Failed to start request %x, at %x\n",
+   pr_err("%s: Failed to start request %llx, at %x\n",
   __func__, rq->fence.seqno, hws_seqno(&h, rq));
intel_engine_dump(rq->engine, &p, "%s\n", rq->engine->name);
 
-- 
2.20.0.rc2

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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: Fix pipe config mismatch warnings (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/icl: Fix pipe config mismatch warnings (rev2)
URL   : https://patchwork.freedesktop.org/series/53727/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5282 -> Patchwork_11045


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/53727/revisions/2/mbox/

Known issues


  Here are the changes found in Patchwork_11045 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_create@basic-files:
- fi-bsw-kefka:   PASS -> INCOMPLETE [fdo#105876] / [fdo#108714]

  
  [fdo#105876]: https://bugs.freedesktop.org/show_bug.cgi?id=105876
  [fdo#108714]: https://bugs.freedesktop.org/show_bug.cgi?id=108714


Participating hosts (51 -> 44)
--

  Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-ctg-p8600 fi-pnv-d510 


Build changes
-

* Linux: CI_DRM_5282 -> Patchwork_11045

  CI_DRM_5282: d63c50f2b014037b43c1c0f108c61e0a31ede3c1 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4743: edb2db2cf2b6665d7ba3fa9117263302f6307a4f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_11045: d0beedae7789616f0bb8db01616f9dd80f59e47f @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

d0beedae7789 drm/i915/icl: Fix pipe config mismatch warnings

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11045/
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drivers/base: use a worker for sysfs unbind

[Patchwork]

== Series Details ==

Series: drivers/base: use a worker for sysfs unbind
URL   : https://patchwork.freedesktop.org/series/53734/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
57258bb87944 drivers/base: use a worker for sysfs unbind
-:85: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch 
author 'Daniel Vetter '

total: 0 errors, 1 warnings, 0 checks, 49 lines checked

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Re: [Intel-gfx] [PATCH v3 2/3] drm/i915: replace IS_GEN with IS_GEN(..., N)

[Tvrtko Ursulin]

On 07/12/2018 11:30, Tvrtko Ursulin wrote:


On 07/12/2018 01:17, Lucas De Marchi wrote:

On Thu, Dec 6, 2018 at 4:37 AM Tvrtko Ursulin
 wrote:



On 06/12/2018 06:11, Lucas De Marchi wrote:

Define IS_GEN() similarly to our IS_GEN_RANGE(). but use gen instead of
gen_mask to do the comparison. Now callers can pass then gen as a 
parameter,


Since you are calling it out here, I assume there is some good reason to
replace gen_mask with gen?


Because in this version we don't have the commit removing gen from the
device info.


You had that? Totally don't remember.. what was the goal of that?


Checking gen instead of gen_mask is both simpler and generates smaller
code (although
the difference is negligible, ~100 bytes)


Ok fair, and easy enough to change back once per SKU work rekindles.

Back to the point, for this particular rename, I don't see the big 
attractiveness on it's own so I defer to comments from others.


Sorry to clarify, attractiveness is to reduce the number of macro 
definitions, but compared with balancing against the conflict against 
other work in progress, that is where I am unsure of and defer to others.


Regards,

Tvrtko
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Re: [Intel-gfx] [PATCH v2 2/3] ACPI / PMIC: Implement exec_mipi_pmic_seq_element for CHT Whiskey Cove PMIC

[Mika Westerberg]

On Thu, Dec 06, 2018 at 02:47:04PM +0100, Hans de Goede wrote:
> Implement the exec_mipi_pmic_seq_element callback for the CHT Whiskey Cove
> PMIC.
> 
> On some CHT devices this fixes the LCD panel not lighting up when it was
> not initialized by the GOP, because an external monitor was plugged in and
> the GOP initialized only the external monitor.
> 
> Signed-off-by: Hans de Goede 
> ---
> Changes in v2:
> -Interpret data passed to the PMIC MIPI elements according to the docs
>  instead of my own reverse engineered interpretation
> ---
>  drivers/acpi/pmic/intel_pmic_chtwc.c | 24 
>  1 file changed, 24 insertions(+)
> 
> diff --git a/drivers/acpi/pmic/intel_pmic_chtwc.c 
> b/drivers/acpi/pmic/intel_pmic_chtwc.c
> index 078b0448f30a..049c0cf3b9ed 100644
> --- a/drivers/acpi/pmic/intel_pmic_chtwc.c
> +++ b/drivers/acpi/pmic/intel_pmic_chtwc.c
> @@ -12,6 +12,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include "intel_pmic.h"
>  
>  #define CHT_WC_V1P05A_CTRL   0x6e3b
> @@ -231,6 +232,28 @@ static int intel_cht_wc_pmic_update_power(struct regmap 
> *regmap, int reg,
>   return regmap_update_bits(regmap, reg, bitmask, on ? 1 : 0);
>  }
>  
> +static void intel_cht_wc_exec_mipi_pmic_seq_element(struct regmap *regmap,
> + const u8 *data)
> +{
> + u32 value, mask, reg_address, address;
> + u16 i2c_client_address;
> +
> + /* byte 0 aka PMIC Flag is reserved */
> + i2c_client_address  = get_unaligned_le16(data + 1);
> + reg_address = get_unaligned_le32(data + 3);
> + value   = get_unaligned_le32(data + 7);
> + mask= get_unaligned_le32(data + 11);
> +
> + if (i2c_client_address > 255 || reg_address > 255) {
> + pr_warn("%s warning addresses too big client 0x%x reg 0x%x\n",
> + __func__, i2c_client_address, reg_address);
> + return;

Here also return an error code instead.

> + }
> +
> + address = (i2c_client_address << 8) | reg_address;
> + regmap_update_bits(regmap, address, mask, value);
> +}
> +
>  /*
>   * The thermal table and ops are empty, we do not support the Thermal 
> opregion
>   * (DPTF) due to lacking documentation.
> @@ -238,6 +261,7 @@ static int intel_cht_wc_pmic_update_power(struct regmap 
> *regmap, int reg,
>  static struct intel_pmic_opregion_data intel_cht_wc_pmic_opregion_data = {
>   .get_power  = intel_cht_wc_pmic_get_power,
>   .update_power   = intel_cht_wc_pmic_update_power,
> + .exec_mipi_pmic_seq_element = intel_cht_wc_exec_mipi_pmic_seq_element,
>   .power_table= power_table,
>   .power_table_count  = ARRAY_SIZE(power_table),
>  };
> -- 
> 2.19.2
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Re: [Intel-gfx] [PATCH v2 1/3] ACPI / PMIC: Add support for executing PMIC MIPI sequence elements

[Mika Westerberg]

On Thu, Dec 06, 2018 at 02:47:03PM +0100, Hans de Goede wrote:
> DSI LCD panels describe an initialization sequence in the Video BIOS
> Tables using so called MIPI sequences. One possible element in these
> sequences is a PMIC specific element of 15 bytes.
> 
> Although this is not really an ACPI opregion, the ACPI opregion code is the
> closest thing we have. We need to have support for these PMIC specific MIPI
> sequence elements somwhere. Since we already instantiate a special platform
> device for Intel PMICs for the ACPI PMIC OpRegion handler to bind to,
> with PMIC specific implementations of the OpRegion, the handling of MIPI
> sequence PMIC elements fits very well in the ACPI PMIC OpRegion code.
> 
> This commit adds a new intel_soc_pmic_exec_mipi_pmic_seq_element()
> function, which is to be backed by a PMIC specific
> exec_mipi_pmic_seq_element callback. This function will be called by the
> i915 code to execture MIPI sequence PMIC elements.
> 
> Signed-off-by: Hans de Goede 
> ---
>  drivers/acpi/pmic/intel_pmic.c | 25 +
>  drivers/acpi/pmic/intel_pmic.h |  1 +
>  include/linux/mfd/intel_soc_pmic.h |  2 ++
>  3 files changed, 28 insertions(+)
> 
> diff --git a/drivers/acpi/pmic/intel_pmic.c b/drivers/acpi/pmic/intel_pmic.c
> index ca18e0d23df9..0d96ca08bb79 100644
> --- a/drivers/acpi/pmic/intel_pmic.c
> +++ b/drivers/acpi/pmic/intel_pmic.c
> @@ -15,6 +15,7 @@
>  
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include "intel_pmic.h"
> @@ -36,6 +37,8 @@ struct intel_pmic_opregion {
>   struct intel_pmic_regs_handler_ctx ctx;
>  };
>  
> +static struct intel_pmic_opregion *intel_pmic_opregion;
> +
>  static int pmic_get_reg_bit(int address, struct pmic_table *table,
>   int count, int *reg, int *bit)
>  {
> @@ -304,6 +307,7 @@ int intel_pmic_install_opregion_handler(struct device 
> *dev, acpi_handle handle,
>   }
>  
>   opregion->data = d;
> + intel_pmic_opregion = opregion;
>   return 0;
>  
>  out_remove_thermal_handler:
> @@ -319,3 +323,24 @@ int intel_pmic_install_opregion_handler(struct device 
> *dev, acpi_handle handle,
>   return ret;
>  }
>  EXPORT_SYMBOL_GPL(intel_pmic_install_opregion_handler);
> +

Since this is exported, please add kernel-doc here.

> +void intel_soc_pmic_exec_mipi_pmic_seq_element(const u8 *data)
> +{
> + struct intel_pmic_opregion_data *d;
> +
> + if (!intel_pmic_opregion) {
> + pr_warn("%s: No PMIC registered\n", __func__);
> + return;

Why not return error codes instead?

Other ops in struct intel_pmic_opregion_data seem to do so.

> + }
> +
> + d = intel_pmic_opregion->data;
> + if (!d->exec_mipi_pmic_seq_element) {
> + pr_warn("%s: Not implemented\n", __func__);
> + return;

Ditto.

> + }
> +
> + mutex_lock(&intel_pmic_opregion->lock);
> + d->exec_mipi_pmic_seq_element(intel_pmic_opregion->regmap, data);
> + mutex_unlock(&intel_pmic_opregion->lock);
> +}
> +EXPORT_SYMBOL_GPL(intel_soc_pmic_exec_mipi_pmic_seq_element);
> diff --git a/drivers/acpi/pmic/intel_pmic.h b/drivers/acpi/pmic/intel_pmic.h
> index 095afc96952e..5a7bb33d046a 100644
> --- a/drivers/acpi/pmic/intel_pmic.h
> +++ b/drivers/acpi/pmic/intel_pmic.h
> @@ -15,6 +15,7 @@ struct intel_pmic_opregion_data {
>   int (*update_aux)(struct regmap *r, int reg, int raw_temp);
>   int (*get_policy)(struct regmap *r, int reg, int bit, u64 *value);
>   int (*update_policy)(struct regmap *r, int reg, int bit, int enable);
> + void (*exec_mipi_pmic_seq_element)(struct regmap *r, const u8 *data);
>   struct pmic_table *power_table;
>   int power_table_count;
>   struct pmic_table *thermal_table;
> diff --git a/include/linux/mfd/intel_soc_pmic.h 
> b/include/linux/mfd/intel_soc_pmic.h
> index ed1dfba5e5f9..ce04ad7d4b6c 100644
> --- a/include/linux/mfd/intel_soc_pmic.h
> +++ b/include/linux/mfd/intel_soc_pmic.h
> @@ -26,4 +26,6 @@ struct intel_soc_pmic {
>   struct device *dev;
>  };
>  
> +void intel_soc_pmic_exec_mipi_pmic_seq_element(const u8 *data);
> +
>  #endif   /* __INTEL_SOC_PMIC_H__ */
> -- 
> 2.19.2
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/icl: Fix pipe config mismatch warnings (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/icl: Fix pipe config mismatch warnings (rev2)
URL   : https://patchwork.freedesktop.org/series/53727/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
d0beedae7789 drm/i915/icl: Fix pipe config mismatch warnings
-:89: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#89: FILE: drivers/gpu/drm/i915/icl_dsi.c:873:
+   if (intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE) {
+

-:145: WARNING:BRACES: braces {} are not necessary for single statement blocks
#145: FILE: drivers/gpu/drm/i915/icl_dsi.c:1268:
+   if (intel_dsi->dual_link) {
+   pipe_config->base.adjusted_mode.crtc_clock /= 2;
+   }

total: 0 errors, 1 warnings, 1 checks, 126 lines checked

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Re: [Intel-gfx] [PATCH v3 2/3] drm/i915: replace IS_GEN with IS_GEN(..., N)

[Tvrtko Ursulin]

On 07/12/2018 01:17, Lucas De Marchi wrote:

On Thu, Dec 6, 2018 at 4:37 AM Tvrtko Ursulin
 wrote:



On 06/12/2018 06:11, Lucas De Marchi wrote:

Define IS_GEN() similarly to our IS_GEN_RANGE(). but use gen instead of
gen_mask to do the comparison. Now callers can pass then gen as a parameter,


Since you are calling it out here, I assume there is some good reason to
replace gen_mask with gen?


Because in this version we don't have the commit removing gen from the
device info.


You had that? Totally don't remember.. what was the goal of that?


Checking gen instead of gen_mask is both simpler and generates smaller
code (although
the difference is negligible, ~100 bytes)


Ok fair, and easy enough to change back once per SKU work rekindles.

Back to the point, for this particular rename, I don't see the big 
attractiveness on it's own so I defer to comments from others.


Regards,

Tvrtko
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Push EMIT_INVALIDATE at request start to backends

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Push EMIT_INVALIDATE at request 
start to backends
URL   : https://patchwork.freedesktop.org/series/53729/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5282 -> Patchwork_11044


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/53729/revisions/1/mbox/

Known issues


  Here are the changes found in Patchwork_11044 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-skl-guc: PASS -> FAIL [fdo#103191] / [fdo#107362]

  
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362


Participating hosts (51 -> 44)
--

  Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-ctg-p8600 fi-icl-y 


Build changes
-

* Linux: CI_DRM_5282 -> Patchwork_11044

  CI_DRM_5282: d63c50f2b014037b43c1c0f108c61e0a31ede3c1 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4743: edb2db2cf2b6665d7ba3fa9117263302f6307a4f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_11044: 64bfd63c7ec749a1e5e283e15dfeae1e9a0b24f2 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

64bfd63c7ec7 drm/i915: Pipeline PDP updates for Braswell
65283a5aaf29 drm/i915/ringbuffer: EMIT_INVALIDATE after switch context
61ff4e360a79 drm/i915: Push EMIT_INVALIDATE at request start to backends

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11044/
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[Intel-gfx] [PATCH v3] drm/i915: Skip the ERR_PTR error state

[Chris Wilson]

Although commit fb6f0b64e455 ("drm/i915: Prevent machine hang from
Broxton's vtd w/a and error capture") applied cleanly after a 24 month
hiatus, the code had moved on with new methods for peeking and fetching
the captured gpu info. Make sure we catch all uses of the stashed error
state and avoid dereferencing the error pointer.

v2: Move error pointer determination into i915_gpu_capture_state
v3: Restore early check to avoid capturing and then throwing away
subsequent GPU error states.

Fixes: fb6f0b64e455 ("drm/i915: Prevent machine hang from Broxton's vtd w/a and 
error capture")
Signed-off-by: Chris Wilson 
Cc: Tvrtko Ursulin 
Cc: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/i915_debugfs.c   | 12 +---
 drivers/gpu/drm/i915/i915_gpu_error.c | 23 ++-
 drivers/gpu/drm/i915/i915_sysfs.c |  4 +++-
 3 files changed, 26 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 38dcee1ca062..40a61ef9aac1 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -984,8 +984,8 @@ static int i915_gpu_info_open(struct inode *inode, struct 
file *file)
intel_runtime_pm_get(i915);
gpu = i915_capture_gpu_state(i915);
intel_runtime_pm_put(i915);
-   if (!gpu)
-   return -ENOMEM;
+   if (IS_ERR(gpu))
+   return PTR_ERR(gpu);
 
file->private_data = gpu;
return 0;
@@ -1018,7 +1018,13 @@ i915_error_state_write(struct file *filp,
 
 static int i915_error_state_open(struct inode *inode, struct file *file)
 {
-   file->private_data = i915_first_error_state(inode->i_private);
+   struct i915_gpu_state *error;
+
+   error = i915_first_error_state(inode->i_private);
+   if (IS_ERR(error))
+   return PTR_ERR(error);
+
+   file->private_data  = error;
return 0;
 }
 
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 07465123c166..3f9ce403c755 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1907,9 +1907,16 @@ i915_capture_gpu_state(struct drm_i915_private *i915)
 {
struct i915_gpu_state *error;
 
+   /* Check if GPU capture has been disabled */
+   error = READ_ONCE(i915->gpu_error.first_error);
+   if (IS_ERR(error))
+   return error;
+
error = kzalloc(sizeof(*error), GFP_ATOMIC);
-   if (!error)
-   return NULL;
+   if (!error) {
+   i915_disable_error_state(i915, -ENOMEM);
+   return ERR_PTR(-ENOMEM);
+   }
 
kref_init(&error->ref);
error->i915 = i915;
@@ -1945,11 +1952,8 @@ void i915_capture_error_state(struct drm_i915_private 
*i915,
return;
 
error = i915_capture_gpu_state(i915);
-   if (!error) {
-   DRM_DEBUG_DRIVER("out of memory, not capturing error state\n");
-   i915_disable_error_state(i915, -ENOMEM);
+   if (IS_ERR(error))
return;
-   }
 
i915_error_capture_msg(i915, error, engine_mask, error_msg);
DRM_INFO("%s\n", error->error_msg);
@@ -1987,7 +1991,7 @@ i915_first_error_state(struct drm_i915_private *i915)
 
spin_lock_irq(&i915->gpu_error.lock);
error = i915->gpu_error.first_error;
-   if (error)
+   if (!IS_ERR_OR_NULL(error))
i915_gpu_state_get(error);
spin_unlock_irq(&i915->gpu_error.lock);
 
@@ -2000,10 +2004,11 @@ void i915_reset_error_state(struct drm_i915_private 
*i915)
 
spin_lock_irq(&i915->gpu_error.lock);
error = i915->gpu_error.first_error;
-   i915->gpu_error.first_error = NULL;
+   if (error != ERR_PTR(-ENODEV)) /* if disabled, always disabled */
+   i915->gpu_error.first_error = NULL;
spin_unlock_irq(&i915->gpu_error.lock);
 
-   if (!IS_ERR(error))
+   if (!IS_ERR_OR_NULL(error))
i915_gpu_state_put(error);
 }
 
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c 
b/drivers/gpu/drm/i915/i915_sysfs.c
index 535caebd9813..c0cfe7ae2ba5 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -521,7 +521,9 @@ static ssize_t error_state_read(struct file *filp, struct 
kobject *kobj,
ssize_t ret;
 
gpu = i915_first_error_state(i915);
-   if (gpu) {
+   if (IS_ERR(gpu)) {
+   ret = PTR_ERR(gpu);
+   } else if (gpu) {
ret = i915_gpu_state_copy_to_buffer(gpu, buf, off, count);
i915_gpu_state_put(gpu);
} else {
-- 
2.20.0.rc2

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Re: [Intel-gfx] [PATCH] drm/i915: Skip the ERR_PTR error state

[Chris Wilson]

Quoting Tvrtko Ursulin (2018-12-07 10:45:17)
> > @@ -1941,15 +1948,9 @@ void i915_capture_error_state(struct 
> > drm_i915_private *i915,
> >   if (!i915_modparams.error_capture)
> >   return;
> >   
> > - if (READ_ONCE(i915->gpu_error.first_error))
> > - return;
> > -
> 
> Will it now overwrite the first error on subsequent hangs? 
> i915_capture_gpu_state only does early exit on stored error.

No, after we capture the state, we do another check under the spinlock
to make sure we don't overwrite existing state.

However, that early check is still useful to avoid capturing subsequent
errors and throwing them away.
-Chris
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Re: [Intel-gfx] [PATCH] drivers/base: use a worker for sysfs unbind

[Daniel Vetter]

On Fri, Dec 07, 2018 at 09:58:06AM +, Chris Wilson wrote:
> Quoting Daniel Vetter (2018-12-07 09:31:33)
> > +void unbind_work_fn(struct work_struct *work)
> > +{
> > +   struct unbind_work *unbind_work =
> > +   container_of(work, struct unbind_work, work);
> > +
> > +   device_release_driver(unbind_work->dev);
> > +   put_device(unbind_work->dev);
> > +}
> > +
> >  /* Manually detach a device from its associated driver. */
> >  static ssize_t unbind_store(struct device_driver *drv, const char *buf,
> > size_t count)
> >  {
> > struct bus_type *bus = bus_get(drv->bus);
> > +   struct unbind_work *unbind_work;
> > struct device *dev;
> > int err = -ENODEV;
> >  
> > dev = bus_find_device_by_name(bus, NULL, buf);
> > if (dev && dev->driver == drv) {
> > -   if (dev->parent && dev->bus->need_parent_lock)
> > -   device_lock(dev->parent);
> 
> Do we not need to keep this locking in the worker?

Ah forgot to mention that in the commit message: This locking is already
done in device_release_driver -> device_release_driver_internal. I'll fix
up the commit message, thanks for the reminder.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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