Re: [Intel-gfx] [PATCH] drm/i915: Engine relative MMIO
Hi John,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-20190222]
[cannot apply to v5.0-rc4]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/John-C-Harrison-Intel-com/drm-i915-Engine-relative-MMIO/20190223-131519
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-8 (Debian 8.2.0-20) 8.2.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/gvt/mmio_context.c: In function
'restore_context_mmio_for_inhibit':
>> drivers/gpu/drm/i915/gvt/mmio_context.c:202:10: error: implicit declaration
>> of function 'MI_LOAD_REGISTER_IMM'; did you mean 'MI_LOAD_REGISTER_MEM'?
>> [-Werror=implicit-function-declaration]
*cs++ = MI_LOAD_REGISTER_IMM(count);
^~~~
MI_LOAD_REGISTER_MEM
cc1: some warnings being treated as errors
vim +202 drivers/gpu/drm/i915/gvt/mmio_context.c
17865713 drivers/gpu/drm/i915/gvt/render.c Zhi Wang 2016-05-01 179
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 180
static int
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 181
restore_context_mmio_for_inhibit(struct intel_vgpu *vgpu,
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 182
struct i915_request *req)
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 183 {
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 184
u32 *cs;
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 185
int ret;
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 186
struct engine_mmio *mmio;
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 187
struct intel_gvt *gvt = vgpu->gvt;
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 188
int ring_id = req->engine->id;
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 189
int count = gvt->engine_mmio_list.ctx_mmio_count[ring_id];
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 190
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 191
if (count == 0)
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 192
return 0;
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 193
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 194
ret = req->engine->emit_flush(req, EMIT_BARRIER);
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 195
if (ret)
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 196
return ret;
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 197
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 198
cs = intel_ring_begin(req, count * 2 + 2);
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 199
if (IS_ERR(cs))
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 200
return PTR_ERR(cs);
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 201
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 @202
*cs++ = MI_LOAD_REGISTER_IMM(count);
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 203
for (mmio = gvt->engine_mmio_list.mmio;
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 204
i915_mmio_reg_valid(mmio->reg); mmio++) {
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 205
if (mmio->ring_id != ring_id ||
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 206
!mmio->in_context)
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 207
continue;
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 208
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 209
*cs++ = i915_mmio_reg_offset(mmio->reg);
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 210
*cs++ = vgpu_vreg_t(vgpu, mmio->reg) |
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 211
(mmio->mask << 16);
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li 2018-02-23 212
gvt_dbg_core("add lri reg pair 0x%x:0x%x in inhibit ctx, vgpu:%d,
rind_id:%d\n",
cd7e61b9 drivers/gpu/drm/i915/gvt/mmio_context.c Weinan Li
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: extract AUX mask assignment to separate function
== Series Details == Series: drm/i915: extract AUX mask assignment to separate function URL : https://patchwork.freedesktop.org/series/57119/ State : success == Summary == CI Bug Log - changes from CI_DRM_5655_full -> Patchwork_12291_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12291_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_busy@extended-parallel-bsd1: - shard-apl: NOTRUN -> SKIP [fdo#109271] +7 * igt@gem_ctx_param@invalid-param-set: - shard-kbl: NOTRUN -> FAIL [fdo#109674] * igt@kms_busy@basic-flip-f: - shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] * igt@kms_busy@basic-modeset-e: - shard-kbl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1 * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: - shard-kbl: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_cursor_crc@cursor-64x21-random: - shard-apl: PASS -> FAIL [fdo#103232] +6 * igt@kms_cursor_crc@cursor-64x64-suspend: - shard-apl: PASS -> FAIL [fdo#103191] / [fdo#103232] +1 * igt@kms_cursor_crc@cursor-alpha-opaque: - shard-apl: PASS -> FAIL [fdo#109350] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt: - shard-apl: NOTRUN -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt: - shard-kbl: NOTRUN -> SKIP [fdo#109271] +41 * igt@kms_plane_alpha_blend@pipe-a-alpha-transparant-fb: - shard-kbl: NOTRUN -> FAIL [fdo#108145] * igt@kms_plane_multiple@atomic-pipe-b-tiling-none: - shard-apl: PASS -> FAIL [fdo#103166] * igt@kms_rotation_crc@multiplane-rotation: - shard-kbl: PASS -> INCOMPLETE [fdo#103665] * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom: - shard-kbl: PASS -> DMESG-FAIL [fdo#105763] * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-kbl: PASS -> FAIL [fdo#109016] * igt@kms_setmode@basic: - shard-apl: PASS -> FAIL [fdo#99912] Possible fixes * igt@kms_cursor_crc@cursor-128x128-random: - shard-apl: FAIL [fdo#103232] -> PASS +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: - shard-apl: FAIL [fdo#103167] -> PASS +1 * igt@kms_plane@pixel-format-pipe-c-planes: - shard-glk: FAIL [fdo#103166] -> PASS * igt@kms_plane_multiple@atomic-pipe-c-tiling-none: - shard-apl: FAIL [fdo#103166] -> PASS [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763 [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109350]: https://bugs.freedesktop.org/show_bug.cgi?id=109350 [fdo#109674]: https://bugs.freedesktop.org/show_bug.cgi?id=109674 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (6 -> 5) -- Missing(1): shard-skl Build changes - * Linux: CI_DRM_5655 -> Patchwork_12291 CI_DRM_5655: a40729237602fa7454aaf3355ad3058cad5c6ee9 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4853: 8afdfd8fa9ce17043d9105dedca46ad4555fdcdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12291: fb0e0e7a4c947920fb79bed3e99333d926891549 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12291/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/4] drm/i915: Disable PSR2 while getting pipe CRC
On Sat, 2019-02-23 at 02:48 +, Souza, Jose wrote:
> On Fri, 2019-02-22 at 18:13 -0800, Dhinakaran Pandiyan wrote:
> > On Wed, 2019-02-13 at 18:02 -0800, José Roberto de Souza wrote:
> > > As stated in CRC_CTL spec, after PSR entry state CRC will not be
> > > calculated anymore what is not a problem as IGT tests do some
> > > screen
> > > change and then request the pipe CRC right after the change so
> > > PSR
> > > will go to idle state and only will entry again after at least 6
> > > idles frames.
> > >
> > > But for PSR2 it is more problematic as any change to the screen
> > > could
> > > trigger a selective/partial update causing the CRC value not to
> > > be
> > > calculated over the full frame.
> > >
> > > So here it disables PSR2 and keep it disabled while user is
> > > requesting pipe CRC.
> > >
> > > BSpec: 7536
> > >
> > > Cc: Dhinakaran Pandiyan
> > > Cc: Ville Syrjälä
> > > Signed-off-by: José Roberto de Souza
> > > ---
> > > drivers/gpu/drm/i915/i915_drv.h | 1 +
> > > drivers/gpu/drm/i915/intel_drv.h | 1 +
> > > drivers/gpu/drm/i915/intel_pipe_crc.c | 10 ++
> > > drivers/gpu/drm/i915/intel_psr.c | 23
> > > +++
> > > 4 files changed, 35 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > > b/drivers/gpu/drm/i915/i915_drv.h
> > > index 17fe942eaafa..609e9c5bd453 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > @@ -520,6 +520,7 @@ struct i915_psr {
> > > bool sink_not_reliable;
> > > bool irq_aux_error;
> > > u16 su_x_granularity;
> > > + bool pipe_crc_enabled;
> > > };
> > >
> > > enum intel_pch {
> > > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > > b/drivers/gpu/drm/i915/intel_drv.h
> > > index 3398b28c053b..40ce7a600585 100644
> > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > @@ -2103,6 +2103,7 @@ void intel_psr_short_pulse(struct intel_dp
> > > *intel_dp);
> > > int intel_psr_wait_for_idle(const struct intel_crtc_state
> > > *new_crtc_state,
> > > u32 *out_value);
> > > bool intel_psr_enabled(struct intel_dp *intel_dp);
> > > +void intel_psr_crc_prepare_or_finish(struct drm_i915_private
> > > *dev_priv, enum pipe pipe, bool prepare);
> > >
> > > /* intel_quirks.c */
> > > void intel_init_quirks(struct drm_i915_private *dev_priv);
> > > diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c
> > > b/drivers/gpu/drm/i915/intel_pipe_crc.c
> > > index a8554dc4f196..5d8772399f60 100644
> > > --- a/drivers/gpu/drm/i915/intel_pipe_crc.c
> > > +++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
> > > @@ -583,6 +583,14 @@ int intel_crtc_verify_crc_source(struct
> > > drm_crtc
> > > *crtc, const char *source_name,
> > > return -EINVAL;
> > > }
> > >
> > > +static inline void intel_crtc_crc_prepare_or_finish(struct
> > > drm_crtc
> > > *crtc, bool prepare)
> > > +{
> > > + struct drm_i915_private *dev_priv = to_i915(crtc->dev);
> > > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> > > +
> > > + intel_psr_crc_prepare_or_finish(dev_priv, intel_crtc->pipe,
> > > prepare);
> > > +}
> > > +
> > > int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char
> > > *source_name)
> > > {
> > > struct drm_i915_private *dev_priv = to_i915(crtc->dev);
> > > @@ -609,6 +617,8 @@ int intel_crtc_set_crc_source(struct drm_crtc
> > > *crtc, const char *source_name)
> > > if (ret != 0)
> > > goto out;
> > >
> > > + intel_crtc_crc_prepare_or_finish(crtc, source !=
> > > INTEL_PIPE_CRC_SOURCE_NONE);
> > > +
> > > pipe_crc->source = source;
> > > I915_WRITE(PIPE_CRC_CTL(crtc->index), val);
> > > POSTING_READ(PIPE_CRC_CTL(crtc->index));
> > > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > > b/drivers/gpu/drm/i915/intel_psr.c
> > > index 08967836b48e..9c93138988aa 100644
> > > --- a/drivers/gpu/drm/i915/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > > @@ -577,6 +577,9 @@ static bool intel_psr2_config_valid(struct
> > > intel_dp *intel_dp,
> > > return false;
> > > }
> > >
> > > + if (dev_priv->psr.pipe_crc_enabled)
> > > + return false;
> > > +
> >
> > Disabling PSR instead of switching to PSR1 is safer considering the
> > past bug reports with PSR1.
>
> I thought about that but it would break every PSR subtest in
> kms_frontbuffer_tracking, I guess is better start by disabling PSR2
> and
> then discuss about PSR1 if decided to disable, we need to remove PSR1
> from kms_frontbuffer_tracking first.
I see.
>
> >
> > > return true;
> > > }
> > >
> > > @@ -1291,3 +1294,23 @@ bool intel_psr_enabled(struct intel_dp
> > > *intel_dp)
> > >
> > > return ret;
> > > }
> > > +
> > > +void intel_psr_crc_prepare_or_finish(struct drm_i915_private
> > > *dev_priv, enum pipe pipe, bool prepare)
> > > +{
> > > + bool fastset = false;
> > > +
> > > + if (!CAN_PSR(dev_priv))
> > > + return;
> > > +
> > > +
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915/icl: move MG pll hw_state readout
== Series Details == Series: series starting with [1/3] drm/i915/icl: move MG pll hw_state readout URL : https://patchwork.freedesktop.org/series/57116/ State : success == Summary == CI Bug Log - changes from CI_DRM_5655_full -> Patchwork_12289_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12289_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_busy@extended-parallel-bsd1: - shard-apl: NOTRUN -> SKIP [fdo#109271] +7 * igt@gem_ctx_param@invalid-param-set: - shard-kbl: NOTRUN -> FAIL [fdo#109674] * igt@kms_busy@basic-flip-f: - shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] * igt@kms_busy@basic-modeset-e: - shard-kbl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1 * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: - shard-kbl: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_cursor_crc@cursor-64x21-sliding: - shard-apl: PASS -> FAIL [fdo#103232] +3 * igt@kms_cursor_crc@cursor-64x64-suspend: - shard-apl: PASS -> FAIL [fdo#103191] / [fdo#103232] * igt@kms_cursor_crc@cursor-alpha-opaque: - shard-apl: PASS -> FAIL [fdo#109350] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt: - shard-apl: NOTRUN -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: - shard-glk: PASS -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt: - shard-kbl: NOTRUN -> SKIP [fdo#109271] +41 * igt@kms_plane@pixel-format-pipe-c-planes: - shard-apl: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_alpha_blend@pipe-a-alpha-transparant-fb: - shard-kbl: NOTRUN -> FAIL [fdo#108145] * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom: - shard-kbl: PASS -> DMESG-FAIL [fdo#105763] * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-glk: PASS -> DMESG-FAIL [fdo#105763] / [fdo#106538] * igt@kms_setmode@basic: - shard-apl: PASS -> FAIL [fdo#99912] * igt@testdisplay: - shard-apl: PASS -> INCOMPLETE [fdo#103927] Possible fixes * igt@i915_pm_rc6_residency@rc6-accuracy: - shard-snb: SKIP [fdo#109271] -> PASS * igt@kms_color@pipe-c-legacy-gamma: - shard-glk: FAIL [fdo#104782] -> PASS * igt@kms_cursor_crc@cursor-128x128-random: - shard-apl: FAIL [fdo#103232] -> PASS +1 * igt@kms_cursor_crc@cursor-alpha-opaque: - shard-glk: FAIL [fdo#109350] -> PASS * igt@kms_plane_multiple@atomic-pipe-c-tiling-none: - shard-apl: FAIL [fdo#103166] -> PASS [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782 [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763 [fdo#106538]: https://bugs.freedesktop.org/show_bug.cgi?id=106538 [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109350]: https://bugs.freedesktop.org/show_bug.cgi?id=109350 [fdo#109674]: https://bugs.freedesktop.org/show_bug.cgi?id=109674 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (6 -> 5) -- Missing(1): shard-skl Build changes - * Linux: CI_DRM_5655 -> Patchwork_12289 CI_DRM_5655: a40729237602fa7454aaf3355ad3058cad5c6ee9 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4853: 8afdfd8fa9ce17043d9105dedca46ad4555fdcdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12289: 733d58810b2834d707806c3298348907ac6562ca @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12289/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: refactor transcoders reporting on error state
== Series Details == Series: series starting with [1/2] drm/i915: refactor transcoders reporting on error state URL : https://patchwork.freedesktop.org/series/57113/ State : success == Summary == CI Bug Log - changes from CI_DRM_5655_full -> Patchwork_12288_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12288_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_busy@extended-parallel-bsd1: - shard-apl: NOTRUN -> SKIP [fdo#109271] +7 * igt@gem_ctx_param@invalid-param-set: - shard-kbl: NOTRUN -> FAIL [fdo#109674] * igt@i915_suspend@fence-restore-untiled: - shard-kbl: PASS -> INCOMPLETE [fdo#103665] * igt@kms_busy@basic-flip-f: - shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] * igt@kms_busy@basic-modeset-e: - shard-kbl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1 * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: - shard-kbl: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_color@pipe-c-degamma: - shard-apl: PASS -> FAIL [fdo#104782] * igt@kms_cursor_crc@cursor-64x21-sliding: - shard-apl: PASS -> FAIL [fdo#103232] +5 * igt@kms_cursor_crc@cursor-64x64-suspend: - shard-apl: PASS -> FAIL [fdo#103191] / [fdo#103232] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt: - shard-apl: NOTRUN -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt: - shard-kbl: NOTRUN -> SKIP [fdo#109271] +47 * igt@kms_plane_alpha_blend@pipe-a-alpha-transparant-fb: - shard-kbl: NOTRUN -> FAIL [fdo#108145] * igt@kms_plane_multiple@atomic-pipe-b-tiling-none: - shard-apl: PASS -> FAIL [fdo#103166] * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom: - shard-kbl: PASS -> DMESG-FAIL [fdo#105763] * igt@kms_setmode@basic: - shard-apl: PASS -> FAIL [fdo#99912] * igt@perf_pmu@rc6: - shard-kbl: PASS -> SKIP [fdo#109271] Possible fixes * igt@i915_suspend@fence-restore-tiled2untiled: - shard-kbl: INCOMPLETE [fdo#103665] -> PASS * igt@kms_cursor_crc@cursor-128x128-random: - shard-apl: FAIL [fdo#103232] -> PASS +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: - shard-apl: FAIL [fdo#103167] -> PASS * igt@kms_plane_multiple@atomic-pipe-c-tiling-none: - shard-apl: FAIL [fdo#103166] -> PASS [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782 [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763 [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109674]: https://bugs.freedesktop.org/show_bug.cgi?id=109674 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (6 -> 5) -- Missing(1): shard-skl Build changes - * Linux: CI_DRM_5655 -> Patchwork_12288 CI_DRM_5655: a40729237602fa7454aaf3355ad3058cad5c6ee9 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4853: 8afdfd8fa9ce17043d9105dedca46ad4555fdcdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12288: 0dd90fb387a3fd48103ec35fe3cda76d753964d7 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12288/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Call MG_DP_MODE() macro with the right parameters order
== Series Details == Series: drm/i915: Call MG_DP_MODE() macro with the right parameters order URL : https://patchwork.freedesktop.org/series/57107/ State : success == Summary == CI Bug Log - changes from CI_DRM_5654_full -> Patchwork_12285_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12285_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_param@invalid-param-get: - shard-kbl: NOTRUN -> FAIL [fdo#109559] * igt@gem_exec_big: - shard-hsw: PASS -> TIMEOUT [fdo#107937] * igt@i915_pm_lpsp@edp-panel-fitter: - shard-iclb: NOTRUN -> SKIP [fdo#109301] * igt@i915_pm_rpm@reg-read-ioctl: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +5 * igt@kms_busy@basic-flip-e: - shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] * igt@kms_busy@extended-modeset-hang-oldfb-with-reset-render-f: - shard-kbl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1 * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c: - shard-glk: PASS -> DMESG-WARN [fdo#107956] * igt@kms_chamelium@vga-hpd-fast: - shard-iclb: NOTRUN -> SKIP [fdo#109284] * igt@kms_chv_cursor_fail@pipe-c-256x256-bottom-edge: - shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +4 * igt@kms_color@pipe-a-legacy-gamma: - shard-apl: PASS -> FAIL [fdo#104782] / [fdo#108145] * igt@kms_content_protection@legacy: - shard-kbl: NOTRUN -> FAIL [fdo#108597] / [fdo#108739] * igt@kms_cursor_crc@cursor-128x42-onscreen: - shard-apl: PASS -> FAIL [fdo#103232] +2 * igt@kms_cursor_crc@cursor-256x256-suspend: - shard-apl: PASS -> FAIL [fdo#103191] / [fdo#103232] * igt@kms_cursor_crc@cursor-64x21-onscreen: - shard-apl: NOTRUN -> FAIL [fdo#103232] * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic: - shard-hsw: PASS -> FAIL [fdo#105767] * igt@kms_flip@2x-flip-vs-absolute-wf_vblank: - shard-iclb: NOTRUN -> SKIP [fdo#109274] * igt@kms_flip@2x-flip-vs-dpms-interruptible: - shard-hsw: PASS -> DMESG-WARN [fdo#102614] * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-kbl: PASS -> FAIL [fdo#102887] / [fdo#105363] * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-render: - shard-glk: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt: - shard-iclb: NOTRUN -> SKIP [fdo#109280] +2 * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-gtt: - shard-snb: NOTRUN -> SKIP [fdo#109271] +31 * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-gtt: - shard-kbl: NOTRUN -> SKIP [fdo#109271] +46 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite: - shard-iclb: PASS -> FAIL [fdo#103167] +4 * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-fullscreen: - shard-apl: NOTRUN -> SKIP [fdo#109271] +16 * igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb: - shard-apl: NOTRUN -> FAIL [fdo#108145] * igt@kms_plane_multiple@atomic-pipe-a-tiling-y: - shard-iclb: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_multiple@atomic-pipe-c-tiling-y: - shard-glk: PASS -> FAIL [fdo#103166] * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: - shard-apl: PASS -> FAIL [fdo#103166] +2 * igt@kms_rotation_crc@multiplane-rotation: - shard-kbl: PASS -> INCOMPLETE [fdo#103665] * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-kbl: PASS -> FAIL [fdo#109016] * igt@kms_setmode@basic: - shard-kbl: PASS -> FAIL [fdo#99912] Possible fixes * igt@i915_pm_rpm@fences: - shard-iclb: DMESG-WARN [fdo#107724] -> PASS +1 * igt@kms_flip@flip-vs-expired-vblank: - shard-iclb: FAIL [fdo#105363] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move: - shard-apl: FAIL [fdo#103167] -> PASS * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite: - shard-iclb: FAIL [fdo#103167] -> PASS +3 * igt@kms_plane@plane-position-covered-pipe-c-planes: - shard-apl: FAIL [fdo#103166] -> PASS +1 * igt@kms_plane_multiple@atomic-pipe-b-tiling-yf: - shard-iclb: FAIL [fdo#103166] -> PASS +4 * igt@kms_setmode@basic: - shard-apl: FAIL [fdo#99912] -> PASS * igt@kms_vblank@pipe-b-query-idle-hang: - shard-apl: INCOMPLETE [fdo#103927] -> PASS Warnings * igt@i915_pm_backlight@fade_with_suspend: - shard-iclb: DMESG-FAIL [fdo#107724] / [fdo#107847] -> FAIL [fdo#107847] *
Re: [Intel-gfx] [PATCH 2/4] drm/i915: Disable PSR2 while getting pipe CRC
On Fri, 2019-02-22 at 18:13 -0800, Dhinakaran Pandiyan wrote:
> On Wed, 2019-02-13 at 18:02 -0800, José Roberto de Souza wrote:
> > As stated in CRC_CTL spec, after PSR entry state CRC will not be
> > calculated anymore what is not a problem as IGT tests do some
> > screen
> > change and then request the pipe CRC right after the change so PSR
> > will go to idle state and only will entry again after at least 6
> > idles frames.
> >
> > But for PSR2 it is more problematic as any change to the screen
> > could
> > trigger a selective/partial update causing the CRC value not to be
> > calculated over the full frame.
> >
> > So here it disables PSR2 and keep it disabled while user is
> > requesting pipe CRC.
> >
> > BSpec: 7536
> >
> > Cc: Dhinakaran Pandiyan
> > Cc: Ville Syrjälä
> > Signed-off-by: José Roberto de Souza
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 1 +
> > drivers/gpu/drm/i915/intel_drv.h | 1 +
> > drivers/gpu/drm/i915/intel_pipe_crc.c | 10 ++
> > drivers/gpu/drm/i915/intel_psr.c | 23 +++
> > 4 files changed, 35 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h
> > index 17fe942eaafa..609e9c5bd453 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -520,6 +520,7 @@ struct i915_psr {
> > bool sink_not_reliable;
> > bool irq_aux_error;
> > u16 su_x_granularity;
> > + bool pipe_crc_enabled;
> > };
> >
> > enum intel_pch {
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > b/drivers/gpu/drm/i915/intel_drv.h
> > index 3398b28c053b..40ce7a600585 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -2103,6 +2103,7 @@ void intel_psr_short_pulse(struct intel_dp
> > *intel_dp);
> > int intel_psr_wait_for_idle(const struct intel_crtc_state
> > *new_crtc_state,
> > u32 *out_value);
> > bool intel_psr_enabled(struct intel_dp *intel_dp);
> > +void intel_psr_crc_prepare_or_finish(struct drm_i915_private
> > *dev_priv, enum pipe pipe, bool prepare);
> >
> > /* intel_quirks.c */
> > void intel_init_quirks(struct drm_i915_private *dev_priv);
> > diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c
> > b/drivers/gpu/drm/i915/intel_pipe_crc.c
> > index a8554dc4f196..5d8772399f60 100644
> > --- a/drivers/gpu/drm/i915/intel_pipe_crc.c
> > +++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
> > @@ -583,6 +583,14 @@ int intel_crtc_verify_crc_source(struct
> > drm_crtc
> > *crtc, const char *source_name,
> > return -EINVAL;
> > }
> >
> > +static inline void intel_crtc_crc_prepare_or_finish(struct
> > drm_crtc
> > *crtc, bool prepare)
> > +{
> > + struct drm_i915_private *dev_priv = to_i915(crtc->dev);
> > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> > +
> > + intel_psr_crc_prepare_or_finish(dev_priv, intel_crtc->pipe,
> > prepare);
> > +}
> > +
> > int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char
> > *source_name)
> > {
> > struct drm_i915_private *dev_priv = to_i915(crtc->dev);
> > @@ -609,6 +617,8 @@ int intel_crtc_set_crc_source(struct drm_crtc
> > *crtc, const char *source_name)
> > if (ret != 0)
> > goto out;
> >
> > + intel_crtc_crc_prepare_or_finish(crtc, source !=
> > INTEL_PIPE_CRC_SOURCE_NONE);
> > +
> > pipe_crc->source = source;
> > I915_WRITE(PIPE_CRC_CTL(crtc->index), val);
> > POSTING_READ(PIPE_CRC_CTL(crtc->index));
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index 08967836b48e..9c93138988aa 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -577,6 +577,9 @@ static bool intel_psr2_config_valid(struct
> > intel_dp *intel_dp,
> > return false;
> > }
> >
> > + if (dev_priv->psr.pipe_crc_enabled)
> > + return false;
> > +
>
> Disabling PSR instead of switching to PSR1 is safer considering the
> past bug reports with PSR1.
I thought about that but it would break every PSR subtest in
kms_frontbuffer_tracking, I guess is better start by disabling PSR2 and
then discuss about PSR1 if decided to disable, we need to remove PSR1
from kms_frontbuffer_tracking first.
>
> > return true;
> > }
> >
> > @@ -1291,3 +1294,23 @@ bool intel_psr_enabled(struct intel_dp
> > *intel_dp)
> >
> > return ret;
> > }
> > +
> > +void intel_psr_crc_prepare_or_finish(struct drm_i915_private
> > *dev_priv, enum pipe pipe, bool prepare)
> > +{
> > + bool fastset = false;
> > +
> > + if (!CAN_PSR(dev_priv))
> > + return;
> > +
> > + mutex_lock(_priv->psr.lock);
> > +
> > + if (dev_priv->psr.pipe == pipe) {
> > + dev_priv->psr.pipe_crc_enabled = prepare;
>
> .crc_enabled seems like it belongs in crtc_state rather than in the
> global atomic state.
>
> Looks like we could rename and re-purpose
> crtc_state.ips_force_disable
> for this. I don't
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: remove unused bits from Panel Power Sequence State
== Series Details == Series: series starting with [1/2] drm/i915: remove unused bits from Panel Power Sequence State URL : https://patchwork.freedesktop.org/series/57122/ State : success == Summary == CI Bug Log - changes from CI_DRM_5655 -> Patchwork_12293 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/57122/revisions/1/mbox/ Known issues Here are the changes found in Patchwork_12293 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_basic@userptr: - fi-kbl-8809g: PASS -> DMESG-WARN [fdo#108965] * igt@gem_exec_suspend@basic-s4-devices: - fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718] * igt@i915_selftest@live_hangcheck: - fi-kbl-7560u: PASS -> INCOMPLETE [fdo#108044] / [fdo#108744] Possible fixes * igt@i915_module_load@reload-with-fault-injection: - fi-kbl-7567u: DMESG-WARN [fdo#105602] / [fdo#108529] -> PASS +1 * igt@i915_pm_rpm@basic-pci-d3-state: - fi-bsw-kefka: SKIP [fdo#109271] -> PASS * igt@i915_pm_rpm@basic-rte: - fi-bsw-kefka: FAIL [fdo#108800] -> PASS * igt@i915_pm_rpm@module-reload: - fi-kbl-7567u: DMESG-WARN [fdo#108529] -> PASS Warnings * igt@i915_selftest@live_contexts: - fi-icl-u2: INCOMPLETE [fdo#108569] -> DMESG-FAIL [fdo#108569] * igt@kms_chamelium@common-hpd-after-suspend: - fi-kbl-7567u: DMESG-WARN [fdo#103558] / [fdo#105079] / [fdo#105602] -> WARN [fdo#109380] [fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558 [fdo#105079]: https://bugs.freedesktop.org/show_bug.cgi?id=105079 [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#108044]: https://bugs.freedesktop.org/show_bug.cgi?id=108044 [fdo#108529]: https://bugs.freedesktop.org/show_bug.cgi?id=108529 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744 [fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800 [fdo#108965]: https://bugs.freedesktop.org/show_bug.cgi?id=108965 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109380]: https://bugs.freedesktop.org/show_bug.cgi?id=109380 Participating hosts (45 -> 39) -- Missing(6): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-icl-y fi-bdw-samus Build changes - * Linux: CI_DRM_5655 -> Patchwork_12293 CI_DRM_5655: a40729237602fa7454aaf3355ad3058cad5c6ee9 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4853: 8afdfd8fa9ce17043d9105dedca46ad4555fdcdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12293: 4d73919911f45471d1c338ddf5a8bbd69407c154 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 4d73919911f4 drm/i915: don't check internal state in PP_STATUS 1639b1dcfdc7 drm/i915: remove unused bits from Panel Power Sequence State == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12293/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/4] drm/i915: Disable PSR2 while getting pipe CRC
On Wed, 2019-02-13 at 18:02 -0800, José Roberto de Souza wrote:
> As stated in CRC_CTL spec, after PSR entry state CRC will not be
> calculated anymore what is not a problem as IGT tests do some screen
> change and then request the pipe CRC right after the change so PSR
> will go to idle state and only will entry again after at least 6
> idles frames.
>
> But for PSR2 it is more problematic as any change to the screen could
> trigger a selective/partial update causing the CRC value not to be
> calculated over the full frame.
>
> So here it disables PSR2 and keep it disabled while user is
> requesting pipe CRC.
>
> BSpec: 7536
>
> Cc: Dhinakaran Pandiyan
> Cc: Ville Syrjälä
> Signed-off-by: José Roberto de Souza
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> drivers/gpu/drm/i915/intel_pipe_crc.c | 10 ++
> drivers/gpu/drm/i915/intel_psr.c | 23 +++
> 4 files changed, 35 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index 17fe942eaafa..609e9c5bd453 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -520,6 +520,7 @@ struct i915_psr {
> bool sink_not_reliable;
> bool irq_aux_error;
> u16 su_x_granularity;
> + bool pipe_crc_enabled;
> };
>
> enum intel_pch {
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 3398b28c053b..40ce7a600585 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -2103,6 +2103,7 @@ void intel_psr_short_pulse(struct intel_dp
> *intel_dp);
> int intel_psr_wait_for_idle(const struct intel_crtc_state
> *new_crtc_state,
> u32 *out_value);
> bool intel_psr_enabled(struct intel_dp *intel_dp);
> +void intel_psr_crc_prepare_or_finish(struct drm_i915_private
> *dev_priv, enum pipe pipe, bool prepare);
>
> /* intel_quirks.c */
> void intel_init_quirks(struct drm_i915_private *dev_priv);
> diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c
> b/drivers/gpu/drm/i915/intel_pipe_crc.c
> index a8554dc4f196..5d8772399f60 100644
> --- a/drivers/gpu/drm/i915/intel_pipe_crc.c
> +++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
> @@ -583,6 +583,14 @@ int intel_crtc_verify_crc_source(struct drm_crtc
> *crtc, const char *source_name,
> return -EINVAL;
> }
>
> +static inline void intel_crtc_crc_prepare_or_finish(struct drm_crtc
> *crtc, bool prepare)
> +{
> + struct drm_i915_private *dev_priv = to_i915(crtc->dev);
> + struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> +
> + intel_psr_crc_prepare_or_finish(dev_priv, intel_crtc->pipe,
> prepare);
> +}
> +
> int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char
> *source_name)
> {
> struct drm_i915_private *dev_priv = to_i915(crtc->dev);
> @@ -609,6 +617,8 @@ int intel_crtc_set_crc_source(struct drm_crtc
> *crtc, const char *source_name)
> if (ret != 0)
> goto out;
>
> + intel_crtc_crc_prepare_or_finish(crtc, source !=
> INTEL_PIPE_CRC_SOURCE_NONE);
> +
> pipe_crc->source = source;
> I915_WRITE(PIPE_CRC_CTL(crtc->index), val);
> POSTING_READ(PIPE_CRC_CTL(crtc->index));
> diff --git a/drivers/gpu/drm/i915/intel_psr.c
> b/drivers/gpu/drm/i915/intel_psr.c
> index 08967836b48e..9c93138988aa 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -577,6 +577,9 @@ static bool intel_psr2_config_valid(struct
> intel_dp *intel_dp,
> return false;
> }
>
> + if (dev_priv->psr.pipe_crc_enabled)
> + return false;
> +
Disabling PSR instead of switching to PSR1 is safer considering the
past bug reports with PSR1.
> return true;
> }
>
> @@ -1291,3 +1294,23 @@ bool intel_psr_enabled(struct intel_dp
> *intel_dp)
>
> return ret;
> }
> +
> +void intel_psr_crc_prepare_or_finish(struct drm_i915_private
> *dev_priv, enum pipe pipe, bool prepare)
> +{
> + bool fastset = false;
> +
> + if (!CAN_PSR(dev_priv))
> + return;
> +
> + mutex_lock(_priv->psr.lock);
> +
> + if (dev_priv->psr.pipe == pipe) {
> + dev_priv->psr.pipe_crc_enabled = prepare;
.crc_enabled seems like it belongs in crtc_state rather than in the
global atomic state.
Looks like we could rename and re-purpose crtc_state.ips_force_disable
for this. I don't see that flag being used for anything other working
around CRC issues.
> + fastset = !prepare || dev_priv->psr.psr2_enabled;
> + }
> +
> + mutex_unlock(_priv->psr.lock);
> +
> + if (fastset)
> + intel_psr_fastset_force(dev_priv);
> +}
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/4] drm/i915/psr: Only lookup for enabled CRTCs when forcing a fastset
On Fri, 2019-02-22 at 16:33 -0800, Souza, Jose wrote:
> On Fri, 2019-02-22 at 16:27 -0800, Pandiyan, Dhinakaran wrote:
> > On Wed, 2019-02-13 at 18:02 -0800, José Roberto de Souza wrote:
> > > Forcing a specific CRTC to the eDP connector was causing the
> > > intel_psr_fastset_force() to mark mode_chaged in the wrong and
> > > disabled CRTC causing no update in the PSR state.
> > >
> > > Looks like our internal state track do not clear output_types and
> > > has_psr in the disabled CRTCs, not sure if this is the expected
> > > behavior or not but in the mean time this fix the issue.
> >
> > Is there an IGT that's failing because of this? Looks like the
> > state
> > would have got cleared only if the crtc was enabled to drive
> > another
> > encoder.
>
> When PSR2 is enabled by default tests like
> kms_pipe_crc_basic@read-crc-pipe-b are failling even with the patch
> that disable PSR2 when getting CRC.
Thanks!
>
> >
> > > Cc: Maarten Lankhorst
> > > Cc: Dhinakaran Pandiyan
> > > Signed-off-by: José Roberto de Souza
> > > ---
> > > drivers/gpu/drm/i915/intel_psr.c | 3 ++-
> > > 1 file changed, 2 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > > b/drivers/gpu/drm/i915/intel_psr.c
> > > index 75c1a5deebf5..08967836b48e 100644
> > > --- a/drivers/gpu/drm/i915/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > > @@ -986,7 +986,8 @@ static int intel_psr_fastset_force(struct
> > > drm_i915_private *dev_priv)
> > >
> > > intel_crtc_state = to_intel_crtc_state(crtc_state);
> > >
> > > - if (intel_crtc_has_type(intel_crtc_state,
> > > INTEL_OUTPUT_EDP) &&
> > > + if (crtc_state->enable &&
> > > + intel_crtc_has_type(intel_crtc_state,
> > > INTEL_OUTPUT_EDP) &&
> > > intel_crtc_state->has_psr) {
if (crtc_state->enable && intel_crtc_state->has_psr)
should cover all the cases, no?
And also add a WARN() in case we somehow end up with more than once
crtc with the above condition being true.
> > > /* Mark mode as changed to trigger a pipe-
> > > > update() */
> > >
> > > crtc_state->mode_changed = true;
> >
> > I was wondering if we should remove the 'break;' that follows
> > instead
> > and let ->update_pipe take care of the rest. However, checking
> > crtc_state->enable makes sense as there is not much point in
> > triggering
> > a fastset on a disabled crtc.
> >
> > Reviewed-by: Dhinakaran Pandiyan
> >
> > There might be a better way to do this, so please double check with
> > someone :)
> >
___
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915: Disable LP1+ watermarks on Lenovo Thinkpad T431s
== Series Details == Series: series starting with [1/4] drm/i915: Disable LP1+ watermarks on Lenovo Thinkpad T431s URL : https://patchwork.freedesktop.org/series/57101/ State : success == Summary == CI Bug Log - changes from CI_DRM_5654_full -> Patchwork_12284_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12284_full that come from known issues: ### IGT changes ### Issues hit * igt@i915_pm_lpsp@edp-panel-fitter: - shard-iclb: NOTRUN -> SKIP [fdo#109301] * igt@i915_pm_rpm@cursor-dpms: - shard-iclb: PASS -> INCOMPLETE [fdo#108840] * igt@i915_selftest@live_workarounds: - shard-iclb: PASS -> DMESG-FAIL [fdo#108954] * igt@kms_busy@basic-flip-e: - shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] * igt@kms_busy@extended-modeset-hang-oldfb-with-reset-render-f: - shard-kbl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c: - shard-glk: PASS -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-a-crc-sprite-planes-basic: - shard-apl: PASS -> FAIL [fdo#106510] / [fdo#108145] +1 * igt@kms_chamelium@vga-hpd-fast: - shard-iclb: NOTRUN -> SKIP [fdo#109284] * igt@kms_chv_cursor_fail@pipe-c-256x256-bottom-edge: - shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +4 * igt@kms_color@pipe-b-legacy-gamma: - shard-glk: PASS -> FAIL [fdo#104782] * igt@kms_cursor_crc@cursor-128x128-random: - shard-apl: PASS -> FAIL [fdo#103232] +2 * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy: - shard-hsw: PASS -> FAIL [fdo#105767] * igt@kms_fbcon_fbt@fbc: - shard-iclb: PASS -> DMESG-WARN [fdo#109593] * igt@kms_fbcon_fbt@fbc-suspend: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@kms_flip@2x-flip-vs-absolute-wf_vblank: - shard-iclb: NOTRUN -> SKIP [fdo#109274] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: - shard-apl: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-render: - shard-glk: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt: - shard-iclb: NOTRUN -> SKIP [fdo#109280] +2 * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-gtt: - shard-snb: NOTRUN -> SKIP [fdo#109271] +31 * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-gtt: - shard-kbl: NOTRUN -> SKIP [fdo#109271] +27 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff: - shard-iclb: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-fullscreen: - shard-apl: NOTRUN -> SKIP [fdo#109271] +16 * igt@kms_frontbuffer_tracking@psr-suspend: - shard-iclb: PASS -> INCOMPLETE [fdo#106978] / [fdo#107713] * igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb: - shard-apl: NOTRUN -> FAIL [fdo#108145] * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb: - shard-apl: PASS -> FAIL [fdo#108145] * igt@kms_plane_multiple@atomic-pipe-b-tiling-x: - shard-iclb: PASS -> FAIL [fdo#103166] * igt@kms_plane_multiple@atomic-pipe-c-tiling-y: - shard-glk: PASS -> FAIL [fdo#103166] * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: - shard-apl: PASS -> FAIL [fdo#103166] +1 * igt@kms_rotation_crc@multiplane-rotation: - shard-kbl: PASS -> DMESG-FAIL [fdo#105763] * igt@kms_setmode@basic: - shard-kbl: PASS -> FAIL [fdo#99912] * igt@runner@aborted: - shard-iclb: NOTRUN -> FAIL [fdo#109593] Possible fixes * igt@i915_pm_rpm@fences: - shard-iclb: DMESG-WARN [fdo#107724] -> PASS +1 * igt@i915_pm_rpm@modeset-lpsp-stress: - shard-iclb: DMESG-WARN [fdo#108654] -> PASS * igt@kms_busy@extended-pageflip-hang-newfb-render-c: - shard-glk: DMESG-WARN [fdo#107956] -> PASS * igt@kms_flip@flip-vs-expired-vblank: - shard-iclb: FAIL [fdo#105363] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move: - shard-apl: FAIL [fdo#103167] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: FAIL [fdo#103167] -> PASS +5 * igt@kms_plane@plane-position-covered-pipe-c-planes: - shard-apl: FAIL [fdo#103166] -> PASS +1 * igt@kms_plane_multiple@atomic-pipe-b-tiling-yf: - shard-iclb: FAIL [fdo#103166] -> PASS +5 * igt@kms_setmode@basic: - shard-apl: FAIL [fdo#99912] -> PASS * igt@kms_vblank@pipe-b-query-idle-hang: - shard-apl: INCOMPLETE [fdo#103927] -> PASS
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Always sample an active ringbuffer (rev2)
== Series Details == Series: drm/i915/pmu: Always sample an active ringbuffer (rev2) URL : https://patchwork.freedesktop.org/series/57090/ State : success == Summary == CI Bug Log - changes from CI_DRM_5655 -> Patchwork_12292 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/57090/revisions/2/mbox/ Known issues Here are the changes found in Patchwork_12292 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_suspend@basic-s4-devices: - fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718] * igt@kms_busy@basic-flip-a: - fi-kbl-7567u: PASS -> SKIP [fdo#109271] / [fdo#109278] +2 * igt@kms_busy@basic-flip-b: - fi-gdg-551: PASS -> FAIL [fdo#103182] * igt@prime_vgem@basic-fence-flip: - fi-gdg-551: PASS -> DMESG-FAIL [fdo#103182] Possible fixes * igt@i915_module_load@reload-with-fault-injection: - fi-kbl-7567u: DMESG-WARN [fdo#105602] / [fdo#108529] -> PASS +1 * igt@i915_pm_rpm@basic-pci-d3-state: - fi-bsw-kefka: SKIP [fdo#109271] -> PASS * igt@i915_pm_rpm@basic-rte: - fi-bsw-kefka: FAIL [fdo#108800] -> PASS * igt@i915_pm_rpm@module-reload: - fi-kbl-7567u: DMESG-WARN [fdo#108529] -> PASS * igt@kms_chamelium@common-hpd-after-suspend: - fi-kbl-7567u: DMESG-WARN [fdo#103558] / [fdo#105079] / [fdo#105602] -> PASS * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: FAIL [fdo#109485] -> PASS * igt@kms_frontbuffer_tracking@basic: - fi-icl-u3: FAIL [fdo#103167] -> PASS * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c: - fi-kbl-7567u: SKIP [fdo#109271] -> PASS +33 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182 [fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558 [fdo#105079]: https://bugs.freedesktop.org/show_bug.cgi?id=105079 [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#108529]: https://bugs.freedesktop.org/show_bug.cgi?id=108529 [fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485 Participating hosts (45 -> 38) -- Missing(7): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-icl-y fi-bdw-samus Build changes - * Linux: CI_DRM_5655 -> Patchwork_12292 CI_DRM_5655: a40729237602fa7454aaf3355ad3058cad5c6ee9 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4853: 8afdfd8fa9ce17043d9105dedca46ad4555fdcdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12292: af6bc360aba203fe7a13e07f658c8c703a9213b8 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == af6bc360aba2 drm/i915/pmu: Always sample an active ringbuffer == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12292/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t] i915/gem_ctx_switch: Use minimum qlen over all engines and measure switches
Not all engines are created equal, and our weighting ends up favouring
the many faster xCS rings at the expense of RCS. Our qlen estimation
also failed to factor in the context switch overhead, which is a
significant factor for nop batches. So we oversubscribe the number of
batches submitted to RCS and end up waiting for those to complete at the
end of our subtest timeslice.
Signed-off-by: Chris Wilson
Cc: Caz Yokoyama
---
tests/i915/gem_ctx_switch.c | 39 +
1 file changed, 31 insertions(+), 8 deletions(-)
diff --git a/tests/i915/gem_ctx_switch.c b/tests/i915/gem_ctx_switch.c
index 1208cb8d7..87e13b915 100644
--- a/tests/i915/gem_ctx_switch.c
+++ b/tests/i915/gem_ctx_switch.c
@@ -26,6 +26,7 @@
*/
#include "igt.h"
+#include
#include
#include
#include
@@ -58,29 +59,50 @@ static int measure_qlen(int fd,
{
const struct drm_i915_gem_exec_object2 * const obj =
(struct drm_i915_gem_exec_object2
*)(uintptr_t)execbuf->buffers_ptr;
- int qlen = 64;
+ uint32_t ctx[64];
+ int min = INT_MAX, max = 0;
+
+ for (int i = 0; i < ARRAY_SIZE(ctx); i++)
+ ctx[i] = gem_context_create(fd);
for (unsigned int n = 0; n < nengine; n++) {
uint64_t saved = execbuf->flags;
struct timespec tv = {};
+ int q;
execbuf->flags |= engine[n];
- igt_nsec_elapsed();
- for (int loop = 0; loop < qlen; loop++)
+ for (int i = 0; i < ARRAY_SIZE(ctx); i++) {
+ execbuf->rsvd1 = ctx[i];
gem_execbuf(fd, execbuf);
+ }
gem_sync(fd, obj->handle);
- execbuf->flags = saved;
+ igt_nsec_elapsed();
+ for (int i = 0; i < ARRAY_SIZE(ctx); i++) {
+ execbuf->rsvd1 = ctx[i];
+ gem_execbuf(fd, execbuf);
+ }
+ gem_sync(fd, obj->handle);
/*
* Be conservative and aim not to overshoot timeout, so scale
* down by 8 for hopefully a max of 12.5% error.
*/
- qlen = qlen * timeout * 1e9 / igt_nsec_elapsed() / 8 + 1;
+ q = ARRAY_SIZE(ctx) * timeout * 1e9 / igt_nsec_elapsed() / 8
+ 1;
+ if (q < min)
+ min = q;
+ if (q > max)
+ max = q;
+
+ execbuf->flags = saved;
}
- return qlen;
+ for (int i = 0; i < ARRAY_SIZE(ctx); i++)
+ gem_context_destroy(fd, ctx[i]);
+
+ igt_debug("Estimated qlen: {min:%d, max:%d}\n", min, max);
+ return min;
}
static void single(int fd, uint32_t handle,
@@ -259,9 +281,10 @@ static void all(int fd, uint32_t handle, unsigned flags,
int timeout)
clock_gettime(CLOCK_MONOTONIC, );
gem_close(fd, obj[0].handle);
- igt_info("[%d:%d] %s: %'u cycles: %.3fus%s\n",
+ igt_info("[%d:%d] %s: %'u cycles: %.3fus%s
(elapsed: %.3fs)\n",
nctx, child, name[child], count,
elapsed(, )*1e6 / count,
-flags & INTERRUPTIBLE ? "
(interruptible)" : "");
+flags & INTERRUPTIBLE ? "
(interruptible)" : "",
+elapsed(, ));
}
igt_waitchildren();
}
--
2.20.1
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: extract AUX mask assignment to separate function
== Series Details ==
Series: drm/i915: extract AUX mask assignment to separate function
URL : https://patchwork.freedesktop.org/series/57119/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5655 -> Patchwork_12291
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/57119/revisions/1/mbox/
Known issues
Here are the changes found in Patchwork_12291 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718]
* igt@i915_module_load@reload-with-fault-injection:
- fi-bxt-j4205: PASS -> INCOMPLETE [fdo#103927]
* igt@runner@aborted:
- fi-bxt-j4205: NOTRUN -> FAIL [fdo#103927]
Possible fixes
* igt@i915_module_load@reload-with-fault-injection:
- fi-kbl-7567u: DMESG-WARN [fdo#105602] / [fdo#108529] -> PASS +1
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: SKIP [fdo#109271] -> PASS
* igt@i915_pm_rpm@basic-rte:
- fi-bsw-kefka: FAIL [fdo#108800] -> PASS
* igt@i915_pm_rpm@module-reload:
- fi-kbl-7567u: DMESG-WARN [fdo#108529] -> PASS
- {fi-icl-y}: INCOMPLETE [fdo#108840] -> PASS
* igt@i915_selftest@live_execlists:
- fi-apl-guc: INCOMPLETE [fdo#103927] / [fdo#109720] -> PASS
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: FAIL [fdo#109485] -> PASS
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u3: FAIL [fdo#103167] -> PASS
Warnings
* igt@i915_selftest@live_contexts:
- fi-icl-u2: INCOMPLETE [fdo#108569] -> DMESG-FAIL [fdo#108569]
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7567u: DMESG-WARN [fdo#103558] / [fdo#105079] / [fdo#105602]
-> WARN [fdo#109380]
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#105079]: https://bugs.freedesktop.org/show_bug.cgi?id=105079
[fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108529]: https://bugs.freedesktop.org/show_bug.cgi?id=108529
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800
[fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109380]: https://bugs.freedesktop.org/show_bug.cgi?id=109380
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
[fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720
Participating hosts (45 -> 39)
--
Missing(6): fi-kbl-soraka fi-hsw-4770r fi-ilk-m540 fi-byt-squawks
fi-bsw-cyan fi-bdw-samus
Build changes
-
* Linux: CI_DRM_5655 -> Patchwork_12291
CI_DRM_5655: a40729237602fa7454aaf3355ad3058cad5c6ee9 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4853: 8afdfd8fa9ce17043d9105dedca46ad4555fdcdb @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12291: fb0e0e7a4c947920fb79bed3e99333d926891549 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
fb0e0e7a4c94 drm/i915: extract AUX mask assignment to separate function
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12291/
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[Intel-gfx] [PATCH 2/2] drm/i915: don't check internal state in PP_STATUS
Instead of checking the bits that give the internal machine state we can simply rely on the information from the other bits: 1) on or off, 2) transitioning or not. Bit 31 has the "Panel Power On Status" Bits 29:28 has the "Power Sequence Progress" So, wait_panel_on() only needs to wait for bit 31 to indicate it's on and bits 29:28 to indicate there's no transition in progress. From my limited test that includes the cycle delay, so we are safe with only checking those bits, like we do in wait_panel_off(). Admittedly this needs more test, so let CI go through more platforms. Cc: Clint Taylor Cc: Rodrigo Vivi Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/intel_dp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index e1a051c0fbfe..9c16b69043cc 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -2315,8 +2315,8 @@ static void intel_dp_prepare(struct intel_encoder *encoder, } } -#define IDLE_ON_MASK (PP_ON | PP_SEQUENCE_MASK | 0 | PP_SEQUENCE_STATE_MASK) -#define IDLE_ON_VALUE (PP_ON | PP_SEQUENCE_NONE | 0 | PP_SEQUENCE_STATE_ON_IDLE) +#define IDLE_ON_MASK (PP_ON | PP_SEQUENCE_MASK | PP_CYCLE_DELAY_ACTIVE | 0) +#define IDLE_ON_VALUE (PP_ON | PP_SEQUENCE_NONE | 0 | 0) #define IDLE_OFF_MASK (PP_ON | PP_SEQUENCE_MASK | 0 | 0) #define IDLE_OFF_VALUE (0 | PP_SEQUENCE_NONE | 0 | 0) -- 2.20.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/2] drm/i915: remove unused bits from Panel Power Sequence State
No change in behavior. Just removing the unused bits since it makes it
easier to compare them on new platforms and one of them was wrong
(PP_SEQUENCE_STATE_ON_S1_0 vs the supposedly correct name
PP_SEQUENCE_STATE_ON_S1_1)
Cc: Rodrigo Vivi
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_reg.h | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 730bb1917fd1..e855dae978db 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4717,15 +4717,9 @@ enum {
#define PP_SEQUENCE_SHIFT28
#define PP_CYCLE_DELAY_ACTIVE(1 << 27)
#define PP_SEQUENCE_STATE_MASK 0x000f
-#define PP_SEQUENCE_STATE_OFF_IDLE (0x0 << 0)
-#define PP_SEQUENCE_STATE_OFF_S0_1 (0x1 << 0)
-#define PP_SEQUENCE_STATE_OFF_S0_2 (0x2 << 0)
-#define PP_SEQUENCE_STATE_OFF_S0_3 (0x3 << 0)
-#define PP_SEQUENCE_STATE_ON_IDLE(0x8 << 0)
-#define PP_SEQUENCE_STATE_ON_S1_0(0x9 << 0)
-#define PP_SEQUENCE_STATE_ON_S1_2(0xa << 0)
-#define PP_SEQUENCE_STATE_ON_S1_3(0xb << 0)
-#define PP_SEQUENCE_STATE_RESET (0xf << 0)
+#define PP_SEQUENCE_STATE_OFF_IDLE 0x0
+#define PP_SEQUENCE_STATE_ON_IDLE0x8
+#define PP_SEQUENCE_STATE_RESET 0xf
#define _PP_CONTROL0x61204
#define PP_CONTROL(pps_idx)_MMIO_PPS(pps_idx, _PP_CONTROL)
--
2.20.0
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Re: [Intel-gfx] [PATCH v15 04/16] misc/mei/hdcp: Initiate Wired HDCP2.2 Tx Session
Hi Ramalingam, Thank you for the patch! Yet something to improve: [auto build test ERROR on char-misc/char-misc-testing] [also build test ERROR on v5.0-rc4 next-20190222] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Ramalingam-C/drm-i915-Implement-HDCP2-2/20190222-182139 config: x86_64-rhel-7.2 (attached as .config) compiler: gcc-7 (Debian 7.3.0-1) 7.3.0 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 All errors (new ones prefixed by >>): >> drivers/misc/mei/hdcp/mei_hdcp.c:28:10: fatal error: >> drm/i915_mei_hdcp_interface.h: No such file or directory #include ^~~ compilation terminated. vim +28 drivers/misc/mei/hdcp/mei_hdcp.c > 28 #include 29 --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation .config.gz Description: application/gzip ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/4] drm/i915/psr: Only lookup for enabled CRTCs when forcing a fastset
On Fri, 2019-02-22 at 16:27 -0800, Pandiyan, Dhinakaran wrote:
> On Wed, 2019-02-13 at 18:02 -0800, José Roberto de Souza wrote:
> > Forcing a specific CRTC to the eDP connector was causing the
> > intel_psr_fastset_force() to mark mode_chaged in the wrong and
> > disabled CRTC causing no update in the PSR state.
> >
> > Looks like our internal state track do not clear output_types and
> > has_psr in the disabled CRTCs, not sure if this is the expected
> > behavior or not but in the mean time this fix the issue.
>
> Is there an IGT that's failing because of this? Looks like the state
> would have got cleared only if the crtc was enabled to drive another
> encoder.
When PSR2 is enabled by default tests like
kms_pipe_crc_basic@read-crc-pipe-b are failling even with the patch
that disable PSR2 when getting CRC.
>
> > Cc: Maarten Lankhorst
> > Cc: Dhinakaran Pandiyan
> > Signed-off-by: José Roberto de Souza
> > ---
> > drivers/gpu/drm/i915/intel_psr.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index 75c1a5deebf5..08967836b48e 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -986,7 +986,8 @@ static int intel_psr_fastset_force(struct
> > drm_i915_private *dev_priv)
> >
> > intel_crtc_state = to_intel_crtc_state(crtc_state);
> >
> > - if (intel_crtc_has_type(intel_crtc_state,
> > INTEL_OUTPUT_EDP) &&
> > + if (crtc_state->enable &&
> > + intel_crtc_has_type(intel_crtc_state,
> > INTEL_OUTPUT_EDP) &&
> > intel_crtc_state->has_psr) {
> > /* Mark mode as changed to trigger a pipe-
> > > update() */
> > crtc_state->mode_changed = true;
> I was wondering if we should remove the 'break;' that follows instead
> and let ->update_pipe take care of the rest. However, checking
> crtc_state->enable makes sense as there is not much point in
> triggering
> a fastset on a disabled crtc.
>
> Reviewed-by: Dhinakaran Pandiyan
>
> There might be a better way to do this, so please double check with
> someone :)
>
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Re: [Intel-gfx] [PATCH 1/4] drm/i915/psr: Only lookup for enabled CRTCs when forcing a fastset
On Wed, 2019-02-13 at 18:02 -0800, José Roberto de Souza wrote:
> Forcing a specific CRTC to the eDP connector was causing the
> intel_psr_fastset_force() to mark mode_chaged in the wrong and
> disabled CRTC causing no update in the PSR state.
>
> Looks like our internal state track do not clear output_types and
> has_psr in the disabled CRTCs, not sure if this is the expected
> behavior or not but in the mean time this fix the issue.
Is there an IGT that's failing because of this? Looks like the state
would have got cleared only if the crtc was enabled to drive another
encoder.
>
> Cc: Maarten Lankhorst
> Cc: Dhinakaran Pandiyan
> Signed-off-by: José Roberto de Souza
> ---
> drivers/gpu/drm/i915/intel_psr.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_psr.c
> b/drivers/gpu/drm/i915/intel_psr.c
> index 75c1a5deebf5..08967836b48e 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -986,7 +986,8 @@ static int intel_psr_fastset_force(struct
> drm_i915_private *dev_priv)
>
> intel_crtc_state = to_intel_crtc_state(crtc_state);
>
> - if (intel_crtc_has_type(intel_crtc_state,
> INTEL_OUTPUT_EDP) &&
> + if (crtc_state->enable &&
> + intel_crtc_has_type(intel_crtc_state,
> INTEL_OUTPUT_EDP) &&
> intel_crtc_state->has_psr) {
> /* Mark mode as changed to trigger a pipe-
> >update() */
> crtc_state->mode_changed = true;
I was wondering if we should remove the 'break;' that follows instead
and let ->update_pipe take care of the rest. However, checking
crtc_state->enable makes sense as there is not much point in triggering
a fastset on a disabled crtc.
Reviewed-by: Dhinakaran Pandiyan
There might be a better way to do this, so please double check with
someone :)
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Engine relative MMIO
== Series Details == Series: drm/i915: Engine relative MMIO URL : https://patchwork.freedesktop.org/series/57117/ State : failure == Summary == CALLscripts/checksyscalls.sh DESCEND objtool CHK include/generated/compile.h CC [M] drivers/gpu/drm/i915/gvt/mmio_context.o drivers/gpu/drm/i915/gvt/mmio_context.c: In function ‘restore_context_mmio_for_inhibit’: drivers/gpu/drm/i915/gvt/mmio_context.c:202:10: error: implicit declaration of function ‘MI_LOAD_REGISTER_IMM’; did you mean ‘__MI_LOAD_REGISTER_IMM’? [-Werror=implicit-function-declaration] *cs++ = MI_LOAD_REGISTER_IMM(count); ^~~~ __MI_LOAD_REGISTER_IMM cc1: all warnings being treated as errors scripts/Makefile.build:276: recipe for target 'drivers/gpu/drm/i915/gvt/mmio_context.o' failed make[4]: *** [drivers/gpu/drm/i915/gvt/mmio_context.o] Error 1 scripts/Makefile.build:492: recipe for target 'drivers/gpu/drm/i915' failed make[3]: *** [drivers/gpu/drm/i915] Error 2 scripts/Makefile.build:492: recipe for target 'drivers/gpu/drm' failed make[2]: *** [drivers/gpu/drm] Error 2 scripts/Makefile.build:492: recipe for target 'drivers/gpu' failed make[1]: *** [drivers/gpu] Error 2 Makefile:1043: recipe for target 'drivers' failed make: *** [drivers] Error 2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/icl: move MG pll hw_state readout
== Series Details == Series: series starting with [1/3] drm/i915/icl: move MG pll hw_state readout URL : https://patchwork.freedesktop.org/series/57116/ State : success == Summary == CI Bug Log - changes from CI_DRM_5655 -> Patchwork_12289 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/57116/revisions/1/mbox/ Known issues Here are the changes found in Patchwork_12289 that come from known issues: ### IGT changes ### Issues hit * igt@i915_module_load@reload: - fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718] * igt@prime_vgem@basic-fence-flip: - fi-kbl-7500u: PASS -> SKIP [fdo#109271] +33 Possible fixes * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: FAIL [fdo#109485] -> PASS [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485 Participating hosts (45 -> 35) -- Missing(10): fi-kbl-soraka fi-kbl-7567u fi-ilk-m540 fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-kbl-guc fi-gdg-551 fi-ivb-3770 fi-bdw-samus Build changes - * Linux: CI_DRM_5655 -> Patchwork_12289 CI_DRM_5655: a40729237602fa7454aaf3355ad3058cad5c6ee9 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4853: 8afdfd8fa9ce17043d9105dedca46ad4555fdcdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12289: 733d58810b2834d707806c3298348907ac6562ca @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 733d58810b28 drm/i915/icl: decouple dpll ids from type 0f1e84d98acc drm/i915: introduce platform_flags to use with dpll hooks 76aed92c6a4a drm/i915/icl: move MG pll hw_state readout == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12289/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: extract AUX mask assignment to separate function
On Fri, 2019-02-22 at 15:59 -0800, Lucas De Marchi wrote:
> No change in behavior, this only allows to more easily follow the
> flow
> of gen8_de_irq_handler without the mask assignments for each
> platform.
> This also re-organizes the branches a little bit, so the one-off case
> for CNL_WITH_PORT_F is separate from the generic gen >= 11.
Reviewed-by: José Roberto de Souza
>
> Cc: Ville Syrjälä
> Cc: Jose Souza
> Signed-off-by: Lucas De Marchi
> ---
> drivers/gpu/drm/i915/i915_irq.c | 34 +++--
>
> 1 file changed, 20 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c
> b/drivers/gpu/drm/i915/i915_irq.c
> index 7c7e84e86c6a..524caf168a01 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2676,6 +2676,25 @@ static void gen11_hpd_irq_handler(struct
> drm_i915_private *dev_priv, u32 iir)
> DRM_ERROR("Unexpected DE HPD interrupt 0x%08x\n", iir);
> }
>
> +static u32 de_port_iir_aux_mask(struct drm_i915_private *dev_priv)
> +{
> + u32 mask = GEN8_AUX_CHANNEL_A;
> +
> + if (INTEL_GEN(dev_priv) >= 9)
> + mask |= GEN9_AUX_CHANNEL_B |
> + GEN9_AUX_CHANNEL_C |
> + GEN9_AUX_CHANNEL_D;
> +
> + if (IS_CNL_WITH_PORT_F(dev_priv))
> + mask |= CNL_AUX_CHANNEL_F;
> +
> + if (INTEL_GEN(dev_priv) >= 11)
> + mask |= ICL_AUX_CHANNEL_E |
> + CNL_AUX_CHANNEL_F;
> +
> + return mask;
> +}
> +
> static irqreturn_t
> gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32
> master_ctl)
> {
> @@ -2731,20 +2750,7 @@ gen8_de_irq_handler(struct drm_i915_private
> *dev_priv, u32 master_ctl)
> I915_WRITE(GEN8_DE_PORT_IIR, iir);
> ret = IRQ_HANDLED;
>
> - tmp_mask = GEN8_AUX_CHANNEL_A;
> - if (INTEL_GEN(dev_priv) >= 9)
> - tmp_mask |= GEN9_AUX_CHANNEL_B |
> - GEN9_AUX_CHANNEL_C |
> - GEN9_AUX_CHANNEL_D;
> -
> - if (INTEL_GEN(dev_priv) >= 11)
> - tmp_mask |= ICL_AUX_CHANNEL_E;
> -
> - if (IS_CNL_WITH_PORT_F(dev_priv) ||
> - INTEL_GEN(dev_priv) >= 11)
> - tmp_mask |= CNL_AUX_CHANNEL_F;
> -
> - if (iir & tmp_mask) {
> + if (iir & de_port_iir_aux_mask(dev_priv)) {
> dp_aux_irq_handler(dev_priv);
> found = true;
> }
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[Intel-gfx] [PATCH] drm/i915/pmu: Always sample an active ringbuffer
As we no longer have a precise indication of requests queued to an
engine, make no presumptions and just sample the ring registers to see
if the engine is busy.
v2: Report busy while the ring is idling on a semaphore/event.
v3: Give the struct a name!
v4: Always 0 outside the powerwell; trusting the powerwell is
accurate enough for our sampling pmu.
v5: Protect against gen7 mmio madness and try to improve grammar
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Cc: Mika Kuoppala
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_pmu.c | 65 +++--
drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +-
2 files changed, 29 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 13d70b90dd0f..6560c356f279 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -148,14 +148,6 @@ void i915_pmu_gt_unparked(struct drm_i915_private *i915)
spin_unlock_irq(>pmu.lock);
}
-static bool grab_forcewake(struct drm_i915_private *i915, bool fw)
-{
- if (!fw)
- intel_uncore_forcewake_get(i915, FORCEWAKE_ALL);
-
- return true;
-}
-
static void
add_sample(struct i915_pmu_sample *sample, u32 val)
{
@@ -168,49 +160,48 @@ engines_sample(struct drm_i915_private *dev_priv,
unsigned int period_ns)
struct intel_engine_cs *engine;
enum intel_engine_id id;
intel_wakeref_t wakeref;
- bool fw = false;
+ unsigned long flags;
if ((dev_priv->pmu.enable & ENGINE_SAMPLE_MASK) == 0)
return;
- if (!dev_priv->gt.awake)
- return;
-
- wakeref = intel_runtime_pm_get_if_in_use(dev_priv);
+ wakeref = 0;
+ if (READ_ONCE(dev_priv->gt.awake))
+ wakeref = intel_runtime_pm_get_if_in_use(dev_priv);
if (!wakeref)
return;
+ spin_lock_irqsave(_priv->uncore.lock, flags);
for_each_engine(engine, dev_priv, id) {
- u32 current_seqno = intel_engine_get_seqno(engine);
- u32 last_seqno = intel_engine_last_submit(engine);
+ struct intel_engine_pmu *pmu = >pmu;
+ bool busy;
u32 val;
- val = !i915_seqno_passed(current_seqno, last_seqno);
-
- if (val)
- add_sample(>pmu.sample[I915_SAMPLE_BUSY],
- period_ns);
-
- if (val && (engine->pmu.enable &
- (BIT(I915_SAMPLE_WAIT) | BIT(I915_SAMPLE_SEMA {
- fw = grab_forcewake(dev_priv, fw);
-
- val = I915_READ_FW(RING_CTL(engine->mmio_base));
- } else {
- val = 0;
- }
+ val = I915_READ_FW(RING_CTL(engine->mmio_base));
+ if (val == 0) /* powerwell off => engine idle */
+ continue;
if (val & RING_WAIT)
- add_sample(>pmu.sample[I915_SAMPLE_WAIT],
- period_ns);
-
+ add_sample(>sample[I915_SAMPLE_WAIT], period_ns);
if (val & RING_WAIT_SEMAPHORE)
- add_sample(>pmu.sample[I915_SAMPLE_SEMA],
- period_ns);
- }
+ add_sample(>sample[I915_SAMPLE_SEMA], period_ns);
- if (fw)
- intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
+ /*
+* While waiting on a semaphore or event, MI_MODE reports the
+* ring as idle. However, previously using the seqno, and with
+* execlists sampling, we account for the ring waiting as the
+* engine being busy. Therefore, we record the sample as being
+* busy if either waiting or !idle.
+*/
+ busy = val & (RING_WAIT_SEMAPHORE | RING_WAIT);
+ if (!busy) {
+ val = I915_READ_FW(RING_MI_MODE(engine->mmio_base));
+ busy = !(val & MODE_IDLE);
+ }
+ if (busy)
+ add_sample(>sample[I915_SAMPLE_BUSY], period_ns);
+ }
+ spin_unlock_irqrestore(_priv->uncore.lock, flags);
intel_runtime_pm_put(dev_priv, wakeref);
}
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 710ffb221775..5d45ad4ecca9 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -392,7 +392,7 @@ struct intel_engine_cs {
bool irq_armed;
} breadcrumbs;
- struct {
+ struct intel_engine_pmu {
/**
* @enable: Bitmask of enable sample events on this engine.
*
--
2.20.1
___
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[Intel-gfx] [PATCH] drm/i915: extract AUX mask assignment to separate function
No change in behavior, this only allows to more easily follow the flow
of gen8_de_irq_handler without the mask assignments for each platform.
This also re-organizes the branches a little bit, so the one-off case
for CNL_WITH_PORT_F is separate from the generic gen >= 11.
Cc: Ville Syrjälä
Cc: Jose Souza
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_irq.c | 34 +++--
1 file changed, 20 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7c7e84e86c6a..524caf168a01 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2676,6 +2676,25 @@ static void gen11_hpd_irq_handler(struct
drm_i915_private *dev_priv, u32 iir)
DRM_ERROR("Unexpected DE HPD interrupt 0x%08x\n", iir);
}
+static u32 de_port_iir_aux_mask(struct drm_i915_private *dev_priv)
+{
+ u32 mask = GEN8_AUX_CHANNEL_A;
+
+ if (INTEL_GEN(dev_priv) >= 9)
+ mask |= GEN9_AUX_CHANNEL_B |
+ GEN9_AUX_CHANNEL_C |
+ GEN9_AUX_CHANNEL_D;
+
+ if (IS_CNL_WITH_PORT_F(dev_priv))
+ mask |= CNL_AUX_CHANNEL_F;
+
+ if (INTEL_GEN(dev_priv) >= 11)
+ mask |= ICL_AUX_CHANNEL_E |
+ CNL_AUX_CHANNEL_F;
+
+ return mask;
+}
+
static irqreturn_t
gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
{
@@ -2731,20 +2750,7 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv,
u32 master_ctl)
I915_WRITE(GEN8_DE_PORT_IIR, iir);
ret = IRQ_HANDLED;
- tmp_mask = GEN8_AUX_CHANNEL_A;
- if (INTEL_GEN(dev_priv) >= 9)
- tmp_mask |= GEN9_AUX_CHANNEL_B |
- GEN9_AUX_CHANNEL_C |
- GEN9_AUX_CHANNEL_D;
-
- if (INTEL_GEN(dev_priv) >= 11)
- tmp_mask |= ICL_AUX_CHANNEL_E;
-
- if (IS_CNL_WITH_PORT_F(dev_priv) ||
- INTEL_GEN(dev_priv) >= 11)
- tmp_mask |= CNL_AUX_CHANNEL_F;
-
- if (iir & tmp_mask) {
+ if (iir & de_port_iir_aux_mask(dev_priv)) {
dp_aux_irq_handler(dev_priv);
found = true;
}
--
2.20.0
___
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Re: [Intel-gfx] [PATCH] drm/i915: Engine relative MMIO
Quoting john.c.harri...@intel.com (2019-02-22 23:49:18) > From: John Harrison > > With virtual engines, it is no longer possible to know which specific > physical engine a given request will be executed on at the time that > request is generated. This means that the request itself must be engine > agnostic - any direct register writes must be relative to the engine > and not absolute addresses. > > The LRI command has support for engine relative addressing. However, > the mechanism is not transparent to the driver. The scheme for Gen11 > (MI_LRI_ADD_CS_MMIO_START) requires the LRI address to have no > absolute engine base component. The hardware then adds on the correct > engine offset at execution time. > > Due to the non-trivial and differing schemes on different hardware, it > is not possible to simply update the code that creates the LRI > commands to set a remap flag and let the hardware get on with it. > Instead, this patch adds function wrappers for generating the LRI > command itself and then for constructing the correct address to use > with the LRI. But the flags isn't compulsory? So why so many changes to unaffected code? -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/pmu: Always sample an active ringbuffer
== Series Details == Series: drm/i915/pmu: Always sample an active ringbuffer URL : https://patchwork.freedesktop.org/series/57090/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5654_full -> Patchwork_12283_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_12283_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_12283_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_12283_full: ### IGT changes ### Possible regressions * igt@perf_pmu@busy-bcs0: - shard-snb: NOTRUN -> DMESG-WARN * igt@perf_pmu@busy-check-all-vcs0: - shard-snb: PASS -> DMESG-WARN +24 * igt@perf_pmu@busy-idle-no-semaphores-vcs1: - shard-kbl: NOTRUN -> DMESG-WARN +1 * igt@perf_pmu@busy-no-semaphores-rcs0: - shard-iclb: PASS -> DMESG-WARN +10 - shard-glk: PASS -> DMESG-WARN +11 * igt@perf_pmu@busy-no-semaphores-vcs0: - shard-apl: PASS -> DMESG-WARN +11 * igt@perf_pmu@busy-no-semaphores-vecs0: - shard-kbl: PASS -> DMESG-WARN +12 * igt@perf_pmu@most-busy-check-all-bcs0: - shard-hsw: PASS -> DMESG-WARN +32 * igt@runner@aborted: - shard-hsw: NOTRUN -> ( 33 FAIL ) - shard-snb: NOTRUN -> ( 26 FAIL ) - shard-kbl: NOTRUN -> ( 15 FAIL ) - shard-iclb: NOTRUN -> ( 12 FAIL ) [fdo#109593] - shard-apl: NOTRUN -> ( 12 FAIL ) Known issues Here are the changes found in Patchwork_12283_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_parse@oacontrol-tracking: - shard-kbl: NOTRUN -> SKIP [fdo#109271] +10 * igt@gem_largeobject: - shard-hsw: PASS -> INCOMPLETE [fdo#103540] * igt@i915_pm_lpsp@edp-panel-fitter: - shard-iclb: NOTRUN -> SKIP [fdo#109301] * igt@i915_pm_rpm@reg-read-ioctl: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +2 * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c: - shard-glk: PASS -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-a-crc-sprite-planes-basic: - shard-glk: PASS -> FAIL [fdo#108145] * igt@kms_chamelium@vga-hpd-fast: - shard-iclb: NOTRUN -> SKIP [fdo#109284] * igt@kms_chv_cursor_fail@pipe-c-256x256-bottom-edge: - shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1 * igt@kms_content_protection@legacy: - shard-kbl: NOTRUN -> FAIL [fdo#108597] / [fdo#108739] * igt@kms_cursor_crc@cursor-256x256-dpms: - shard-apl: PASS -> FAIL [fdo#103232] +4 * igt@kms_fbcon_fbt@fbc: - shard-iclb: PASS -> DMESG-WARN [fdo#109593] * igt@kms_flip@2x-flip-vs-absolute-wf_vblank: - shard-iclb: NOTRUN -> SKIP [fdo#109274] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: - shard-glk: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: - shard-apl: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt: - shard-iclb: NOTRUN -> SKIP [fdo#109280] +2 * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-gtt: - shard-snb: NOTRUN -> SKIP [fdo#109271] +16 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt: - shard-iclb: PASS -> FAIL [fdo#103167] +1 * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb: - shard-apl: PASS -> FAIL [fdo#108145] * igt@kms_plane_multiple@atomic-pipe-b-tiling-yf: - shard-glk: PASS -> FAIL [fdo#103166] * igt@kms_plane_multiple@atomic-pipe-c-tiling-none: - shard-iclb: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: - shard-apl: PASS -> FAIL [fdo#103166] * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom: - shard-kbl: PASS -> DMESG-FAIL [fdo#105763] * igt@kms_setmode@basic: - shard-kbl: PASS -> FAIL [fdo#99912] Possible fixes * igt@i915_pm_rpm@fences: - shard-iclb: DMESG-WARN [fdo#107724] -> PASS +1 * igt@i915_pm_rpm@modeset-lpsp-stress: - shard-iclb: DMESG-WARN [fdo#108654] -> PASS * igt@kms_flip@flip-vs-expired-vblank: - shard-iclb: FAIL [fdo#105363] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: - shard-apl: FAIL [fdo#103167] -> PASS +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: - shard-glk: FAIL
[Intel-gfx] [PATCH] drm/i915: Engine relative MMIO
From: John Harrison
With virtual engines, it is no longer possible to know which specific
physical engine a given request will be executed on at the time that
request is generated. This means that the request itself must be engine
agnostic - any direct register writes must be relative to the engine
and not absolute addresses.
The LRI command has support for engine relative addressing. However,
the mechanism is not transparent to the driver. The scheme for Gen11
(MI_LRI_ADD_CS_MMIO_START) requires the LRI address to have no
absolute engine base component. The hardware then adds on the correct
engine offset at execution time.
Due to the non-trivial and differing schemes on different hardware, it
is not possible to simply update the code that creates the LRI
commands to set a remap flag and let the hardware get on with it.
Instead, this patch adds function wrappers for generating the LRI
command itself and then for constructing the correct address to use
with the LRI.
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 4 +-
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 4 +-
drivers/gpu/drm/i915/i915_perf.c | 19 ---
drivers/gpu/drm/i915/intel_engine_cs.c | 11
drivers/gpu/drm/i915/intel_gpu_commands.h | 6 ++-
drivers/gpu/drm/i915/intel_lrc.c | 80 --
drivers/gpu/drm/i915/intel_lrc_reg.h | 4 +-
drivers/gpu/drm/i915/intel_mocs.c | 17 ---
drivers/gpu/drm/i915/intel_ringbuffer.c| 46 ++---
drivers/gpu/drm/i915/intel_ringbuffer.h| 5 ++
drivers/gpu/drm/i915/intel_workarounds.c | 4 +-
11 files changed, 133 insertions(+), 67 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c
b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 33e8eed64423..9794a99d56a7 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -220,7 +220,7 @@ static const struct drm_i915_cmd_descriptor common_cmds[] =
{
CMD( MI_SUSPEND_FLUSH, SMI,F, 1, S ),
CMD( MI_SEMAPHORE_MBOX,SMI, !F, 0xFF, R ),
CMD( MI_STORE_DWORD_INDEX, SMI, !F, 0xFF, R ),
- CMD( MI_LOAD_REGISTER_IMM(1), SMI, !F, 0xFF, W,
+ CMD( __MI_LOAD_REGISTER_IMM(1),SMI, !F, 0xFF, W,
.reg = { .offset = 1, .mask = 0x007C, .step = 2 }),
CMD( MI_STORE_REGISTER_MEM,SMI,F, 3, W | B,
.reg = { .offset = 1, .mask = 0x007C },
@@ -1182,7 +1182,7 @@ static bool check_cmd(const struct intel_engine_cs
*engine,
return false;
}
- if (desc->cmd.value == MI_LOAD_REGISTER_IMM(1)
&&
+ if (desc->cmd.value ==
__MI_LOAD_REGISTER_IMM(1) &&
(offset + 2 > length ||
(cmd[offset + 1] & reg->mask) !=
reg->value)) {
DRM_DEBUG_DRIVER("CMD: Rejected LRI to
masked register 0x%08X\n",
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 02adcaf6ebea..052ea1663c15 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1966,9 +1966,9 @@ static int i915_reset_gen7_sol_offsets(struct
i915_request *rq)
if (IS_ERR(cs))
return PTR_ERR(cs);
- *cs++ = MI_LOAD_REGISTER_IMM(4);
+ *cs++ = i915_get_lri_cmd(rq->engine, 4, 0);
for (i = 0; i < 4; i++) {
- *cs++ = i915_mmio_reg_offset(GEN7_SO_WRITE_OFFSET(i));
+ *cs++ = i915_get_lri_reg(rq->engine, GEN7_SO_WRITE_OFFSET(i));
*cs++ = 0;
}
*cs++ = MI_NOOP;
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 9ebf99f3d8d3..6b5a574a4c99 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -1629,7 +1629,8 @@ static void hsw_disable_metric_set(struct
drm_i915_private *dev_priv)
* It's fine to put out-of-date values into these per-context registers
* in the case that the OA unit has been disabled.
*/
-static void gen8_update_reg_state_unlocked(struct i915_gem_context *ctx,
+static void gen8_update_reg_state_unlocked(struct intel_engine_cs *engine,
+ struct i915_gem_context *ctx,
u32 *reg_state,
const struct i915_oa_config
*oa_config)
{
@@ -1648,7 +1649,12 @@ static void gen8_update_reg_state_unlocked(struct
i915_gem_context *ctx,
};
int i;
- CTX_REG(reg_state, ctx_oactxctrl, GEN8_OACTXCONTROL,
+ /*
+* NB: The LRI instruction is generated by the hardware.
+* Should we read it in and check
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: refactor transcoders reporting on error state
== Series Details ==
Series: series starting with [1/2] drm/i915: refactor transcoders reporting on
error state
URL : https://patchwork.freedesktop.org/series/57113/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5655 -> Patchwork_12288
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/57113/revisions/1/mbox/
Known issues
Here are the changes found in Patchwork_12288 that come from known issues:
### IGT changes ###
Possible fixes
* igt@i915_module_load@reload-with-fault-injection:
- fi-kbl-7567u: DMESG-WARN [fdo#105602] / [fdo#108529] -> PASS +1
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: SKIP [fdo#109271] -> PASS
* igt@i915_pm_rpm@basic-rte:
- fi-bsw-kefka: FAIL [fdo#108800] -> PASS
* igt@i915_pm_rpm@module-reload:
- fi-kbl-7567u: DMESG-WARN [fdo#108529] -> PASS
- {fi-icl-y}: INCOMPLETE [fdo#108840] -> PASS
* igt@i915_selftest@live_execlists:
- fi-apl-guc: INCOMPLETE [fdo#103927] / [fdo#109720] -> PASS
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7567u: DMESG-WARN [fdo#103558] / [fdo#105079] / [fdo#105602]
-> PASS
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c:
- fi-kbl-7567u: SKIP [fdo#109271] -> PASS +33
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#105079]: https://bugs.freedesktop.org/show_bug.cgi?id=105079
[fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
[fdo#108529]: https://bugs.freedesktop.org/show_bug.cgi?id=108529
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800
[fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720
Participating hosts (45 -> 37)
--
Missing(8): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-icl-u2
fi-bsw-cyan fi-kbl-7500u fi-icl-u3 fi-bdw-samus
Build changes
-
* Linux: CI_DRM_5655 -> Patchwork_12288
CI_DRM_5655: a40729237602fa7454aaf3355ad3058cad5c6ee9 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4853: 8afdfd8fa9ce17043d9105dedca46ad4555fdcdb @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12288: 0dd90fb387a3fd48103ec35fe3cda76d753964d7 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
0dd90fb387a3 drm/i915: allow platforms without eDP transcoder
65bca16d2f9b drm/i915: refactor transcoders reporting on error state
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12288/
___
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: refactor transcoders reporting on error state
== Series Details == Series: series starting with [1/2] drm/i915: refactor transcoders reporting on error state URL : https://patchwork.freedesktop.org/series/57113/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: refactor transcoders reporting on error state Okay! Commit: drm/i915: allow platforms without eDP transcoder -drivers/gpu/drm/i915/selftests/../i915_drv.h:3581:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3582:16: warning: expression using sizeof(void) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/3] drm/i915/icl: move MG pll hw_state readout
Let the MG plls have their own hooks since it shares very little with
other PLL types. It's also better so the platform info contains the info
if the PLL is for MG PHY rather than relying on the PLL ids.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 122 --
1 file changed, 74 insertions(+), 48 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 0a42d11c4c33..e4ec73d415d9 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -2966,6 +2966,68 @@ static i915_reg_t icl_pll_id_to_enable_reg(enum
intel_dpll_id id)
return MG_PLL_ENABLE(icl_pll_id_to_tc_port(id));
}
+static bool mg_pll_get_hw_state(struct drm_i915_private *dev_priv,
+ struct intel_shared_dpll *pll,
+ struct intel_dpll_hw_state *hw_state)
+{
+ const enum intel_dpll_id id = pll->info->id;
+ enum tc_port tc_port = icl_pll_id_to_tc_port(id);
+ intel_wakeref_t wakeref;
+ bool ret = false;
+ u32 val;
+
+ wakeref = intel_display_power_get_if_enabled(dev_priv,
+POWER_DOMAIN_PLLS);
+ if (!wakeref)
+ return false;
+
+ val = I915_READ(MG_PLL_ENABLE(tc_port));
+ if (!(val & PLL_ENABLE))
+ goto out;
+
+ hw_state->mg_refclkin_ctl = I915_READ(MG_REFCLKIN_CTL(tc_port));
+ hw_state->mg_refclkin_ctl &= MG_REFCLKIN_CTL_OD_2_MUX_MASK;
+
+ hw_state->mg_clktop2_coreclkctl1 =
+ I915_READ(MG_CLKTOP2_CORECLKCTL1(tc_port));
+ hw_state->mg_clktop2_coreclkctl1 &=
+ MG_CLKTOP2_CORECLKCTL1_A_DIVRATIO_MASK;
+
+ hw_state->mg_clktop2_hsclkctl =
+ I915_READ(MG_CLKTOP2_HSCLKCTL(tc_port));
+ hw_state->mg_clktop2_hsclkctl &=
+ MG_CLKTOP2_HSCLKCTL_TLINEDRV_CLKSEL_MASK |
+ MG_CLKTOP2_HSCLKCTL_CORE_INPUTSEL_MASK |
+ MG_CLKTOP2_HSCLKCTL_HSDIV_RATIO_MASK |
+ MG_CLKTOP2_HSCLKCTL_DSDIV_RATIO_MASK;
+
+ hw_state->mg_pll_div0 = I915_READ(MG_PLL_DIV0(tc_port));
+ hw_state->mg_pll_div1 = I915_READ(MG_PLL_DIV1(tc_port));
+ hw_state->mg_pll_lf = I915_READ(MG_PLL_LF(tc_port));
+ hw_state->mg_pll_frac_lock = I915_READ(MG_PLL_FRAC_LOCK(tc_port));
+ hw_state->mg_pll_ssc = I915_READ(MG_PLL_SSC(tc_port));
+
+ hw_state->mg_pll_bias = I915_READ(MG_PLL_BIAS(tc_port));
+ hw_state->mg_pll_tdc_coldst_bias =
+ I915_READ(MG_PLL_TDC_COLDST_BIAS(tc_port));
+
+ if (dev_priv->cdclk.hw.ref == 38400) {
+ hw_state->mg_pll_tdc_coldst_bias_mask =
MG_PLL_TDC_COLDST_COLDSTART;
+ hw_state->mg_pll_bias_mask = 0;
+ } else {
+ hw_state->mg_pll_tdc_coldst_bias_mask = -1U;
+ hw_state->mg_pll_bias_mask = -1U;
+ }
+
+ hw_state->mg_pll_tdc_coldst_bias &=
hw_state->mg_pll_tdc_coldst_bias_mask;
+ hw_state->mg_pll_bias &= hw_state->mg_pll_bias_mask;
+
+ ret = true;
+out:
+ intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS, wakeref);
+ return ret;
+}
+
static bool icl_pll_get_hw_state(struct drm_i915_private *dev_priv,
struct intel_shared_dpll *pll,
struct intel_dpll_hw_state *hw_state)
@@ -2984,50 +3046,8 @@ static bool icl_pll_get_hw_state(struct drm_i915_private
*dev_priv,
if (!(val & PLL_ENABLE))
goto out;
- if (intel_dpll_is_combophy(id) ||
- id == DPLL_ID_ICL_TBTPLL) {
- hw_state->cfgcr0 = I915_READ(ICL_DPLL_CFGCR0(id));
- hw_state->cfgcr1 = I915_READ(ICL_DPLL_CFGCR1(id));
- } else {
- enum tc_port tc_port = icl_pll_id_to_tc_port(id);
-
- hw_state->mg_refclkin_ctl = I915_READ(MG_REFCLKIN_CTL(tc_port));
- hw_state->mg_refclkin_ctl &= MG_REFCLKIN_CTL_OD_2_MUX_MASK;
-
- hw_state->mg_clktop2_coreclkctl1 =
- I915_READ(MG_CLKTOP2_CORECLKCTL1(tc_port));
- hw_state->mg_clktop2_coreclkctl1 &=
- MG_CLKTOP2_CORECLKCTL1_A_DIVRATIO_MASK;
-
- hw_state->mg_clktop2_hsclkctl =
- I915_READ(MG_CLKTOP2_HSCLKCTL(tc_port));
- hw_state->mg_clktop2_hsclkctl &=
- MG_CLKTOP2_HSCLKCTL_TLINEDRV_CLKSEL_MASK |
- MG_CLKTOP2_HSCLKCTL_CORE_INPUTSEL_MASK |
- MG_CLKTOP2_HSCLKCTL_HSDIV_RATIO_MASK |
- MG_CLKTOP2_HSCLKCTL_DSDIV_RATIO_MASK;
-
- hw_state->mg_pll_div0 = I915_READ(MG_PLL_DIV0(tc_port));
- hw_state->mg_pll_div1 = I915_READ(MG_PLL_DIV1(tc_port));
- hw_state->mg_pll_lf = I915_READ(MG_PLL_LF(tc_port));
- hw_state->mg_pll_frac_lock =
[Intel-gfx] [PATCH 3/3] drm/i915/icl: decouple dpll ids from type
Use the first 3 bits of dpll_info.platform_flags to mark the type of the
PLL instead of relying on the IDs. This is more future proof for
allowing the same set of functions to be reused, even if the IDs change.
The warning about PLL id not corresponding to a combo phy in intel_display
was removed as I don't think it should ever trigger.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_display.c | 3 --
drivers/gpu/drm/i915/intel_dpll_mgr.c | 54 +--
drivers/gpu/drm/i915/intel_dpll_mgr.h | 1 -
3 files changed, 35 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b1d63c32ca94..a2be35118dd5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9592,9 +9592,6 @@ static void icelake_get_ddi_pll(struct drm_i915_private
*dev_priv,
temp = I915_READ(DPCLKA_CFGCR0_ICL) &
DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port);
id = temp >> DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(port);
-
- if (WARN_ON(!intel_dpll_is_combophy(id)))
- return;
} else if (intel_port_is_tc(dev_priv, port)) {
id = icl_tc_port_to_pll_id(intel_port_to_tc(dev_priv, port));
} else {
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index e4ec73d415d9..cdb4463bab5d 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -2639,6 +2639,13 @@ int icl_calc_dp_combo_pll_link(struct drm_i915_private
*dev_priv,
return link_clock;
}
+enum icl_dpll_flags {
+ ICL_DPLL_TYPE_COMBOPHY,
+ ICL_DPLL_TYPE_TBT,
+ ICL_DPLL_TYPE_MG,
+ _ICL_DPLL_TYPE_MASK = 0x7,
+};
+
static enum tc_port icl_pll_id_to_tc_port(enum intel_dpll_id id)
{
return id - DPLL_ID_ICL_MGPLL1;
@@ -2649,9 +2656,9 @@ enum intel_dpll_id icl_tc_port_to_pll_id(enum tc_port
tc_port)
return tc_port + DPLL_ID_ICL_MGPLL1;
}
-bool intel_dpll_is_combophy(enum intel_dpll_id id)
+static enum icl_dpll_flags icl_dpll_type(const struct dpll_info *info)
{
- return id == DPLL_ID_ICL_DPLL0 || id == DPLL_ID_ICL_DPLL1;
+ return info->platform_flags & _ICL_DPLL_TYPE_MASK;
}
static bool icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc,
@@ -2956,14 +2963,22 @@ icl_get_dpll(struct intel_crtc *crtc, struct
intel_crtc_state *crtc_state,
return pll;
}
-static i915_reg_t icl_pll_id_to_enable_reg(enum intel_dpll_id id)
+static i915_reg_t
+icl_pll_info_to_enable_reg(const struct dpll_info *info)
{
- if (intel_dpll_is_combophy(id))
- return CNL_DPLL_ENABLE(id);
- else if (id == DPLL_ID_ICL_TBTPLL)
- return TBT_PLL_ENABLE;
+ enum icl_dpll_flags type = icl_dpll_type(info);
- return MG_PLL_ENABLE(icl_pll_id_to_tc_port(id));
+ switch (type) {
+ case ICL_DPLL_TYPE_COMBOPHY:
+ return CNL_DPLL_ENABLE(info->id);
+ case ICL_DPLL_TYPE_TBT:
+ return TBT_PLL_ENABLE;
+ case ICL_DPLL_TYPE_MG:
+ return MG_PLL_ENABLE(icl_pll_id_to_tc_port(info->id));
+ default:
+ MISSING_CASE(type);
+ return CNL_DPLL_ENABLE(info->id);
+ }
}
static bool mg_pll_get_hw_state(struct drm_i915_private *dev_priv,
@@ -3042,7 +3057,7 @@ static bool icl_pll_get_hw_state(struct drm_i915_private
*dev_priv,
if (!wakeref)
return false;
- val = I915_READ(icl_pll_id_to_enable_reg(id));
+ val = I915_READ(icl_pll_info_to_enable_reg(pll->info));
if (!(val & PLL_ENABLE))
goto out;
@@ -3120,7 +3135,8 @@ static void icl_pll_enable(struct drm_i915_private
*dev_priv,
struct intel_shared_dpll *pll)
{
const enum intel_dpll_id id = pll->info->id;
- i915_reg_t enable_reg = icl_pll_id_to_enable_reg(id);
+ enum icl_dpll_flags type = icl_dpll_type(pll->info);
+ i915_reg_t enable_reg = icl_pll_info_to_enable_reg(pll->info);
u32 val;
val = I915_READ(enable_reg);
@@ -3135,7 +3151,7 @@ static void icl_pll_enable(struct drm_i915_private
*dev_priv,
PLL_POWER_STATE, 1))
DRM_ERROR("PLL %d Power not enabled\n", id);
- if (intel_dpll_is_combophy(id) || id == DPLL_ID_ICL_TBTPLL)
+ if (type == ICL_DPLL_TYPE_COMBOPHY || type == ICL_DPLL_TYPE_TBT)
icl_dpll_write(dev_priv, pll);
else
icl_mg_pll_write(dev_priv, pll);
@@ -3161,7 +3177,7 @@ static void icl_pll_disable(struct drm_i915_private
*dev_priv,
struct intel_shared_dpll *pll)
{
const enum intel_dpll_id id = pll->info->id;
- i915_reg_t enable_reg = icl_pll_id_to_enable_reg(id);
+ i915_reg_t enable_reg = icl_pll_info_to_enable_reg(pll->info);
u32
[Intel-gfx] [PATCH 2/3] drm/i915: introduce platform_flags to use with dpll hooks
Define platform flags taking the high 16 bits of the under-utilized
flags in dpll_info. This makes clear separation on what flags are used
by the core and what flags can be freely defined for use in the context
of the platforms sharing a set of hooks.
The initial motivation for this is the Ice Lake case that heavily relies
on the PLL id to make decisions on what type of PLL that is. This
hinders code sharing across platforms as the IDs may change easily.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_dpll_mgr.h | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h
b/drivers/gpu/drm/i915/intel_dpll_mgr.h
index 40e8391a92f2..b1fdce1be942 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h
@@ -279,7 +279,14 @@ struct dpll_info {
* Inform the state checker that the DPLL is kept enabled even if
* not in use by any CRTC.
*/
- u32 flags;
+ u16 flags;
+
+ /**
+* @platform_flags: like @flags, but these make are meant to use
+* within a single platform scope only (or just a few, when the hooks
+* are shared)
+*/
+ u16 platform_flags;
};
/**
--
2.20.0
___
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[Intel-gfx] [PATCH 1/2] drm/i915: refactor transcoders reporting on error state
Instead of keeping track of the number of transcoders, loop through all
the interesting ones and check if there is a correspondent offset.
Cc: Rodrigo Vivi
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_display.c | 21 -
1 file changed, 12 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b1d63c32ca94..9dfb99195144 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -16374,8 +16374,6 @@ struct intel_display_error_state {
u32 power_well_driver;
- int num_transcoders;
-
struct intel_cursor_error_state {
u32 control;
u32 position;
@@ -16400,6 +16398,7 @@ struct intel_display_error_state {
} plane[I915_MAX_PIPES];
struct intel_transcoder_error_state {
+ bool available;
bool power_domain_on;
enum transcoder cpu_transcoder;
@@ -16426,6 +16425,8 @@ intel_display_capture_error_state(struct
drm_i915_private *dev_priv)
};
int i;
+ BUILD_BUG_ON(ARRAY_SIZE(transcoders) != ARRAY_SIZE(error->transcoder));
+
if (!HAS_DISPLAY(dev_priv))
return NULL;
@@ -16466,14 +16467,13 @@ intel_display_capture_error_state(struct
drm_i915_private *dev_priv)
error->pipe[i].stat = I915_READ(PIPESTAT(i));
}
- /* Note: this does not include DSI transcoders. */
- error->num_transcoders = INTEL_INFO(dev_priv)->num_pipes;
- if (HAS_DDI(dev_priv))
- error->num_transcoders++; /* Account for eDP. */
-
- for (i = 0; i < error->num_transcoders; i++) {
+ for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) {
enum transcoder cpu_transcoder = transcoders[i];
+ if (!INTEL_INFO(dev_priv)->trans_offsets[cpu_transcoder])
+ continue;
+
+ error->transcoder[i].available = true;
error->transcoder[i].power_domain_on =
__intel_display_power_is_enabled(dev_priv,
POWER_DOMAIN_TRANSCODER(cpu_transcoder));
@@ -16537,7 +16537,10 @@ intel_display_print_error_state(struct
drm_i915_error_state_buf *m,
err_printf(m, " BASE: %08x\n", error->cursor[i].base);
}
- for (i = 0; i < error->num_transcoders; i++) {
+ for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) {
+ if (!error->transcoder[i].available)
+ continue;
+
err_printf(m, "CPU transcoder: %s\n",
transcoder_name(error->transcoder[i].cpu_transcoder));
err_printf(m, " Power: %s\n",
--
2.20.0
___
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[Intel-gfx] [PATCH 2/2] drm/i915: allow platforms without eDP transcoder
Define a HAS_TRANSCODER_EDP() macro that checks if we have defined an
offset for this transcoder. This allows platforms to be defined without
eDP transcoder.
Cc: Mika Kahola
Cc: Imre Deak
Cc: Rodrigo Vivi
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_ddi.c | 6 +++---
drivers/gpu/drm/i915/intel_display.c | 5 -
3 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index cc09caf3870e..a8e9f0cf20f5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2519,6 +2519,7 @@ static inline unsigned int i915_sg_segment_size(void)
#define HAS_DDI(dev_priv) (INTEL_INFO(dev_priv)->display.has_ddi)
#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->has_fpga_dbg)
#define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)->display.has_psr)
+#define HAS_TRANSCODER_EDP(dev_priv)
(INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_EDP] != 0)
#define HAS_RC6(dev_priv) (INTEL_INFO(dev_priv)->has_rc6)
#define HAS_RC6p(dev_priv) (INTEL_INFO(dev_priv)->has_rc6p)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index ea83071a22c4..8eeffa027b74 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1911,7 +1911,7 @@ bool intel_ddi_connector_get_hw_state(struct
intel_connector *intel_connector)
goto out;
}
- if (port == PORT_A)
+ if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
cpu_transcoder = TRANSCODER_EDP;
else
cpu_transcoder = (enum transcoder) pipe;
@@ -1973,7 +1973,7 @@ static void intel_ddi_get_encoder_pipes(struct
intel_encoder *encoder,
if (!(tmp & DDI_BUF_CTL_ENABLE))
goto out;
- if (port == PORT_A) {
+ if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A) {
tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
@@ -3856,7 +3856,7 @@ static int intel_ddi_compute_config(struct intel_encoder
*encoder,
enum port port = encoder->port;
int ret;
- if (port == PORT_A)
+ if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
pipe_config->cpu_transcoder = TRANSCODER_EDP;
if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_HDMI))
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 9dfb99195144..8bf4bdf2006a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9688,7 +9688,7 @@ static bool hsw_get_transcoder_state(struct intel_crtc
*crtc,
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
enum intel_display_power_domain power_domain;
- unsigned long panel_transcoder_mask = BIT(TRANSCODER_EDP);
+ unsigned long panel_transcoder_mask = 0;
unsigned long enabled_panel_transcoders = 0;
enum transcoder panel_transcoder;
u32 tmp;
@@ -9697,6 +9697,9 @@ static bool hsw_get_transcoder_state(struct intel_crtc
*crtc,
panel_transcoder_mask |=
BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
+ if (HAS_TRANSCODER_EDP(dev_priv))
+ panel_transcoder_mask |= BIT(TRANSCODER_EDP);
+
/*
* The pipe->transcoder mapping is fixed with the exception of the eDP
* and DSI transcoders handled below.
--
2.20.0
___
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Yet another if/else sort of newer to older platforms.
== Series Details == Series: drm/i915: Yet another if/else sort of newer to older platforms. URL : https://patchwork.freedesktop.org/series/57112/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5655 -> Patchwork_12287 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_12287 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_12287, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/57112/revisions/1/mbox/ Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_12287: ### IGT changes ### Possible regressions * igt@runner@aborted: - fi-bdw-gvtdvm: NOTRUN -> FAIL Known issues Here are the changes found in Patchwork_12287 that come from known issues: ### IGT changes ### Possible fixes * igt@i915_pm_rpm@basic-pci-d3-state: - fi-bsw-kefka: SKIP [fdo#109271] -> PASS * igt@i915_pm_rpm@basic-rte: - fi-bsw-kefka: FAIL [fdo#108800] -> PASS Warnings * igt@i915_selftest@live_contexts: - fi-icl-u2: INCOMPLETE [fdo#108569] -> DMESG-FAIL [fdo#108569] [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 Participating hosts (45 -> 37) -- Missing(8): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-kbl-7500u fi-pnv-d510 fi-icl-y fi-bdw-samus Build changes - * Linux: CI_DRM_5655 -> Patchwork_12287 CI_DRM_5655: a40729237602fa7454aaf3355ad3058cad5c6ee9 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4853: 8afdfd8fa9ce17043d9105dedca46ad4555fdcdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12287: e4360cf48be29c1b2f3561299b303471bd0e6854 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == e4360cf48be2 drm/i915: Yet another if/else sort of newer to older platforms. == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12287/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Call MG_DP_MODE() macro with the right parameters order
On Fri, Feb 22, 2019 at 12:24 PM José Roberto de Souza
wrote:
>
> The commit that this patch fixes changed the order of the parameters
> of MG_DP_MODE() but din't update the callers, breaking type-c on ICL.
ugh...
>
> Fixes: 58106b7d816e ("drm/i915: Make MG PHY macros semantically consistent")
From a quick grep in the commit:
git show 58106b7d816e | grep "^+#define"
+#define MG_PHY_PORT_LN(ln, port, ln0p1, ln0p2, ln1p1) \
+#define MG_TX1_LINK_PARAMS(ln, port) \
+#define MG_TX2_LINK_PARAMS(ln, port) \
+#define MG_TX1_PISO_READLOAD(ln, port) \
+#define MG_TX2_PISO_READLOAD(ln, port) \
+#define MG_TX1_SWINGCTRL(ln, port) \
+#define MG_TX2_SWINGCTRL(ln, port) \
+#define MG_TX1_DRVCTRL(ln, port) \
+#define MG_TX2_DRVCTRL(ln, port) \
+#define MG_CLKHUB(ln, port) \
+#define MG_TX1_DCC(ln, port) \
+#define MG_TX2_DCC(ln, port) \
+#define MG_DP_MODE(ln, port) \
Going through each of those, it seems MG_DP_MODE() was indeed the only
one left behind. Could you double check?
Reviewed-by: Lucas De Marchi
thanks
Lucas De Marchi
> Cc: Clint Taylor
> Cc: Imre Deak
> Cc: Jani Nikula
> Cc: Aditya Swarup
> Cc: Manasi navare
> Cc: Jani Nikula
> Signed-off-by: José Roberto de Souza
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index ea83071a22c4..1355be8dec3b 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2928,7 +2928,7 @@ static void icl_enable_phy_clock_gating(struct
> intel_digital_port *dig_port)
> struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
> enum port port = dig_port->base.port;
> enum tc_port tc_port = intel_port_to_tc(dev_priv, port);
> - i915_reg_t mg_regs[2] = { MG_DP_MODE(port, 0), MG_DP_MODE(port, 1) };
> + i915_reg_t mg_regs[2] = { MG_DP_MODE(0, port), MG_DP_MODE(1, port) };
> u32 val;
> int i;
>
> @@ -2999,8 +2999,8 @@ static void icl_program_mg_dp_mode(struct
> intel_digital_port *intel_dig_port)
> if (tc_port == PORT_TC_NONE || intel_dig_port->tc_type == TC_PORT_TBT)
> return;
>
> - ln0 = I915_READ(MG_DP_MODE(port, 0));
> - ln1 = I915_READ(MG_DP_MODE(port, 1));
> + ln0 = I915_READ(MG_DP_MODE(0, port));
> + ln1 = I915_READ(MG_DP_MODE(1, port));
>
> switch (intel_dig_port->tc_type) {
> case TC_PORT_TYPEC:
> @@ -3050,8 +3050,8 @@ static void icl_program_mg_dp_mode(struct
> intel_digital_port *intel_dig_port)
> return;
> }
>
> - I915_WRITE(MG_DP_MODE(port, 0), ln0);
> - I915_WRITE(MG_DP_MODE(port, 1), ln1);
> + I915_WRITE(MG_DP_MODE(0, port), ln0);
> + I915_WRITE(MG_DP_MODE(1, port), ln1);
> }
>
> static void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp,
> --
> 2.20.1
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Lucas De Marchi
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Yet another if/else sort of newer to older platforms.
No functional change. Just a reorg to match the preferred
behavior.
When rebasing internal branch on top of latest sort I noticed
few more cases that needs to get reordered.
Let's do in a bundle this time and hoping there's no other
missing places.
Cc: Ville Syrjälä
Cc: Chris Wilson
Cc: Lucas De Marchi
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_drv.c | 24 -
drivers/gpu/drm/i915/i915_perf.c | 50 +-
drivers/gpu/drm/i915/intel_cdclk.c | 38 +++---
drivers/gpu/drm/i915/intel_workarounds.c | 64
4 files changed, 88 insertions(+), 88 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index c6354f6cdbdb..0e3d5cf2c4f8 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -219,20 +219,20 @@ intel_virt_detect_pch(const struct drm_i915_private
*dev_priv)
* make an educated guess as to which PCH is really there.
*/
- if (IS_GEN(dev_priv, 5))
- id = INTEL_PCH_IBX_DEVICE_ID_TYPE;
- else if (IS_GEN(dev_priv, 6) || IS_IVYBRIDGE(dev_priv))
- id = INTEL_PCH_CPT_DEVICE_ID_TYPE;
- else if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
- id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
- else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
- id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
- else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
- id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
+ if (IS_ICELAKE(dev_priv))
+ id = INTEL_PCH_ICP_DEVICE_ID_TYPE;
else if (IS_COFFEELAKE(dev_priv) || IS_CANNONLAKE(dev_priv))
id = INTEL_PCH_CNP_DEVICE_ID_TYPE;
- else if (IS_ICELAKE(dev_priv))
- id = INTEL_PCH_ICP_DEVICE_ID_TYPE;
+ else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
+ id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
+ else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
+ id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
+ else if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
+ id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
+ else if (IS_GEN(dev_priv, 6) || IS_IVYBRIDGE(dev_priv))
+ id = INTEL_PCH_CPT_DEVICE_ID_TYPE;
+ else if (IS_GEN(dev_priv, 5))
+ id = INTEL_PCH_IBX_DEVICE_ID_TYPE;
if (id)
DRM_DEBUG_KMS("Assuming PCH ID %04x\n", id);
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 9ebf99f3d8d3..72a9a35b40e2 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -2881,12 +2881,24 @@ void i915_perf_register(struct drm_i915_private
*dev_priv)
sysfs_attr_init(_priv->perf.oa.test_config.sysfs_metric_id.attr);
- if (IS_HASWELL(dev_priv)) {
- i915_perf_load_test_config_hsw(dev_priv);
- } else if (IS_BROADWELL(dev_priv)) {
- i915_perf_load_test_config_bdw(dev_priv);
- } else if (IS_CHERRYVIEW(dev_priv)) {
- i915_perf_load_test_config_chv(dev_priv);
+ if (IS_ICELAKE(dev_priv)) {
+ i915_perf_load_test_config_icl(dev_priv);
+ } else if (IS_CANNONLAKE(dev_priv)) {
+ i915_perf_load_test_config_cnl(dev_priv);
+ } else if (IS_COFFEELAKE(dev_priv)) {
+ if (IS_CFL_GT2(dev_priv))
+ i915_perf_load_test_config_cflgt2(dev_priv);
+ if (IS_CFL_GT3(dev_priv))
+ i915_perf_load_test_config_cflgt3(dev_priv);
+ } else if (IS_GEMINILAKE(dev_priv)) {
+ i915_perf_load_test_config_glk(dev_priv);
+ } else if (IS_KABYLAKE(dev_priv)) {
+ if (IS_KBL_GT2(dev_priv))
+ i915_perf_load_test_config_kblgt2(dev_priv);
+ else if (IS_KBL_GT3(dev_priv))
+ i915_perf_load_test_config_kblgt3(dev_priv);
+ } else if (IS_BROXTON(dev_priv)) {
+ i915_perf_load_test_config_bxt(dev_priv);
} else if (IS_SKYLAKE(dev_priv)) {
if (IS_SKL_GT2(dev_priv))
i915_perf_load_test_config_sklgt2(dev_priv);
@@ -2894,25 +2906,13 @@ void i915_perf_register(struct drm_i915_private
*dev_priv)
i915_perf_load_test_config_sklgt3(dev_priv);
else if (IS_SKL_GT4(dev_priv))
i915_perf_load_test_config_sklgt4(dev_priv);
- } else if (IS_BROXTON(dev_priv)) {
- i915_perf_load_test_config_bxt(dev_priv);
- } else if (IS_KABYLAKE(dev_priv)) {
- if (IS_KBL_GT2(dev_priv))
- i915_perf_load_test_config_kblgt2(dev_priv);
- else if (IS_KBL_GT3(dev_priv))
- i915_perf_load_test_config_kblgt3(dev_priv);
- } else if (IS_GEMINILAKE(dev_priv)) {
- i915_perf_load_test_config_glk(dev_priv);
-
[Intel-gfx] ✗ Fi.CI.IGT: failure for RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access (rev8)
== Series Details == Series: RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access (rev8) URL : https://patchwork.freedesktop.org/series/57039/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5653_full -> IGTPW_2488_full Summary --- **FAILURE** Serious unknown changes coming with IGTPW_2488_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_2488_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/57039/revisions/8/mbox/ Possible new issues --- Here are the unknown changes that may have been introduced in IGTPW_2488_full: ### IGT changes ### Possible regressions * igt@gem_ctx_isolation@rcs0-dirty-switch: - shard-glk: PASS -> FAIL +1 * igt@gem_ctx_isolation@rcs0-s3: - shard-kbl: PASS -> FAIL - shard-apl: PASS -> FAIL +1 New tests - New tests have been introduced between CI_DRM_5653_full and IGTPW_2488_full: ### New IGT tests (5) ### * igt@gem_ctx_isolation@bcs0-nonpriv: - Statuses : 3 pass(s) 2 skip(s) - Exec time: [0.0, 0.14] s * igt@gem_ctx_isolation@rcs0-nonpriv: - Statuses : 3 pass(s) 2 skip(s) - Exec time: [0.0, 0.14] s * igt@gem_ctx_isolation@vcs0-nonpriv: - Statuses : 3 pass(s) 2 skip(s) - Exec time: [0.0, 0.14] s * igt@gem_ctx_isolation@vcs1-nonpriv: - Statuses : 1 pass(s) 4 skip(s) - Exec time: [0.0, 0.04] s * igt@gem_ctx_isolation@vecs0-nonpriv: - Statuses : 3 pass(s) 2 skip(s) - Exec time: [0.0, 0.14] s Known issues Here are the changes found in IGTPW_2488_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_isolation@rcs0-dirty-switch: - shard-apl: PASS -> FAIL [fdo#109472] - shard-kbl: PASS -> FAIL [fdo#109472] * igt@gem_exec_schedule@preemptive-hang-bsd: - shard-kbl: NOTRUN -> SKIP [fdo#109271] +6 * igt@gem_userptr_blits@process-exit-gtt: - shard-glk: NOTRUN -> SKIP [fdo#109271] +25 * igt@i915_pm_rpm@system-suspend-execbuf: - shard-kbl: PASS -> INCOMPLETE [fdo#103665] / [fdo#107807] * igt@kms_addfb_basic@unused-handle: - shard-apl: PASS -> INCOMPLETE [fdo#103927] +1 * igt@kms_atomic_transition@plane-all-modeset-transition: - shard-kbl: PASS -> INCOMPLETE [fdo#103665] * igt@kms_busy@extended-pageflip-hang-newfb-render-e: - shard-glk: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1 * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: - shard-hsw: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-glk: PASS -> FAIL [fdo#108145] * igt@kms_color@pipe-b-ctm-max: - shard-apl: PASS -> FAIL [fdo#108147] * igt@kms_concurrent@pipe-d: - shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +4 * igt@kms_cursor_crc@cursor-256x85-random: - shard-apl: PASS -> FAIL [fdo#103232] +2 * igt@kms_cursor_crc@cursor-64x21-sliding: - shard-kbl: PASS -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-64x64-random: - shard-apl: NOTRUN -> FAIL [fdo#103232] +1 * igt@kms_cursor_crc@cursor-alpha-opaque: - shard-glk: PASS -> FAIL [fdo#109350] * igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic: - shard-glk: PASS -> FAIL [fdo#105454] * igt@kms_flip@2x-plain-flip-ts-check: - shard-apl: NOTRUN -> SKIP [fdo#109271] +18 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu: - shard-kbl: PASS -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: - shard-apl: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-glk: PASS -> FAIL [fdo#103167] +5 * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-pwrite: - shard-snb: NOTRUN -> SKIP [fdo#109271] +40 * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-cpu: - shard-hsw: NOTRUN -> SKIP [fdo#109271] +6 * igt@kms_plane_multiple@atomic-pipe-a-tiling-yf: - shard-kbl: PASS -> FAIL [fdo#103166] * igt@kms_plane_multiple@atomic-pipe-b-tiling-y: - shard-glk: PASS -> FAIL [fdo#103166] +6 * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: - shard-apl: PASS -> FAIL [fdo#103166] +5 * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-kbl: PASS -> FAIL [fdo#109016] * igt@kms_vblank@pipe-a-ts-continuation-modeset-rpm: - shard-apl: PASS -> FAIL
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Add support for retrying hotplug
== Series Details ==
Series: series starting with [1/2] drm/i915: Add support for retrying hotplug
URL : https://patchwork.freedesktop.org/series/57108/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5654 -> Patchwork_12286
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_12286 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_12286, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/57108/revisions/1/mbox/
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_12286:
### IGT changes ###
Possible regressions
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7567u: PASS -> FAIL
Known issues
Here are the changes found in Patchwork_12286 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_basic@memory-alloc:
- fi-ivb-3520m: NOTRUN -> SKIP [fdo#109271] +48
* igt@amdgpu/amd_cs_nop@fork-compute0:
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] +18
* igt@amdgpu/amd_cs_nop@fork-gfx0:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109315] +17
* igt@debugfs_test@read_all_entries:
- fi-kbl-7567u: PASS -> DMESG-WARN [fdo#103558] / [fdo#105602]
* igt@gem_exec_basic@readonly-bsd1:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109276] +7
* igt@gem_exec_parse@basic-allowed:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109289] +1
* igt@gem_exec_suspend@basic-s3:
- fi-kbl-7567u: PASS -> DMESG-WARN [fdo#103558] / [fdo#105079] /
[fdo#105602]
* igt@i915_module_load@reload-with-fault-injection:
- fi-kbl-7567u: PASS -> DMESG-WARN [fdo#105602] / [fdo#108529] +1
* igt@i915_pm_rpm@module-reload:
- fi-kbl-7567u: PASS -> DMESG-WARN [fdo#108529]
* igt@i915_selftest@live_contexts:
- fi-icl-u2: NOTRUN -> DMESG-FAIL [fdo#108569]
* igt@kms_busy@basic-flip-a:
- fi-kbl-7567u: PASS -> SKIP [fdo#109271] / [fdo#109278] +2
- fi-gdg-551: PASS -> FAIL [fdo#103182]
* igt@kms_chamelium@dp-edid-read:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109316] +2
* igt@kms_chamelium@dp-hpd-fast:
- fi-skl-6700k2: NOTRUN -> SKIP [fdo#109271] +41
* igt@kms_chamelium@hdmi-crc-fast:
- fi-icl-u2: NOTRUN -> FAIL [fdo#109635 ]
* igt@kms_chamelium@hdmi-edid-read:
- fi-kbl-7567u: PASS -> FAIL [fdo#109569] +1
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: PASS -> FAIL [fdo#109485]
* igt@kms_chamelium@vga-hpd-fast:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109309] +1
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109285] +3
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: NOTRUN -> FAIL [fdo#103167]
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-kbl-7567u: PASS -> DMESG-FAIL [fdo#105079]
* igt@prime_vgem@basic-fence-flip:
- fi-kbl-7567u: PASS -> SKIP [fdo#109271] +4
Possible fixes
* igt@i915_module_load@reload:
- fi-blb-e6850: INCOMPLETE [fdo#107718] -> PASS
* igt@i915_pm_rpm@module-reload:
- {fi-icl-y}: INCOMPLETE [fdo#108840] -> PASS
* igt@i915_selftest@live_evict:
- fi-bsw-kefka: DMESG-WARN [fdo#107709] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
[fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
[fdo#105079]: https://bugs.freedesktop.org/show_bug.cgi?id=105079
[fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
[fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108529]: https://bugs.freedesktop.org/show_bug.cgi?id=108529
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109316]:
Re: [Intel-gfx] [PATCH] drm/i915: Remove unused HAS_PCH_CNP_LP
On Thu, Feb 21, 2019 at 03:08:00PM -0800, Lucas De Marchi wrote: > On Thu, Feb 21, 2019 at 01:17:16PM -0800, Rodrigo Vivi wrote: > > Other than LPT, no other PCH needed to differentiate between > > LP and HP. So let's remove this before we spread this mistake > > to future platforms. > > > > Cc: Anusha Srivatsa > > Cc: Lucas De Marchi > > Signed-off-by: Rodrigo Vivi > > Reviewed-by: Lucas De Marchi thanks, pushed to dinq > > Lucas De Marchi > > > --- > > drivers/gpu/drm/i915/i915_drv.h | 2 -- > > 1 file changed, 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h > > b/drivers/gpu/drm/i915/i915_drv.h > > index bb0e75e43987..cc09caf3870e 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.h > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > @@ -2574,8 +2574,6 @@ static inline unsigned int i915_sg_segment_size(void) > > #define INTEL_PCH_ID(dev_priv) ((dev_priv)->pch_id) > > #define HAS_PCH_ICP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_ICP) > > #define HAS_PCH_CNP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CNP) > > -#define HAS_PCH_CNP_LP(dev_priv) \ > > - (INTEL_PCH_ID(dev_priv) == INTEL_PCH_CNP_LP_DEVICE_ID_TYPE) > > #define HAS_PCH_KBP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_KBP) > > #define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT) > > #define HAS_PCH_LPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_LPT) > > -- > > 2.20.1 > > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Sort ctx workarounds init from newer to older platforms.
On Fri, Feb 22, 2019 at 10:32:25AM +, Chris Wilson wrote: > Quoting Rodrigo Vivi (2019-02-21 23:14:52) > > No functional change. Just a reorg to match the preferred > > behavior. > > > > Cc: Tvrtko Ursulin > > Cc: Ville Syrjälä > > Cc: Lucas De Marchi > > Signed-off-by: Rodrigo Vivi > > --- > > drivers/gpu/drm/i915/intel_workarounds.c | 36 > > 1 file changed, 18 insertions(+), 18 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_workarounds.c > > b/drivers/gpu/drm/i915/intel_workarounds.c > > index 15f4a6dee5aa..743cf5b00155 100644 > > --- a/drivers/gpu/drm/i915/intel_workarounds.c > > +++ b/drivers/gpu/drm/i915/intel_workarounds.c > > @@ -564,26 +564,26 @@ void intel_engine_init_ctx_wa(struct intel_engine_cs > > *engine) > > > > wa_init_start(wal, "context"); > > > > - if (INTEL_GEN(i915) < 8) > > - return; > > - else if (IS_BROADWELL(i915)) > > - bdw_ctx_workarounds_init(engine); > > - else if (IS_CHERRYVIEW(i915)) > > - chv_ctx_workarounds_init(engine); > > - else if (IS_SKYLAKE(i915)) > > - skl_ctx_workarounds_init(engine); > > - else if (IS_BROXTON(i915)) > > - bxt_ctx_workarounds_init(engine); > > - else if (IS_KABYLAKE(i915)) > > - kbl_ctx_workarounds_init(engine); > > - else if (IS_GEMINILAKE(i915)) > > - glk_ctx_workarounds_init(engine); > > - else if (IS_COFFEELAKE(i915)) > > - cfl_ctx_workarounds_init(engine); > > If the chains start with > > if (0) > /* space left intentionally blank */ > else if (IS_ICELAKE(i915)) > > adding more to the chain later would have less collateral damage. interesting idea... I will consider, but for now let's move with the consistency and similar approach everywhere. > > > + if (IS_ICELAKE(i915)) > > + icl_ctx_workarounds_init(engine); > > else if (IS_CANNONLAKE(i915)) > > cnl_ctx_workarounds_init(engine); > > - else if (IS_ICELAKE(i915)) > > - icl_ctx_workarounds_init(engine); > > + else if (IS_COFFEELAKE(i915)) > > + cfl_ctx_workarounds_init(engine); > > + else if (IS_GEMINILAKE(i915)) > > + glk_ctx_workarounds_init(engine); > > + else if (IS_KABYLAKE(i915)) > > + kbl_ctx_workarounds_init(engine); > > + else if (IS_BROXTON(i915)) > > + bxt_ctx_workarounds_init(engine); > > + else if (IS_SKYLAKE(i915)) > > + skl_ctx_workarounds_init(engine); > > + else if (IS_CHERRYVIEW(i915)) > > + chv_ctx_workarounds_init(engine); > > + else if (IS_BROADWELL(i915)) > > + bdw_ctx_workarounds_init(engine); > > For the sake of consistency, > Reviewed-by: Chris Wilson pushed to dinq Thanks, Rodrigo. > -Chris > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm/i915: Sort newer to older platforms.
On Thu, Feb 21, 2019 at 11:48:58PM +0200, Ville Syrjälä wrote: > On Thu, Feb 21, 2019 at 01:44:30PM -0800, Rodrigo Vivi wrote: > > No functional change. Just a reorg to match the preferred > > behavior. > > > > v2: missing else (Ville) > > > > Cc: Ville Syrjälä > > Cc: Lucas De Marchi > > Signed-off-by: Rodrigo Vivi > > Looks correct enough. > Reviewed-by: Ville Syrjälä pushed to dinq, thanks for the reviews > > > --- > > drivers/gpu/drm/i915/intel_hdmi.c | 12 ++-- > > 1 file changed, 6 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c > > b/drivers/gpu/drm/i915/intel_hdmi.c > > index ad81691fa7bf..6bd724c7a6de 100644 > > --- a/drivers/gpu/drm/i915/intel_hdmi.c > > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > > @@ -2575,14 +2575,14 @@ static u8 intel_hdmi_ddc_pin(struct > > drm_i915_private *dev_priv, > > return info->alternate_ddc_pin; > > } > > > > - if (IS_CHERRYVIEW(dev_priv)) > > - ddc_pin = chv_port_to_ddc_pin(dev_priv, port); > > - else if (IS_GEN9_LP(dev_priv)) > > - ddc_pin = bxt_port_to_ddc_pin(dev_priv, port); > > + if (HAS_PCH_ICP(dev_priv)) > > + ddc_pin = icl_port_to_ddc_pin(dev_priv, port); > > else if (HAS_PCH_CNP(dev_priv)) > > ddc_pin = cnp_port_to_ddc_pin(dev_priv, port); > > - else if (HAS_PCH_ICP(dev_priv)) > > - ddc_pin = icl_port_to_ddc_pin(dev_priv, port); > > + else if (IS_GEN9_LP(dev_priv)) > > + ddc_pin = bxt_port_to_ddc_pin(dev_priv, port); > > + else if (IS_CHERRYVIEW(dev_priv)) > > + ddc_pin = chv_port_to_ddc_pin(dev_priv, port); > > else > > ddc_pin = g4x_port_to_ddc_pin(dev_priv, port); > > > > -- > > 2.20.1 > > -- > Ville Syrjälä > Intel > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Add support for retrying hotplug
== Series Details == Series: series starting with [1/2] drm/i915: Add support for retrying hotplug URL : https://patchwork.freedesktop.org/series/57108/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Add support for retrying hotplug -drivers/gpu/drm/i915/selftests/../i915_drv.h:3583:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3584:16: warning: expression using sizeof(void) Commit: drm/i915/icl: Probe again type-c connectors that failed Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Call MG_DP_MODE() macro with the right parameters order
== Series Details == Series: drm/i915: Call MG_DP_MODE() macro with the right parameters order URL : https://patchwork.freedesktop.org/series/57107/ State : success == Summary == CI Bug Log - changes from CI_DRM_5654 -> Patchwork_12285 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/57107/revisions/1/mbox/ Known issues Here are the changes found in Patchwork_12285 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_basic@memory-alloc: - fi-ivb-3520m: NOTRUN -> SKIP [fdo#109271] +48 * igt@gem_exec_suspend@basic-s3: - fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718] * igt@i915_module_load@reload-no-display: - fi-kbl-7567u: PASS -> DMESG-WARN [fdo#103558] / [fdo#105602] +1 * igt@i915_module_load@reload-with-fault-injection: - fi-kbl-7567u: PASS -> DMESG-WARN [fdo#105602] * igt@kms_chamelium@dp-hpd-fast: - fi-skl-6700k2: NOTRUN -> SKIP [fdo#109271] +41 * igt@runner@aborted: - fi-kbl-7567u: NOTRUN -> FAIL [fdo#105602] Possible fixes * igt@i915_selftest@live_evict: - fi-bsw-kefka: DMESG-WARN [fdo#107709] -> PASS Warnings * igt@i915_selftest@live_contexts: - fi-icl-u3: DMESG-FAIL [fdo#108569] -> INCOMPLETE [fdo#108569] [fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558 [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602 [fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 Participating hosts (43 -> 38) -- Additional (2): fi-ivb-3520m fi-skl-6700k2 Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-peppy fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus Build changes - * Linux: CI_DRM_5654 -> Patchwork_12285 CI_DRM_5654: 30c7f283790b433aa311ef7a7d2b6b428886fb9a @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4851: 2b7dd10a4e2ea0cabff68421fd15e96c99be3cad @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12285: 09b96cee7c1efd9a873cacea5e3b378bf262a759 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 09b96cee7c1e drm/i915: Call MG_DP_MODE() macro with the right parameters order == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12285/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/2] drm/i915: Add support for retrying hotplug
From: Imre Deak
There is some scenarios that we are aware that sink probe can fail,
so lets add the infrastructure to let hotplug() hook to request
another probe after some time.
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
Signed-off-by: Jani Nikula
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 3 +-
drivers/gpu/drm/i915/intel_ddi.c | 12 +++---
drivers/gpu/drm/i915/intel_dp.c | 12 +++---
drivers/gpu/drm/i915/intel_drv.h | 17 +++--
drivers/gpu/drm/i915/intel_hotplug.c | 56 ++--
drivers/gpu/drm/i915/intel_sdvo.c| 8 ++--
7 files changed, 79 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 37175414ce89..8149be62a630 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -4296,7 +4296,7 @@ static int i915_hpd_storm_ctl_show(struct seq_file *m,
void *data)
*/
synchronize_irq(dev_priv->drm.irq);
flush_work(_priv->hotplug.dig_port_work);
- flush_work(_priv->hotplug.hotplug_work);
+ flush_delayed_work(_priv->hotplug.hotplug_work);
seq_printf(m, "Threshold: %d\n", hotplug->hpd_storm_threshold);
seq_printf(m, "Detected: %s\n",
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index bb0e75e43987..5703526bddab 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -156,7 +156,7 @@ enum hpd_pin {
#define HPD_STORM_DEFAULT_THRESHOLD 50
struct i915_hotplug {
- struct work_struct hotplug_work;
+ struct delayed_work hotplug_work;
struct {
unsigned long last_jiffies;
@@ -168,6 +168,7 @@ struct i915_hotplug {
} state;
} stats[HPD_NUM_PINS];
u32 event_bits;
+ u32 retry_bits;
struct delayed_work reenable_work;
u32 long_port_mask;
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index ea83071a22c4..1676a87f18cb 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -4051,14 +4051,16 @@ static int intel_hdmi_reset_link(struct intel_encoder
*encoder,
return modeset_pipe(>base, ctx);
}
-static bool intel_ddi_hotplug(struct intel_encoder *encoder,
- struct intel_connector *connector)
+static enum intel_hotplug_state
+intel_ddi_hotplug(struct intel_encoder *encoder,
+ struct intel_connector *connector,
+ bool irq_received)
{
struct drm_modeset_acquire_ctx ctx;
- bool changed;
+ enum intel_hotplug_state state;
int ret;
- changed = intel_encoder_hotplug(encoder, connector);
+ state = intel_encoder_hotplug(encoder, connector, irq_received);
drm_modeset_acquire_init(, 0);
@@ -4080,7 +4082,7 @@ static bool intel_ddi_hotplug(struct intel_encoder
*encoder,
drm_modeset_acquire_fini();
WARN(ret, "Acquiring modeset locks failed with %i\n", ret);
- return changed;
+ return state;
}
static struct intel_connector *
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index e1a051c0fbfe..0bb43eaa154c 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4734,14 +4734,16 @@ int intel_dp_retrain_link(struct intel_encoder *encoder,
* retrain the link to get a picture. That's in case no
* userspace component reacted to intermittent HPD dip.
*/
-static bool intel_dp_hotplug(struct intel_encoder *encoder,
-struct intel_connector *connector)
+static enum intel_hotplug_state
+intel_dp_hotplug(struct intel_encoder *encoder,
+struct intel_connector *connector,
+bool irq_received)
{
struct drm_modeset_acquire_ctx ctx;
- bool changed;
+ enum intel_hotplug_state state;
int ret;
- changed = intel_encoder_hotplug(encoder, connector);
+ state = intel_encoder_hotplug(encoder, connector, irq_received);
drm_modeset_acquire_init(, 0);
@@ -4760,7 +4762,7 @@ static bool intel_dp_hotplug(struct intel_encoder
*encoder,
drm_modeset_acquire_fini();
WARN(ret, "Acquiring modeset locks failed with %i\n", ret);
- return changed;
+ return state;
}
static void intel_dp_check_service_irq(struct intel_dp *intel_dp)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 81ec73e4a083..de62af970dc1 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -226,14 +226,21 @@ struct intel_fbdev {
struct mutex hpd_lock;
};
+enum intel_hotplug_state {
+ INTEL_HOTPLUG_NOCHANGE,
+ INTEL_HOTPLUG_CHANGED,
+ INTEL_HOTPLUG_RETRY,
+};
+
struct intel_encoder {
struct drm_encoder base;
enum
[Intel-gfx] [PATCH 2/2] drm/i915/icl: Probe again type-c connectors that failed
Unpowered type-c dongles can take some time to boot and be
responsible, causing the probe to fail and sink never be detected
without further actions from userspace.
It was not a issue for older platforms because there was a hardware
bridge between DDI/DP ports and type-c controller adding a implicit
delay that hid this issue but ICL have type-c controllers integrated
to the SOC bring this issue to users.
So here if the probe failed when coming from a IRQ it returns
INTEL_HOTPLUG_RETRY that will schedule another run of
i915_hotplug_work_func() after 1 second what is time enough for
those type-c dongles to boot.
Cc: Ville Syrjälä
Cc: Imre Deak
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_ddi.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 1676a87f18cb..96bbcf5c9787 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -4056,6 +4056,8 @@ intel_ddi_hotplug(struct intel_encoder *encoder,
struct intel_connector *connector,
bool irq_received)
{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_digital_port *dig_port = enc_to_dig_port(>base);
struct drm_modeset_acquire_ctx ctx;
enum intel_hotplug_state state;
int ret;
@@ -4082,6 +4084,17 @@ intel_ddi_hotplug(struct intel_encoder *encoder,
drm_modeset_acquire_fini();
WARN(ret, "Acquiring modeset locks failed with %i\n", ret);
+ /*
+* Unpowered type-c dongles can take some time to boot and be
+* responsible, so here giving some type to those dongles to power up
+* and then retrying the probe.
+*/
+ if (state == INTEL_HOTPLUG_NOCHANGE &&
+ connector->base.status != connector_status_connected &&
+ irq_received && intel_port_is_tc(dev_priv, encoder->port) &&
+ !dig_port->tc_legacy_port && !dig_port->dp.is_mst)
+ state = INTEL_HOTPLUG_RETRY;
+
return state;
}
--
2.20.1
___
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[Intel-gfx] ✗ Fi.CI.IGT: failure for RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access (rev7)
== Series Details ==
Series: RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access (rev7)
URL : https://patchwork.freedesktop.org/series/57039/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5653_full -> IGTPW_2486_full
Summary
---
**FAILURE**
Serious unknown changes coming with IGTPW_2486_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_2486_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/57039/revisions/7/mbox/
Possible new issues
---
Here are the unknown changes that may have been introduced in IGTPW_2486_full:
### IGT changes ###
Possible regressions
* {igt@gem_ctx_isolation@bcs0-nonpriv} (NEW):
- shard-glk: NOTRUN -> FAIL
* {igt@gem_ctx_isolation@rcs0-nonpriv} (NEW):
- shard-apl: NOTRUN -> FAIL +1
- shard-kbl: NOTRUN -> FAIL
* igt@gem_ctx_isolation@rcs0-reset:
- shard-glk: PASS -> FAIL +1
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: PASS -> FAIL
- shard-apl: PASS -> FAIL +1
New tests
-
New tests have been introduced between CI_DRM_5653_full and IGTPW_2486_full:
### New IGT tests (5) ###
* igt@gem_ctx_isolation@bcs0-nonpriv:
- Statuses : 2 fail(s) 2 skip(s)
- Exec time: [0.0, 0.19] s
* igt@gem_ctx_isolation@rcs0-nonpriv:
- Statuses : 2 fail(s) 2 skip(s)
- Exec time: [0.0, 0.16] s
* igt@gem_ctx_isolation@vcs0-nonpriv:
- Statuses : 3 pass(s) 2 skip(s)
- Exec time: [0.0, 0.13] s
* igt@gem_ctx_isolation@vcs1-nonpriv:
- Statuses : 1 pass(s) 4 skip(s)
- Exec time: [0.0, 0.04] s
* igt@gem_ctx_isolation@vecs0-nonpriv:
- Statuses : 3 pass(s) 2 skip(s)
- Exec time: [0.0, 0.14] s
Known issues
Here are the changes found in IGTPW_2486_full that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_isolation@rcs0-dirty-switch:
- shard-apl: PASS -> FAIL [fdo#109472]
- shard-kbl: PASS -> FAIL [fdo#109472]
* igt@gem_exec_big:
- shard-hsw: PASS -> TIMEOUT [fdo#107937]
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-kbl: NOTRUN -> SKIP [fdo#109271] +5
* igt@gem_userptr_blits@process-exit-gtt:
- shard-glk: NOTRUN -> SKIP [fdo#109271] +25
* igt@i915_pm_rpm@system-suspend-execbuf:
- shard-kbl: PASS -> INCOMPLETE [fdo#103665] / [fdo#107807]
* igt@kms_busy@extended-pageflip-hang-newfb-render-e:
- shard-glk: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a:
- shard-hsw: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-apl: PASS -> FAIL [fdo#106510] / [fdo#108145]
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
- shard-glk: PASS -> FAIL [fdo#108145]
* igt@kms_color@pipe-a-ctm-max:
- shard-apl: PASS -> FAIL [fdo#108147]
* igt@kms_color@pipe-a-legacy-gamma:
- shard-glk: PASS -> FAIL [fdo#104782] / [fdo#108145]
* igt@kms_concurrent@pipe-d:
- shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +5
* igt@kms_cursor_crc@cursor-128x128-suspend:
- shard-apl: PASS -> FAIL [fdo#103191] / [fdo#103232] +1
* igt@kms_cursor_crc@cursor-64x21-sliding:
- shard-apl: PASS -> FAIL [fdo#103232] +5
* igt@kms_cursor_crc@cursor-alpha-opaque:
- shard-apl: PASS -> FAIL [fdo#109350]
* igt@kms_cursor_crc@cursor-size-change:
- shard-glk: PASS -> FAIL [fdo#103232]
- shard-kbl: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
- shard-glk: PASS -> FAIL [fdo#107409]
* igt@kms_flip@2x-plain-flip-ts-check:
- shard-apl: NOTRUN -> SKIP [fdo#109271] +18
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-pwrite:
- shard-snb: NOTRUN -> SKIP [fdo#109271] +41
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite:
- shard-glk: PASS -> FAIL [fdo#103167] +4
* igt@kms_frontbuffer_tracking@fbc-2p-rte:
- shard-glk: PASS -> FAIL [fdo#103167] / [fdo#105682]
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-cpu:
- shard-hsw: NOTRUN -> SKIP [fdo#109271] +7
* igt@kms_plane@pixel-format-pipe-c-planes:
- shard-apl: PASS -> FAIL [fdo#103166] +3
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-apl: PASS -> FAIL [fdo#108948]
* igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
- shard-glk: PASS -> FAIL
[Intel-gfx] [PATCH] drm/i915: Call MG_DP_MODE() macro with the right parameters order
The commit that this patch fixes changed the order of the parameters
of MG_DP_MODE() but din't update the callers, breaking type-c on ICL.
Fixes: 58106b7d816e ("drm/i915: Make MG PHY macros semantically consistent")
Cc: Clint Taylor
Cc: Imre Deak
Cc: Jani Nikula
Cc: Aditya Swarup
Cc: Manasi navare
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_ddi.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index ea83071a22c4..1355be8dec3b 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2928,7 +2928,7 @@ static void icl_enable_phy_clock_gating(struct
intel_digital_port *dig_port)
struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
enum port port = dig_port->base.port;
enum tc_port tc_port = intel_port_to_tc(dev_priv, port);
- i915_reg_t mg_regs[2] = { MG_DP_MODE(port, 0), MG_DP_MODE(port, 1) };
+ i915_reg_t mg_regs[2] = { MG_DP_MODE(0, port), MG_DP_MODE(1, port) };
u32 val;
int i;
@@ -2999,8 +2999,8 @@ static void icl_program_mg_dp_mode(struct
intel_digital_port *intel_dig_port)
if (tc_port == PORT_TC_NONE || intel_dig_port->tc_type == TC_PORT_TBT)
return;
- ln0 = I915_READ(MG_DP_MODE(port, 0));
- ln1 = I915_READ(MG_DP_MODE(port, 1));
+ ln0 = I915_READ(MG_DP_MODE(0, port));
+ ln1 = I915_READ(MG_DP_MODE(1, port));
switch (intel_dig_port->tc_type) {
case TC_PORT_TYPEC:
@@ -3050,8 +3050,8 @@ static void icl_program_mg_dp_mode(struct
intel_digital_port *intel_dig_port)
return;
}
- I915_WRITE(MG_DP_MODE(port, 0), ln0);
- I915_WRITE(MG_DP_MODE(port, 1), ln1);
+ I915_WRITE(MG_DP_MODE(0, port), ln0);
+ I915_WRITE(MG_DP_MODE(1, port), ln1);
}
static void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp,
--
2.20.1
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Disable LP1+ watermarks on Lenovo Thinkpad T431s
== Series Details ==
Series: series starting with [1/4] drm/i915: Disable LP1+ watermarks on Lenovo
Thinkpad T431s
URL : https://patchwork.freedesktop.org/series/57101/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5654 -> Patchwork_12284
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/57101/revisions/1/mbox/
Known issues
Here are the changes found in Patchwork_12284 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_basic@memory-alloc:
- fi-ivb-3520m: NOTRUN -> SKIP [fdo#109271] +48
* igt@amdgpu/amd_cs_nop@fork-compute0:
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] +18
* igt@amdgpu/amd_cs_nop@fork-gfx0:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109315] +17
* igt@gem_exec_basic@readonly-bsd1:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109276] +7
* igt@gem_exec_parse@basic-allowed:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109289] +1
* igt@i915_selftest@live_contexts:
- fi-icl-u2: NOTRUN -> DMESG-FAIL [fdo#108569]
* igt@kms_chamelium@dp-edid-read:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109316] +2
* igt@kms_chamelium@dp-hpd-fast:
- fi-skl-6700k2: NOTRUN -> SKIP [fdo#109271] +41
* igt@kms_chamelium@hdmi-crc-fast:
- fi-icl-u2: NOTRUN -> FAIL [fdo#109635 ]
* igt@kms_chamelium@vga-hpd-fast:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109309] +1
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109285] +3
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: NOTRUN -> FAIL [fdo#103167]
Possible fixes
* igt@i915_module_load@reload:
- fi-blb-e6850: INCOMPLETE [fdo#107718] -> PASS
* igt@i915_pm_rpm@module-reload:
- {fi-icl-y}: INCOMPLETE [fdo#108840] -> PASS
* igt@i915_selftest@live_evict:
- fi-bsw-kefka: DMESG-WARN [fdo#107709] -> PASS
* igt@i915_selftest@live_execlists:
- fi-apl-guc: INCOMPLETE [fdo#103927] / [fdo#109720] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109316]: https://bugs.freedesktop.org/show_bug.cgi?id=109316
[fdo#109635 ]: https://bugs.freedesktop.org/show_bug.cgi?id=109635
[fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720
Participating hosts (43 -> 39)
--
Additional (3): fi-ivb-3520m fi-icl-u2 fi-skl-6700k2
Missing(7): fi-kbl-soraka fi-hsw-4770r fi-ilk-m540 fi-byt-squawks
fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus
Build changes
-
* Linux: CI_DRM_5654 -> Patchwork_12284
CI_DRM_5654: 30c7f283790b433aa311ef7a7d2b6b428886fb9a @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4851: 2b7dd10a4e2ea0cabff68421fd15e96c99be3cad @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12284: 30c90e017a183db13e0854ed76b803021c7d960a @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
30c90e017a18 drm/i915: Restrict SNB LP3+ disable to Thinkpad X220 tablet
c3643de46878 drm/i915: Use intel_apply_pci_quirks() to apply ILK+ wm quirks
2d4ab5e9f9be drm/i915: Generalize pci quirks
4545b0056a9b drm/i915: Disable LP1+ watermarks on Lenovo Thinkpad T431s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12284/
___
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Sort ctx workarounds init from newer to older platforms.
== Series Details == Series: drm/i915: Sort ctx workarounds init from newer to older platforms. URL : https://patchwork.freedesktop.org/series/57056/ State : success == Summary == CI Bug Log - changes from CI_DRM_5651_full -> Patchwork_12281_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12281_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_softpin@evict-snoop: - shard-iclb: NOTRUN -> SKIP [fdo#109312] * igt@gem_softpin@noreloc-s3: - shard-iclb: PASS -> FAIL [fdo#103375] * igt@i915_pm_rc6_residency@rc6-accuracy: - shard-snb: PASS -> SKIP [fdo#109271] * igt@i915_pm_rpm@fences: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +5 * igt@i915_pm_rpm@universal-planes: - shard-iclb: PASS -> INCOMPLETE [fdo#108840] * igt@kms_atomic_transition@6x-modeset-transitions-nonblocking-fencing: - shard-iclb: NOTRUN -> SKIP [fdo#109278] * igt@kms_atomic_transition@plane-use-after-nonblocking-unbind-fencing: - shard-hsw: PASS -> INCOMPLETE [fdo#103540] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: - shard-kbl: PASS -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c: - shard-hsw: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-b-crc-primary-rotation-180: - shard-iclb: NOTRUN -> FAIL [fdo#107725] * igt@kms_chamelium@dp-hpd-after-suspend: - shard-iclb: NOTRUN -> SKIP [fdo#109284] * igt@kms_cursor_crc@cursor-512x512-offscreen: - shard-iclb: NOTRUN -> SKIP [fdo#109279] * igt@kms_cursor_crc@cursor-64x21-onscreen: - shard-apl: PASS -> FAIL [fdo#103232] * igt@kms_flip@2x-absolute-wf_vblank: - shard-iclb: NOTRUN -> SKIP [fdo#109274] +1 * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-glk: PASS -> FAIL [fdo#102887] / [fdo#105363] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move: - shard-apl: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-snb: PASS -> DMESG-WARN [fdo#102365] * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc: - shard-iclb: PASS -> FAIL [fdo#103167] +3 * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-cpu: - shard-iclb: NOTRUN -> SKIP [fdo#109280] +4 * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-pwrite: - shard-hsw: NOTRUN -> SKIP [fdo#109271] +27 * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping: - shard-glk: PASS -> FAIL [fdo#108948] * igt@kms_plane_alpha_blend@pipe-c-alpha-basic: - shard-hsw: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1 * igt@kms_plane_multiple@atomic-pipe-c-tiling-none: - shard-iclb: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_multiple@atomic-pipe-c-tiling-y: - shard-glk: PASS -> FAIL [fdo#103166] * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: - shard-apl: PASS -> FAIL [fdo#103166] +3 * igt@kms_psr@psr2_cursor_plane_onoff: - shard-iclb: NOTRUN -> SKIP [fdo#109441] * igt@kms_vrr@flip-suspend: - shard-iclb: NOTRUN -> SKIP [fdo#109502] * igt@prime_nv_pcopy@test3_5: - shard-iclb: NOTRUN -> SKIP [fdo#109291] Possible fixes * igt@i915_pm_rpm@gem-execbuf-stress-extra-wait: - shard-iclb: DMESG-WARN [fdo#107724] -> PASS * igt@i915_pm_rpm@universal-planes-dpms: - shard-iclb: INCOMPLETE [fdo#107713] / [fdo#108840] -> PASS * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: - shard-kbl: DMESG-WARN [fdo#107956] -> PASS * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-glk: FAIL [fdo#108145] -> PASS * igt@kms_color@pipe-a-degamma: - shard-apl: FAIL [fdo#104782] / [fdo#108145] -> PASS * igt@kms_color@pipe-b-ctm-max: - shard-apl: FAIL [fdo#108147] -> PASS * igt@kms_cursor_crc@cursor-256x85-sliding: - shard-apl: FAIL [fdo#103232] -> PASS +3 * igt@kms_cursor_crc@cursor-64x64-suspend: - shard-apl: FAIL [fdo#103191] / [fdo#103232] -> PASS * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move: - shard-iclb: FAIL [fdo#103167] -> PASS +3 * igt@kms_plane@pixel-format-pipe-b-planes: - shard-glk: FAIL [fdo#103166] -> PASS * igt@kms_plane@plane-position-covered-pipe-c-planes: - shard-apl: FAIL [fdo#103166] -> PASS +1 * igt@kms_plane_multiple@atomic-pipe-b-tiling-yf: - shard-iclb: FAIL
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Disable LP1+ watermarks on Lenovo Thinkpad T431s
== Series Details ==
Series: series starting with [1/4] drm/i915: Disable LP1+ watermarks on Lenovo
Thinkpad T431s
URL : https://patchwork.freedesktop.org/series/57101/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4545b0056a9b drm/i915: Disable LP1+ watermarks on Lenovo Thinkpad T431s
2d4ab5e9f9be drm/i915: Generalize pci quirks
c3643de46878 drm/i915: Use intel_apply_pci_quirks() to apply ILK+ wm quirks
30c90e017a18 drm/i915: Restrict SNB LP3+ disable to Thinkpad X220 tablet
-:11: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 03981c6ebec4 ("drm/i915: Disable
LP3 watermarks on all SNB machines")'
#11:
03981c6ebec4 ("drm/i915: Disable LP3 watermarks on all SNB
total: 1 errors, 0 warnings, 0 checks, 30 lines checked
___
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[Intel-gfx] [PATCH 2/4] drm/i915: Generalize pci quirks
From: Ville Syrjälä
Add support for multiple independent pci quirk tables.
I want to reuse the quirk table approach for some
watermark quirks but I prefer to keep the details in
one place rather than spreading them all over.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_drv.h| 9 +
drivers/gpu/drm/i915/intel_quirks.c | 28 +++-
2 files changed, 24 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 81ec73e4a083..8924b43d6e99 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -2187,7 +2187,16 @@ int intel_psr_wait_for_idle(const struct
intel_crtc_state *new_crtc_state,
bool intel_psr_enabled(struct intel_dp *intel_dp);
/* intel_quirks.c */
+struct intel_pci_quirk {
+ int device;
+ int subsystem_vendor;
+ int subsystem_device;
+ void (*hook)(struct drm_i915_private *i915);
+};
+
void intel_init_quirks(struct drm_i915_private *dev_priv);
+void intel_apply_pci_quirks(struct drm_i915_private *i915,
+ const struct intel_pci_quirk *quirks);
/* intel_runtime_pm.c */
void intel_runtime_pm_init_early(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_quirks.c
b/drivers/gpu/drm/i915/intel_quirks.c
index ec2b0fc92b8b..e073510553a6 100644
--- a/drivers/gpu/drm/i915/intel_quirks.c
+++ b/drivers/gpu/drm/i915/intel_quirks.c
@@ -52,13 +52,6 @@ static void quirk_increase_ddi_disabled_time(struct
drm_i915_private *i915)
DRM_INFO("Applying Increase DDI Disabled quirk\n");
}
-struct intel_quirk {
- int device;
- int subsystem_vendor;
- int subsystem_device;
- void (*hook)(struct drm_i915_private *i915);
-};
-
/* For systems that don't have a meaningful PCI subdevice/subvendor ID */
struct intel_dmi_quirk {
void (*hook)(struct drm_i915_private *i915);
@@ -87,7 +80,7 @@ static const struct intel_dmi_quirk intel_dmi_quirks[] = {
},
};
-static struct intel_quirk intel_quirks[] = {
+static const struct intel_pci_quirk intel_pci_quirks[] = {
/* Lenovo U160 cannot use SSC on LVDS */
{ 0x0046, 0x17aa, 0x3920, quirk_ssc_force_disable },
@@ -145,16 +138,17 @@ static struct intel_quirk intel_quirks[] = {
/* ASRock ITX*/
{ 0x3185, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
{ 0x3184, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
+
+ {}
};
-void intel_init_quirks(struct drm_i915_private *i915)
+void intel_apply_pci_quirks(struct drm_i915_private *i915,
+ const struct intel_pci_quirk *quirks)
{
struct pci_dev *d = i915->drm.pdev;
- int i;
-
- for (i = 0; i < ARRAY_SIZE(intel_quirks); i++) {
- struct intel_quirk *q = _quirks[i];
+ const struct intel_pci_quirk *q;
+ for (q = quirks; q->device; q++) {
if (d->device == q->device &&
(d->subsystem_vendor == q->subsystem_vendor ||
q->subsystem_vendor == PCI_ANY_ID) &&
@@ -162,6 +156,14 @@ void intel_init_quirks(struct drm_i915_private *i915)
q->subsystem_device == PCI_ANY_ID))
q->hook(i915);
}
+}
+
+void intel_init_quirks(struct drm_i915_private *i915)
+{
+ int i;
+
+ intel_apply_pci_quirks(i915, intel_pci_quirks);
+
for (i = 0; i < ARRAY_SIZE(intel_dmi_quirks); i++) {
if (dmi_check_system(*intel_dmi_quirks[i].dmi_id_list) != 0)
intel_dmi_quirks[i].hook(i915);
--
2.19.2
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[Intel-gfx] [PATCH 3/4] drm/i915: Use intel_apply_pci_quirks() to apply ILK+ wm quirks
From: Ville Syrjälä
Use the newly introduced intel_apply_pci_quirks() to clean up
the way we apply the ilk+ watermark quirks.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_pm.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 75dceac19950..2a4b5014f56e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3059,10 +3059,17 @@ static void ilk_wm_disable_lp1_quirk(struct
drm_i915_private *dev_priv)
ilk_wm_disable_quirk(dev_priv, 1);
}
+static const struct intel_pci_quirk ilk_wm_quirks[] = {
+ /*
+* Lenovo Thinkpad T431s (ivb)
+* Massive underruns with LP1+.
+*/
+ { 0x0166, 0x17aa, 0x2208, ilk_wm_disable_lp1_quirk },
+ {}
+};
+
static void ilk_setup_wm_latency(struct drm_i915_private *dev_priv)
{
- struct pci_dev *pdev = dev_priv->drm.pdev;
-
intel_read_wm_latency(dev_priv, dev_priv->wm.pri_latency);
memcpy(dev_priv->wm.spr_latency, dev_priv->wm.pri_latency,
@@ -3082,14 +3089,7 @@ static void ilk_setup_wm_latency(struct drm_i915_private
*dev_priv)
snb_wm_lp3_irq_quirk(dev_priv);
}
- /*
-* Lenovo Thinkpad T431s (ivb)
-* Massive underruns.
-*/
- if (pdev->device == 0x0166 &&
- pdev->subsystem_vendor == 0x17aa &&
- pdev->subsystem_device == 0x2208)
- ilk_wm_disable_lp1_quirk(dev_priv);
+ intel_apply_pci_quirks(dev_priv, ilk_wm_quirks);
}
static void skl_setup_wm_latency(struct drm_i915_private *dev_priv)
--
2.19.2
___
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[Intel-gfx] [PATCH 1/4] drm/i915: Disable LP1+ watermarks on Lenovo Thinkpad T431s
From: Ville Syrjälä
Lenovo Thinkpad T431s (ivb) apparently can't handle LP1+ watermarks
being enabled. It underruns severly enough that the screen is
unusable. The latency values and watemarks look as expected.
And sadly updating the BIOS to the latest version (BIOS GHET41WW
(1.26 ) 11/21/2018) did not help.
One glimmer of hope I had was the VBT. It seems to have some sort
of flag for "self refresh = yes/no", but when I looked at a bunch
of VBTs I had lying around most of them had that field set to "no".
So if we used that we'd end up disabling LP1+ on most machines.
That seems a bit harsh since we know LP1+ works just fine on
most machines.
Since I have no better ideas let's just disable LP1+ watermarks
on this particular machine via a quirk.
Cc: sta...@vger.kernel.org
Cc: Andrea
Reported-by: Andrea
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109477
Fixes: a46a7350b1e8 ("drm/i915: Fix ilk+ watermarks when disabling pipes")
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_pm.c | 51 +
1 file changed, 39 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 4c0e43caa5cd..75dceac19950 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3015,6 +3015,29 @@ static void snb_wm_latency_quirk(struct drm_i915_private
*dev_priv)
intel_print_wm_latency(dev_priv, "Cursor", dev_priv->wm.cur_latency);
}
+static void ilk_wm_disable_quirk(struct drm_i915_private *dev_priv,
+int level)
+{
+ int max_level = ilk_wm_max_level(dev_priv);
+
+ if (dev_priv->wm.pri_latency[level] == 0 &&
+ dev_priv->wm.spr_latency[level] == 0 &&
+ dev_priv->wm.cur_latency[level] == 0)
+ return;
+
+ DRM_DEBUG_KMS("LP%d+ watermarks disabled by quirk\n", level);
+
+ for (; level <= max_level; level++) {
+ dev_priv->wm.pri_latency[level] = 0;
+ dev_priv->wm.spr_latency[level] = 0;
+ dev_priv->wm.cur_latency[level] = 0;
+ }
+
+ intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency);
+ intel_print_wm_latency(dev_priv, "Sprite", dev_priv->wm.spr_latency);
+ intel_print_wm_latency(dev_priv, "Cursor", dev_priv->wm.cur_latency);
+}
+
static void snb_wm_lp3_irq_quirk(struct drm_i915_private *dev_priv)
{
/*
@@ -3028,23 +3051,18 @@ static void snb_wm_lp3_irq_quirk(struct
drm_i915_private *dev_priv)
* interrupts only. To play it safe we disable LP3
* watermarks entirely.
*/
- if (dev_priv->wm.pri_latency[3] == 0 &&
- dev_priv->wm.spr_latency[3] == 0 &&
- dev_priv->wm.cur_latency[3] == 0)
- return;
-
- dev_priv->wm.pri_latency[3] = 0;
- dev_priv->wm.spr_latency[3] = 0;
- dev_priv->wm.cur_latency[3] = 0;
+ ilk_wm_disable_quirk(dev_priv, 3);
+}
- DRM_DEBUG_KMS("LP3 watermarks disabled due to potential for lost
interrupts\n");
- intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency);
- intel_print_wm_latency(dev_priv, "Sprite", dev_priv->wm.spr_latency);
- intel_print_wm_latency(dev_priv, "Cursor", dev_priv->wm.cur_latency);
+static void ilk_wm_disable_lp1_quirk(struct drm_i915_private *dev_priv)
+{
+ ilk_wm_disable_quirk(dev_priv, 1);
}
static void ilk_setup_wm_latency(struct drm_i915_private *dev_priv)
{
+ struct pci_dev *pdev = dev_priv->drm.pdev;
+
intel_read_wm_latency(dev_priv, dev_priv->wm.pri_latency);
memcpy(dev_priv->wm.spr_latency, dev_priv->wm.pri_latency,
@@ -3063,6 +3081,15 @@ static void ilk_setup_wm_latency(struct drm_i915_private
*dev_priv)
snb_wm_latency_quirk(dev_priv);
snb_wm_lp3_irq_quirk(dev_priv);
}
+
+ /*
+* Lenovo Thinkpad T431s (ivb)
+* Massive underruns.
+*/
+ if (pdev->device == 0x0166 &&
+ pdev->subsystem_vendor == 0x17aa &&
+ pdev->subsystem_device == 0x2208)
+ ilk_wm_disable_lp1_quirk(dev_priv);
}
static void skl_setup_wm_latency(struct drm_i915_private *dev_priv)
--
2.19.2
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[Intel-gfx] [PATCH 4/4] drm/i915: Restrict SNB LP3+ disable to Thinkpad X220 tablet
From: Ville Syrjälä
The only machine we know for sure to require the LP3+ disable
is the Lenovo Thinkpad X220 tablet. Originally in commit
03981c6ebec4 ("drm/i915: Disable LP3 watermarks on all SNB
machines") I disabled LP3+ watermarks on all SNB machines,
partially for safety, and partially since I didn't want to
add a quirk. But since we now have another watermark quirk
anyway let's reduce the SNB LP3+ disable scope to the x220
tablet only.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_pm.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2a4b5014f56e..b225461455c2 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3038,7 +3038,7 @@ static void ilk_wm_disable_quirk(struct drm_i915_private
*dev_priv,
intel_print_wm_latency(dev_priv, "Cursor", dev_priv->wm.cur_latency);
}
-static void snb_wm_lp3_irq_quirk(struct drm_i915_private *dev_priv)
+static void ilk_wm_disable_lp3(struct drm_i915_private *dev_priv)
{
/*
* On some SNB machines (Thinkpad X220 Tablet at least)
@@ -3060,6 +3060,11 @@ static void ilk_wm_disable_lp1_quirk(struct
drm_i915_private *dev_priv)
}
static const struct intel_pci_quirk ilk_wm_quirks[] = {
+ /*
+* Lenovo ThinkPad X220 Tablet (snb)
+* CPU doesn't wake up for vblank interrupts with LP3.
+*/
+ { 0x0126, 0x17aa, 0x21db, ilk_wm_disable_lp3 },
/*
* Lenovo Thinkpad T431s (ivb)
* Massive underruns with LP1+.
@@ -3084,10 +3089,8 @@ static void ilk_setup_wm_latency(struct drm_i915_private
*dev_priv)
intel_print_wm_latency(dev_priv, "Sprite", dev_priv->wm.spr_latency);
intel_print_wm_latency(dev_priv, "Cursor", dev_priv->wm.cur_latency);
- if (IS_GEN(dev_priv, 6)) {
+ if (IS_GEN(dev_priv, 6))
snb_wm_latency_quirk(dev_priv);
- snb_wm_lp3_irq_quirk(dev_priv);
- }
intel_apply_pci_quirks(dev_priv, ilk_wm_quirks);
}
--
2.19.2
___
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Sort newer to older platforms. (rev2)
== Series Details == Series: drm/i915: Sort newer to older platforms. (rev2) URL : https://patchwork.freedesktop.org/series/57051/ State : success == Summary == CI Bug Log - changes from CI_DRM_5651_full -> Patchwork_12280_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12280_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_softpin@evict-snoop: - shard-iclb: NOTRUN -> SKIP [fdo#109312] * igt@i915_pm_rpm@fences: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +2 * igt@i915_selftest@live_workarounds: - shard-iclb: PASS -> DMESG-FAIL [fdo#108954] * igt@kms_atomic_transition@4x-modeset-transitions: - shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] * igt@kms_atomic_transition@6x-modeset-transitions-nonblocking-fencing: - shard-iclb: NOTRUN -> SKIP [fdo#109278] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: - shard-kbl: PASS -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c: - shard-hsw: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-b-crc-primary-rotation-180: - shard-iclb: NOTRUN -> FAIL [fdo#107725] * igt@kms_chamelium@dp-hpd-after-suspend: - shard-iclb: NOTRUN -> SKIP [fdo#109284] * igt@kms_color@pipe-a-legacy-gamma: - shard-apl: PASS -> FAIL [fdo#104782] / [fdo#108145] * igt@kms_cursor_crc@cursor-128x42-onscreen: - shard-apl: PASS -> FAIL [fdo#103232] +1 * igt@kms_cursor_crc@cursor-256x256-suspend: - shard-apl: PASS -> FAIL [fdo#103191] / [fdo#103232] * igt@kms_cursor_crc@cursor-512x512-offscreen: - shard-iclb: NOTRUN -> SKIP [fdo#109279] * igt@kms_cursor_crc@cursor-alpha-opaque: - shard-glk: PASS -> FAIL [fdo#109350] * igt@kms_flip@2x-absolute-wf_vblank: - shard-iclb: NOTRUN -> SKIP [fdo#109274] +1 * igt@kms_flip@dpms-vs-vblank-race-interruptible: - shard-kbl: PASS -> FAIL [fdo#103060] * igt@kms_flip@flip-vs-suspend-interruptible: - shard-apl: PASS -> INCOMPLETE [fdo#103927] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu: - shard-glk: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: - shard-apl: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-cpu: - shard-iclb: NOTRUN -> SKIP [fdo#109280] +4 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt: - shard-iclb: PASS -> FAIL [fdo#103167] +4 * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-pwrite: - shard-hsw: NOTRUN -> SKIP [fdo#109271] +27 * igt@kms_frontbuffer_tracking@psr-slowdraw: - shard-apl: NOTRUN -> SKIP [fdo#109271] +7 * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping: - shard-glk: PASS -> FAIL [fdo#108948] * igt@kms_plane_alpha_blend@pipe-c-alpha-basic: - shard-hsw: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1 * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb: - shard-apl: PASS -> FAIL [fdo#108145] * igt@kms_plane_multiple@atomic-pipe-a-tiling-y: - shard-apl: PASS -> FAIL [fdo#103166] - shard-iclb: PASS -> FAIL [fdo#103166] +3 * igt@kms_plane_multiple@atomic-pipe-c-tiling-y: - shard-glk: PASS -> FAIL [fdo#103166] * igt@kms_psr@psr2_cursor_plane_onoff: - shard-iclb: NOTRUN -> SKIP [fdo#109441] * igt@kms_vrr@flip-suspend: - shard-iclb: NOTRUN -> SKIP [fdo#109502] * igt@prime_nv_pcopy@test3_5: - shard-iclb: NOTRUN -> SKIP [fdo#109291] Possible fixes * igt@i915_pm_rpm@gem-execbuf-stress-extra-wait: - shard-iclb: DMESG-WARN [fdo#107724] -> PASS * igt@kms_atomic_transition@plane-all-modeset-transition: - shard-apl: INCOMPLETE [fdo#103927] -> PASS * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-glk: FAIL [fdo#108145] -> PASS * igt@kms_color@pipe-a-degamma: - shard-apl: FAIL [fdo#104782] / [fdo#108145] -> PASS * igt@kms_color@pipe-b-ctm-max: - shard-apl: FAIL [fdo#108147] -> PASS * igt@kms_cursor_crc@cursor-256x85-sliding: - shard-apl: FAIL [fdo#103232] -> PASS +3 * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-render: - shard-glk: FAIL [fdo#103167] -> PASS * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite: - shard-iclb: FAIL [fdo#103167] -> PASS +2 *
[Intel-gfx] ✗ Fi.CI.IGT: failure for RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access (rev5)
== Series Details ==
Series: RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access (rev5)
URL : https://patchwork.freedesktop.org/series/57039/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5651_full -> IGTPW_2484_full
Summary
---
**FAILURE**
Serious unknown changes coming with IGTPW_2484_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_2484_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/57039/revisions/5/mbox/
Possible new issues
---
Here are the unknown changes that may have been introduced in IGTPW_2484_full:
### IGT changes ###
Possible regressions
* igt@gem_ctx_isolation@rcs0-dirty-switch:
- shard-glk: PASS -> FAIL +2
* igt@gem_ctx_isolation@rcs0-reset:
- shard-apl: PASS -> FAIL
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: PASS -> FAIL
New tests
-
New tests have been introduced between CI_DRM_5651_full and IGTPW_2484_full:
### New IGT tests (5) ###
* igt@gem_ctx_isolation@bcs0-nonpriv:
- Statuses : 3 pass(s) 2 skip(s)
- Exec time: [0.0, 0.14] s
* igt@gem_ctx_isolation@rcs0-nonpriv:
- Statuses : 5 pass(s)
- Exec time: [0.04, 0.14] s
* igt@gem_ctx_isolation@vcs0-nonpriv:
- Statuses : 3 pass(s) 2 skip(s)
- Exec time: [0.0, 0.14] s
* igt@gem_ctx_isolation@vcs1-nonpriv:
- Statuses : 1 pass(s) 4 skip(s)
- Exec time: [0.0, 0.04] s
* igt@gem_ctx_isolation@vecs0-nonpriv:
- Statuses : 3 pass(s) 2 skip(s)
- Exec time: [0.0, 0.14] s
Known issues
Here are the changes found in IGTPW_2484_full that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_isolation@rcs0-dirty-switch:
- shard-apl: PASS -> FAIL [fdo#109472]
- shard-kbl: PASS -> FAIL [fdo#109472]
* {igt@gem_ctx_isolation@vcs1-nonpriv} (NEW):
- shard-snb: NOTRUN -> SKIP [fdo#109271] +7
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-kbl: NOTRUN -> SKIP [fdo#109271] +5
* igt@gem_userptr_blits@process-exit-gtt:
- shard-glk: NOTRUN -> SKIP [fdo#109271] +24
* igt@i915_pm_rc6_residency@rc6-accuracy:
- shard-kbl: PASS -> SKIP [fdo#109271]
* igt@i915_suspend@sysfs-reader:
- shard-snb: PASS -> INCOMPLETE [fdo#105411]
* igt@kms_atomic_transition@4x-modeset-transitions:
- shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_atomic_transition@plane-all-modeset-transition:
- shard-hsw: PASS -> DMESG-WARN [fdo#102614]
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c:
- shard-kbl: PASS -> DMESG-WARN [fdo#107956]
* igt@kms_busy@extended-pageflip-hang-newfb-render-e:
- shard-glk: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
- shard-hsw: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-glk: PASS -> FAIL [fdo#108145]
* igt@kms_color@pipe-a-ctm-max:
- shard-apl: PASS -> FAIL [fdo#108147]
* igt@kms_color@pipe-c-legacy-gamma:
- shard-apl: PASS -> FAIL [fdo#104782]
* igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-apl: PASS -> FAIL [fdo#103191] / [fdo#103232]
* igt@kms_cursor_crc@cursor-64x21-sliding:
- shard-apl: PASS -> FAIL [fdo#103232] +2
* igt@kms_cursor_crc@cursor-64x64-onscreen:
- shard-kbl: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-kbl: PASS -> FAIL [fdo#103191] / [fdo#103232]
* igt@kms_cursor_legacy@cursor-vs-flip-atomic:
- shard-hsw: PASS -> FAIL [fdo#103355]
* igt@kms_frontbuffer_tracking@fbc-1p-rte:
- shard-kbl: PASS -> FAIL [fdo#103167] / [fdo#105682]
- shard-apl: PASS -> FAIL [fdo#103167] / [fdo#105682]
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff:
- shard-glk: PASS -> FAIL [fdo#103167] +9
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-pwrite:
- shard-hsw: NOTRUN -> SKIP [fdo#109271] +30
* igt@kms_frontbuffer_tracking@psr-slowdraw:
- shard-apl: NOTRUN -> SKIP [fdo#109271] +14
* igt@kms_plane@pixel-format-pipe-a-planes-source-clamping:
- shard-apl: PASS -> FAIL [fdo#108948]
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-apl: PASS -> INCOMPLETE [fdo#103927]
* igt@kms_plane_alpha_blend@pipe-c-alpha-basic:
- shard-hsw: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
*
Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 1/2] lib: Add --skip-crc-compare option
On Wed, Feb 20, 2019 at 04:34:21PM -0800, Matt Roper wrote:
> When using --interactive-debug, it's sometimes desirable to ignore CRC
> mismatches and let the test proceed as if they passed so that the
> on-screen outcome can be inspected. Let's add a debug option to allow
> this.
>
> Cc: igt-...@lists.freedesktop.org
> Signed-off-by: Matt Roper
> ---
> lib/igt_core.c| 7 +++
> lib/igt_core.h| 1 +
> lib/igt_debugfs.c | 8 +++-
> 3 files changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/lib/igt_core.c b/lib/igt_core.c
> index 71b05d3b..5523950f 100644
> --- a/lib/igt_core.c
> +++ b/lib/igt_core.c
> @@ -256,6 +256,7 @@
>
> static unsigned int exit_handler_count;
> const char *igt_interactive_debug;
> +bool igt_skip_crc_compare;
>
> /* subtests helpers */
> static bool list_subtests = false;
> @@ -285,6 +286,7 @@ enum {
> OPT_DESCRIPTION,
> OPT_DEBUG,
> OPT_INTERACTIVE_DEBUG,
> + OPT_SKIP_CRC,
> OPT_HELP = 'h'
> };
>
> @@ -552,6 +554,7 @@ static void print_usage(const char *help_str, bool
> output_on_stderr)
> " --run-subtest \n"
> " --debug[=log-domain]\n"
> " --interactive-debug[=domain]\n"
> +" --skip-crc-compare\n"
> " --help-description\n"
> " --help\n");
> if (help_str)
> @@ -668,6 +671,7 @@ static int common_init(int *argc, char **argv,
> {"help-description", 0, 0, OPT_DESCRIPTION},
> {"debug", optional_argument, 0, OPT_DEBUG},
> {"interactive-debug", optional_argument, 0,
> OPT_INTERACTIVE_DEBUG},
> + {"skip-crc-compare", 0, 0, OPT_SKIP_CRC},
> {"help", 0, 0, OPT_HELP},
> {0, 0, 0, 0}
> };
> @@ -768,6 +772,9 @@ static int common_init(int *argc, char **argv,
> print_test_description();
> ret = -1;
> goto out;
> + case OPT_SKIP_CRC:
> + igt_skip_crc_compare = true;
> + goto out;
> case OPT_HELP:
> print_usage(help_str, false);
> ret = -1;
> diff --git a/lib/igt_core.h b/lib/igt_core.h
> index 47ffd9e7..f12fc5cb 100644
> --- a/lib/igt_core.h
> +++ b/lib/igt_core.h
> @@ -843,6 +843,7 @@ bool igt_run_in_simulation(void);
> void igt_skip_on_simulation(void);
>
> extern const char *igt_interactive_debug;
> +extern bool igt_skip_crc_compare;
>
> /**
> * igt_log_level:
> diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c
> index 640c78e9..04d1648b 100644
> --- a/lib/igt_debugfs.c
> +++ b/lib/igt_debugfs.c
> @@ -405,6 +405,12 @@ static bool igt_find_crc_mismatch(const igt_crc_t *a,
> const igt_crc_t *b,
> * assert that CRCs match, never that they are different. Otherwise there
> might
> * be random testcase failures when different screen contents end up with the
> * same CRC by chance.
> + *
> + * Passing --skip-crc-compare on the command line will force this function
> + * to always pass, which can be useful in interactive debugging where you
> + * might know the test will fail, but still want the test to keep going as if
> + * it had succeeded so that you can see the on-screen behavior.
> + *
> */
> void igt_assert_crc_equal(const igt_crc_t *a, const igt_crc_t *b)
> {
> @@ -416,7 +422,7 @@ void igt_assert_crc_equal(const igt_crc_t *a, const
> igt_crc_t *b)
> igt_debug("CRC mismatch at index %d: 0x%x != 0x%x\n", index,
> a->crc[index], b->crc[index]);
>
> - igt_assert(!mismatch);
> + igt_assert(!mismatch || igt_skip_crc_compare);
I think an igt_debug line here could be useful when we skip the assert.
With that
Reviewed-by: Daniel Vetter
aka Ville convinced me.
-Daniel
> }
>
> /**
> --
> 2.14.5
>
> ___
> igt-dev mailing list
> igt-...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Always sample an active ringbuffer
== Series Details == Series: drm/i915/pmu: Always sample an active ringbuffer URL : https://patchwork.freedesktop.org/series/57090/ State : success == Summary == CI Bug Log - changes from CI_DRM_5654 -> Patchwork_12283 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/57090/revisions/1/mbox/ Known issues Here are the changes found in Patchwork_12283 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_basic@memory-alloc: - fi-ivb-3520m: NOTRUN -> SKIP [fdo#109271] +48 * igt@kms_chamelium@dp-hpd-fast: - fi-skl-6700k2: NOTRUN -> SKIP [fdo#109271] +41 * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: - fi-ilk-650: PASS -> DMESG-WARN [fdo#106387] - fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718] Possible fixes * igt@i915_selftest@live_evict: - fi-bsw-kefka: DMESG-WARN [fdo#107709] -> PASS [fdo#106387]: https://bugs.freedesktop.org/show_bug.cgi?id=106387 [fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 Participating hosts (43 -> 39) -- Additional (2): fi-ivb-3520m fi-skl-6700k2 Missing(6): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus Build changes - * Linux: CI_DRM_5654 -> Patchwork_12283 CI_DRM_5654: 30c7f283790b433aa311ef7a7d2b6b428886fb9a @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4851: 2b7dd10a4e2ea0cabff68421fd15e96c99be3cad @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12283: 1136d68a2163eb4d4f783bf144119f952650b18f @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 1136d68a2163 drm/i915/pmu: Always sample an active ringbuffer == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12283/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access (rev4)
== Series Details ==
Series: RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access (rev4)
URL : https://patchwork.freedesktop.org/series/57039/
State : failure
== Summary ==
CI Bug Log - changes from IGT_4851_full -> IGTPW_2483_full
Summary
---
**FAILURE**
Serious unknown changes coming with IGTPW_2483_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_2483_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/57039/revisions/4/mbox/
Possible new issues
---
Here are the unknown changes that may have been introduced in IGTPW_2483_full:
### IGT changes ###
Possible regressions
* igt@gem_ctx_isolation@rcs0-dirty-switch:
- shard-glk: PASS -> FAIL +2
* {igt@gem_ctx_isolation@rcs0-nonpriv} (NEW):
- shard-hsw: NOTRUN -> FAIL
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: PASS -> FAIL
- shard-apl: PASS -> FAIL +1
New tests
-
New tests have been introduced between IGT_4851_full and IGTPW_2483_full:
### New IGT tests (5) ###
* igt@gem_ctx_isolation@bcs0-nonpriv:
- Statuses : 3 pass(s) 2 skip(s)
- Exec time: [0.0, 0.14] s
* igt@gem_ctx_isolation@rcs0-nonpriv:
- Statuses : 1 fail(s) 4 pass(s)
- Exec time: [0.03, 0.16] s
* igt@gem_ctx_isolation@vcs0-nonpriv:
- Statuses : 3 pass(s) 2 skip(s)
- Exec time: [0.0, 0.14] s
* igt@gem_ctx_isolation@vcs1-nonpriv:
- Statuses : 1 pass(s) 4 skip(s)
- Exec time: [0.0, 0.05] s
* igt@gem_ctx_isolation@vecs0-nonpriv:
- Statuses : 3 pass(s) 2 skip(s)
- Exec time: [0.0, 0.14] s
Known issues
Here are the changes found in IGTPW_2483_full that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_isolation@rcs0-dirty-switch:
- shard-apl: PASS -> FAIL [fdo#109472]
- shard-kbl: PASS -> FAIL [fdo#109472]
* {igt@gem_ctx_isolation@vcs1-nonpriv} (NEW):
- shard-snb: NOTRUN -> SKIP [fdo#109271] +7
* {igt@gem_ctx_isolation@vecs0-nonpriv} (NEW):
- shard-hsw: NOTRUN -> SKIP [fdo#109271] +3
* igt@gem_exec_store@basic-bsd2:
- shard-apl: NOTRUN -> SKIP [fdo#109271] +36
* igt@gem_userptr_blits@process-exit-gtt:
- shard-glk: NOTRUN -> SKIP [fdo#109271] +24
* igt@kms_atomic_transition@plane-all-modeset-transition:
- shard-kbl: PASS -> INCOMPLETE [fdo#103665]
* igt@kms_busy@extended-pageflip-hang-newfb-render-e:
- shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +2
- shard-glk: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
* igt@kms_cursor_crc@cursor-128x128-suspend:
- shard-apl: PASS -> FAIL [fdo#103191] / [fdo#103232]
* igt@kms_cursor_crc@cursor-64x21-random:
- shard-apl: PASS -> FAIL [fdo#103232] +3
- shard-kbl: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
- shard-glk: PASS -> FAIL [fdo#104873]
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: PASS -> FAIL [fdo#102887] / [fdo#105363]
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-onoff:
- shard-glk: PASS -> FAIL [fdo#103167] +3
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-pwrite:
- shard-kbl: NOTRUN -> SKIP [fdo#109271] +4
* igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
- shard-apl: PASS -> FAIL [fdo#108145]
* igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
- shard-apl: PASS -> FAIL [fdo#103166] +4
- shard-kbl: PASS -> FAIL [fdo#103166] +2
* igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
- shard-glk: PASS -> FAIL [fdo#103166] +5
* igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
- shard-glk: PASS -> DMESG-FAIL [fdo#105763] / [fdo#106538]
- shard-kbl: PASS -> DMESG-FAIL [fdo#105763]
* igt@kms_setmode@basic:
- shard-apl: PASS -> FAIL [fdo#99912]
* igt@kms_vblank@pipe-c-ts-continuation-modeset:
- shard-kbl: PASS -> FAIL [fdo#104894] +1
- shard-apl: PASS -> FAIL [fdo#104894] +3
* igt@perf@blocking:
- shard-apl: PASS -> INCOMPLETE [fdo#103927] +1
Possible fixes
* igt@kms_color@pipe-a-degamma:
- shard-kbl: FAIL [fdo#104782] / [fdo#108145] -> PASS
* igt@kms_color@pipe-a-gamma:
- shard-kbl: FAIL [fdo#104782] -> PASS
* igt@kms_cursor_crc@cursor-128x128-dpms:
- shard-kbl: FAIL [fdo#103232] -> PASS
* igt@kms_cursor_crc@cursor-64x21-sliding:
- shard-apl: FAIL [fdo#103232] -> PASS +5
*
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Remove unused HAS_PCH_CNP_LP
== Series Details == Series: drm/i915: Remove unused HAS_PCH_CNP_LP URL : https://patchwork.freedesktop.org/series/57048/ State : success == Summary == CI Bug Log - changes from CI_DRM_5650_full -> Patchwork_12279_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12279_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_busy@extended-semaphore-bsd1: - shard-iclb: NOTRUN -> SKIP [fdo#109275] / [fdo#109276] * igt@gem_ctx_isolation@rcs0-s3: - shard-iclb: NOTRUN -> SKIP [fdo#109281] +1 * igt@gem_ctx_param@invalid-param-get: - shard-snb: NOTRUN -> FAIL [fdo#109559] * igt@gem_ctx_param@invalid-param-set: - shard-snb: NOTRUN -> FAIL [fdo#109674] * igt@gem_exec_parse@oacontrol-tracking: - shard-iclb: NOTRUN -> SKIP [fdo#109289] * igt@gem_exec_reuse@contexts: - shard-snb: NOTRUN -> INCOMPLETE [fdo#105411] * igt@gem_exec_schedule@preempt-contexts-bsd2: - shard-iclb: NOTRUN -> SKIP [fdo#109276] +9 * igt@gem_exec_schedule@preempt-other-chain-blt: - shard-snb: NOTRUN -> SKIP [fdo#109271] +1217 * igt@gem_mocs_settings@mocs-reset-bsd1: - shard-iclb: NOTRUN -> SKIP [fdo#109276] / [fdo#109287] * igt@gem_mocs_settings@mocs-reset-ctx-render: - shard-iclb: NOTRUN -> SKIP [fdo#109287] +2 * igt@gem_pwrite@huge-cpu-backwards: - shard-iclb: NOTRUN -> SKIP [fdo#109290] * igt@gem_stolen@stolen-fill-purge: - shard-iclb: NOTRUN -> SKIP [fdo#109277] * igt@i915_pm_rpm@modeset-non-lpsp-stress: - shard-iclb: NOTRUN -> SKIP [fdo#109308] * igt@i915_pm_rpm@pm-caching: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +4 * igt@i915_pm_rps@min-max-config-loaded: - shard-iclb: NOTRUN -> FAIL [fdo#102250] * igt@kms_busy@basic-flip-d: - shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +134 * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: - shard-snb: NOTRUN -> DMESG-WARN [fdo#107956] +5 - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] - shard-hsw: PASS -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-d: - shard-iclb: NOTRUN -> SKIP [fdo#109278] +4 * igt@kms_ccs@pipe-a-crc-primary-basic: - shard-iclb: NOTRUN -> FAIL [fdo#107725] * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-glk: PASS -> FAIL [fdo#108145] * igt@kms_chamelium@hdmi-edid-read: - shard-iclb: NOTRUN -> SKIP [fdo#109284] +2 * igt@kms_cursor_crc@cursor-64x21-sliding: - shard-iclb: NOTRUN -> FAIL [fdo#103232] * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic: - shard-iclb: NOTRUN -> SKIP [fdo#109274] +5 * igt@kms_cursor_legacy@pipe-b-torture-move: - shard-kbl: PASS -> DMESG-WARN [fdo#107122] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-glk: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-plflip-blt: - shard-iclb: NOTRUN -> SKIP [fdo#109280] +17 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt: - shard-iclb: PASS -> FAIL [fdo#103167] +3 * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] +1 * igt@kms_plane@plane-position-covered-pipe-a-planes: - shard-iclb: PASS -> FAIL [fdo#103166] +4 * igt@kms_plane_multiple@atomic-pipe-b-tiling-none: - shard-glk: PASS -> FAIL [fdo#103166] * igt@kms_plane_multiple@atomic-pipe-c-tiling-x: - shard-apl: PASS -> FAIL [fdo#103166] * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-kbl: PASS -> FAIL [fdo#109016] * igt@kms_setmode@basic: - shard-kbl: PASS -> FAIL [fdo#99912] - shard-snb: NOTRUN -> FAIL [fdo#99912] * igt@kms_tv_load_detect@load-detect: - shard-iclb: NOTRUN -> SKIP [fdo#109309] * igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend: - shard-apl: PASS -> FAIL [fdo#104894] * igt@perf_pmu@rc6: - shard-kbl: PASS -> SKIP [fdo#109271] * igt@prime_nv_pcopy@test3_3: - shard-iclb: NOTRUN -> SKIP [fdo#109291] Possible fixes * igt@i915_pm_rpm@cursor-dpms: - shard-iclb: DMESG-WARN [fdo#107724] -> PASS +1 * igt@i915_pm_rpm@gem-evict-pwrite: - shard-iclb: INCOMPLETE [fdo#108840] -> PASS * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: - shard-apl: DMESG-WARN [fdo#107956] -> PASS * igt@kms_color@pipe-c-legacy-gamma: - shard-apl: FAIL [fdo#104782] -> PASS * igt@kms_cursor_crc@cursor-128x128-onscreen: -
Re: [Intel-gfx] [PATCH v5] drm/i915/pmu: Always sample an active ringbuffer
Chris Wilson writes:
> As we no longer have a precise indication of requests queued to an
> engine, make no presumptions and just sample the ring registers to see
> if the engine is busy.
>
> v2: Report busy while the ring is idling on a semaphore/event.
> v3: Give the struct a name!
> v4: Always 0 outside the powerwell; trusting the powerwell is
> accurate enough for our sampling pmu.
> v5: Protect against gen7 mmio madness and try to improve grammar
>
> Signed-off-by: Chris Wilson
> Cc: Tvrtko Ursulin
> Cc: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/i915_pmu.c | 64 +++--
> drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +-
> 2 files changed, 28 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index 13d70b90dd0f..247b67b82f0e 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -148,14 +148,6 @@ void i915_pmu_gt_unparked(struct drm_i915_private *i915)
> spin_unlock_irq(>pmu.lock);
> }
>
> -static bool grab_forcewake(struct drm_i915_private *i915, bool fw)
> -{
> - if (!fw)
> - intel_uncore_forcewake_get(i915, FORCEWAKE_ALL);
> -
> - return true;
> -}
> -
> static void
> add_sample(struct i915_pmu_sample *sample, u32 val)
> {
> @@ -168,49 +160,47 @@ engines_sample(struct drm_i915_private *dev_priv,
> unsigned int period_ns)
> struct intel_engine_cs *engine;
> enum intel_engine_id id;
> intel_wakeref_t wakeref;
> - bool fw = false;
>
> if ((dev_priv->pmu.enable & ENGINE_SAMPLE_MASK) == 0)
> return;
>
> - if (!dev_priv->gt.awake)
> - return;
> -
> - wakeref = intel_runtime_pm_get_if_in_use(dev_priv);
> + wakeref = 0;
> + if (READ_ONCE(dev_priv->gt.awake))
> + wakeref = intel_runtime_pm_get_if_in_use(dev_priv);
> if (!wakeref)
> return;
>
> + spin_lock_irq(_priv->uncore.lock); /* prevent concurrent mmio */
I had to dig deep in memory. Perhaps I have wanted to forget.
But yeah, gen7 will blow up on concurrent mmio access.
Reviewed-by: Mika Kuoppala
> for_each_engine(engine, dev_priv, id) {
> - u32 current_seqno = intel_engine_get_seqno(engine);
> - u32 last_seqno = intel_engine_last_submit(engine);
> + struct intel_engine_pmu *pmu = >pmu;
> + bool busy;
> u32 val;
>
> - val = !i915_seqno_passed(current_seqno, last_seqno);
> -
> - if (val)
> - add_sample(>pmu.sample[I915_SAMPLE_BUSY],
> -period_ns);
> -
> - if (val && (engine->pmu.enable &
> - (BIT(I915_SAMPLE_WAIT) | BIT(I915_SAMPLE_SEMA {
> - fw = grab_forcewake(dev_priv, fw);
> -
> - val = I915_READ_FW(RING_CTL(engine->mmio_base));
> - } else {
> - val = 0;
> - }
> + val = I915_READ_FW(RING_CTL(engine->mmio_base));
> + if (val == 0) /* powerwell off => engine idle */
> + continue;
>
> if (val & RING_WAIT)
> - add_sample(>pmu.sample[I915_SAMPLE_WAIT],
> -period_ns);
> -
> + add_sample(>sample[I915_SAMPLE_WAIT], period_ns);
> if (val & RING_WAIT_SEMAPHORE)
> - add_sample(>pmu.sample[I915_SAMPLE_SEMA],
> -period_ns);
> - }
> + add_sample(>sample[I915_SAMPLE_SEMA], period_ns);
>
> - if (fw)
> - intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
> + /*
> + * While waiting on a semaphore or event, MI_MODE reports the
> + * ring as idle. However, previously using the seqno, and with
> + * execlists sampling, we account for the ring waiting as the
> + * engine being busy. Therefore, we record the sample as being
> + * busy if either waiting or !idle.
> + */
> + busy = val & (RING_WAIT_SEMAPHORE | RING_WAIT);
> + if (!busy) {
> + val = I915_READ_FW(RING_MI_MODE(engine->mmio_base));
> + busy = !(val & MODE_IDLE);
> + }
> + if (busy)
> + add_sample(>sample[I915_SAMPLE_BUSY], period_ns);
> + }
> + spin_unlock_irq(_priv->uncore.lock);
>
> intel_runtime_pm_put(dev_priv, wakeref);
> }
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h
> b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 710ffb221775..5d45ad4ecca9 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -392,7 +392,7 @@ struct intel_engine_cs {
> bool irq_armed;
> } breadcrumbs;
>
> - struct {
> + struct intel_engine_pmu {
>
[Intel-gfx] [PATCH i-g-t] i915/gem_ctx_isolation: Sanitycheck nonpriv access
Verify that our list of nonpriv registers exist and are writable.
Signed-off-by: Chris Wilson
Cc: Dale B Stimson
Cc: Tvrtko Ursulin
Cc: Joonas Lahtinen
---
tests/i915/gem_ctx_isolation.c | 164 +++--
1 file changed, 135 insertions(+), 29 deletions(-)
diff --git a/tests/i915/gem_ctx_isolation.c b/tests/i915/gem_ctx_isolation.c
index 839d49ade..32b8c0bc8 100644
--- a/tests/i915/gem_ctx_isolation.c
+++ b/tests/i915/gem_ctx_isolation.c
@@ -59,16 +59,23 @@ enum {
static const struct named_register {
const char *name;
- unsigned int gen_mask;
- unsigned int engine_mask;
- uint32_t offset;
+ unsigned int gen_mask; /* on which gen the register exists */
+ unsigned int engine_mask; /* preferred engine / powerwell */
+ uint32_t offset; /* address of register, from bottom of mmio bar */
uint32_t count;
uint32_t ignore_bits;
+ uint32_t write_mask; /* some registers bits do not exist */
bool masked;
} nonpriv_registers[] = {
{ "NOPID", NOCTX, RCS0, 0x2094 },
{ "MI_PREDICATE_RESULT_2", NOCTX, RCS0, 0x23bc },
- { "INSTPM", GEN6, RCS0, 0x20c0, 1, BIT(8) /* ro counter */, true },
+ {
+ "INSTPM",
+ GEN6, RCS0, 0x20c0,
+ .ignore_bits = BIT(8) /* ro counter */,
+ .write_mask = BIT(8) /* rsvd varies between gen */,
+ .masked = true,
+ },
{ "IA_VERTICES_COUNT", GEN4, RCS0, 0x2310, 2 },
{ "IA_PRIMITIVES_COUNT", GEN4, RCS0, 0x2318, 2 },
{ "VS_INVOCATION_COUNT", GEN4, RCS0, 0x2320, 2 },
@@ -78,7 +85,7 @@ static const struct named_register {
{ "GS_PRIMITIVES_COUNT", GEN4, RCS0, 0x2330, 2 },
{ "CL_INVOCATION_COUNT", GEN4, RCS0, 0x2338, 2 },
{ "CL_PRIMITIVES_COUNT", GEN4, RCS0, 0x2340, 2 },
- { "PS_INVOCATION_COUNT_0", GEN4, RCS0, 0x22c8, 2 },
+ { "PS_INVOCATION_COUNT_0", GEN4, RCS0, 0x22c8, 2, .write_mask = ~0x3 },
{ "PS_DEPTH_COUNT_0", GEN4, RCS0, 0x22d8, 2 },
{ "GPUGPU_DISPATCHDIMX", GEN8, RCS0, 0x2500 },
{ "GPUGPU_DISPATCHDIMY", GEN8, RCS0, 0x2504 },
@@ -86,7 +93,7 @@ static const struct named_register {
{ "MI_PREDICATE_SRC0", GEN8, RCS0, 0x2400, 2 },
{ "MI_PREDICATE_SRC1", GEN8, RCS0, 0x2408, 2 },
{ "MI_PREDICATE_DATA", GEN8, RCS0, 0x2410, 2 },
- { "MI_PRED_RESULT", GEN8, RCS0, 0x2418 },
+ { "MI_PRED_RESULT", GEN8, RCS0, 0x2418, .write_mask = 0x1 },
{ "3DPRIM_END_OFFSET", GEN6, RCS0, 0x2420 },
{ "3DPRIM_START_VERTEX", GEN6, RCS0, 0x2430 },
{ "3DPRIM_VERTEX_COUNT", GEN6, RCS0, 0x2434 },
@@ -94,45 +101,45 @@ static const struct named_register {
{ "3DPRIM_START_INSTANCE", GEN6, RCS0, 0x243c },
{ "3DPRIM_BASE_VERTEX", GEN6, RCS0, 0x2440 },
{ "GPGPU_THREADS_DISPATCHED", GEN8, RCS0, 0x2290, 2 },
- { "PS_INVOCATION_COUNT_1", GEN8, RCS0, 0x22f0, 2 },
+ { "PS_INVOCATION_COUNT_1", GEN8, RCS0, 0x22f0, 2, .write_mask = ~0x3 },
{ "PS_DEPTH_COUNT_1", GEN8, RCS0, 0x22f8, 2 },
{ "BB_OFFSET", GEN8, RCS0, 0x2158, .ignore_bits = 0x4 },
{ "MI_PREDICATE_RESULT_1", GEN8, RCS0, 0x241c },
{ "CS_GPR", GEN8, RCS0, 0x2600, 32 },
{ "OA_CTX_CONTROL", GEN8, RCS0, 0x2360 },
{ "OACTXID", GEN8, RCS0, 0x2364 },
- { "PS_INVOCATION_COUNT_2", GEN8, RCS0, 0x2448, 2 },
+ { "PS_INVOCATION_COUNT_2", GEN8, RCS0, 0x2448, 2, .write_mask = ~0x3 },
{ "PS_DEPTH_COUNT_2", GEN8, RCS0, 0x2450, 2 },
- { "Cache_Mode_0", GEN7, RCS0, 0x7000 },
- { "Cache_Mode_1", GEN7, RCS0, 0x7004 },
- { "GT_MODE", GEN8, RCS0, 0x7008 },
- { "L3_Config", GEN7, RCS0, 0x7034 },
- { "TD_CTL", GEN8, RCS0, 0xe400 },
+ { "Cache_Mode_0", GEN7, RCS0, 0x7000, .masked = true },
+ { "Cache_Mode_1", GEN7, RCS0, 0x7004, .masked = true },
+ { "GT_MODE", GEN8, RCS0, 0x7008, .masked = true },
+ { "L3_Config", GEN8, RCS0, 0x7034 },
+ { "TD_CTL", GEN8, RCS0, 0xe400, .masked = true },
{ "TD_CTL2", GEN8, RCS0, 0xe404 },
- { "SO_NUM_PRIMS_WRITEN0", GEN6, RCS0, 0x5200, 2 },
- { "SO_NUM_PRIMS_WRITEN1", GEN6, RCS0, 0x5208, 2 },
- { "SO_NUM_PRIMS_WRITEN2", GEN6, RCS0, 0x5210, 2 },
- { "SO_NUM_PRIMS_WRITEN3", GEN6, RCS0, 0x5218, 2 },
+ { "SO_NUM_PRIMS_WRITTEN0", GEN6, RCS0, 0x5200, 2 },
+ { "SO_NUM_PRIMS_WRITTEN1", GEN6, RCS0, 0x5208, 2 },
+ { "SO_NUM_PRIMS_WRITTEN2", GEN6, RCS0, 0x5210, 2 },
+ { "SO_NUM_PRIMS_WRITTEN3", GEN6, RCS0, 0x5218, 2 },
{ "SO_PRIM_STORAGE_NEEDED0", GEN6, RCS0, 0x5240, 2 },
{ "SO_PRIM_STORAGE_NEEDED1", GEN6, RCS0, 0x5248, 2 },
{ "SO_PRIM_STORAGE_NEEDED2", GEN6, RCS0, 0x5250, 2 },
{ "SO_PRIM_STORAGE_NEEDED3", GEN6, RCS0, 0x5258, 2 },
- { "SO_WRITE_OFFSET0", GEN7, RCS0, 0x5280 },
- { "SO_WRITE_OFFSET1", GEN7, RCS0, 0x5284 },
- { "SO_WRITE_OFFSET2", GEN7, RCS0, 0x5288 },
- {
Re: [Intel-gfx] [PATCH 08/25] drm/i915/pmu: Always sample an active ringbuffer
Chris Wilson writes:
> Quoting Mika Kuoppala (2019-02-22 12:10:33)
>> Chris Wilson writes:
>>
>> > As we no longer have a precise indication of requests queued to an
>> > engine, make no presumptions and just sample the ring registers to see
>> > if the engine is busy.
>> >
>> > v2: Report busy while the ring is idling on a semaphore/event.
>> > v3: Give the struct a name!
>> > v4: Always 0 outside the powerwell; trusting the powerwell is
>> > accurate enough for our sampling pmu.
>> >
>> > Signed-off-by: Chris Wilson
>> > Cc: Tvrtko Ursulin
>> > ---
>> > drivers/gpu/drm/i915/i915_pmu.c | 60 ++---
>> > drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +-
>> > 2 files changed, 24 insertions(+), 38 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/i915_pmu.c
>> > b/drivers/gpu/drm/i915/i915_pmu.c
>> > index 13d70b90dd0f..21adad72bd86 100644
>> > --- a/drivers/gpu/drm/i915/i915_pmu.c
>> > +++ b/drivers/gpu/drm/i915/i915_pmu.c
>> > @@ -148,14 +148,6 @@ void i915_pmu_gt_unparked(struct drm_i915_private
>> > *i915)
>> > spin_unlock_irq(>pmu.lock);
>> > }
>> >
>> > -static bool grab_forcewake(struct drm_i915_private *i915, bool fw)
>> > -{
>> > - if (!fw)
>> > - intel_uncore_forcewake_get(i915, FORCEWAKE_ALL);
>> > -
>> > - return true;
>> > -}
>> > -
>> > static void
>> > add_sample(struct i915_pmu_sample *sample, u32 val)
>> > {
>> > @@ -168,49 +160,43 @@ engines_sample(struct drm_i915_private *dev_priv,
>> > unsigned int period_ns)
>> > struct intel_engine_cs *engine;
>> > enum intel_engine_id id;
>> > intel_wakeref_t wakeref;
>> > - bool fw = false;
>> >
>> > if ((dev_priv->pmu.enable & ENGINE_SAMPLE_MASK) == 0)
>> > return;
>> >
>> > - if (!dev_priv->gt.awake)
>> > - return;
>> > -
>> > - wakeref = intel_runtime_pm_get_if_in_use(dev_priv);
>> > + wakeref = 0;
>> > + if (READ_ONCE(dev_priv->gt.awake))
>>
>> Is this gt.awake check just to be more lightweight on sampling?
>
> Yes, we know that if !awake, then we are idle and are done with
> sampling. It also ties in later with a patch to change how we handle rpm
> suspend periods (which is why I went with writing it in this idiom).
>
>> > + wakeref = intel_runtime_pm_get_if_in_use(dev_priv);
>> > if (!wakeref)
>> > return;
>> >
>> > for_each_engine(engine, dev_priv, id) {
>> > - u32 current_seqno = intel_engine_get_seqno(engine);
>> > - u32 last_seqno = intel_engine_last_submit(engine);
>> > + struct intel_engine_pmu *pmu = >pmu;
>> > + bool busy;
>> > u32 val;
>> >
>> > - val = !i915_seqno_passed(current_seqno, last_seqno);
>> > -
>> > - if (val)
>> > - add_sample(>pmu.sample[I915_SAMPLE_BUSY],
>> > -period_ns);
>> > -
>> > - if (val && (engine->pmu.enable &
>> > - (BIT(I915_SAMPLE_WAIT) | BIT(I915_SAMPLE_SEMA {
>> > - fw = grab_forcewake(dev_priv, fw);
>> > -
>> > - val = I915_READ_FW(RING_CTL(engine->mmio_base));
>> > - } else {
>> > - val = 0;
>> > - }
>> > + val = I915_READ_FW(RING_CTL(engine->mmio_base));
>> > + if (val == 0) /* powerwell off => engine idle */
>> > + continue;
>> >
>> > if (val & RING_WAIT)
>> > - add_sample(>pmu.sample[I915_SAMPLE_WAIT],
>> > -period_ns);
>> > -
>> > + add_sample(>sample[I915_SAMPLE_WAIT],
>> > period_ns);
>> > if (val & RING_WAIT_SEMAPHORE)
>> > - add_sample(>pmu.sample[I915_SAMPLE_SEMA],
>> > -period_ns);
>> > - }
>> > + add_sample(>sample[I915_SAMPLE_SEMA],
>> > period_ns);
>> >
>> > - if (fw)
>> > - intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
>> > + /*
>> > + * MI_MODE reports IDLE if the ring is waiting, but we regard
>> > + * this as being busy instead, as the engine is busy with the
>> > + * user request.
>> > + */
>> > + busy = val & (RING_WAIT_SEMAPHORE | RING_WAIT);
>> > + if (!busy) {
>> > + val = I915_READ_FW(RING_MI_MODE(engine->mmio_base));
>> > + busy = !(val & MODE_IDLE);
>>
>> The comment makes sense if you do
>> busy = val & MODE_IDLE;
>
> /*
> * While waiting on a semaphore or event, MI_MODE reports the ring as
> * idle. However, previously using the seqno, and with execlists sampling,
> * we account for the ring waiting as the engine being busy. Therefore,
> * we record the sample as being busy if either waiting or !idle.
> */
Altho now the original makes more sense too, I like this
[Intel-gfx] ✓ Fi.CI.BAT: success for RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access (rev8)
== Series Details ==
Series: RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access (rev8)
URL : https://patchwork.freedesktop.org/series/57039/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5653 -> IGTPW_2488
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/57039/revisions/8/mbox/
Possible new issues
---
Here are the unknown changes that may have been introduced in IGTPW_2488:
### IGT changes ###
Possible regressions
* {igt@gem_ctx_isolation@rcs0-nonpriv} (NEW):
- fi-icl-u3: NOTRUN -> SKIP +3
* {igt@gem_ctx_isolation@vecs0-nonpriv} (NEW):
- fi-icl-u2: NOTRUN -> SKIP +3
- {fi-icl-y}: NOTRUN -> SKIP +3
New tests
-
New tests have been introduced between CI_DRM_5653 and IGTPW_2488:
### New IGT tests (5) ###
* igt@gem_ctx_isolation@bcs0-nonpriv:
- Statuses : 23 pass(s) 15 skip(s)
- Exec time: [0.0, 0.23] s
* igt@gem_ctx_isolation@rcs0-nonpriv:
- Statuses : 23 pass(s) 15 skip(s)
- Exec time: [0.0, 0.22] s
* igt@gem_ctx_isolation@vcs0-nonpriv:
- Statuses : 23 pass(s) 15 skip(s)
- Exec time: [0.0, 0.23] s
* igt@gem_ctx_isolation@vcs1-nonpriv:
- Statuses : 8 pass(s) 30 skip(s)
- Exec time: [0.0, 0.07] s
* igt@gem_ctx_isolation@vecs0-nonpriv:
- Statuses : 23 pass(s) 15 skip(s)
- Exec time: [0.0, 0.22] s
Known issues
Here are the changes found in IGTPW_2488 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_basic@userptr:
- fi-kbl-8809g: PASS -> DMESG-WARN [fdo#108965]
* igt@amdgpu/amd_cs_nop@fork-gfx0:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109315] +17
* igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109315] +17
* {igt@gem_ctx_isolation@bcs0-nonpriv} (NEW):
- fi-elk-e7500: NOTRUN -> SKIP [fdo#109271] +4
- fi-byt-n2820: NOTRUN -> SKIP [fdo#109271] +4
- fi-ilk-650: NOTRUN -> SKIP [fdo#109271] +4
* {igt@gem_ctx_isolation@rcs0-nonpriv} (NEW):
- fi-bwr-2160:NOTRUN -> SKIP [fdo#109271] +4
- fi-hsw-4770:NOTRUN -> SKIP [fdo#109271] +4
- fi-ivb-3770:NOTRUN -> SKIP [fdo#109271] +4
* {igt@gem_ctx_isolation@vcs0-nonpriv} (NEW):
- fi-gdg-551: NOTRUN -> SKIP [fdo#109271] +4
* {igt@gem_ctx_isolation@vcs1-nonpriv} (NEW):
- fi-kbl-guc: NOTRUN -> SKIP [fdo#109271]
- fi-kbl-7500u: NOTRUN -> SKIP [fdo#109271]
- fi-bsw-kefka: NOTRUN -> SKIP [fdo#109271]
- fi-cfl-8700k: NOTRUN -> SKIP [fdo#109271]
- fi-bsw-n3050: NOTRUN -> SKIP [fdo#109271]
- fi-icl-u3: NOTRUN -> SKIP [fdo#109276] +8
- fi-skl-guc: NOTRUN -> SKIP [fdo#109271]
- fi-cfl-guc: NOTRUN -> SKIP [fdo#109271]
- fi-bxt-j4205: NOTRUN -> SKIP [fdo#109271]
- fi-kbl-8809g: NOTRUN -> SKIP [fdo#109271]
- fi-kbl-r: NOTRUN -> SKIP [fdo#109271]
- fi-kbl-x1275: NOTRUN -> SKIP [fdo#109271]
- fi-skl-6600u: NOTRUN -> SKIP [fdo#109271]
- fi-apl-guc: NOTRUN -> SKIP [fdo#109271]
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] +4
- fi-skl-6700k2: NOTRUN -> SKIP [fdo#109271]
- {fi-icl-y}: NOTRUN -> SKIP [fdo#109276]
- fi-whl-u: NOTRUN -> SKIP [fdo#109271]
* {igt@gem_ctx_isolation@vecs0-nonpriv} (NEW):
- fi-hsw-4770r: NOTRUN -> SKIP [fdo#109271] +4
- fi-hsw-peppy: NOTRUN -> SKIP [fdo#109271] +4
- fi-ivb-3520m: NOTRUN -> SKIP [fdo#109271] +4
* igt@gem_exec_basic@readonly-bsd1:
- fi-snb-2520m: NOTRUN -> SKIP [fdo#109271] +62
- fi-icl-u2: NOTRUN -> SKIP [fdo#109276] +8
* igt@gem_exec_parse@basic-allowed:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109289] +1
* igt@gem_exec_parse@basic-rejected:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109289] +1
* igt@i915_selftest@live_contexts:
- fi-icl-u3: NOTRUN -> INCOMPLETE [fdo#108569]
- fi-icl-u2: NOTRUN -> DMESG-FAIL [fdo#108569]
* igt@kms_busy@basic-flip-c:
- fi-snb-2520m: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_chamelium@dp-edid-read:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109316] +2
* igt@kms_chamelium@hdmi-crc-fast:
- fi-icl-u2: NOTRUN -> FAIL [fdo#109635 ]
* igt@kms_chamelium@hdmi-edid-read:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109284] +8
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: PASS -> FAIL [fdo#109485]
* igt@kms_chamelium@vga-hpd-fast:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109309] +1
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109285] +3
- fi-icl-u3: NOTRUN -> SKIP [fdo#109285] +3
*
[Intel-gfx] [PATCH v5] drm/i915/pmu: Always sample an active ringbuffer
As we no longer have a precise indication of requests queued to an
engine, make no presumptions and just sample the ring registers to see
if the engine is busy.
v2: Report busy while the ring is idling on a semaphore/event.
v3: Give the struct a name!
v4: Always 0 outside the powerwell; trusting the powerwell is
accurate enough for our sampling pmu.
v5: Protect against gen7 mmio madness and try to improve grammar
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_pmu.c | 64 +++--
drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +-
2 files changed, 28 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 13d70b90dd0f..247b67b82f0e 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -148,14 +148,6 @@ void i915_pmu_gt_unparked(struct drm_i915_private *i915)
spin_unlock_irq(>pmu.lock);
}
-static bool grab_forcewake(struct drm_i915_private *i915, bool fw)
-{
- if (!fw)
- intel_uncore_forcewake_get(i915, FORCEWAKE_ALL);
-
- return true;
-}
-
static void
add_sample(struct i915_pmu_sample *sample, u32 val)
{
@@ -168,49 +160,47 @@ engines_sample(struct drm_i915_private *dev_priv,
unsigned int period_ns)
struct intel_engine_cs *engine;
enum intel_engine_id id;
intel_wakeref_t wakeref;
- bool fw = false;
if ((dev_priv->pmu.enable & ENGINE_SAMPLE_MASK) == 0)
return;
- if (!dev_priv->gt.awake)
- return;
-
- wakeref = intel_runtime_pm_get_if_in_use(dev_priv);
+ wakeref = 0;
+ if (READ_ONCE(dev_priv->gt.awake))
+ wakeref = intel_runtime_pm_get_if_in_use(dev_priv);
if (!wakeref)
return;
+ spin_lock_irq(_priv->uncore.lock); /* prevent concurrent mmio */
for_each_engine(engine, dev_priv, id) {
- u32 current_seqno = intel_engine_get_seqno(engine);
- u32 last_seqno = intel_engine_last_submit(engine);
+ struct intel_engine_pmu *pmu = >pmu;
+ bool busy;
u32 val;
- val = !i915_seqno_passed(current_seqno, last_seqno);
-
- if (val)
- add_sample(>pmu.sample[I915_SAMPLE_BUSY],
- period_ns);
-
- if (val && (engine->pmu.enable &
- (BIT(I915_SAMPLE_WAIT) | BIT(I915_SAMPLE_SEMA {
- fw = grab_forcewake(dev_priv, fw);
-
- val = I915_READ_FW(RING_CTL(engine->mmio_base));
- } else {
- val = 0;
- }
+ val = I915_READ_FW(RING_CTL(engine->mmio_base));
+ if (val == 0) /* powerwell off => engine idle */
+ continue;
if (val & RING_WAIT)
- add_sample(>pmu.sample[I915_SAMPLE_WAIT],
- period_ns);
-
+ add_sample(>sample[I915_SAMPLE_WAIT], period_ns);
if (val & RING_WAIT_SEMAPHORE)
- add_sample(>pmu.sample[I915_SAMPLE_SEMA],
- period_ns);
- }
+ add_sample(>sample[I915_SAMPLE_SEMA], period_ns);
- if (fw)
- intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
+ /*
+* While waiting on a semaphore or event, MI_MODE reports the
+* ring as idle. However, previously using the seqno, and with
+* execlists sampling, we account for the ring waiting as the
+* engine being busy. Therefore, we record the sample as being
+* busy if either waiting or !idle.
+*/
+ busy = val & (RING_WAIT_SEMAPHORE | RING_WAIT);
+ if (!busy) {
+ val = I915_READ_FW(RING_MI_MODE(engine->mmio_base));
+ busy = !(val & MODE_IDLE);
+ }
+ if (busy)
+ add_sample(>sample[I915_SAMPLE_BUSY], period_ns);
+ }
+ spin_unlock_irq(_priv->uncore.lock);
intel_runtime_pm_put(dev_priv, wakeref);
}
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 710ffb221775..5d45ad4ecca9 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -392,7 +392,7 @@ struct intel_engine_cs {
bool irq_armed;
} breadcrumbs;
- struct {
+ struct intel_engine_pmu {
/**
* @enable: Bitmask of enable sample events on this engine.
*
--
2.20.1
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Re: [Intel-gfx] [PATCH 08/25] drm/i915/pmu: Always sample an active ringbuffer
Quoting Mika Kuoppala (2019-02-22 12:10:33)
> Chris Wilson writes:
>
> > As we no longer have a precise indication of requests queued to an
> > engine, make no presumptions and just sample the ring registers to see
> > if the engine is busy.
> >
> > v2: Report busy while the ring is idling on a semaphore/event.
> > v3: Give the struct a name!
> > v4: Always 0 outside the powerwell; trusting the powerwell is
> > accurate enough for our sampling pmu.
> >
> > Signed-off-by: Chris Wilson
> > Cc: Tvrtko Ursulin
> > ---
> > drivers/gpu/drm/i915/i915_pmu.c | 60 ++---
> > drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +-
> > 2 files changed, 24 insertions(+), 38 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_pmu.c
> > b/drivers/gpu/drm/i915/i915_pmu.c
> > index 13d70b90dd0f..21adad72bd86 100644
> > --- a/drivers/gpu/drm/i915/i915_pmu.c
> > +++ b/drivers/gpu/drm/i915/i915_pmu.c
> > @@ -148,14 +148,6 @@ void i915_pmu_gt_unparked(struct drm_i915_private
> > *i915)
> > spin_unlock_irq(>pmu.lock);
> > }
> >
> > -static bool grab_forcewake(struct drm_i915_private *i915, bool fw)
> > -{
> > - if (!fw)
> > - intel_uncore_forcewake_get(i915, FORCEWAKE_ALL);
> > -
> > - return true;
> > -}
> > -
> > static void
> > add_sample(struct i915_pmu_sample *sample, u32 val)
> > {
> > @@ -168,49 +160,43 @@ engines_sample(struct drm_i915_private *dev_priv,
> > unsigned int period_ns)
> > struct intel_engine_cs *engine;
> > enum intel_engine_id id;
> > intel_wakeref_t wakeref;
> > - bool fw = false;
> >
> > if ((dev_priv->pmu.enable & ENGINE_SAMPLE_MASK) == 0)
> > return;
> >
> > - if (!dev_priv->gt.awake)
> > - return;
> > -
> > - wakeref = intel_runtime_pm_get_if_in_use(dev_priv);
> > + wakeref = 0;
> > + if (READ_ONCE(dev_priv->gt.awake))
>
> Is this gt.awake check just to be more lightweight on sampling?
Yes, we know that if !awake, then we are idle and are done with
sampling. It also ties in later with a patch to change how we handle rpm
suspend periods (which is why I went with writing it in this idiom).
> > + wakeref = intel_runtime_pm_get_if_in_use(dev_priv);
> > if (!wakeref)
> > return;
> >
> > for_each_engine(engine, dev_priv, id) {
> > - u32 current_seqno = intel_engine_get_seqno(engine);
> > - u32 last_seqno = intel_engine_last_submit(engine);
> > + struct intel_engine_pmu *pmu = >pmu;
> > + bool busy;
> > u32 val;
> >
> > - val = !i915_seqno_passed(current_seqno, last_seqno);
> > -
> > - if (val)
> > - add_sample(>pmu.sample[I915_SAMPLE_BUSY],
> > -period_ns);
> > -
> > - if (val && (engine->pmu.enable &
> > - (BIT(I915_SAMPLE_WAIT) | BIT(I915_SAMPLE_SEMA {
> > - fw = grab_forcewake(dev_priv, fw);
> > -
> > - val = I915_READ_FW(RING_CTL(engine->mmio_base));
> > - } else {
> > - val = 0;
> > - }
> > + val = I915_READ_FW(RING_CTL(engine->mmio_base));
> > + if (val == 0) /* powerwell off => engine idle */
> > + continue;
> >
> > if (val & RING_WAIT)
> > - add_sample(>pmu.sample[I915_SAMPLE_WAIT],
> > -period_ns);
> > -
> > + add_sample(>sample[I915_SAMPLE_WAIT], period_ns);
> > if (val & RING_WAIT_SEMAPHORE)
> > - add_sample(>pmu.sample[I915_SAMPLE_SEMA],
> > -period_ns);
> > - }
> > + add_sample(>sample[I915_SAMPLE_SEMA], period_ns);
> >
> > - if (fw)
> > - intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
> > + /*
> > + * MI_MODE reports IDLE if the ring is waiting, but we regard
> > + * this as being busy instead, as the engine is busy with the
> > + * user request.
> > + */
> > + busy = val & (RING_WAIT_SEMAPHORE | RING_WAIT);
> > + if (!busy) {
> > + val = I915_READ_FW(RING_MI_MODE(engine->mmio_base));
> > + busy = !(val & MODE_IDLE);
>
> The comment makes sense if you do
> busy = val & MODE_IDLE;
/*
* While waiting on a semaphore or event, MI_MODE reports the ring as
* idle. However, previously using the seqno, and with execlists sampling,
* we account for the ring waiting as the engine being busy. Therefore,
* we record the sample as being busy if either waiting or !idle.
*/
-Chris
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Re: [Intel-gfx] [PATCH 08/25] drm/i915/pmu: Always sample an active ringbuffer
Chris Wilson writes:
> As we no longer have a precise indication of requests queued to an
> engine, make no presumptions and just sample the ring registers to see
> if the engine is busy.
>
> v2: Report busy while the ring is idling on a semaphore/event.
> v3: Give the struct a name!
> v4: Always 0 outside the powerwell; trusting the powerwell is
> accurate enough for our sampling pmu.
>
> Signed-off-by: Chris Wilson
> Cc: Tvrtko Ursulin
> ---
> drivers/gpu/drm/i915/i915_pmu.c | 60 ++---
> drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +-
> 2 files changed, 24 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index 13d70b90dd0f..21adad72bd86 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -148,14 +148,6 @@ void i915_pmu_gt_unparked(struct drm_i915_private *i915)
> spin_unlock_irq(>pmu.lock);
> }
>
> -static bool grab_forcewake(struct drm_i915_private *i915, bool fw)
> -{
> - if (!fw)
> - intel_uncore_forcewake_get(i915, FORCEWAKE_ALL);
> -
> - return true;
> -}
> -
> static void
> add_sample(struct i915_pmu_sample *sample, u32 val)
> {
> @@ -168,49 +160,43 @@ engines_sample(struct drm_i915_private *dev_priv,
> unsigned int period_ns)
> struct intel_engine_cs *engine;
> enum intel_engine_id id;
> intel_wakeref_t wakeref;
> - bool fw = false;
>
> if ((dev_priv->pmu.enable & ENGINE_SAMPLE_MASK) == 0)
> return;
>
> - if (!dev_priv->gt.awake)
> - return;
> -
> - wakeref = intel_runtime_pm_get_if_in_use(dev_priv);
> + wakeref = 0;
> + if (READ_ONCE(dev_priv->gt.awake))
Is this gt.awake check just to be more lightweight on sampling?
> + wakeref = intel_runtime_pm_get_if_in_use(dev_priv);
> if (!wakeref)
> return;
>
> for_each_engine(engine, dev_priv, id) {
> - u32 current_seqno = intel_engine_get_seqno(engine);
> - u32 last_seqno = intel_engine_last_submit(engine);
> + struct intel_engine_pmu *pmu = >pmu;
> + bool busy;
> u32 val;
>
> - val = !i915_seqno_passed(current_seqno, last_seqno);
> -
> - if (val)
> - add_sample(>pmu.sample[I915_SAMPLE_BUSY],
> -period_ns);
> -
> - if (val && (engine->pmu.enable &
> - (BIT(I915_SAMPLE_WAIT) | BIT(I915_SAMPLE_SEMA {
> - fw = grab_forcewake(dev_priv, fw);
> -
> - val = I915_READ_FW(RING_CTL(engine->mmio_base));
> - } else {
> - val = 0;
> - }
> + val = I915_READ_FW(RING_CTL(engine->mmio_base));
> + if (val == 0) /* powerwell off => engine idle */
> + continue;
>
> if (val & RING_WAIT)
> - add_sample(>pmu.sample[I915_SAMPLE_WAIT],
> -period_ns);
> -
> + add_sample(>sample[I915_SAMPLE_WAIT], period_ns);
> if (val & RING_WAIT_SEMAPHORE)
> - add_sample(>pmu.sample[I915_SAMPLE_SEMA],
> -period_ns);
> - }
> + add_sample(>sample[I915_SAMPLE_SEMA], period_ns);
>
> - if (fw)
> - intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
> + /*
> + * MI_MODE reports IDLE if the ring is waiting, but we regard
> + * this as being busy instead, as the engine is busy with the
> + * user request.
> + */
> + busy = val & (RING_WAIT_SEMAPHORE | RING_WAIT);
> + if (!busy) {
> + val = I915_READ_FW(RING_MI_MODE(engine->mmio_base));
> + busy = !(val & MODE_IDLE);
The comment makes sense if you do
busy = val & MODE_IDLE;
-Mika
> + }
> + if (busy)
> + add_sample(>sample[I915_SAMPLE_BUSY], period_ns);
> + }
>
> intel_runtime_pm_put(dev_priv, wakeref);
> }
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h
> b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 710ffb221775..5d45ad4ecca9 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -392,7 +392,7 @@ struct intel_engine_cs {
> bool irq_armed;
> } breadcrumbs;
>
> - struct {
> + struct intel_engine_pmu {
> /**
>* @enable: Bitmask of enable sample events on this engine.
>*
> --
> 2.20.1
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
[Intel-gfx] ✗ Fi.CI.IGT: failure for RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access (rev3)
== Series Details ==
Series: RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access (rev3)
URL : https://patchwork.freedesktop.org/series/57039/
State : failure
== Summary ==
CI Bug Log - changes from IGT_4851_full -> IGTPW_2481_full
Summary
---
**FAILURE**
Serious unknown changes coming with IGTPW_2481_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_2481_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/57039/revisions/3/mbox/
Possible new issues
---
Here are the unknown changes that may have been introduced in IGTPW_2481_full:
### IGT changes ###
Possible regressions
* igt@gem_ctx_isolation@rcs0-dirty-switch:
- shard-glk: PASS -> FAIL +2
* {igt@gem_ctx_isolation@rcs0-nonpriv} (NEW):
- shard-snb: NOTRUN -> FAIL
- shard-hsw: NOTRUN -> FAIL
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: PASS -> FAIL
- shard-apl: PASS -> FAIL +1
New tests
-
New tests have been introduced between IGT_4851_full and IGTPW_2481_full:
### New IGT tests (5) ###
* igt@gem_ctx_isolation@bcs0-nonpriv:
- Statuses : 3 pass(s) 2 skip(s)
- Exec time: [0.0, 0.14] s
* igt@gem_ctx_isolation@rcs0-nonpriv:
- Statuses : 2 fail(s) 3 pass(s)
- Exec time: [0.04, 0.14] s
* igt@gem_ctx_isolation@vcs0-nonpriv:
- Statuses : 3 pass(s) 2 skip(s)
- Exec time: [0.0, 0.14] s
* igt@gem_ctx_isolation@vcs1-nonpriv:
- Statuses : 1 pass(s) 4 skip(s)
- Exec time: [0.0, 0.04] s
* igt@gem_ctx_isolation@vecs0-nonpriv:
- Statuses : 3 pass(s) 2 skip(s)
- Exec time: [0.0, 0.14] s
Known issues
Here are the changes found in IGTPW_2481_full that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_isolation@rcs0-dirty-switch:
- shard-apl: PASS -> FAIL [fdo#109472]
- shard-kbl: PASS -> FAIL [fdo#109472]
* {igt@gem_ctx_isolation@vcs1-nonpriv} (NEW):
- shard-snb: NOTRUN -> SKIP [fdo#109271] +7
* {igt@gem_ctx_isolation@vecs0-nonpriv} (NEW):
- shard-hsw: NOTRUN -> SKIP [fdo#109271] +3
* igt@gem_eio@reset-stress:
- shard-snb: PASS -> FAIL [fdo#109661]
* igt@gem_exec_parallel@vebox-fds:
- shard-apl: PASS -> INCOMPLETE [fdo#103927]
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-kbl: NOTRUN -> SKIP [fdo#109271] +4
* igt@gem_exec_store@basic-bsd2:
- shard-apl: NOTRUN -> SKIP [fdo#109271] +30
* igt@gem_userptr_blits@process-exit-gtt:
- shard-glk: NOTRUN -> SKIP [fdo#109271] +25
* igt@kms_busy@extended-pageflip-hang-newfb-render-e:
- shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +2
- shard-glk: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
* igt@kms_cursor_crc@cursor-256x85-random:
- shard-apl: PASS -> FAIL [fdo#103232] +3
* igt@kms_cursor_crc@cursor-64x64-dpms:
- shard-kbl: PASS -> FAIL [fdo#103232] +1
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-apl: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-1p-rte:
- shard-apl: PASS -> FAIL [fdo#103167] / [fdo#105682]
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt:
- shard-glk: PASS -> FAIL [fdo#103167] +8
* igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
- shard-apl: PASS -> FAIL [fdo#108948]
* igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
- shard-apl: PASS -> FAIL [fdo#108145]
* igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
- shard-kbl: PASS -> FAIL [fdo#103166] +2
* igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
- shard-apl: PASS -> FAIL [fdo#103166] +2
* igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
- shard-glk: PASS -> FAIL [fdo#103166] +2
* igt@kms_rotation_crc@multiplane-rotation-cropping-top:
- shard-kbl: PASS -> FAIL [fdo#109016]
* igt@kms_vblank@pipe-b-ts-continuation-modeset:
- shard-apl: PASS -> FAIL [fdo#104894]
Possible fixes
* igt@i915_pm_rc6_residency@rc6-accuracy:
- shard-snb: SKIP [fdo#109271] -> PASS
* igt@kms_color@pipe-a-degamma:
- shard-kbl: FAIL [fdo#104782] / [fdo#108145] -> PASS
* igt@kms_color@pipe-a-gamma:
- shard-kbl: FAIL [fdo#104782] -> PASS
* igt@kms_cursor_crc@cursor-128x128-dpms:
- shard-kbl: FAIL [fdo#103232] -> PASS +1
* igt@kms_cursor_crc@cursor-64x21-sliding:
- shard-apl: FAIL [fdo#103232] -> PASS +3
*
[Intel-gfx] [PATCH i-g-t] RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access
Verify that our list of nonpriv registers exist and are writable.
Signed-off-by: Chris Wilson
---
tests/i915/gem_ctx_isolation.c| 164 +-
tests/intel-ci/fast-feedback.testlist | 5 +
2 files changed, 140 insertions(+), 29 deletions(-)
diff --git a/tests/i915/gem_ctx_isolation.c b/tests/i915/gem_ctx_isolation.c
index 839d49ade..32b8c0bc8 100644
--- a/tests/i915/gem_ctx_isolation.c
+++ b/tests/i915/gem_ctx_isolation.c
@@ -59,16 +59,23 @@ enum {
static const struct named_register {
const char *name;
- unsigned int gen_mask;
- unsigned int engine_mask;
- uint32_t offset;
+ unsigned int gen_mask; /* on which gen the register exists */
+ unsigned int engine_mask; /* preferred engine / powerwell */
+ uint32_t offset; /* address of register, from bottom of mmio bar */
uint32_t count;
uint32_t ignore_bits;
+ uint32_t write_mask; /* some registers bits do not exist */
bool masked;
} nonpriv_registers[] = {
{ "NOPID", NOCTX, RCS0, 0x2094 },
{ "MI_PREDICATE_RESULT_2", NOCTX, RCS0, 0x23bc },
- { "INSTPM", GEN6, RCS0, 0x20c0, 1, BIT(8) /* ro counter */, true },
+ {
+ "INSTPM",
+ GEN6, RCS0, 0x20c0,
+ .ignore_bits = BIT(8) /* ro counter */,
+ .write_mask = BIT(8) /* rsvd varies between gen */,
+ .masked = true,
+ },
{ "IA_VERTICES_COUNT", GEN4, RCS0, 0x2310, 2 },
{ "IA_PRIMITIVES_COUNT", GEN4, RCS0, 0x2318, 2 },
{ "VS_INVOCATION_COUNT", GEN4, RCS0, 0x2320, 2 },
@@ -78,7 +85,7 @@ static const struct named_register {
{ "GS_PRIMITIVES_COUNT", GEN4, RCS0, 0x2330, 2 },
{ "CL_INVOCATION_COUNT", GEN4, RCS0, 0x2338, 2 },
{ "CL_PRIMITIVES_COUNT", GEN4, RCS0, 0x2340, 2 },
- { "PS_INVOCATION_COUNT_0", GEN4, RCS0, 0x22c8, 2 },
+ { "PS_INVOCATION_COUNT_0", GEN4, RCS0, 0x22c8, 2, .write_mask = ~0x3 },
{ "PS_DEPTH_COUNT_0", GEN4, RCS0, 0x22d8, 2 },
{ "GPUGPU_DISPATCHDIMX", GEN8, RCS0, 0x2500 },
{ "GPUGPU_DISPATCHDIMY", GEN8, RCS0, 0x2504 },
@@ -86,7 +93,7 @@ static const struct named_register {
{ "MI_PREDICATE_SRC0", GEN8, RCS0, 0x2400, 2 },
{ "MI_PREDICATE_SRC1", GEN8, RCS0, 0x2408, 2 },
{ "MI_PREDICATE_DATA", GEN8, RCS0, 0x2410, 2 },
- { "MI_PRED_RESULT", GEN8, RCS0, 0x2418 },
+ { "MI_PRED_RESULT", GEN8, RCS0, 0x2418, .write_mask = 0x1 },
{ "3DPRIM_END_OFFSET", GEN6, RCS0, 0x2420 },
{ "3DPRIM_START_VERTEX", GEN6, RCS0, 0x2430 },
{ "3DPRIM_VERTEX_COUNT", GEN6, RCS0, 0x2434 },
@@ -94,45 +101,45 @@ static const struct named_register {
{ "3DPRIM_START_INSTANCE", GEN6, RCS0, 0x243c },
{ "3DPRIM_BASE_VERTEX", GEN6, RCS0, 0x2440 },
{ "GPGPU_THREADS_DISPATCHED", GEN8, RCS0, 0x2290, 2 },
- { "PS_INVOCATION_COUNT_1", GEN8, RCS0, 0x22f0, 2 },
+ { "PS_INVOCATION_COUNT_1", GEN8, RCS0, 0x22f0, 2, .write_mask = ~0x3 },
{ "PS_DEPTH_COUNT_1", GEN8, RCS0, 0x22f8, 2 },
{ "BB_OFFSET", GEN8, RCS0, 0x2158, .ignore_bits = 0x4 },
{ "MI_PREDICATE_RESULT_1", GEN8, RCS0, 0x241c },
{ "CS_GPR", GEN8, RCS0, 0x2600, 32 },
{ "OA_CTX_CONTROL", GEN8, RCS0, 0x2360 },
{ "OACTXID", GEN8, RCS0, 0x2364 },
- { "PS_INVOCATION_COUNT_2", GEN8, RCS0, 0x2448, 2 },
+ { "PS_INVOCATION_COUNT_2", GEN8, RCS0, 0x2448, 2, .write_mask = ~0x3 },
{ "PS_DEPTH_COUNT_2", GEN8, RCS0, 0x2450, 2 },
- { "Cache_Mode_0", GEN7, RCS0, 0x7000 },
- { "Cache_Mode_1", GEN7, RCS0, 0x7004 },
- { "GT_MODE", GEN8, RCS0, 0x7008 },
- { "L3_Config", GEN7, RCS0, 0x7034 },
- { "TD_CTL", GEN8, RCS0, 0xe400 },
+ { "Cache_Mode_0", GEN7, RCS0, 0x7000, .masked = true },
+ { "Cache_Mode_1", GEN7, RCS0, 0x7004, .masked = true },
+ { "GT_MODE", GEN8, RCS0, 0x7008, .masked = true },
+ { "L3_Config", GEN8, RCS0, 0x7034 },
+ { "TD_CTL", GEN8, RCS0, 0xe400, .masked = true },
{ "TD_CTL2", GEN8, RCS0, 0xe404 },
- { "SO_NUM_PRIMS_WRITEN0", GEN6, RCS0, 0x5200, 2 },
- { "SO_NUM_PRIMS_WRITEN1", GEN6, RCS0, 0x5208, 2 },
- { "SO_NUM_PRIMS_WRITEN2", GEN6, RCS0, 0x5210, 2 },
- { "SO_NUM_PRIMS_WRITEN3", GEN6, RCS0, 0x5218, 2 },
+ { "SO_NUM_PRIMS_WRITTEN0", GEN6, RCS0, 0x5200, 2 },
+ { "SO_NUM_PRIMS_WRITTEN1", GEN6, RCS0, 0x5208, 2 },
+ { "SO_NUM_PRIMS_WRITTEN2", GEN6, RCS0, 0x5210, 2 },
+ { "SO_NUM_PRIMS_WRITTEN3", GEN6, RCS0, 0x5218, 2 },
{ "SO_PRIM_STORAGE_NEEDED0", GEN6, RCS0, 0x5240, 2 },
{ "SO_PRIM_STORAGE_NEEDED1", GEN6, RCS0, 0x5248, 2 },
{ "SO_PRIM_STORAGE_NEEDED2", GEN6, RCS0, 0x5250, 2 },
{ "SO_PRIM_STORAGE_NEEDED3", GEN6, RCS0, 0x5258, 2 },
- { "SO_WRITE_OFFSET0", GEN7, RCS0, 0x5280 },
- { "SO_WRITE_OFFSET1", GEN7, RCS0, 0x5284 },
- { "SO_WRITE_OFFSET2", GEN7, RCS0, 0x5288 },
- {
[Intel-gfx] ✓ Fi.CI.BAT: success for RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access (rev7)
== Series Details ==
Series: RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access (rev7)
URL : https://patchwork.freedesktop.org/series/57039/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5653 -> IGTPW_2486
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/57039/revisions/7/mbox/
Possible new issues
---
Here are the unknown changes that may have been introduced in IGTPW_2486:
### IGT changes ###
Possible regressions
* {igt@gem_ctx_isolation@bcs0-nonpriv} (NEW):
- fi-skl-6260u: NOTRUN -> FAIL +1
- fi-skl-6770hq: NOTRUN -> FAIL +1
- fi-kbl-7500u: NOTRUN -> FAIL +1
- fi-cfl-guc: NOTRUN -> FAIL +1
- fi-kbl-r: NOTRUN -> FAIL +1
* {igt@gem_ctx_isolation@rcs0-nonpriv} (NEW):
- fi-cfl-8109u: NOTRUN -> FAIL +1
- fi-skl-6600u: NOTRUN -> FAIL +1
- fi-kbl-7560u: NOTRUN -> FAIL +1
- fi-bdw-5557u: NOTRUN -> FAIL
- fi-apl-guc: NOTRUN -> FAIL +1
- fi-skl-6700k2: NOTRUN -> FAIL +1
- fi-bsw-n3050: NOTRUN -> FAIL
- fi-icl-u3: NOTRUN -> SKIP +3
- fi-bsw-kefka: NOTRUN -> FAIL
- fi-kbl-x1275: NOTRUN -> FAIL +1
- fi-bxt-j4205: NOTRUN -> FAIL +1
- fi-kbl-8809g: NOTRUN -> FAIL +1
- fi-kbl-guc: NOTRUN -> FAIL +1
- fi-bdw-gvtdvm: NOTRUN -> FAIL
- fi-skl-guc: NOTRUN -> FAIL +1
- fi-kbl-7567u: NOTRUN -> FAIL +1
- fi-whl-u: NOTRUN -> FAIL +1
- fi-cfl-8700k: NOTRUN -> FAIL +1
* {igt@gem_ctx_isolation@vecs0-nonpriv} (NEW):
- fi-icl-u2: NOTRUN -> SKIP +3
New tests
-
New tests have been introduced between CI_DRM_5653 and IGTPW_2486:
### New IGT tests (5) ###
* igt@gem_ctx_isolation@bcs0-nonpriv:
- Statuses : 18 fail(s) 4 pass(s) 14 skip(s)
- Exec time: [0.0, 0.23] s
* igt@gem_ctx_isolation@rcs0-nonpriv:
- Statuses : 22 fail(s) 14 skip(s)
- Exec time: [0.0, 0.36] s
* igt@gem_ctx_isolation@vcs0-nonpriv:
- Statuses : 22 pass(s) 14 skip(s)
- Exec time: [0.0, 0.22] s
* igt@gem_ctx_isolation@vcs1-nonpriv:
- Statuses : 7 pass(s) 29 skip(s)
- Exec time: [0.0, 0.07] s
* igt@gem_ctx_isolation@vecs0-nonpriv:
- Statuses : 22 pass(s) 14 skip(s)
- Exec time: [0.0, 0.23] s
Known issues
Here are the changes found in IGTPW_2486 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_cs_nop@fork-gfx0:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109315] +17
* igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109315] +17
* {igt@gem_ctx_isolation@bcs0-nonpriv} (NEW):
- fi-elk-e7500: NOTRUN -> SKIP [fdo#109271] +4
- fi-byt-n2820: NOTRUN -> SKIP [fdo#109271] +4
- fi-ilk-650: NOTRUN -> SKIP [fdo#109271] +4
* {igt@gem_ctx_isolation@rcs0-nonpriv} (NEW):
- fi-bwr-2160:NOTRUN -> SKIP [fdo#109271] +4
- fi-hsw-4770:NOTRUN -> SKIP [fdo#109271] +4
- fi-ivb-3770:NOTRUN -> SKIP [fdo#109271] +4
* {igt@gem_ctx_isolation@vcs0-nonpriv} (NEW):
- fi-pnv-d510:NOTRUN -> SKIP [fdo#109271] +4
- fi-gdg-551: NOTRUN -> SKIP [fdo#109271] +4
* {igt@gem_ctx_isolation@vcs1-nonpriv} (NEW):
- fi-kbl-guc: NOTRUN -> SKIP [fdo#109271]
- fi-kbl-7500u: NOTRUN -> SKIP [fdo#109271]
- fi-bsw-kefka: NOTRUN -> SKIP [fdo#109271]
- fi-cfl-8700k: NOTRUN -> SKIP [fdo#109271]
- fi-bsw-n3050: NOTRUN -> SKIP [fdo#109271]
- fi-icl-u3: NOTRUN -> SKIP [fdo#109276] +8
- fi-skl-guc: NOTRUN -> SKIP [fdo#109271]
- fi-cfl-guc: NOTRUN -> SKIP [fdo#109271]
- fi-bxt-j4205: NOTRUN -> SKIP [fdo#109271]
- fi-kbl-8809g: NOTRUN -> SKIP [fdo#109271]
- fi-kbl-r: NOTRUN -> SKIP [fdo#109271]
- fi-kbl-x1275: NOTRUN -> SKIP [fdo#109271]
- fi-skl-6600u: NOTRUN -> SKIP [fdo#109271]
- fi-apl-guc: NOTRUN -> SKIP [fdo#109271]
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] +4
- fi-skl-6700k2: NOTRUN -> SKIP [fdo#109271]
- fi-whl-u: NOTRUN -> SKIP [fdo#109271]
* {igt@gem_ctx_isolation@vecs0-nonpriv} (NEW):
- fi-hsw-4770r: NOTRUN -> SKIP [fdo#109271] +4
- fi-ivb-3520m: NOTRUN -> SKIP [fdo#109271] +4
* igt@gem_exec_basic@readonly-bsd1:
- fi-snb-2520m: NOTRUN -> SKIP [fdo#109271] +62
- fi-icl-u2: NOTRUN -> SKIP [fdo#109276] +8
* igt@gem_exec_parse@basic-allowed:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109289] +1
* igt@gem_exec_parse@basic-rejected:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109289] +1
* igt@i915_selftest@live_contexts:
- fi-icl-u3: NOTRUN ->
Re: [Intel-gfx] [PATCH v2] drm/i915/guc: Flush the residual log capture irq on disabling
Quoting Mika Kuoppala (2019-02-22 11:19:31) > Chris Wilson writes: > > > As we disable the log capture events, flush any residual interrupt > > before we flush and disable the worker. > > > > v2: Mika pointed out that it wasn't the worker re-queueing itself, but a > > rogue irq. > > > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109716 > > Signed-off-by: Chris Wilson > > Cc: Mika Kuoppala > > Reviewed-by: Mika Kuoppala Thanks for the correction! Pushed, -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t] RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access
Verify that our list of nonpriv registers exist and are writable.
Signed-off-by: Chris Wilson
---
tests/i915/gem_ctx_isolation.c| 151 +-
tests/intel-ci/fast-feedback.testlist | 5 +
2 files changed, 131 insertions(+), 25 deletions(-)
diff --git a/tests/i915/gem_ctx_isolation.c b/tests/i915/gem_ctx_isolation.c
index 839d49ade..7599635b9 100644
--- a/tests/i915/gem_ctx_isolation.c
+++ b/tests/i915/gem_ctx_isolation.c
@@ -59,16 +59,23 @@ enum {
static const struct named_register {
const char *name;
- unsigned int gen_mask;
- unsigned int engine_mask;
- uint32_t offset;
+ unsigned int gen_mask; /* on which gen the register exists */
+ unsigned int engine_mask; /* preferred engine / powerwell */
+ uint32_t offset; /* address of register, from bottom of mmio bar */
uint32_t count;
uint32_t ignore_bits;
+ uint32_t write_mask; /* some registers bits do not exist */
bool masked;
} nonpriv_registers[] = {
{ "NOPID", NOCTX, RCS0, 0x2094 },
{ "MI_PREDICATE_RESULT_2", NOCTX, RCS0, 0x23bc },
- { "INSTPM", GEN6, RCS0, 0x20c0, 1, BIT(8) /* ro counter */, true },
+ {
+ "INSTPM",
+ GEN6, RCS0, 0x20c0,
+ .ignore_bits = BIT(8) /* ro counter */,
+ .write_mask = BIT(8) /* rsvd varies between gen */,
+ .masked = true,
+ },
{ "IA_VERTICES_COUNT", GEN4, RCS0, 0x2310, 2 },
{ "IA_PRIMITIVES_COUNT", GEN4, RCS0, 0x2318, 2 },
{ "VS_INVOCATION_COUNT", GEN4, RCS0, 0x2320, 2 },
@@ -78,7 +85,7 @@ static const struct named_register {
{ "GS_PRIMITIVES_COUNT", GEN4, RCS0, 0x2330, 2 },
{ "CL_INVOCATION_COUNT", GEN4, RCS0, 0x2338, 2 },
{ "CL_PRIMITIVES_COUNT", GEN4, RCS0, 0x2340, 2 },
- { "PS_INVOCATION_COUNT_0", GEN4, RCS0, 0x22c8, 2 },
+ { "PS_INVOCATION_COUNT_0", GEN4, RCS0, 0x22c8, 2, .write_mask = ~0x3 },
{ "PS_DEPTH_COUNT_0", GEN4, RCS0, 0x22d8, 2 },
{ "GPUGPU_DISPATCHDIMX", GEN8, RCS0, 0x2500 },
{ "GPUGPU_DISPATCHDIMY", GEN8, RCS0, 0x2504 },
@@ -86,7 +93,7 @@ static const struct named_register {
{ "MI_PREDICATE_SRC0", GEN8, RCS0, 0x2400, 2 },
{ "MI_PREDICATE_SRC1", GEN8, RCS0, 0x2408, 2 },
{ "MI_PREDICATE_DATA", GEN8, RCS0, 0x2410, 2 },
- { "MI_PRED_RESULT", GEN8, RCS0, 0x2418 },
+ { "MI_PRED_RESULT", GEN8, RCS0, 0x2418, .write_mask = 0x1 },
{ "3DPRIM_END_OFFSET", GEN6, RCS0, 0x2420 },
{ "3DPRIM_START_VERTEX", GEN6, RCS0, 0x2430 },
{ "3DPRIM_VERTEX_COUNT", GEN6, RCS0, 0x2434 },
@@ -94,45 +101,45 @@ static const struct named_register {
{ "3DPRIM_START_INSTANCE", GEN6, RCS0, 0x243c },
{ "3DPRIM_BASE_VERTEX", GEN6, RCS0, 0x2440 },
{ "GPGPU_THREADS_DISPATCHED", GEN8, RCS0, 0x2290, 2 },
- { "PS_INVOCATION_COUNT_1", GEN8, RCS0, 0x22f0, 2 },
+ { "PS_INVOCATION_COUNT_1", GEN8, RCS0, 0x22f0, 2, .write_mask = ~0x3 },
{ "PS_DEPTH_COUNT_1", GEN8, RCS0, 0x22f8, 2 },
{ "BB_OFFSET", GEN8, RCS0, 0x2158, .ignore_bits = 0x4 },
{ "MI_PREDICATE_RESULT_1", GEN8, RCS0, 0x241c },
{ "CS_GPR", GEN8, RCS0, 0x2600, 32 },
{ "OA_CTX_CONTROL", GEN8, RCS0, 0x2360 },
{ "OACTXID", GEN8, RCS0, 0x2364 },
- { "PS_INVOCATION_COUNT_2", GEN8, RCS0, 0x2448, 2 },
+ { "PS_INVOCATION_COUNT_2", GEN8, RCS0, 0x2448, 2, .write_mask = ~0x3 },
{ "PS_DEPTH_COUNT_2", GEN8, RCS0, 0x2450, 2 },
- { "Cache_Mode_0", GEN7, RCS0, 0x7000 },
- { "Cache_Mode_1", GEN7, RCS0, 0x7004 },
- { "GT_MODE", GEN8, RCS0, 0x7008 },
- { "L3_Config", GEN7, RCS0, 0x7034 },
- { "TD_CTL", GEN8, RCS0, 0xe400 },
+ { "Cache_Mode_0", GEN7, RCS0, 0x7000, .masked = true },
+ { "Cache_Mode_1", GEN7, RCS0, 0x7004, .masked = true },
+ { "GT_MODE", GEN8, RCS0, 0x7008, .masked = true },
+ { "L3_Config", GEN8, RCS0, 0x7034 },
+ { "TD_CTL", GEN8, RCS0, 0xe400, .masked = true },
{ "TD_CTL2", GEN8, RCS0, 0xe404 },
- { "SO_NUM_PRIMS_WRITEN0", GEN6, RCS0, 0x5200, 2 },
- { "SO_NUM_PRIMS_WRITEN1", GEN6, RCS0, 0x5208, 2 },
- { "SO_NUM_PRIMS_WRITEN2", GEN6, RCS0, 0x5210, 2 },
- { "SO_NUM_PRIMS_WRITEN3", GEN6, RCS0, 0x5218, 2 },
+ { "SO_NUM_PRIMS_WRITTEN0", GEN6, RCS0, 0x5200, 2 },
+ { "SO_NUM_PRIMS_WRITTEN1", GEN6, RCS0, 0x5208, 2 },
+ { "SO_NUM_PRIMS_WRITTEN2", GEN6, RCS0, 0x5210, 2 },
+ { "SO_NUM_PRIMS_WRITTEN3", GEN6, RCS0, 0x5218, 2 },
{ "SO_PRIM_STORAGE_NEEDED0", GEN6, RCS0, 0x5240, 2 },
{ "SO_PRIM_STORAGE_NEEDED1", GEN6, RCS0, 0x5248, 2 },
{ "SO_PRIM_STORAGE_NEEDED2", GEN6, RCS0, 0x5250, 2 },
{ "SO_PRIM_STORAGE_NEEDED3", GEN6, RCS0, 0x5258, 2 },
- { "SO_WRITE_OFFSET0", GEN7, RCS0, 0x5280 },
- { "SO_WRITE_OFFSET1", GEN7, RCS0, 0x5284 },
- { "SO_WRITE_OFFSET2", GEN7, RCS0, 0x5288 },
- {
Re: [Intel-gfx] [PATCH v2] drm/i915/guc: Flush the residual log capture irq on disabling
Chris Wilson writes:
> As we disable the log capture events, flush any residual interrupt
> before we flush and disable the worker.
>
> v2: Mika pointed out that it wasn't the worker re-queueing itself, but a
> rogue irq.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109716
> Signed-off-by: Chris Wilson
> Cc: Mika Kuoppala
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/intel_guc_log.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_guc_log.c
> b/drivers/gpu/drm/i915/intel_guc_log.c
> index 806fdfd7c78a..7146524264dd 100644
> --- a/drivers/gpu/drm/i915/intel_guc_log.c
> +++ b/drivers/gpu/drm/i915/intel_guc_log.c
> @@ -620,7 +620,12 @@ void intel_guc_log_relay_flush(struct intel_guc_log *log)
>
> void intel_guc_log_relay_close(struct intel_guc_log *log)
> {
> + struct intel_guc *guc = log_to_guc(log);
> + struct drm_i915_private *i915 = guc_to_i915(guc);
> +
> guc_log_disable_flush_events(log);
> + synchronize_irq(i915->drm.irq);
> +
> flush_work(>relay.flush_work);
>
> mutex_lock(>relay.lock);
> --
> 2.20.1
___
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[Intel-gfx] [PATCH i-g-t] RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access
Verify that our list of nonpriv registers exist and are writable.
Signed-off-by: Chris Wilson
---
tests/i915/gem_ctx_isolation.c| 146 +-
tests/intel-ci/fast-feedback.testlist | 5 +
2 files changed, 126 insertions(+), 25 deletions(-)
diff --git a/tests/i915/gem_ctx_isolation.c b/tests/i915/gem_ctx_isolation.c
index 839d49ade..f92db794c 100644
--- a/tests/i915/gem_ctx_isolation.c
+++ b/tests/i915/gem_ctx_isolation.c
@@ -59,16 +59,17 @@ enum {
static const struct named_register {
const char *name;
- unsigned int gen_mask;
- unsigned int engine_mask;
- uint32_t offset;
+ unsigned int gen_mask; /* on which gen the register exists */
+ unsigned int engine_mask; /* preferred engine / powerwell */
+ uint32_t offset; /* address of register, from bottom of mmio bar */
uint32_t count;
uint32_t ignore_bits;
+ uint32_t write_mask; /* some registers bits do not exist */
bool masked;
} nonpriv_registers[] = {
{ "NOPID", NOCTX, RCS0, 0x2094 },
{ "MI_PREDICATE_RESULT_2", NOCTX, RCS0, 0x23bc },
- { "INSTPM", GEN6, RCS0, 0x20c0, 1, BIT(8) /* ro counter */, true },
+ { "INSTPM", GEN6, RCS0, 0x20c0, 1, BIT(8) /* r/o counter */, true,
.write_mask = BIT(8) /* vary between gen */ },
{ "IA_VERTICES_COUNT", GEN4, RCS0, 0x2310, 2 },
{ "IA_PRIMITIVES_COUNT", GEN4, RCS0, 0x2318, 2 },
{ "VS_INVOCATION_COUNT", GEN4, RCS0, 0x2320, 2 },
@@ -78,7 +79,7 @@ static const struct named_register {
{ "GS_PRIMITIVES_COUNT", GEN4, RCS0, 0x2330, 2 },
{ "CL_INVOCATION_COUNT", GEN4, RCS0, 0x2338, 2 },
{ "CL_PRIMITIVES_COUNT", GEN4, RCS0, 0x2340, 2 },
- { "PS_INVOCATION_COUNT_0", GEN4, RCS0, 0x22c8, 2 },
+ { "PS_INVOCATION_COUNT_0", GEN4, RCS0, 0x22c8, 2, .write_mask = ~0x3 },
{ "PS_DEPTH_COUNT_0", GEN4, RCS0, 0x22d8, 2 },
{ "GPUGPU_DISPATCHDIMX", GEN8, RCS0, 0x2500 },
{ "GPUGPU_DISPATCHDIMY", GEN8, RCS0, 0x2504 },
@@ -86,7 +87,7 @@ static const struct named_register {
{ "MI_PREDICATE_SRC0", GEN8, RCS0, 0x2400, 2 },
{ "MI_PREDICATE_SRC1", GEN8, RCS0, 0x2408, 2 },
{ "MI_PREDICATE_DATA", GEN8, RCS0, 0x2410, 2 },
- { "MI_PRED_RESULT", GEN8, RCS0, 0x2418 },
+ { "MI_PRED_RESULT", GEN8, RCS0, 0x2418, .write_mask = 0x1 },
{ "3DPRIM_END_OFFSET", GEN6, RCS0, 0x2420 },
{ "3DPRIM_START_VERTEX", GEN6, RCS0, 0x2430 },
{ "3DPRIM_VERTEX_COUNT", GEN6, RCS0, 0x2434 },
@@ -94,45 +95,45 @@ static const struct named_register {
{ "3DPRIM_START_INSTANCE", GEN6, RCS0, 0x243c },
{ "3DPRIM_BASE_VERTEX", GEN6, RCS0, 0x2440 },
{ "GPGPU_THREADS_DISPATCHED", GEN8, RCS0, 0x2290, 2 },
- { "PS_INVOCATION_COUNT_1", GEN8, RCS0, 0x22f0, 2 },
+ { "PS_INVOCATION_COUNT_1", GEN8, RCS0, 0x22f0, 2, .write_mask = ~0x3 },
{ "PS_DEPTH_COUNT_1", GEN8, RCS0, 0x22f8, 2 },
{ "BB_OFFSET", GEN8, RCS0, 0x2158, .ignore_bits = 0x4 },
{ "MI_PREDICATE_RESULT_1", GEN8, RCS0, 0x241c },
{ "CS_GPR", GEN8, RCS0, 0x2600, 32 },
{ "OA_CTX_CONTROL", GEN8, RCS0, 0x2360 },
{ "OACTXID", GEN8, RCS0, 0x2364 },
- { "PS_INVOCATION_COUNT_2", GEN8, RCS0, 0x2448, 2 },
+ { "PS_INVOCATION_COUNT_2", GEN8, RCS0, 0x2448, 2, .write_mask = ~0x3 },
{ "PS_DEPTH_COUNT_2", GEN8, RCS0, 0x2450, 2 },
- { "Cache_Mode_0", GEN7, RCS0, 0x7000 },
- { "Cache_Mode_1", GEN7, RCS0, 0x7004 },
- { "GT_MODE", GEN8, RCS0, 0x7008 },
- { "L3_Config", GEN7, RCS0, 0x7034 },
- { "TD_CTL", GEN8, RCS0, 0xe400 },
+ { "Cache_Mode_0", GEN7, RCS0, 0x7000, .masked = true },
+ { "Cache_Mode_1", GEN7, RCS0, 0x7004, .masked = true },
+ { "GT_MODE", GEN8, RCS0, 0x7008, .masked = true },
+ { "L3_Config", GEN8, RCS0, 0x7034 },
+ { "TD_CTL", GEN8, RCS0, 0xe400, .masked = true },
{ "TD_CTL2", GEN8, RCS0, 0xe404 },
- { "SO_NUM_PRIMS_WRITEN0", GEN6, RCS0, 0x5200, 2 },
- { "SO_NUM_PRIMS_WRITEN1", GEN6, RCS0, 0x5208, 2 },
- { "SO_NUM_PRIMS_WRITEN2", GEN6, RCS0, 0x5210, 2 },
- { "SO_NUM_PRIMS_WRITEN3", GEN6, RCS0, 0x5218, 2 },
+ { "SO_NUM_PRIMS_WRITTEN0", GEN6, RCS0, 0x5200, 2 },
+ { "SO_NUM_PRIMS_WRITTEN1", GEN6, RCS0, 0x5208, 2 },
+ { "SO_NUM_PRIMS_WRITTEN2", GEN6, RCS0, 0x5210, 2 },
+ { "SO_NUM_PRIMS_WRITTEN3", GEN6, RCS0, 0x5218, 2 },
{ "SO_PRIM_STORAGE_NEEDED0", GEN6, RCS0, 0x5240, 2 },
{ "SO_PRIM_STORAGE_NEEDED1", GEN6, RCS0, 0x5248, 2 },
{ "SO_PRIM_STORAGE_NEEDED2", GEN6, RCS0, 0x5250, 2 },
{ "SO_PRIM_STORAGE_NEEDED3", GEN6, RCS0, 0x5258, 2 },
- { "SO_WRITE_OFFSET0", GEN7, RCS0, 0x5280 },
- { "SO_WRITE_OFFSET1", GEN7, RCS0, 0x5284 },
- { "SO_WRITE_OFFSET2", GEN7, RCS0, 0x5288 },
- { "SO_WRITE_OFFSET3", GEN7, RCS0, 0x528c },
+ { "SO_WRITE_OFFSET0", GEN7, RCS0, 0x5280, .write_mask = ~0x3 },
+ {
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm & vgaarb: handle vgacon removal in vgaarb.
== Series Details == Series: drm & vgaarb: handle vgacon removal in vgaarb. URL : https://patchwork.freedesktop.org/series/57086/ State : failure == Summary == CALLscripts/checksyscalls.sh DESCEND objtool CHK include/generated/compile.h CC [M] drivers/gpu/drm/i915/i915_drv.o drivers/gpu/drm/i915/i915_drv.c: In function ‘i915_driver_init_hw’: drivers/gpu/drm/i915/i915_drv.c:1391:26: error: passing argument 1 of ‘vga_remove_vgacon’ from incompatible pointer type [-Werror=incompatible-pointer-types] ret = vga_remove_vgacon(dev_priv); ^~~~ In file included from drivers/gpu/drm/i915/i915_drv.c:39:0: ./include/linux/vgaarb.h:128:12: note: expected ‘struct pci_dev *’ but argument is of type ‘struct drm_i915_private *’ extern int vga_remove_vgacon(struct pci_dev *pdev); ^ cc1: all warnings being treated as errors scripts/Makefile.build:276: recipe for target 'drivers/gpu/drm/i915/i915_drv.o' failed make[4]: *** [drivers/gpu/drm/i915/i915_drv.o] Error 1 scripts/Makefile.build:492: recipe for target 'drivers/gpu/drm/i915' failed make[3]: *** [drivers/gpu/drm/i915] Error 2 scripts/Makefile.build:492: recipe for target 'drivers/gpu/drm' failed make[2]: *** [drivers/gpu/drm] Error 2 scripts/Makefile.build:492: recipe for target 'drivers/gpu' failed make[1]: *** [drivers/gpu] Error 2 Makefile:1043: recipe for target 'drivers' failed make: *** [drivers] Error 2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 2/3] drm/fb-helper: call vga_remove_vgacon automatically.
Add vga_remove_vgacon() call to
drm_fb_helper_remove_conflicting_pci_framebuffers().
Signed-off-by: Gerd Hoffmann
Reviewed-by: Daniel Vetter
---
include/drm/drm_fb_helper.h | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/include/drm/drm_fb_helper.h b/include/drm/drm_fb_helper.h
index bb9acea61369..286d58efed5d 100644
--- a/include/drm/drm_fb_helper.h
+++ b/include/drm/drm_fb_helper.h
@@ -36,6 +36,7 @@ struct drm_fb_helper;
#include
#include
#include
+#include
enum mode_set_atomic {
LEAVE_ATOMIC_MODE_SET,
@@ -642,11 +643,18 @@ drm_fb_helper_remove_conflicting_pci_framebuffers(struct
pci_dev *pdev,
int resource_id,
const char *name)
{
+ int ret = 0;
+
+ /*
+* WARNING: Apparently we must kick fbdev drivers before vgacon,
+* otherwise the vga fbdev driver falls over.
+*/
#if IS_REACHABLE(CONFIG_FB)
- return remove_conflicting_pci_framebuffers(pdev, resource_id, name);
-#else
- return 0;
+ ret = remove_conflicting_pci_framebuffers(pdev, resource_id, name);
#endif
+ if (ret == 0)
+ ret = vga_remove_vgacon(pdev);
+ return ret;
}
#endif
--
2.9.3
___
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[Intel-gfx] [PATCH v5 1/3] drm: move i915_kick_out_vgacon to vgaarb
Also rename it to vga_remove_vgacon and add kerneldoc text.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Daniel Vetter
---
include/linux/vgaarb.h | 2 ++
drivers/gpu/drm/i915/i915_drv.c | 35 +-
drivers/gpu/vga/vgaarb.c| 48 +
3 files changed, 51 insertions(+), 34 deletions(-)
diff --git a/include/linux/vgaarb.h b/include/linux/vgaarb.h
index ee162e3e879b..553b34c8b5f7 100644
--- a/include/linux/vgaarb.h
+++ b/include/linux/vgaarb.h
@@ -125,9 +125,11 @@ extern void vga_put(struct pci_dev *pdev, unsigned int
rsrc);
#ifdef CONFIG_VGA_ARB
extern struct pci_dev *vga_default_device(void);
extern void vga_set_default_device(struct pci_dev *pdev);
+extern int vga_remove_vgacon(struct pci_dev *pdev);
#else
static inline struct pci_dev *vga_default_device(void) { return NULL; };
static inline void vga_set_default_device(struct pci_dev *pdev) { };
+static inline int vga_remove_vgacon(struct pci_dev *pdev) { return 0; };
#endif
/*
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 6630212f2faf..991f18db1552 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -757,39 +757,6 @@ static int i915_kick_out_firmware_fb(struct
drm_i915_private *dev_priv)
return ret;
}
-#if !defined(CONFIG_VGA_CONSOLE)
-static int i915_kick_out_vgacon(struct drm_i915_private *dev_priv)
-{
- return 0;
-}
-#elif !defined(CONFIG_DUMMY_CONSOLE)
-static int i915_kick_out_vgacon(struct drm_i915_private *dev_priv)
-{
- return -ENODEV;
-}
-#else
-static int i915_kick_out_vgacon(struct drm_i915_private *dev_priv)
-{
- int ret = 0;
-
- DRM_INFO("Replacing VGA console driver\n");
-
- console_lock();
- if (con_is_bound(_con))
- ret = do_take_over_console(_con, 0, MAX_NR_CONSOLES - 1,
1);
- if (ret == 0) {
- ret = do_unregister_con_driver(_con);
-
- /* Ignore "already unregistered". */
- if (ret == -ENODEV)
- ret = 0;
- }
- console_unlock();
-
- return ret;
-}
-#endif
-
static void intel_init_dpio(struct drm_i915_private *dev_priv)
{
/*
@@ -1420,7 +1387,7 @@ static int i915_driver_init_hw(struct drm_i915_private
*dev_priv)
goto err_ggtt;
}
- ret = i915_kick_out_vgacon(dev_priv);
+ ret = vga_remove_vgacon(dev_priv);
if (ret) {
DRM_ERROR("failed to remove conflicting VGA console\n");
goto err_ggtt;
diff --git a/drivers/gpu/vga/vgaarb.c b/drivers/gpu/vga/vgaarb.c
index dc8e039bfab5..dc817104e424 100644
--- a/drivers/gpu/vga/vgaarb.c
+++ b/drivers/gpu/vga/vgaarb.c
@@ -48,6 +48,8 @@
#include
#include
#include
+#include
+#include
#include
@@ -168,6 +170,52 @@ void vga_set_default_device(struct pci_dev *pdev)
vga_default = pci_dev_get(pdev);
}
+/**
+ * vga_remove_vgacon - deactivete vga console
+ *
+ * Unbind and unregister vgacon in case pdev is the default vga
+ * device. Can be called by gpu drivers on initialization to make
+ * sure vga register access done by vgacon will not disturb the
+ * device.
+ *
+ * @pdev: pci device.
+ */
+#if !defined(CONFIG_VGA_CONSOLE)
+int vga_remove_vgacon(struct pci_dev *pdev)
+{
+return 0;
+}
+#elif !defined(CONFIG_DUMMY_CONSOLE)
+int vga_remove_vgacon(struct pci_dev *pdev)
+{
+return -ENODEV;
+}
+#else
+int vga_remove_vgacon(struct pci_dev *pdev)
+{
+int ret = 0;
+
+ if (pdev != vga_default)
+ return 0;
+ vgaarb_info(>dev, "deactivate vga console\n");
+
+console_lock();
+if (con_is_bound(_con))
+ret = do_take_over_console(_con, 0, MAX_NR_CONSOLES - 1,
1);
+if (ret == 0) {
+ret = do_unregister_con_driver(_con);
+
+/* Ignore "already unregistered". */
+if (ret == -ENODEV)
+ret = 0;
+}
+console_unlock();
+
+return ret;
+}
+#endif
+EXPORT_SYMBOL(vga_remove_vgacon);
+
static inline void vga_irq_set_state(struct vga_device *vgadev, bool state)
{
if (vgadev->irq_set_state)
--
2.9.3
___
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[Intel-gfx] [PATCH v5 0/3] drm & vgaarb: handle vgacon removal in vgaarb.
Gerd Hoffmann (3): drm: move i915_kick_out_vgacon to vgaarb drm/fb-helper: call vga_remove_vgacon automatically. drm/qxl: remove conflicting framebuffers earlier include/drm/drm_fb_helper.h | 14 +--- include/linux/vgaarb.h | 2 ++ drivers/gpu/drm/i915/i915_drv.c | 35 +- drivers/gpu/drm/qxl/qxl_drv.c | 5 - drivers/gpu/vga/vgaarb.c| 48 + 5 files changed, 66 insertions(+), 38 deletions(-) -- 2.9.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 3/3] drm/qxl: remove conflicting framebuffers earlier
Add error checking while being at it. Signed-off-by: Gerd Hoffmann Reviewed-by: Daniel Vetter --- drivers/gpu/drm/qxl/qxl_drv.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/qxl/qxl_drv.c b/drivers/gpu/drm/qxl/qxl_drv.c index bb81e310eb6d..578d867a81d5 100644 --- a/drivers/gpu/drm/qxl/qxl_drv.c +++ b/drivers/gpu/drm/qxl/qxl_drv.c @@ -79,6 +79,10 @@ qxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) if (ret) goto free_dev; + ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, 0, "qxl"); + if (ret) + goto disable_pci; + ret = qxl_device_init(qdev, _driver, pdev); if (ret) goto disable_pci; @@ -94,7 +98,6 @@ qxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) if (ret) goto modeset_cleanup; - drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, 0, "qxl"); drm_fbdev_generic_setup(>ddev, 32); return 0; -- 2.9.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access (rev2)
== Series Details ==
Series: RFT i915/gem_ctx_isolation: Sanitycheck nonpriv access (rev2)
URL : https://patchwork.freedesktop.org/series/57039/
State : failure
== Summary ==
CI Bug Log - changes from IGT_4851_full -> IGTPW_2477_full
Summary
---
**FAILURE**
Serious unknown changes coming with IGTPW_2477_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_2477_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/57039/revisions/2/mbox/
Possible new issues
---
Here are the unknown changes that may have been introduced in IGTPW_2477_full:
### IGT changes ###
Possible regressions
* igt@gem_ctx_isolation@rcs0-dirty-switch:
- shard-glk: PASS -> FAIL +1
* {igt@gem_ctx_isolation@rcs0-nonpriv} (NEW):
- shard-hsw: NOTRUN -> FAIL
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: PASS -> FAIL
- shard-apl: PASS -> FAIL +1
New tests
-
New tests have been introduced between IGT_4851_full and IGTPW_2477_full:
### New IGT tests (5) ###
* igt@gem_ctx_isolation@bcs0-nonpriv:
- Statuses : 2 pass(s) 1 skip(s)
- Exec time: [0.0, 0.12] s
* igt@gem_ctx_isolation@rcs0-nonpriv:
- Statuses : 1 fail(s) 3 pass(s)
- Exec time: [0.04, 0.12] s
* igt@gem_ctx_isolation@vcs0-nonpriv:
- Statuses : 3 pass(s) 1 skip(s)
- Exec time: [0.0, 0.12] s
* igt@gem_ctx_isolation@vcs1-nonpriv:
- Statuses : 1 pass(s) 3 skip(s)
- Exec time: [0.0, 0.04] s
* igt@gem_ctx_isolation@vecs0-nonpriv:
- Statuses : 3 pass(s)
- Exec time: [0.04, 0.12] s
Known issues
Here are the changes found in IGTPW_2477_full that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_isolation@rcs0-dirty-switch:
- shard-apl: PASS -> FAIL [fdo#109472]
- shard-kbl: PASS -> FAIL [fdo#109472]
* {igt@gem_ctx_isolation@vcs0-nonpriv} (NEW):
- shard-hsw: NOTRUN -> SKIP [fdo#109271] +2
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-kbl: NOTRUN -> SKIP [fdo#109271] +5
* igt@gem_exec_store@basic-bsd2:
- shard-apl: NOTRUN -> SKIP [fdo#109271] +36
* igt@gem_userptr_blits@process-exit-gtt:
- shard-glk: NOTRUN -> SKIP [fdo#109271] +24
* igt@kms_atomic_transition@plane-all-modeset-transition:
- shard-apl: PASS -> INCOMPLETE [fdo#103927]
* igt@kms_busy@extended-pageflip-hang-newfb-render-e:
- shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
- shard-glk: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-glk: PASS -> FAIL [fdo#108145]
* igt@kms_color@pipe-a-legacy-gamma:
- shard-kbl: PASS -> FAIL [fdo#104782] / [fdo#108145]
- shard-apl: PASS -> FAIL [fdo#104782] / [fdo#108145]
* igt@kms_cursor_crc@cursor-128x128-suspend:
- shard-apl: PASS -> FAIL [fdo#103191] / [fdo#103232] +2
* igt@kms_cursor_crc@cursor-128x42-random:
- shard-kbl: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-256x256-dpms:
- shard-apl: PASS -> FAIL [fdo#103232] +3
* igt@kms_flip@flip-vs-wf_vblank-interruptible:
- shard-kbl: PASS -> DMESG-WARN [fdo#103558] / [fdo#105602] +7
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-kbl: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
- shard-apl: PASS -> FAIL [fdo#103167] +2
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc:
- shard-glk: PASS -> FAIL [fdo#103167] +6
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-glk: PASS -> FAIL [fdo#108948]
* igt@kms_plane@plane-position-covered-pipe-b-planes:
- shard-glk: PASS -> FAIL [fdo#103166] +6
* igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
- shard-apl: PASS -> FAIL [fdo#108145]
* igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
- shard-apl: PASS -> FAIL [fdo#103166] +3
* igt@kms_plane_multiple@atomic-pipe-b-tiling-yf:
- shard-kbl: PASS -> FAIL [fdo#103166] +3
* igt@kms_setmode@basic:
- shard-apl: PASS -> FAIL [fdo#99912]
* igt@kms_vblank@pipe-b-ts-continuation-modeset-rpm:
- shard-apl: PASS -> FAIL [fdo#104894] +3
* igt@prime_vgem@basic-fence-flip:
- shard-apl: PASS -> FAIL [fdo#104008]
Possible fixes
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
- shard-kbl: DMESG-WARN [fdo#107956] -> PASS
*
Re: [Intel-gfx] [PATCH] drm/i915: Sort ctx workarounds init from newer to older platforms.
Quoting Rodrigo Vivi (2019-02-21 23:14:52) > No functional change. Just a reorg to match the preferred > behavior. > > Cc: Tvrtko Ursulin > Cc: Ville Syrjälä > Cc: Lucas De Marchi > Signed-off-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/intel_workarounds.c | 36 > 1 file changed, 18 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_workarounds.c > b/drivers/gpu/drm/i915/intel_workarounds.c > index 15f4a6dee5aa..743cf5b00155 100644 > --- a/drivers/gpu/drm/i915/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/intel_workarounds.c > @@ -564,26 +564,26 @@ void intel_engine_init_ctx_wa(struct intel_engine_cs > *engine) > > wa_init_start(wal, "context"); > > - if (INTEL_GEN(i915) < 8) > - return; > - else if (IS_BROADWELL(i915)) > - bdw_ctx_workarounds_init(engine); > - else if (IS_CHERRYVIEW(i915)) > - chv_ctx_workarounds_init(engine); > - else if (IS_SKYLAKE(i915)) > - skl_ctx_workarounds_init(engine); > - else if (IS_BROXTON(i915)) > - bxt_ctx_workarounds_init(engine); > - else if (IS_KABYLAKE(i915)) > - kbl_ctx_workarounds_init(engine); > - else if (IS_GEMINILAKE(i915)) > - glk_ctx_workarounds_init(engine); > - else if (IS_COFFEELAKE(i915)) > - cfl_ctx_workarounds_init(engine); If the chains start with if (0) /* space left intentionally blank */ else if (IS_ICELAKE(i915)) adding more to the chain later would have less collateral damage. > + if (IS_ICELAKE(i915)) > + icl_ctx_workarounds_init(engine); > else if (IS_CANNONLAKE(i915)) > cnl_ctx_workarounds_init(engine); > - else if (IS_ICELAKE(i915)) > - icl_ctx_workarounds_init(engine); > + else if (IS_COFFEELAKE(i915)) > + cfl_ctx_workarounds_init(engine); > + else if (IS_GEMINILAKE(i915)) > + glk_ctx_workarounds_init(engine); > + else if (IS_KABYLAKE(i915)) > + kbl_ctx_workarounds_init(engine); > + else if (IS_BROXTON(i915)) > + bxt_ctx_workarounds_init(engine); > + else if (IS_SKYLAKE(i915)) > + skl_ctx_workarounds_init(engine); > + else if (IS_CHERRYVIEW(i915)) > + chv_ctx_workarounds_init(engine); > + else if (IS_BROADWELL(i915)) > + bdw_ctx_workarounds_init(engine); For the sake of consistency, Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for Make DRM DSC helpers more generally usable
== Series Details == Series: Make DRM DSC helpers more generally usable URL : https://patchwork.freedesktop.org/series/57044/ State : success == Summary == CI Bug Log - changes from CI_DRM_5650_full -> Patchwork_12278_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12278_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_busy@extended-semaphore-bsd1: - shard-iclb: NOTRUN -> SKIP [fdo#109275] / [fdo#109276] * igt@gem_ctx_isolation@rcs0-s3: - shard-iclb: NOTRUN -> SKIP [fdo#109281] +1 * igt@gem_ctx_param@invalid-param-get: - shard-snb: NOTRUN -> FAIL [fdo#109559] * igt@gem_ctx_param@invalid-param-set: - shard-snb: NOTRUN -> FAIL [fdo#109674] * igt@gem_exec_parse@oacontrol-tracking: - shard-iclb: NOTRUN -> SKIP [fdo#109289] * igt@gem_exec_reuse@contexts: - shard-snb: NOTRUN -> INCOMPLETE [fdo#105411] * igt@gem_exec_schedule@preempt-contexts-bsd2: - shard-iclb: NOTRUN -> SKIP [fdo#109276] +9 * igt@gem_exec_schedule@preempt-other-chain-blt: - shard-snb: NOTRUN -> SKIP [fdo#109271] +1290 * igt@gem_mocs_settings@mocs-reset-bsd1: - shard-iclb: NOTRUN -> SKIP [fdo#109276] / [fdo#109287] * igt@gem_mocs_settings@mocs-reset-ctx-render: - shard-iclb: NOTRUN -> SKIP [fdo#109287] +2 * igt@gem_pwrite@huge-cpu-backwards: - shard-iclb: NOTRUN -> SKIP [fdo#109290] * igt@gem_stolen@stolen-fill-purge: - shard-iclb: NOTRUN -> SKIP [fdo#109277] * igt@i915_pm_rpm@gem-execbuf: - shard-iclb: PASS -> INCOMPLETE [fdo#108840] * igt@i915_pm_rpm@modeset-non-lpsp-stress: - shard-iclb: NOTRUN -> SKIP [fdo#109308] * igt@i915_pm_rpm@system-suspend-modeset: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +6 * igt@i915_pm_rps@min-max-config-loaded: - shard-iclb: NOTRUN -> FAIL [fdo#102250] * igt@kms_busy@basic-flip-d: - shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +144 * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: - shard-snb: NOTRUN -> DMESG-WARN [fdo#107956] +5 - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] - shard-hsw: PASS -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-d: - shard-iclb: NOTRUN -> SKIP [fdo#109278] +4 * igt@kms_ccs@pipe-a-crc-primary-basic: - shard-iclb: NOTRUN -> FAIL [fdo#107725] * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-apl: PASS -> FAIL [fdo#106510] / [fdo#108145] * igt@kms_chamelium@hdmi-edid-read: - shard-iclb: NOTRUN -> SKIP [fdo#109284] +2 * igt@kms_cursor_crc@cursor-64x21-sliding: - shard-iclb: NOTRUN -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-64x64-onscreen: - shard-apl: PASS -> FAIL [fdo#103232] * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic: - shard-iclb: NOTRUN -> SKIP [fdo#109274] +5 * igt@kms_flip@flip-vs-suspend: - shard-kbl: PASS -> INCOMPLETE [fdo#103665] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt: - shard-apl: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: PASS -> FAIL [fdo#103167] +2 * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu: - shard-glk: PASS -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-plflip-blt: - shard-iclb: NOTRUN -> SKIP [fdo#109280] +17 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-cpu: - shard-iclb: NOTRUN -> FAIL [fdo#103167] +1 * igt@kms_plane@plane-position-covered-pipe-a-planes: - shard-glk: PASS -> FAIL [fdo#103166] - shard-iclb: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb: - shard-apl: PASS -> FAIL [fdo#108145] * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: - shard-apl: PASS -> FAIL [fdo#103166] +2 * igt@kms_psr@no_drrs: - shard-iclb: PASS -> FAIL [fdo#108341] * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-kbl: PASS -> FAIL [fdo#109016] * igt@kms_setmode@basic: - shard-snb: NOTRUN -> FAIL [fdo#99912] * igt@kms_tv_load_detect@load-detect: - shard-iclb: NOTRUN -> SKIP [fdo#109309] * igt@perf_pmu@rc6: - shard-kbl: PASS -> SKIP [fdo#109271] * igt@prime_nv_pcopy@test3_3: - shard-iclb: NOTRUN -> SKIP [fdo#109291] Possible fixes * igt@i915_pm_rpm@gem-evict-pwrite: - shard-iclb: INCOMPLETE [fdo#108840] -> PASS * igt@i915_pm_rpm@i2c: -
[Intel-gfx] [PULL] drm-misc-fixes
Hi dave/Daniel, Sorry for being a bit late, hopefully still in time for v5.0 :) drm-misc-fixes-2019-02-22: drm-misc-fixes for v5.0: - Block fb changes for async atomic updates to prevent a use after free. - Fix ID mismatch error on load in bochs. - Fix memory leak when drm_setup fails. - Fixes around handling of DRM_AUTH. - The following changes since commit 7fd56e0260a22c0cfaf9adb94a2427b76e239dd0: drm/vkms: Fix license inconsistent (2019-02-10 10:23:06 -0200) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-fixes-2019-02-22 for you to fetch changes up to 04b9c48851582aa0971b7d4e9d42c872b8acd0e2: drm/bochs: Fix the ID mismatch error (2019-02-21 12:51:37 +0100) drm-misc-fixes for v5.0: - Block fb changes for async atomic updates to prevent a use after free. - Fix ID mismatch error on load in bochs. - Fix memory leak when drm_setup fails. - Fixes around handling of DRM_AUTH. - Alistair Francis (1): drm/bochs: Fix the ID mismatch error Emil Velikov (5): drm: drop DRM_AUTH requirement from AUTH_MAGIC ioctl drm: factor out drm_close_helper() function drm: plug memory leak on drm_setup() failure drm: annotate drm_core_check_feature() dev arg. as const drm: allow render capable master with DRM_AUTH ioctls Nicholas Kazlauskas (1): drm: Block fb changes for async plane updates drivers/gpu/drm/bochs/bochs_drv.c | 4 drivers/gpu/drm/drm_atomic_helper.c | 9 + drivers/gpu/drm/drm_file.c | 22 -- drivers/gpu/drm/drm_ioctl.c | 22 +- include/drm/drm_drv.h | 2 +- 5 files changed, 47 insertions(+), 12 deletions(-) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp: Preliminary support for DP YCbCr4:2:0 outputs (rev2)
== Series Details == Series: drm/i915/dp: Preliminary support for DP YCbCr4:2:0 outputs (rev2) URL : https://patchwork.freedesktop.org/series/56059/ State : success == Summary == CI Bug Log - changes from CI_DRM_5650_full -> Patchwork_12277_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12277_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_busy@extended-semaphore-bsd1: - shard-iclb: NOTRUN -> SKIP [fdo#109275] / [fdo#109276] * igt@gem_ctx_isolation@rcs0-s3: - shard-iclb: NOTRUN -> SKIP [fdo#109281] +1 * igt@gem_exec_parse@oacontrol-tracking: - shard-iclb: NOTRUN -> SKIP [fdo#109289] * igt@gem_exec_schedule@preempt-contexts-bsd2: - shard-iclb: NOTRUN -> SKIP [fdo#109276] +9 * igt@gem_mocs_settings@mocs-reset-bsd1: - shard-iclb: NOTRUN -> SKIP [fdo#109276] / [fdo#109287] * igt@gem_mocs_settings@mocs-reset-ctx-render: - shard-iclb: NOTRUN -> SKIP [fdo#109287] +2 * igt@gem_pwrite@huge-cpu-backwards: - shard-iclb: NOTRUN -> SKIP [fdo#109290] * igt@gem_stolen@stolen-fill-purge: - shard-iclb: NOTRUN -> SKIP [fdo#109277] * igt@i915_pm_rpm@debugfs-read: - shard-iclb: PASS -> INCOMPLETE [fdo#108840] * igt@i915_pm_rpm@modeset-non-lpsp-stress: - shard-iclb: NOTRUN -> SKIP [fdo#109308] * igt@i915_pm_rpm@modeset-stress-extra-wait: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] * igt@i915_pm_rpm@system-suspend-devices: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] * igt@i915_pm_rps@min-max-config-loaded: - shard-iclb: NOTRUN -> FAIL [fdo#102250] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] - shard-hsw: PASS -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-d: - shard-iclb: NOTRUN -> SKIP [fdo#109278] +4 * igt@kms_ccs@pipe-a-crc-primary-basic: - shard-iclb: NOTRUN -> FAIL [fdo#107725] * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-apl: PASS -> FAIL [fdo#106510] / [fdo#108145] * igt@kms_chamelium@hdmi-edid-read: - shard-iclb: NOTRUN -> SKIP [fdo#109284] +2 * igt@kms_cursor_crc@cursor-128x128-random: - shard-apl: PASS -> FAIL [fdo#103232] +1 * igt@kms_cursor_crc@cursor-64x21-sliding: - shard-iclb: NOTRUN -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-64x64-suspend: - shard-apl: PASS -> FAIL [fdo#103191] / [fdo#103232] * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic: - shard-iclb: NOTRUN -> SKIP [fdo#109274] +5 * igt@kms_fbcon_fbt@fbc-suspend: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@kms_flip@flip-vs-suspend: - shard-kbl: PASS -> INCOMPLETE [fdo#103665] * igt@kms_flip@flip-vs-suspend-interruptible: - shard-iclb: PASS -> INCOMPLETE [fdo#109507] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: PASS -> FAIL [fdo#103167] +8 - shard-glk: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-fullscreen: - shard-iclb: NOTRUN -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-plflip-blt: - shard-iclb: NOTRUN -> SKIP [fdo#109280] +15 * igt@kms_plane@plane-position-covered-pipe-a-planes: - shard-iclb: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_multiple@atomic-pipe-b-tiling-none: - shard-apl: PASS -> FAIL [fdo#103166] +1 * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom: - shard-iclb: PASS -> FAIL [fdo#109016] * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-kbl: PASS -> FAIL [fdo#109016] * igt@kms_setmode@basic: - shard-kbl: PASS -> FAIL [fdo#99912] * igt@kms_tv_load_detect@load-detect: - shard-iclb: NOTRUN -> SKIP [fdo#109309] * igt@perf_pmu@rc6: - shard-kbl: PASS -> SKIP [fdo#109271] * igt@prime_nv_pcopy@test3_3: - shard-iclb: NOTRUN -> SKIP [fdo#109291] Possible fixes * igt@i915_pm_rpm@gem-evict-pwrite: - shard-iclb: INCOMPLETE [fdo#108840] -> PASS * igt@i915_pm_rpm@i2c: - shard-iclb: DMESG-WARN [fdo#107724] -> PASS +4 * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: - shard-hsw: DMESG-WARN [fdo#107956] -> PASS * igt@kms_color@pipe-c-legacy-gamma: - shard-apl: FAIL [fdo#104782] -> PASS * igt@kms_cursor_crc@cursor-128x128-onscreen: - shard-apl: FAIL [fdo#103232] -> PASS +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
