[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Refine placement of gt.reset_lockmap

2019-06-12 Thread Patchwork
== Series Details ==

Series: series starting with [1/4] drm/i915: Refine placement of 
gt.reset_lockmap
URL   : https://patchwork.freedesktop.org/series/61991/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
2fa70e0be054 drm/i915: Refine placement of gt.reset_lockmap
c4b1fa3b38d7 drm/i915: Avoid tainting i915_gem_park() with wakeref.lock
6e042e229f1d drm/i915: Move fence register tracking from i915->mm to ggtt
-:182: WARNING:PREFER_SEQ_PUTS: Prefer seq_puts to seq_printf
#182: FILE: drivers/gpu/drm/i915/i915_debugfs.c:231:
+   seq_printf(m, " (global)");

total: 0 errors, 1 warnings, 0 checks, 644 lines checked
8d914dd82cd7 drm/i915: Track ggtt fence reservations under its own mutex

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[Intel-gfx] [PATCH 3/4] drm/i915: Move fence register tracking from i915->mm to ggtt

2019-06-12 Thread Chris Wilson
As the fence registers only apply to regions inside the GGTT is makes
more sense that we track these as part of the i915_ggtt and not the
general mm. In the next patch, we will then pull the register locking
underneath the i915_ggtt.mutex.

Signed-off-by: Chris Wilson 
Reviewed-by: Mika Kuoppala 
---
 drivers/gpu/drm/i915/gem/i915_gem_mman.c  |  4 +-
 drivers/gpu/drm/i915/gem/i915_gem_pm.c|  2 +-
 drivers/gpu/drm/i915/gt/intel_reset.c |  6 +-
 drivers/gpu/drm/i915/gvt/aperture_gm.c|  7 +-
 drivers/gpu/drm/i915/gvt/gvt.h|  4 +-
 drivers/gpu/drm/i915/i915_debugfs.c   | 42 ++-
 drivers/gpu/drm/i915/i915_drv.c   |  3 +-
 drivers/gpu/drm/i915/i915_drv.h   | 28 ---
 drivers/gpu/drm/i915/i915_gem.c   | 52 +++--
 drivers/gpu/drm/i915/i915_gem_fence_reg.c | 90 ---
 drivers/gpu/drm/i915/i915_gem_fence_reg.h | 19 -
 drivers/gpu/drm/i915/i915_gem_gtt.c   |  2 +
 drivers/gpu/drm/i915/i915_gem_gtt.h   | 14 +++-
 drivers/gpu/drm/i915/i915_gpu_error.c |  6 +-
 drivers/gpu/drm/i915/i915_vma.h   |  2 +-
 15 files changed, 144 insertions(+), 137 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index c7b9b34de01b..a8b8b9c281f1 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -310,9 +310,9 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf)
/* Mark as being mmapped into userspace for later revocation */
assert_rpm_wakelock_held(i915);
if (!i915_vma_set_userfault(vma) && !obj->userfault_count++)
-   list_add(&obj->userfault_link, &i915->mm.userfault_list);
+   list_add(&obj->userfault_link, &i915->ggtt.userfault_list);
if (CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
-   intel_wakeref_auto(&i915->mm.userfault_wakeref,
+   intel_wakeref_auto(&i915->ggtt.userfault_wakeref,
   
msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
GEM_BUG_ON(!obj->userfault_count);
 
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index 03af78151aeb..a33f69610d6f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -125,7 +125,7 @@ void i915_gem_suspend(struct drm_i915_private *i915)
 {
GEM_TRACE("\n");
 
-   intel_wakeref_auto(&i915->mm.userfault_wakeref, 0);
+   intel_wakeref_auto(&i915->ggtt.userfault_wakeref, 0);
flush_workqueue(i915->wq);
 
mutex_lock(&i915->drm.struct_mutex);
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c 
b/drivers/gpu/drm/i915/gt/intel_reset.c
index 952e11b4b5c5..3b88bbd37275 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -695,19 +695,19 @@ static void revoke_mmaps(struct drm_i915_private *i915)
 {
int i;
 
-   for (i = 0; i < i915->num_fence_regs; i++) {
+   for (i = 0; i < i915->ggtt.num_fences; i++) {
struct drm_vma_offset_node *node;
struct i915_vma *vma;
u64 vma_offset;
 
-   vma = READ_ONCE(i915->fence_regs[i].vma);
+   vma = READ_ONCE(i915->ggtt.fence_regs[i].vma);
if (!vma)
continue;
 
if (!i915_vma_has_userfault(vma))
continue;
 
-   GEM_BUG_ON(vma->fence != &i915->fence_regs[i]);
+   GEM_BUG_ON(vma->fence != &i915->ggtt.fence_regs[i]);
node = &vma->obj->base.vma_node;
vma_offset = vma->ggtt_view.partial.offset << PAGE_SHIFT;
unmap_mapping_range(i915->drm.anon_inode->i_mapping,
diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c 
b/drivers/gpu/drm/i915/gvt/aperture_gm.c
index 1fa2f65c3cd1..4098902bfaeb 100644
--- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
+++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
@@ -35,6 +35,7 @@
  */
 
 #include "i915_drv.h"
+#include "i915_gem_fence_reg.h"
 #include "gvt.h"
 
 static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
@@ -128,7 +129,7 @@ void intel_vgpu_write_fence(struct intel_vgpu *vgpu,
 {
struct intel_gvt *gvt = vgpu->gvt;
struct drm_i915_private *dev_priv = gvt->dev_priv;
-   struct drm_i915_fence_reg *reg;
+   struct i915_fence_reg *reg;
i915_reg_t fence_reg_lo, fence_reg_hi;
 
assert_rpm_wakelock_held(dev_priv);
@@ -163,7 +164,7 @@ static void free_vgpu_fence(struct intel_vgpu *vgpu)
 {
struct intel_gvt *gvt = vgpu->gvt;
struct drm_i915_private *dev_priv = gvt->dev_priv;
-   struct drm_i915_fence_reg *reg;
+   struct i915_fence_reg *reg;
u32 i;
 
if (WARN_ON(!vgpu_fence_sz(vgpu)))
@@ -187,7 +188,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
 {
struct intel_gvt *gvt = vgpu->gvt;
struct drm_i915_privat

[Intel-gfx] [PATCH 4/4] drm/i915: Track ggtt fence reservations under its own mutex

2019-06-12 Thread Chris Wilson
We can reduce the locking for fence registers from the dev->struct_mutex
to a local mutex. We could introduce a mutex for the sole purpose of
tracking the fence acquisition, except there is a little bit of overlap
with the fault tracking, so use the i915_ggtt.mutex as it covers both.

Signed-off-by: Chris Wilson 
Cc: Mika Kuoppala 
---
 drivers/gpu/drm/i915/gt/selftest_hangcheck.c |   7 ++
 drivers/gpu/drm/i915/gvt/aperture_gm.c   |  10 +-
 drivers/gpu/drm/i915/i915_debugfs.c  |   5 +-
 drivers/gpu/drm/i915/i915_gem_fence_reg.c| 108 ---
 drivers/gpu/drm/i915/i915_gem_fence_reg.h|   2 +-
 drivers/gpu/drm/i915/i915_vma.h  |   4 +-
 6 files changed, 87 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c 
b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index 45379a63e013..3752d3172543 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -1165,7 +1165,14 @@ static int evict_fence(void *data)
goto out_unlock;
}
 
+   err = i915_vma_pin(arg->vma, 0, 0, PIN_GLOBAL | PIN_MAPPABLE);
+   if (err) {
+   pr_err("Unable to pin vma for Y-tiled fence; err:%d\n", err);
+   goto out_unlock;
+   }
+
err = i915_vma_pin_fence(arg->vma);
+   i915_vma_unpin(arg->vma);
if (err) {
pr_err("Unable to pin Y-tiled fence; err:%d\n", err);
goto out_unlock;
diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c 
b/drivers/gpu/drm/i915/gvt/aperture_gm.c
index 4098902bfaeb..2bd9dcebd48c 100644
--- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
+++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
@@ -172,14 +172,14 @@ static void free_vgpu_fence(struct intel_vgpu *vgpu)
 
intel_runtime_pm_get(dev_priv);
 
-   mutex_lock(&dev_priv->drm.struct_mutex);
+   mutex_lock(&dev_priv->ggtt.vm.mutex);
_clear_vgpu_fence(vgpu);
for (i = 0; i < vgpu_fence_sz(vgpu); i++) {
reg = vgpu->fence.regs[i];
i915_unreserve_fence(reg);
vgpu->fence.regs[i] = NULL;
}
-   mutex_unlock(&dev_priv->drm.struct_mutex);
+   mutex_unlock(&dev_priv->ggtt.vm.mutex);
 
intel_runtime_pm_put_unchecked(dev_priv);
 }
@@ -194,7 +194,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
intel_runtime_pm_get(dev_priv);
 
/* Request fences from host */
-   mutex_lock(&dev_priv->drm.struct_mutex);
+   mutex_lock(&dev_priv->ggtt.vm.mutex);
 
for (i = 0; i < vgpu_fence_sz(vgpu); i++) {
reg = i915_reserve_fence(dev_priv);
@@ -206,7 +206,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
 
_clear_vgpu_fence(vgpu);
 
-   mutex_unlock(&dev_priv->drm.struct_mutex);
+   mutex_unlock(&dev_priv->ggtt.vm.mutex);
intel_runtime_pm_put_unchecked(dev_priv);
return 0;
 out_free_fence:
@@ -219,7 +219,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
i915_unreserve_fence(reg);
vgpu->fence.regs[i] = NULL;
}
-   mutex_unlock(&dev_priv->drm.struct_mutex);
+   mutex_unlock(&dev_priv->ggtt.vm.mutex);
intel_runtime_pm_put_unchecked(dev_priv);
return -ENOSPC;
 }
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 323863504111..7a54f2d432af 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -710,10 +710,11 @@ static int i915_gem_fence_regs_info(struct seq_file *m, 
void *data)
 
rcu_read_lock();
for (i = 0; i < i915->ggtt.num_fences; i++) {
-   struct i915_vma *vma = i915->ggtt.fence_regs[i].vma;
+   struct i915_fence_reg *reg = &i915->ggtt.fence_regs[i];
+   struct i915_vma *vma = reg->vma;
 
seq_printf(m, "Fence %d, pin count = %d, object = ",
-  i, i915->ggtt.fence_regs[i].pin_count);
+  i, atomic_read(®->pin_count));
if (!vma)
seq_puts(m, "unused");
else
diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c 
b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index 1c9466676caf..24bdffac6380 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -301,15 +301,24 @@ static int fence_update(struct i915_fence_reg *fence,
  */
 int i915_vma_put_fence(struct i915_vma *vma)
 {
+   struct i915_ggtt *ggtt = i915_vm_to_ggtt(vma->vm);
struct i915_fence_reg *fence = vma->fence;
+   int err;
 
if (!fence)
return 0;
 
-   if (fence->pin_count)
+   if (atomic_read(&fence->pin_count))
return -EBUSY;
 
-   return fence_update(fence, NULL);
+   err = mutex_lock_interruptible(&ggtt->vm.mutex);
+   if (err)
+   return err;
+
+   err = fence_updat

[Intel-gfx] [PATCH 1/4] drm/i915: Refine placement of gt.reset_lockmap

2019-06-12 Thread Chris Wilson
If we pull the lockmap into reset_prepare/reset_finish, it will
naturally cover i915_gem_set_wedged() as well as i915_reset(). And with
another tweak, we can pull __i915_gem_unset_wedged() underneath the
lockmap covering the mutexes used there.

As a bonus, it should hide the ugliness of the i915_reset exit path ;)

Signed-off-by: Chris Wilson 
Cc: Mika Kuoppala 
---
 drivers/gpu/drm/i915/gt/intel_reset.c | 12 +++-
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c 
b/drivers/gpu/drm/i915/gt/intel_reset.c
index 6368b37f26d1..952e11b4b5c5 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -723,6 +723,8 @@ static void reset_prepare(struct drm_i915_private *i915)
enum intel_engine_id id;
 
intel_gt_pm_get(i915);
+   lock_map_acquire(&i915->gt.reset_lockmap);
+
for_each_engine(engine, i915, id)
reset_prepare_engine(engine);
 
@@ -773,6 +775,8 @@ static void reset_finish(struct drm_i915_private *i915)
reset_finish_engine(engine);
intel_engine_signal_breadcrumbs(engine);
}
+
+   lock_map_release(&i915->gt.reset_lockmap);
intel_gt_pm_put(i915);
 }
 
@@ -978,17 +982,17 @@ void i915_reset(struct drm_i915_private *i915,
 
might_sleep();
GEM_BUG_ON(!test_bit(I915_RESET_BACKOFF, &error->flags));
-   lock_map_acquire(&i915->gt.reset_lockmap);
+
+   reset_prepare(i915);
 
/* Clear any previous failed attempts at recovery. Time to try again. */
if (!__i915_gem_unset_wedged(i915))
-   goto unlock;
+   goto finish;
 
if (reason)
dev_notice(i915->drm.dev, "Resetting chip for %s\n", reason);
error->reset_count++;
 
-   reset_prepare(i915);
 
if (!intel_has_gpu_reset(i915)) {
if (i915_modparams.reset)
@@ -1030,8 +1034,6 @@ void i915_reset(struct drm_i915_private *i915,
 
 finish:
reset_finish(i915);
-unlock:
-   lock_map_release(&i915->gt.reset_lockmap);
return;
 
 taint:
-- 
2.20.1

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[Intel-gfx] [PATCH 2/4] drm/i915: Avoid tainting i915_gem_park() with wakeref.lock

2019-06-12 Thread Chris Wilson
While we need to flush the wakeref before parking, we do not need to
perform the i915_gem_park() itself underneath the wakeref lock, merely
the struct_mutex. If we rearrange the locks, we can avoid the unnecessary
tainting.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/gem/i915_gem_pm.c | 17 -
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index f68c0ad1aa47..03af78151aeb 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -30,23 +30,22 @@ static void idle_work_handler(struct work_struct *work)
 {
struct drm_i915_private *i915 =
container_of(work, typeof(*i915), gem.idle_work);
-   bool restart = true;
+   bool park;
 
-   cancel_delayed_work(&i915->gem.retire_work);
+   cancel_delayed_work_sync(&i915->gem.retire_work);
mutex_lock(&i915->drm.struct_mutex);
 
intel_wakeref_lock(&i915->gt.wakeref);
-   if (!intel_wakeref_active(&i915->gt.wakeref) && !work_pending(work)) {
-   i915_gem_park(i915);
-   restart = false;
-   }
+   park = !intel_wakeref_active(&i915->gt.wakeref) && !work_pending(work);
intel_wakeref_unlock(&i915->gt.wakeref);
-
-   mutex_unlock(&i915->drm.struct_mutex);
-   if (restart)
+   if (park)
+   i915_gem_park(i915);
+   else
queue_delayed_work(i915->wq,
   &i915->gem.retire_work,
   round_jiffies_up_relative(HZ));
+
+   mutex_unlock(&i915->drm.struct_mutex);
 }
 
 static void retire_work_handler(struct work_struct *work)
-- 
2.20.1

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[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/8] drm/i915: Keep contexts pinned until after the next kernel context switch

2019-06-12 Thread Patchwork
== Series Details ==

Series: series starting with [1/8] drm/i915: Keep contexts pinned until after 
the next kernel context switch
URL   : https://patchwork.freedesktop.org/series/61946/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6244_full -> Patchwork_13250_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_13250_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_13250_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_13250_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_ctx_engines@execute-one:
- shard-skl:  [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-skl5/igt@gem_ctx_engi...@execute-one.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13250/shard-skl1/igt@gem_ctx_engi...@execute-one.html
- shard-apl:  [PASS][3] -> [FAIL][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-apl2/igt@gem_ctx_engi...@execute-one.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13250/shard-apl6/igt@gem_ctx_engi...@execute-one.html
- shard-glk:  [PASS][5] -> [FAIL][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-glk6/igt@gem_ctx_engi...@execute-one.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13250/shard-glk6/igt@gem_ctx_engi...@execute-one.html

  * igt@gem_exec_await@wide-contexts:
- shard-kbl:  [PASS][7] -> [FAIL][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-kbl7/igt@gem_exec_aw...@wide-contexts.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13250/shard-kbl4/igt@gem_exec_aw...@wide-contexts.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-snb:  [PASS][9] -> [DMESG-WARN][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-snb1/igt@kms_cursor_...@pipe-a-cursor-suspend.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13250/shard-snb4/igt@kms_cursor_...@pipe-a-cursor-suspend.html

  

### Piglit changes ###

 Possible regressions 

  * spec@arb_shader_image_load_store@shader-mem-barrier (NEW):
- pig-glk-j5005:  NOTRUN -> [FAIL][11] +3 similar issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13250/pig-glk-j5005/spec@arb_shader_image_load_st...@shader-mem-barrier.html
- pig-skl-6260u:  NOTRUN -> [FAIL][12]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13250/pig-skl-6260u/spec@arb_shader_image_load_st...@shader-mem-barrier.html

  
New tests
-

  New tests have been introduced between CI_DRM_6244_full and 
Patchwork_13250_full:

### New Piglit tests (4) ###

  * spec@arb_shader_image_load_store@shader-mem-barrier:
- Statuses : 2 fail(s)
- Exec time: [0.16, 0.19] s

  * spec@ext_transform_feedback@order arrays points:
- Statuses : 1 fail(s)
- Exec time: [0.17] s

  * spec@ext_transform_feedback@order elements triangles:
- Statuses : 1 fail(s)
- Exec time: [0.14] s

  * spec@glsl-1.30@execution@fs-execution-ordering:
- Statuses : 1 fail(s)
- Exec time: [0.67] s

  

Known issues


  Here are the changes found in Patchwork_13250_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_softpin@noreloc-s3:
- shard-skl:  [PASS][13] -> [INCOMPLETE][14] ([fdo#104108])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-skl5/igt@gem_soft...@noreloc-s3.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13250/shard-skl9/igt@gem_soft...@noreloc-s3.html

  * igt@gem_tiled_swapping@non-threaded:
- shard-apl:  [PASS][15] -> [INCOMPLETE][16] ([fdo#103927] / 
[fdo#108686])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-apl6/igt@gem_tiled_swapp...@non-threaded.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13250/shard-apl4/igt@gem_tiled_swapp...@non-threaded.html
- shard-kbl:  [PASS][17] -> [DMESG-WARN][18] ([fdo#108686])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-kbl3/igt@gem_tiled_swapp...@non-threaded.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13250/shard-kbl6/igt@gem_tiled_swapp...@non-threaded.html

  * igt@gem_workarounds@suspend-resume-context:
- shard-apl:  [PASS][19] -> [DMESG-WARN][20] ([fdo#108566]) +1 
similar issue
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-apl3/igt@gem_workarou...@suspend-resume-context.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13250/shard-apl6/igt@ge

Re: [Intel-gfx] [PATCH] gpu/drm/i915: globally replace dev_priv with i915

2019-06-12 Thread Lucas De Marchi

On Thu, Jun 13, 2019 at 07:07:28AM +0100, Chris Wilson wrote:

Quoting Lucas De Marchi (2019-06-12 17:29:00)

We are slowly converting dev_priv to i915 everywhere, spread into
smaller series. While this is good to avoid unrelated breakages to other
inflight patches, it's bad because inflight patches on nearby paths keep
breaking. Paired with other code moves and refactores this is becoming a
nightmare.

Now that I915_{READ,WRITE} are gone and implicit access to dev_priv no
longer exists we can simply sed all files and be done with the
conversion. This was generated with the following commands with no
additional fixups:

git ls-files --full-name -z -- drivers/gpu/drm/i915/ | \
xargs -0 sed -i 's/\bdev_priv\b/i915/g'

Any pending series can apply the same search and replace when rebasing.

Signed-off-by: Lucas De Marchi 
---
 drivers/gpu/drm/i915/dvo_ch7017.c |6 +-
 drivers/gpu/drm/i915/dvo_ch7xxx.c |   10 +-
 drivers/gpu/drm/i915/dvo_ivch.c   |   14 +-
 drivers/gpu/drm/i915/dvo_ns2501.c |   14 +-
 drivers/gpu/drm/i915/dvo_sil164.c |   10 +-
 drivers/gpu/drm/i915/dvo_tfp410.c |   10 +-


Notice that the very start of this, the dev_priv backpointers are
not i915.


true. AFAICS it's in all the dvo_*.c - I will fix it for next time.

thanks
Lucas De Marchi


-Chris
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Re: [Intel-gfx] [PATCH] gpu/drm/i915: globally replace dev_priv with i915

2019-06-12 Thread Chris Wilson
Quoting Lucas De Marchi (2019-06-12 17:29:00)
> We are slowly converting dev_priv to i915 everywhere, spread into
> smaller series. While this is good to avoid unrelated breakages to other
> inflight patches, it's bad because inflight patches on nearby paths keep
> breaking. Paired with other code moves and refactores this is becoming a
> nightmare.
> 
> Now that I915_{READ,WRITE} are gone and implicit access to dev_priv no
> longer exists we can simply sed all files and be done with the
> conversion. This was generated with the following commands with no
> additional fixups:
> 
> git ls-files --full-name -z -- drivers/gpu/drm/i915/ | \
> xargs -0 sed -i 's/\bdev_priv\b/i915/g'
> 
> Any pending series can apply the same search and replace when rebasing.
> 
> Signed-off-by: Lucas De Marchi 
> ---
>  drivers/gpu/drm/i915/dvo_ch7017.c |6 +-
>  drivers/gpu/drm/i915/dvo_ch7xxx.c |   10 +-
>  drivers/gpu/drm/i915/dvo_ivch.c   |   14 +-
>  drivers/gpu/drm/i915/dvo_ns2501.c |   14 +-
>  drivers/gpu/drm/i915/dvo_sil164.c |   10 +-
>  drivers/gpu/drm/i915/dvo_tfp410.c |   10 +-

Notice that the very start of this, the dev_priv backpointers are
not i915.
-Chris
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Refine eDP aux backlight enable sequence.

2019-06-12 Thread Patchwork
== Series Details ==

Series: drm/i915: Refine eDP aux backlight enable sequence.
URL   : https://patchwork.freedesktop.org/series/61990/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6253 -> Patchwork_13264


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13264/

Known issues


  Here are the changes found in Patchwork_13264 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u:   [PASS][1] -> [FAIL][2] ([fdo#109485])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13264/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-ilk-650: [PASS][3] -> [DMESG-WARN][4] ([fdo#106387])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-ilk-650/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13264/fi-ilk-650/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html

  
 Possible fixes 

  * igt@gem_busy@busy-all:
- fi-icl-guc: [INCOMPLETE][5] ([fdo#107713]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-guc/igt@gem_b...@busy-all.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13264/fi-icl-guc/igt@gem_b...@busy-all.html

  * igt@gem_ctx_create@basic-files:
- fi-icl-u2:  [INCOMPLETE][7] ([fdo#107713] / [fdo#109100]) -> 
[PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-u2/igt@gem_ctx_cre...@basic-files.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13264/fi-icl-u2/igt@gem_ctx_cre...@basic-files.html

  
  [fdo#106387]: https://bugs.freedesktop.org/show_bug.cgi?id=106387
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
  [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485


Participating hosts (53 -> 47)
--

  Additional (1): fi-icl-dsi 
  Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-byt-clapper fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_6253 -> Patchwork_13264

  CI_DRM_6253: 83fdc69645c5c6b511e36e171f1c75a6132f007c @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5054: 7a295df596fdf71e5c28ecb1fbfec002060e9293 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13264: b99528fb4883fb6dc6ce6c3d5da39fd3ff24743d @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

b99528fb4883 drm/i915: Refine eDP aux backlight enable sequence.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13264/
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Refine eDP aux backlight enable sequence.

2019-06-12 Thread Patchwork
== Series Details ==

Series: drm/i915: Refine eDP aux backlight enable sequence.
URL   : https://patchwork.freedesktop.org/series/61990/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Refine eDP aux backlight enable sequence.
+drivers/gpu/drm/i915/i915_utils.h:220:16: warning: expression using 
sizeof(void)

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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/drm_vblank: Change EINVAL by the correct errno (rev3)

2019-06-12 Thread Patchwork
== Series Details ==

Series: drm/drm_vblank: Change EINVAL by the correct errno (rev3)
URL   : https://patchwork.freedesktop.org/series/51147/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6253 -> Patchwork_13263


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_13263 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_13263, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13263/

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_13263:

### IGT changes ###

 Possible regressions 

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-icl-y:   [PASS][1] -> [FAIL][2] +9 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-y/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13263/fi-icl-y/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
- fi-byt-j1900:   [PASS][3] -> [FAIL][4] +9 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-byt-j1900/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13263/fi-byt-j1900/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-hsw-4770r:   [PASS][5] -> [FAIL][6] +9 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-hsw-4770r/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13263/fi-hsw-4770r/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
- fi-kbl-x1275:   [PASS][7] -> [FAIL][8] +9 similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-kbl-x1275/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13263/fi-kbl-x1275/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
- fi-hsw-peppy:   [PASS][9] -> [FAIL][10] +9 similar issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-hsw-peppy/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13263/fi-hsw-peppy/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
- fi-cfl-8700k:   [PASS][11] -> [FAIL][12] +9 similar issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-cfl-8700k/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13263/fi-cfl-8700k/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
- fi-apl-guc: [PASS][13] -> [FAIL][14] +9 similar issues
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-apl-guc/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13263/fi-apl-guc/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
- fi-bdw-5557u:   [PASS][15] -> [FAIL][16] +9 similar issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-bdw-5557u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13263/fi-bdw-5557u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- fi-icl-u3:  [PASS][17] -> [FAIL][18] +9 similar issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-u3/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13263/fi-icl-u3/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
- fi-cml-u:   [PASS][19] -> [FAIL][20] +9 similar issues
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-cml-u/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13263/fi-cml-u/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
- fi-bxt-dsi: [PASS][21] -> [FAIL][22] +9 similar issues
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-bxt-dsi/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13263/fi-bxt-dsi/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- fi-ivb-3770:[PASS][23] -> [FAIL][24] +9 sim

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Prevent lock-cycles between GPU waits and GPU resets (rev2)

2019-06-12 Thread Patchwork
== Series Details ==

Series: drm/i915: Prevent lock-cycles between GPU waits and GPU resets (rev2)
URL   : https://patchwork.freedesktop.org/series/61901/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6244_full -> Patchwork_13249_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_13249_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_13249_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_13249_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing:
- shard-skl:  [PASS][1] -> [DMESG-WARN][2] +3 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-skl1/igt@gem_persistent_rel...@forked-interruptible-faulting-reloc-thrashing.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13249/shard-skl7/igt@gem_persistent_rel...@forked-interruptible-faulting-reloc-thrashing.html
- shard-glk:  [PASS][3] -> [DMESG-WARN][4] +4 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-glk9/igt@gem_persistent_rel...@forked-interruptible-faulting-reloc-thrashing.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13249/shard-glk3/igt@gem_persistent_rel...@forked-interruptible-faulting-reloc-thrashing.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-apl:  NOTRUN -> [DMESG-WARN][5]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13249/shard-apl6/igt@gem_persistent_rel...@forked-interruptible-thrashing.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
- shard-apl:  [PASS][6] -> [DMESG-WARN][7] +3 similar issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-apl7/igt@gem_userptr_bl...@map-fixed-invalidate-busy-gup.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13249/shard-apl7/igt@gem_userptr_bl...@map-fixed-invalidate-busy-gup.html
- shard-kbl:  [PASS][8] -> [DMESG-WARN][9] +5 similar issues
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-kbl1/igt@gem_userptr_bl...@map-fixed-invalidate-busy-gup.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13249/shard-kbl4/igt@gem_userptr_bl...@map-fixed-invalidate-busy-gup.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
- shard-snb:  [PASS][10] -> [DMESG-WARN][11] +2 similar issues
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-snb5/igt@gem_userptr_bl...@sync-unmap-cycles.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13249/shard-snb5/igt@gem_userptr_bl...@sync-unmap-cycles.html
- shard-hsw:  [PASS][12] -> [DMESG-WARN][13] +3 similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-hsw5/igt@gem_userptr_bl...@sync-unmap-cycles.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13249/shard-hsw5/igt@gem_userptr_bl...@sync-unmap-cycles.html
- shard-iclb: [PASS][14] -> [DMESG-WARN][15] +3 similar issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-iclb4/igt@gem_userptr_bl...@sync-unmap-cycles.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13249/shard-iclb1/igt@gem_userptr_bl...@sync-unmap-cycles.html

  
Known issues


  Here are the changes found in Patchwork_13249_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_isolation@vcs0-s3:
- shard-skl:  [PASS][16] -> [INCOMPLETE][17] ([fdo#104108]) +1 
similar issue
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-skl8/igt@gem_ctx_isolat...@vcs0-s3.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13249/shard-skl6/igt@gem_ctx_isolat...@vcs0-s3.html

  * igt@gem_persistent_relocs@forked-thrashing:
- shard-snb:  [PASS][18] -> [DMESG-WARN][19] ([fdo#110789])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-snb4/igt@gem_persistent_rel...@forked-thrashing.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13249/shard-snb6/igt@gem_persistent_rel...@forked-thrashing.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl:  [PASS][20] -> [DMESG-WARN][21] ([fdo#108566]) +3 
similar issues
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6244/shard-apl6/igt@i915_susp...@fence-restore-tiled2untiled.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13249/shard-apl4/igt@i915_susp...@fence-restore-tiled2untiled.html

  * igt@i915_suspend@sysfs-reader:
- shard-kbl:

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/drm_vblank: Change EINVAL by the correct errno (rev3)

2019-06-12 Thread Patchwork
== Series Details ==

Series: drm/drm_vblank: Change EINVAL by the correct errno (rev3)
URL   : https://patchwork.freedesktop.org/series/51147/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
8534a60ab43b Drop use of DRM_WAIT_ON() [Was: drm/drm_vblank: Change EINVAL by 
the correct errno]
-:16: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description 
(prefer a maximum 75 chars per line)
#16: 
> some action. In particular, the validation of “if (!dev->irq_enabled)”

-:89: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ 
chars of sha1> ("")' - ie: 'commit fatal: bad o 
("a9949b146082bcaa1")'
#89: 
commit 17b119b02467356198b57bca9949b146082bcaa1

-:105: WARNING:BAD_SIGN_OFF: Do not use whitespace before Signed-off-by:
#105: 
Signed-off-by: Sam Ravnborg 

-:106: WARNING:BAD_SIGN_OFF: Do not use whitespace before Cc:
#106: 
Cc: Maarten Lankhorst 

-:107: WARNING:BAD_SIGN_OFF: Do not use whitespace before Cc:
#107: 
Cc: Maxime Ripard 

-:108: WARNING:BAD_SIGN_OFF: Do not use whitespace before Cc:
#108: 
Cc: Sean Paul 

-:109: WARNING:BAD_SIGN_OFF: Do not use whitespace before Cc:
#109: 
Cc: David Airlie 

-:110: WARNING:BAD_SIGN_OFF: Do not use whitespace before Cc:
#110: 
Cc: Daniel Vetter 

-:133: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#133: FILE: drivers/gpu/drm/drm_vblank.c:1671:
+   ret = wait_event_interruptible_timeout(vblank->queue,
+   vblank_passed(drm_vblank_count(dev, pipe), req_seq) ||

total: 1 errors, 7 warnings, 1 checks, 41 lines checked

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[Intel-gfx] [PATCH] drm/i915: Refine eDP aux backlight enable sequence.

2019-06-12 Thread Lee, Shawn C
Modify aux backlight enable sequence just like what we
did for genernal eDP panel.
1. Setup PWM freq and brightness level before enable display backlight.
2. Add T8 (valid data to backlight enable) delay.

Cc: Jani Nikula 
Cc: Jose Roberto de Souza 
Cc: Cooper Chiou 

Signed-off-by: Lee, Shawn C 
---
 drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c 
b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
index 7ded95a334db..c112e0b930de 100644
--- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
@@ -216,8 +216,12 @@ static void intel_dp_aux_enable_backlight(const struct 
intel_crtc_state *crtc_st
}
}
 
-   set_aux_backlight_enable(intel_dp, true);
intel_dp_aux_set_backlight(conn_state, 
connector->panel.backlight.level);
+
+   wait_remaining_ms_from_jiffies(intel_dp->last_power_on,
+  intel_dp->backlight_on_delay);
+
+   set_aux_backlight_enable(intel_dp, true);
 }
 
 static void intel_dp_aux_disable_backlight(const struct drm_connector_state 
*old_conn_state)
-- 
2.7.4

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[Intel-gfx] Drop use of DRM_WAIT_ON() [Was: drm/drm_vblank: Change EINVAL by the correct errno]

2019-06-12 Thread Sam Ravnborg
Hi Rodrigo.

On Wed, Jun 12, 2019 at 11:10:54PM -0300, Rodrigo Siqueira wrote:
> For historical reason, the function drm_wait_vblank_ioctl always return
> -EINVAL if something gets wrong. This scenario limits the flexibility
> for the userspace make detailed verification of the problem and take
> some action. In particular, the validation of “if (!dev->irq_enabled)”
> in the drm_wait_vblank_ioctl is responsible for checking if the driver
> support vblank or not. If the driver does not support VBlank, the
> function drm_wait_vblank_ioctl returns EINVAL which does not represent
> the real issue; this patch changes this behavior by return EOPNOTSUPP.
> Additionally, some operations are unsupported by this function, and
> returns EINVAL; this patch also changes the return value to EOPNOTSUPP
> in this case. Lastly, the function drm_wait_vblank_ioctl is invoked by
> libdrm, which is used by many compositors; because of this, it is
> important to check if this change breaks any compositor. In this sense,
> the following projects were examined:
> 
> * Drm-hwcomposer
> * Kwin
> * Sway
> * Wlroots
> * Wayland-core
> * Weston
> * Xorg (67 different drivers)
> 
> For each repository the verification happened in three steps:
> 
> * Update the main branch
> * Look for any occurrence "drmWaitVBlank" with the command:
>   git grep -n "drmWaitVBlank"
> * Look in the git history of the project with the command:
>   git log -SdrmWaitVBlank
> 
> Finally, none of the above projects validate the use of EINVAL which
> make safe, at least for these projects, to change the return values.
> 
> Change since V2:
>  Daniel Vetter and Chris Wilson
>  - Replace ENOTTY by EOPNOTSUPP
>  - Return EINVAL if the parameters are wrong
> 
> Signed-off-by: Rodrigo Siqueira 
> ---
> Update:
>   Now IGT has a way to validate if a driver has vblank support or not.
>   See: 
> https://gitlab.freedesktop.org/drm/igt-gpu-tools/commit/2d244aed69165753f3adbbd6468db073dc1acf9A
> 
>  drivers/gpu/drm/drm_vblank.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c
> index 0d704bddb1a6..d76a783a7d4b 100644
> --- a/drivers/gpu/drm/drm_vblank.c
> +++ b/drivers/gpu/drm/drm_vblank.c
> @@ -1578,10 +1578,10 @@ int drm_wait_vblank_ioctl(struct drm_device *dev, 
> void *data,
>   unsigned int flags, pipe, high_pipe;
>  
>   if (!dev->irq_enabled)
> - return -EINVAL;
> + return -EOPNOTSUPP;
>  
>   if (vblwait->request.type & _DRM_VBLANK_SIGNAL)
> - return -EINVAL;
> + return -EOPNOTSUPP;
>  
>   if (vblwait->request.type &
>   ~(_DRM_VBLANK_TYPES_MASK | _DRM_VBLANK_FLAGS_MASK |

When touching this function, could I ask you to take a look at
eliminating the use of DRM_WAIT_ON()?
It comes from the deprecated drm_os_linux.h header, and it is only of
the few remaining users of DRM_WAIT_ON().

Below you can find my untested first try - where I did an attempt not to
change behaviour.

Sam

commit 17b119b02467356198b57bca9949b146082bcaa1
Author: Sam Ravnborg 
Date:   Thu May 30 09:38:47 2019 +0200

drm/vblank: drop use of DRM_WAIT_ON()

DRM_WAIT_ON() is from the deprecated drm_os_linux header and
the modern replacement is the wait_event_*.

The return values differ, so a conversion is needed to
keep the original interface towards userspace.
Introduced a switch/case to make code obvious and to allow
different debug prints depending on the result.

The timeout value of 3 * HZ was translated to 30 msec

Signed-off-by: Sam Ravnborg 
Cc: Maarten Lankhorst 
Cc: Maxime Ripard 
Cc: Sean Paul 
Cc: David Airlie 
Cc: Daniel Vetter 

diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c
index 0d704bddb1a6..51fc6b106333 100644
--- a/drivers/gpu/drm/drm_vblank.c
+++ b/drivers/gpu/drm/drm_vblank.c
@@ -31,7 +31,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 
 #include "drm_internal.h"
@@ -1668,18 +1667,27 @@ int drm_wait_vblank_ioctl(struct drm_device *dev, void 
*data,
if (req_seq != seq) {
DRM_DEBUG("waiting on vblank count %llu, crtc %u\n",
  req_seq, pipe);
-   DRM_WAIT_ON(ret, vblank->queue, 3 * HZ,
-   vblank_passed(drm_vblank_count(dev, pipe),
- req_seq) ||
-   !READ_ONCE(vblank->enabled));
+   ret = wait_event_interruptible_timeout(vblank->queue,
+   vblank_passed(drm_vblank_count(dev, pipe), req_seq) ||
+ !READ_ONCE(vblank->enabled),
+   msecs_to_jiffies(30));
}
 
-   if (ret != -EINTR) {
+   switch (ret) {
+   case 1:
+   ret = 0;
drm_wait_vblank_reply(dev, pipe, &vblwait->reply);
-
DRM_DEBUG("crtc %d returning %u to

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/drm_vblank: Change EINVAL by the correct errno (rev2)

2019-06-12 Thread Patchwork
== Series Details ==

Series: drm/drm_vblank: Change EINVAL by the correct errno (rev2)
URL   : https://patchwork.freedesktop.org/series/51147/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6253 -> Patchwork_13262


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13262/

Known issues


  Here are the changes found in Patchwork_13262 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_flink_basic@flink-lifetime:
- fi-icl-u3:  [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-u3/igt@gem_flink_ba...@flink-lifetime.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13262/fi-icl-u3/igt@gem_flink_ba...@flink-lifetime.html

  * igt@i915_selftest@live_hangcheck:
- fi-icl-u3:  [PASS][3] -> [INCOMPLETE][4] ([fdo#107713] / 
[fdo#108569])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-u3/igt@i915_selftest@live_hangcheck.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13262/fi-icl-u3/igt@i915_selftest@live_hangcheck.html

  
 Possible fixes 

  * igt@gem_busy@busy-all:
- fi-icl-guc: [INCOMPLETE][5] ([fdo#107713]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-guc/igt@gem_b...@busy-all.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13262/fi-icl-guc/igt@gem_b...@busy-all.html

  * igt@gem_ctx_create@basic-files:
- fi-icl-u2:  [INCOMPLETE][7] ([fdo#107713] / [fdo#109100]) -> 
[PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-u2/igt@gem_ctx_cre...@basic-files.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13262/fi-icl-u2/igt@gem_ctx_cre...@basic-files.html

  
 Warnings 

  * igt@i915_pm_rpm@basic-pci-d3-state:
- fi-kbl-guc: [SKIP][9] ([fdo#109271]) -> [FAIL][10] ([fdo#110829])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-kbl-guc/igt@i915_pm_...@basic-pci-d3-state.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13262/fi-kbl-guc/igt@i915_pm_...@basic-pci-d3-state.html

  
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#110829]: https://bugs.freedesktop.org/show_bug.cgi?id=110829


Participating hosts (53 -> 47)
--

  Additional (1): fi-icl-dsi 
  Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-byt-clapper fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_6253 -> Patchwork_13262

  CI_DRM_6253: 83fdc69645c5c6b511e36e171f1c75a6132f007c @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5054: 7a295df596fdf71e5c28ecb1fbfec002060e9293 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13262: 00e5d8655d9def26db86da13e2730d682658c0e8 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

00e5d8655d9d drm/drm_vblank: Change EINVAL by the correct errno

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13262/
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[Intel-gfx] ✓ Fi.CI.BAT: success for gpu/drm/i915: globally replace dev_priv with i915

2019-06-12 Thread Patchwork
== Series Details ==

Series: gpu/drm/i915: globally replace dev_priv with i915
URL   : https://patchwork.freedesktop.org/series/61983/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6253 -> Patchwork_13261


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13261/

Known issues


  Here are the changes found in Patchwork_13261 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_busy@busy-all:
- fi-icl-u3:  [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-u3/igt@gem_b...@busy-all.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13261/fi-icl-u3/igt@gem_b...@busy-all.html

  * igt@i915_module_load@reload:
- fi-blb-e6850:   [PASS][3] -> [INCOMPLETE][4] ([fdo#107718])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-blb-e6850/igt@i915_module_l...@reload.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13261/fi-blb-e6850/igt@i915_module_l...@reload.html

  
 Possible fixes 

  * igt@gem_busy@busy-all:
- fi-icl-guc: [INCOMPLETE][5] ([fdo#107713]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-guc/igt@gem_b...@busy-all.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13261/fi-icl-guc/igt@gem_b...@busy-all.html

  * igt@gem_ctx_create@basic-files:
- fi-icl-u2:  [INCOMPLETE][7] ([fdo#107713] / [fdo#109100]) -> 
[PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-u2/igt@gem_ctx_cre...@basic-files.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13261/fi-icl-u2/igt@gem_ctx_cre...@basic-files.html

  
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100


Participating hosts (53 -> 47)
--

  Additional (1): fi-icl-dsi 
  Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-byt-clapper fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_6253 -> Patchwork_13261

  CI_DRM_6253: 83fdc69645c5c6b511e36e171f1c75a6132f007c @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5054: 7a295df596fdf71e5c28ecb1fbfec002060e9293 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13261: 5585dfe286e95307d073e4d8025116f3c7ae7b01 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

5585dfe286e9 gpu/drm/i915: globally replace dev_priv with i915

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13261/
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[Intel-gfx] [PATCH V6 i-g-t 6/6] kms_writeback: Add tests using a cloned output

2019-06-12 Thread Brian Starkey
Update the connector search to also optionally attempt to find a
non-writeback connector to clone to.

Add a subtest which is the same as writeback-check-output, but also
clones to the second connector.

Signed-off-by: Brian Starkey 
[rebased and addressed comments by Maarten]
Signed-off-by: Liviu Dudau 
---
 tests/kms_writeback.c | 64 +++
 1 file changed, 59 insertions(+), 5 deletions(-)

diff --git a/tests/kms_writeback.c b/tests/kms_writeback.c
index 0f20dadd..ae536bbf 100644
--- a/tests/kms_writeback.c
+++ b/tests/kms_writeback.c
@@ -51,7 +51,8 @@ static drmModePropertyBlobRes 
*get_writeback_formats_blob(igt_output_t *output)
return blob;
 }
 
-static bool check_writeback_config(igt_display_t *display, igt_output_t 
*output)
+static bool check_writeback_config(igt_display_t *display, igt_output_t 
*output,
+  int pipe, igt_output_t **clone)
 {
igt_fb_t input_fb, output_fb;
igt_plane_t *plane;
@@ -91,6 +92,30 @@ static bool check_writeback_config(igt_display_t *display, 
igt_output_t *output)
 
ret = igt_display_try_commit_atomic(display, DRM_MODE_ATOMIC_TEST_ONLY |
DRM_MODE_ATOMIC_ALLOW_MODESET, 
NULL);
+   if (!ret && clone) {
+   /* Try and find a clone */
+   int i, newret;
+   *clone = NULL;
+
+   for (i = 0; i < display->n_outputs; i++) {
+   igt_output_t *second_output = &display->outputs[i];
+   if (output != second_output &&
+   igt_pipe_connector_valid(pipe, second_output)) {
+
+   igt_output_clone_pipe(second_output, pipe);
+   igt_output_override_mode(output, 
&override_mode);
+   newret = igt_display_try_commit_atomic(display, 
DRM_MODE_ATOMIC_TEST_ONLY |
+  
DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
+   igt_output_set_pipe(second_output, PIPE_NONE);
+   igt_debug("try_commit_atomic clone returned 
%d\n", newret);
+   if (!newret) {
+   *clone = second_output;
+   igt_debug("Selected clone %s\n", 
(*clone)->name);
+   break;
+   }
+   }
+   }
+   }
igt_plane_set_fb(plane, NULL);
igt_remove_fb(display->drm_fd, &input_fb);
igt_remove_fb(display->drm_fd, &output_fb);
@@ -98,7 +123,8 @@ static bool check_writeback_config(igt_display_t *display, 
igt_output_t *output)
return !ret;
 }
 
-static igt_output_t *kms_writeback_get_output(igt_display_t *display)
+static igt_output_t *kms_writeback_get_output(igt_display_t *display, enum 
pipe *pipe,
+ igt_output_t **clone)
 {
int i;
 
@@ -114,10 +140,16 @@ static igt_output_t 
*kms_writeback_get_output(igt_display_t *display)
for (j = 0; j < igt_display_get_n_pipes(display); j++) {
igt_output_set_pipe(output, j);
 
-   if (check_writeback_config(display, output)) {
+   if (check_writeback_config(display, output, j, clone)) {
igt_debug("Using connector %u:%s on pipe %d\n",
  
output->config.connector->connector_id,
  output->name, j);
+   if (clone && *clone)
+   igt_debug("Cloning to connector 
%u:%s\n",
+ 
(*clone)->config.connector->connector_id,
+ (*clone)->name);
+   if (pipe)
+   *pipe = j;
return output;
}
}
@@ -335,10 +367,11 @@ static void writeback_check_output(igt_output_t *output, 
igt_plane_t *plane,
 igt_main
 {
igt_display_t display;
-   igt_output_t *output;
+   igt_output_t *output, *clone;
igt_plane_t *plane;
igt_fb_t input_fb;
drmModeModeInfo mode;
+   enum pipe pipe;
int ret;
 
memset(&display, 0, sizeof(display));
@@ -353,7 +386,7 @@ igt_main
 
igt_require(display.is_atomic);
 
-   output = kms_writeback_get_output(&display);
+   output = kms_writeback_get_output(&display, &pipe, &clone);
igt_require(output);
 
if (output->use_override_mode)
@@ -431,6 +464,27 @@ igt_main
igt_remove_fb(display.drm_fd, &output_fb);
}
 
+   igt_subtest("writeback-check-output-cl

[Intel-gfx] [PATCH V6 i-g-t 5/6] lib/igt_kms: Add igt_output_clone_pipe for cloning

2019-06-12 Thread Brian Starkey
An output can be added as a clone of any other output(s) attached to a
pipe using igt_output_clone_pipe()

v5: Drop field out_fence_requested from struct igt_pipe (Brian Starkey)

Signed-off-by: Brian Starkey 
---
 lib/igt_kms.c | 100 +++---
 lib/igt_kms.h |   4 ++
 2 files changed, 66 insertions(+), 38 deletions(-)

diff --git a/lib/igt_kms.c b/lib/igt_kms.c
index 140db346..b85a0404 100644
--- a/lib/igt_kms.c
+++ b/lib/igt_kms.c
@@ -1765,6 +1765,17 @@ static void igt_display_log_shift(igt_display_t 
*display, int shift)
igt_assert(display->log_shift >= 0);
 }
 
+static int igt_output_idx(igt_output_t *output)
+{
+   int i;
+
+   for (i = 0; i < output->display->n_outputs; i++)
+   if (&output->display->outputs[i] == output)
+   return i;
+
+   return -1;
+}
+
 static void igt_output_refresh(igt_output_t *output)
 {
igt_display_t *display = output->display;
@@ -2317,42 +2328,6 @@ void igt_display_fini(igt_display_t *display)
display->planes = NULL;
 }
 
-static void igt_display_refresh(igt_display_t *display)
-{
-   igt_output_t *output;
-   int i;
-
-   unsigned long pipes_in_use = 0;
-
-   /* Check that two outputs aren't trying to use the same pipe */
-   for (i = 0; i < display->n_outputs; i++) {
-   output = &display->outputs[i];
-
-   if (output->pending_pipe != PIPE_NONE) {
-   if (pipes_in_use & (1 << output->pending_pipe))
-   goto report_dup;
-
-   pipes_in_use |= 1 << output->pending_pipe;
-   }
-
-   if (output->force_reprobe)
-   igt_output_refresh(output);
-   }
-
-   return;
-
-report_dup:
-   for (; i > 0; i--) {
-   igt_output_t *b = &display->outputs[i - 1];
-
-   igt_assert_f(output->pending_pipe !=
-b->pending_pipe,
-"%s and %s are both trying to use pipe %s\n",
-igt_output_name(output), igt_output_name(b),
-kmstest_pipe_name(output->pending_pipe));
-   }
-}
-
 static igt_pipe_t *igt_output_get_driving_pipe(igt_output_t *output)
 {
igt_display_t *display = output->display;
@@ -2376,6 +2351,40 @@ static igt_pipe_t 
*igt_output_get_driving_pipe(igt_output_t *output)
return &display->pipes[pipe];
 }
 
+static void igt_display_refresh(igt_display_t *display)
+{
+   igt_output_t *output;
+   igt_pipe_t *pipe;
+   int i;
+
+   unsigned long pipes_in_use = 0;
+   unsigned long pending_crtc_idx_mask;
+
+   /* Check that outputs and pipes agree wrt. cloning */
+   for (i = 0; i < display->n_outputs; i++) {
+   output = &display->outputs[i];
+   pending_crtc_idx_mask = 1 << output->pending_pipe;
+
+   pipe = igt_output_get_driving_pipe(output);
+   if (pipe) {
+   igt_assert_f(pipe->outputs & (1 << 
igt_output_idx(output)),
+"Output %s not expected to be using pipe 
%s\n",
+igt_output_name(output),
+kmstest_pipe_name(pipe->pipe));
+
+   if (pipes_in_use & pending_crtc_idx_mask)
+   LOG(display, "Output %s clones pipe %s\n",
+   igt_output_name(output),
+   kmstest_pipe_name(pipe->pipe));
+   }
+
+   pipes_in_use |= pending_crtc_idx_mask;
+
+   if (output->force_reprobe)
+   igt_output_refresh(output);
+   }
+}
+
 static igt_plane_t *igt_pipe_get_plane(igt_pipe_t *pipe, int plane_idx)
 {
igt_require_f(plane_idx >= 0 && plane_idx < pipe->n_planes,
@@ -3766,6 +3775,7 @@ void igt_output_override_mode(igt_output_t *output, const 
drmModeModeInfo *mode)
output->use_override_mode = !!mode;
 
if (pipe) {
+   igt_debug("overriding pipe mode in %s way\n", 
output->display->is_atomic ? "atomic" : "legacy");
if (output->display->is_atomic)
igt_pipe_obj_replace_prop_blob(pipe, IGT_CRTC_MODE_ID, 
igt_output_get_mode(output), sizeof(*mode));
else
@@ -3773,6 +3783,16 @@ void igt_output_override_mode(igt_output_t *output, 
const drmModeModeInfo *mode)
}
 }
 
+void igt_output_clone_pipe(igt_output_t *output, enum pipe pipe)
+{
+   igt_display_t *display = output->display;
+   uint32_t current_clones = display->pipes[pipe].outputs;
+
+   igt_output_set_pipe(output, pipe);
+
+   display->pipes[pipe].outputs |= current_clones;
+}
+
 /*
  * igt_output_set_pipe:
  * @output: Target output for which the pipe is being set to
@@ -3789,11 +3809,15 @@ void igt_output_set_pipe(igt_output_t *output, enum 
pipe pipe)

[Intel-gfx] [PATCH V6 i-g-t 4/6] kms_writeback: Add writeback-check-output

2019-06-12 Thread Brian Starkey
Add a test which makes commits using the writeback connector, and
checks the output buffer hash to make sure it is/isn't written as
appropriate.

Signed-off-by: Brian Starkey 
---
 tests/kms_writeback.c | 124 ++
 1 file changed, 124 insertions(+)

diff --git a/tests/kms_writeback.c b/tests/kms_writeback.c
index 66ef48a6..0f20dadd 100644
--- a/tests/kms_writeback.c
+++ b/tests/kms_writeback.c
@@ -30,6 +30,7 @@
 #include "igt.h"
 #include "igt_core.h"
 #include "igt_fb.h"
+#include "sw_sync.h"
 
 static drmModePropertyBlobRes *get_writeback_formats_blob(igt_output_t *output)
 {
@@ -221,6 +222,116 @@ static void writeback_fb_id(igt_output_t *output, 
igt_fb_t *valid_fb, igt_fb_t *
igt_assert(ret == 0);
 }
 
+static void fill_fb(igt_fb_t *fb, double color[3])
+{
+   cairo_t *cr = igt_get_cairo_ctx(fb->fd, fb);
+   igt_assert(cr);
+
+   igt_paint_color(cr, 0, 0, fb->width, fb->height,
+   color[0], color[1], color[2]);
+}
+
+static void get_and_wait_out_fence(igt_output_t *output)
+{
+   int ret;
+
+   igt_assert(output->writeback_out_fence_fd >= 0);
+
+   ret = sync_fence_wait(output->writeback_out_fence_fd, 1000);
+   igt_assert(ret == 0);
+   close(output->writeback_out_fence_fd);
+   output->writeback_out_fence_fd = -1;
+}
+
+static void writeback_sequence(igt_output_t *output, igt_plane_t *plane,
+   igt_fb_t *in_fb, igt_fb_t *out_fbs[], int 
n_commits)
+{
+   int i, color_idx = 0;
+   double in_fb_colors[2][3] = {
+   { 1.0, 0.0, 0.0 },
+   { 0.0, 1.0, 0.0 },
+   };
+   double clear_color[3] = { 1.0, 1.0, 1.0 };
+   igt_crc_t cleared_crc, out_expected;
+
+   for (i = 0; i < n_commits; i++, color_idx++) {
+   /* Change the input color each time */
+   fill_fb(in_fb, in_fb_colors[color_idx % 2]);
+
+   if (out_fbs[i]) {
+   igt_crc_t out_before;
+
+   /* Get the expected CRC */
+   fill_fb(out_fbs[i], in_fb_colors[color_idx % 2]);
+   igt_fb_get_crc(out_fbs[i], &out_expected);
+
+   fill_fb(out_fbs[i], clear_color);
+   if (i == 0)
+   igt_fb_get_crc(out_fbs[i], &cleared_crc);
+   igt_fb_get_crc(out_fbs[i], &out_before);
+   igt_assert_crc_equal(&cleared_crc, &out_before);
+   }
+
+   /* Commit */
+   igt_plane_set_fb(plane, in_fb);
+   igt_output_set_writeback_fb(output, out_fbs[i]);
+
+   igt_display_commit_atomic(output->display,
+ DRM_MODE_ATOMIC_ALLOW_MODESET,
+ NULL);
+   if (out_fbs[i])
+   get_and_wait_out_fence(output);
+
+   /* Make sure the old output buffer is untouched */
+   if (i > 0 && out_fbs[i - 1] && (out_fbs[i] != out_fbs[i - 1])) {
+   igt_crc_t out_prev;
+   igt_fb_get_crc(out_fbs[i - 1], &out_prev);
+   igt_assert_crc_equal(&cleared_crc, &out_prev);
+   }
+
+   /* Make sure this output buffer is written */
+   if (out_fbs[i]) {
+   igt_crc_t out_after;
+   igt_fb_get_crc(out_fbs[i], &out_after);
+   igt_assert_crc_equal(&out_expected, &out_after);
+
+   /* And clear it, for the next time */
+   fill_fb(out_fbs[i], clear_color);
+   }
+   }
+}
+
+static void writeback_check_output(igt_output_t *output, igt_plane_t *plane,
+  igt_fb_t *input_fb, igt_fb_t *output_fb)
+{
+   igt_fb_t *out_fbs[2] = { 0 };
+   igt_fb_t second_out_fb;
+   int ret;
+
+   /* One commit, with a writeback. */
+   writeback_sequence(output, plane, input_fb, &output_fb, 1);
+
+   /* Two commits, the second with no writeback */
+   out_fbs[0] = output_fb;
+   writeback_sequence(output, plane, input_fb, out_fbs, 2);
+
+   /* Two commits, both with writeback */
+   out_fbs[1] = output_fb;
+   writeback_sequence(output, plane, input_fb, out_fbs, 2);
+
+   ret = igt_create_fb(output_fb->fd, output_fb->width, output_fb->height,
+   DRM_FORMAT_XRGB,
+   igt_fb_mod_to_tiling(0),
+   &second_out_fb);
+   igt_require(ret > 0);
+
+   /* Two commits, with different writeback buffers */
+   out_fbs[1] = &second_out_fb;
+   writeback_sequence(output, plane, input_fb, out_fbs, 2);
+
+   igt_remove_fb(output_fb->fd, &second_out_fb);
+}
+
 igt_main
 {
igt_display_t display;
@@ -307,6 +418,19 @@ igt_main
igt_remove_fb(display.drm_fd, &outp

[Intel-gfx] [PATCH V6 i-g-t 3/6] lib: Add function to hash a framebuffer

2019-06-12 Thread Brian Starkey
To use writeback buffers as a CRC source, we need to be able to hash
them. Implement a simple FVA-1a hashing routine for this purpose.

Doing a bytewise hash on the framebuffer directly can be very slow if
the memory is noncached. By making a copy of each line in the FB first
(which can take advantage of word-access speedup), we can do the hash
on a cached copy, which is much faster (10x speedup on my platform).

v6: use igt_memcpy_from_wc() instead of plain memcpy, as suggested by
Chris Wilson

Signed-off-by: Brian Starkey 
[rebased and updated to the most recent API]
Signed-off-by: Liviu Dudau 
---
 lib/igt_fb.c | 66 
 lib/igt_fb.h |  3 +++
 2 files changed, 69 insertions(+)

diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 9d4f905e..d07dae39 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -3256,6 +3256,72 @@ bool igt_fb_supported_format(uint32_t drm_format)
return false;
 }
 
+/*
+ * This implements the FNV-1a hashing algorithm instead of CRC, for
+ * simplicity
+ * http://www.isthe.com/chongo/tech/comp/fnv/index.html
+ *
+ * hash = offset_basis
+ * for each octet_of_data to be hashed
+ * hash = hash xor octet_of_data
+ * hash = hash * FNV_prime
+ * return hash
+ *
+ * 32 bit offset_basis = 2166136261
+ * 32 bit FNV_prime = 224 + 28 + 0x93 = 16777619
+ */
+int igt_fb_get_crc(struct igt_fb *fb, igt_crc_t *crc)
+{
+#define FNV1a_OFFSET_BIAS 2166136261
+#define FNV1a_PRIME 16777619
+   uint32_t hash;
+   void *map;
+   char *ptr, *line = NULL;
+   int x, y, cpp = igt_drm_format_to_bpp(fb->drm_format) / 8;
+   uint32_t stride = calc_plane_stride(fb, 0);
+
+   if (fb->is_dumb)
+   map = kmstest_dumb_map_buffer(fb->fd, fb->gem_handle, fb->size,
+ PROT_READ);
+   else
+   map = gem_mmap__gtt(fb->fd, fb->gem_handle, fb->size,
+   PROT_READ);
+   ptr = map;
+
+   /*
+* Framebuffers are often uncached, which can make byte-wise accesses
+* very slow. We copy each line of the FB into a local buffer to speed
+* up the hashing.
+*/
+   line = malloc(stride);
+   if (!line) {
+   munmap(map, fb->size);
+   return -ENOMEM;
+   }
+
+   hash = FNV1a_OFFSET_BIAS;
+
+   for (y = 0; y < fb->height; y++, ptr += stride) {
+
+   igt_memcpy_from_wc(line, ptr, stride);
+
+   for (x = 0; x < fb->width * cpp; x++) {
+   hash ^= line[x];
+   hash *= FNV1a_PRIME;
+   }
+   }
+
+   crc->n_words = 1;
+   crc->crc[0] = hash;
+
+   free(line);
+   munmap(map, fb->size);
+
+   return 0;
+#undef FNV1a_OFFSET_BIAS
+#undef FNV1a_PRIME
+}
+
 /**
  * igt_format_is_yuv:
  * @drm_format: drm fourcc
diff --git a/lib/igt_fb.h b/lib/igt_fb.h
index adefebe1..a2741c05 100644
--- a/lib/igt_fb.h
+++ b/lib/igt_fb.h
@@ -37,6 +37,7 @@
 #include 
 
 #include "igt_color_encoding.h"
+#include "igt_debugfs.h"
 
 /*
  * Internal format to denote a buffer compatible with pixman's
@@ -194,5 +195,7 @@ int igt_format_plane_bpp(uint32_t drm_format, int plane);
 void igt_format_array_fill(uint32_t **formats_array, unsigned int *count,
   bool allow_yuv);
 
+int igt_fb_get_crc(struct igt_fb *fb, igt_crc_t *crc);
+
 #endif /* __IGT_FB_H__ */
 
-- 
2.21.0


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[Intel-gfx] [PATCH V6 i-g-t 2/6] kms_writeback: Add initial writeback tests

2019-06-12 Thread Brian Starkey
Add tests for the WRITEBACK_PIXEL_FORMATS, WRITEBACK_OUT_FENCE_PTR and
WRITEBACK_FB_ID properties on writeback connectors, ensuring their
behaviour is correct.

Signed-off-by: Brian Starkey 
[rebased and updated do_writeback_test() function to address feedback]
Signed-off-by: Liviu Dudau 
---
 tests/Makefile.sources |   1 +
 tests/kms_writeback.c  | 314 +
 tests/meson.build  |   1 +
 3 files changed, 316 insertions(+)
 create mode 100644 tests/kms_writeback.c

diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 027ed82f..03cc8efa 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -77,6 +77,7 @@ TESTS_progs = \
kms_universal_plane \
kms_vblank \
kms_vrr \
+   kms_writeback \
meta_test \
perf \
perf_pmu \
diff --git a/tests/kms_writeback.c b/tests/kms_writeback.c
new file mode 100644
index ..66ef48a6
--- /dev/null
+++ b/tests/kms_writeback.c
@@ -0,0 +1,314 @@
+/*
+ * (C) COPYRIGHT 2017 ARM Limited. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include "igt.h"
+#include "igt_core.h"
+#include "igt_fb.h"
+
+static drmModePropertyBlobRes *get_writeback_formats_blob(igt_output_t *output)
+{
+   drmModePropertyBlobRes *blob = NULL;
+   uint64_t blob_id;
+   int ret;
+
+   ret = kmstest_get_property(output->display->drm_fd,
+  output->config.connector->connector_id,
+  DRM_MODE_OBJECT_CONNECTOR,
+  
igt_connector_prop_names[IGT_CONNECTOR_WRITEBACK_PIXEL_FORMATS],
+  NULL, &blob_id, NULL);
+   if (ret)
+   blob = drmModeGetPropertyBlob(output->display->drm_fd, blob_id);
+
+   igt_assert(blob);
+
+   return blob;
+}
+
+static bool check_writeback_config(igt_display_t *display, igt_output_t 
*output)
+{
+   igt_fb_t input_fb, output_fb;
+   igt_plane_t *plane;
+   uint32_t writeback_format = DRM_FORMAT_XRGB;
+   uint64_t tiling = igt_fb_mod_to_tiling(0);
+   int width, height, ret;
+   drmModeModeInfo override_mode = {
+   .clock = 25175,
+   .hdisplay = 640,
+   .hsync_start = 656,
+   .hsync_end = 752,
+   .htotal = 800,
+   .hskew = 0,
+   .vdisplay = 480,
+   .vsync_start = 490,
+   .vsync_end = 492,
+   .vtotal = 525,
+   .vscan = 0,
+   .vrefresh = 60,
+   .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
+   .name = {"640x480-60"},
+   };
+   igt_output_override_mode(output, &override_mode);
+
+   width = override_mode.hdisplay;
+   height = override_mode.vdisplay;
+
+   ret = igt_create_fb(display->drm_fd, width, height, 
DRM_FORMAT_XRGB, tiling, &input_fb);
+   igt_assert(ret >= 0);
+
+   ret = igt_create_fb(display->drm_fd, width, height, writeback_format, 
tiling, &output_fb);
+   igt_assert(ret >= 0);
+
+   plane = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
+   igt_plane_set_fb(plane, &input_fb);
+   igt_output_set_writeback_fb(output, &output_fb);
+
+   ret = igt_display_try_commit_atomic(display, DRM_MODE_ATOMIC_TEST_ONLY |
+   DRM_MODE_ATOMIC_ALLOW_MODESET, 
NULL);
+   igt_plane_set_fb(plane, NULL);
+   igt_remove_fb(display->drm_fd, &input_fb);
+   igt_remove_fb(display->drm_fd, &output_fb);
+
+   return !ret;
+}
+
+static igt_output_t *kms_writeback_get_output(igt_display_t *display)
+{
+   int i;
+
+   for (i = 0; i < display->n_outputs; i++) {
+   igt_output_t *output = &display->outputs[i];
+   int j;
+
+ 

[Intel-gfx] [PATCH V6 i-g-t 1/6] lib/igt_kms: Add writeback support

2019-06-12 Thread Brian Starkey
Add support in igt_kms for writeback connectors, with the ability
to attach framebuffers.

v5: Rebase and add DRM_CLIENT_CAP_WRITEBACK_CONNECTORS before
drmModeGetResources()

Signed-off-by: Brian Starkey 
[rebased and updated to the latest igt style]
Signed-off-by: Liviu Dudau 
---
 lib/igt_kms.c | 57 +++
 lib/igt_kms.h |  6 ++
 2 files changed, 63 insertions(+)

diff --git a/lib/igt_kms.c b/lib/igt_kms.c
index da188a39..140db346 100644
--- a/lib/igt_kms.c
+++ b/lib/igt_kms.c
@@ -325,6 +325,9 @@ const char * const 
igt_connector_prop_names[IGT_NUM_CONNECTOR_PROPS] = {
[IGT_CONNECTOR_BROADCAST_RGB] = "Broadcast RGB",
[IGT_CONNECTOR_CONTENT_PROTECTION] = "Content Protection",
[IGT_CONNECTOR_VRR_CAPABLE] = "vrr_capable",
+   [IGT_CONNECTOR_WRITEBACK_PIXEL_FORMATS] = "WRITEBACK_PIXEL_FORMATS",
+   [IGT_CONNECTOR_WRITEBACK_FB_ID] = "WRITEBACK_FB_ID",
+   [IGT_CONNECTOR_WRITEBACK_OUT_FENCE_PTR] = "WRITEBACK_OUT_FENCE_PTR",
 };
 
 /*
@@ -557,6 +560,7 @@ static const struct type_name connector_type_names[] = {
{ DRM_MODE_CONNECTOR_VIRTUAL, "Virtual" },
{ DRM_MODE_CONNECTOR_DSI, "DSI" },
{ DRM_MODE_CONNECTOR_DPI, "DPI" },
+   { DRM_MODE_CONNECTOR_WRITEBACK, "Writeback" },
{}
 };
 
@@ -1889,6 +1893,12 @@ static void igt_output_reset(igt_output_t *output)
if (igt_output_has_prop(output, IGT_CONNECTOR_BROADCAST_RGB))
igt_output_set_prop_value(output, IGT_CONNECTOR_BROADCAST_RGB,
  BROADCAST_RGB_FULL);
+   if (igt_output_has_prop(output, IGT_CONNECTOR_WRITEBACK_FB_ID))
+   igt_output_set_prop_value(output, 
IGT_CONNECTOR_WRITEBACK_FB_ID, 0);
+   if (igt_output_has_prop(output, IGT_CONNECTOR_WRITEBACK_OUT_FENCE_PTR)) 
{
+   igt_output_clear_prop_changed(output, 
IGT_CONNECTOR_WRITEBACK_OUT_FENCE_PTR);
+   output->writeback_out_fence_fd = -1;
+   }
 }
 
 /**
@@ -1901,6 +1911,8 @@ static void igt_output_reset(igt_output_t *output)
  * For outputs:
  * - %IGT_CONNECTOR_CRTC_ID
  * - %IGT_CONNECTOR_BROADCAST_RGB (if applicable)
+ * - %IGT_CONNECTOR_WRITEBACK_FB_ID
+ * - %IGT_CONNECTOR_WRITEBACK_OUT_FENCE_PTR
  * - igt_output_override_mode() to default.
  *
  * For pipes:
@@ -1970,6 +1982,8 @@ void igt_display_require(igt_display_t *display, int 
drm_fd)
 
display->drm_fd = drm_fd;
 
+   drmSetClientCap(drm_fd, DRM_CLIENT_CAP_WRITEBACK_CONNECTORS, 1);
+
resources = drmModeGetResources(display->drm_fd);
if (!resources)
goto out;
@@ -2263,6 +2277,11 @@ static void igt_output_fini(igt_output_t *output)
kmstest_free_connector_config(&output->config);
free(output->name);
output->name = NULL;
+
+   if (output->writeback_out_fence_fd != -1) {
+   close(output->writeback_out_fence_fd);
+   output->writeback_out_fence_fd = -1;
+   }
 }
 
 /**
@@ -3325,6 +3344,11 @@ static void 
igt_atomic_prepare_connector_commit(igt_output_t *output, drmModeAto
  output->props[i],
  output->values[i]));
}
+
+   if (output->writeback_out_fence_fd != -1) {
+   close(output->writeback_out_fence_fd);
+   output->writeback_out_fence_fd = -1;
+   }
 }
 
 /*
@@ -3447,6 +3471,16 @@ display_commit_changed(igt_display_t *display, enum 
igt_commit_style s)
else
/* no modeset in universal commit, no change to crtc. */
output->changed &= 1 << IGT_CONNECTOR_CRTC_ID;
+
+   if (s == COMMIT_ATOMIC) {
+   if (igt_output_is_prop_changed(output, 
IGT_CONNECTOR_WRITEBACK_OUT_FENCE_PTR))
+   igt_assert(output->writeback_out_fence_fd >= 0);
+
+   output->values[IGT_CONNECTOR_WRITEBACK_OUT_FENCE_PTR] = 
0;
+   output->values[IGT_CONNECTOR_WRITEBACK_FB_ID] = 0;
+   igt_output_clear_prop_changed(output, 
IGT_CONNECTOR_WRITEBACK_FB_ID);
+   igt_output_clear_prop_changed(output, 
IGT_CONNECTOR_WRITEBACK_OUT_FENCE_PTR);
+   }
}
 
if (display->first_commit) {
@@ -4119,6 +4153,29 @@ void igt_pipe_request_out_fence(igt_pipe_t *pipe)
igt_pipe_obj_set_prop_value(pipe, IGT_CRTC_OUT_FENCE_PTR, 
(ptrdiff_t)&pipe->out_fence_fd);
 }
 
+/**
+ * igt_output_set_writeback_fb:
+ * @output: Target output
+ * @fb: Target framebuffer
+ *
+ * This function sets the given @fb to be used as the target framebuffer for 
the
+ * writeback engine at the next atomic commit. It will also request a writeback
+ * out fence that will contain the fd number of the out fence created by KMS if
+ * the given @fb is valid.
+ */
+void igt_output_set_writeback_fb(igt_output_t *output, struct igt_fb *fb)
+{
+   igt_display_t *di

[Intel-gfx] ✓ Fi.CI.BAT: success for include: linux: Regularise the use of FIELD_SIZEOF macro

2019-06-12 Thread Patchwork
== Series Details ==

Series: include: linux: Regularise the use of FIELD_SIZEOF macro
URL   : https://patchwork.freedesktop.org/series/61982/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6253 -> Patchwork_13260


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13260/

Known issues


  Here are the changes found in Patchwork_13260 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_basic@create-close:
- fi-icl-u3:  [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-u3/igt@gem_ba...@create-close.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13260/fi-icl-u3/igt@gem_ba...@create-close.html

  * igt@gem_exec_suspend@basic-s4-devices:
- fi-blb-e6850:   [PASS][3] -> [INCOMPLETE][4] ([fdo#107718])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13260/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html

  * igt@i915_selftest@live_blt:
- fi-skl-iommu:   [PASS][5] -> [INCOMPLETE][6] ([fdo#108602])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-skl-iommu/igt@i915_selftest@live_blt.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13260/fi-skl-iommu/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_hangcheck:
- fi-icl-y:   [PASS][7] -> [INCOMPLETE][8] ([fdo#107713] / 
[fdo#108569])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-y/igt@i915_selftest@live_hangcheck.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13260/fi-icl-y/igt@i915_selftest@live_hangcheck.html

  
 Possible fixes 

  * igt@gem_busy@busy-all:
- fi-icl-guc: [INCOMPLETE][9] ([fdo#107713]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-guc/igt@gem_b...@busy-all.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13260/fi-icl-guc/igt@gem_b...@busy-all.html

  * igt@gem_ctx_create@basic-files:
- fi-icl-u2:  [INCOMPLETE][11] ([fdo#107713] / [fdo#109100]) -> 
[PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-u2/igt@gem_ctx_cre...@basic-files.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13260/fi-icl-u2/igt@gem_ctx_cre...@basic-files.html

  
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100


Participating hosts (53 -> 45)
--

  Additional (1): fi-icl-dsi 
  Missing(9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 
fi-byt-squawks fi-bsw-cyan fi-ivb-3770 fi-byt-clapper fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_6253 -> Patchwork_13260

  CI_DRM_6253: 83fdc69645c5c6b511e36e171f1c75a6132f007c @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5054: 7a295df596fdf71e5c28ecb1fbfec002060e9293 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13260: 9c1c7908df88d563d719c3abdf4b14bd91990cc0 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

9c1c7908df88 include: linux: Regularise the use of FIELD_SIZEOF macro

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13260/
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[Intel-gfx] [PATCH V6 i-g-t 0/6] igt: Add support for testing writeback connectors

2019-06-12 Thread Rodrigo Siqueira
DRM already have writeback connectors support, which is a way to expose
in DRM the hardware functionality from display engines that allows
writing back into memory the result of the DE's composition of supported
planes.

These days, I'm working to add the writeback support into the vkms[1],
and I used the kms_writeback to validate my implementation. As a result,
I had to rebase the v5 version of Liviu's series, and I also fixed a
small issue in the first path (lib/igt_kms: Add writeback support).

Patches have been originally implemented by Brian, Liviu has done the v3
and v4 updates to them. I’m just sending a v6.

1. https://patchwork.freedesktop.org/series/61738/

Brian Starkey (6):
  lib/igt_kms: Add writeback support
  kms_writeback: Add initial writeback tests
  lib: Add function to hash a framebuffer
  kms_writeback: Add writeback-check-output
  lib/igt_kms: Add igt_output_clone_pipe for cloning
  kms_writeback: Add tests using a cloned output

 lib/igt_fb.c   |  66 ++
 lib/igt_fb.h   |   3 +
 lib/igt_kms.c  | 157 +
 lib/igt_kms.h  |  10 +
 tests/Makefile.sources |   1 +
 tests/kms_writeback.c  | 492 +
 tests/meson.build  |   1 +
 7 files changed, 692 insertions(+), 38 deletions(-)
 create mode 100644 tests/kms_writeback.c

-- 
2.21.0


-- 
Rodrigo Siqueira
https://siqueira.tech


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[Intel-gfx] [RESEND PATCH V3] drm/drm_vblank: Change EINVAL by the correct errno

2019-06-12 Thread Rodrigo Siqueira
For historical reason, the function drm_wait_vblank_ioctl always return
-EINVAL if something gets wrong. This scenario limits the flexibility
for the userspace make detailed verification of the problem and take
some action. In particular, the validation of “if (!dev->irq_enabled)”
in the drm_wait_vblank_ioctl is responsible for checking if the driver
support vblank or not. If the driver does not support VBlank, the
function drm_wait_vblank_ioctl returns EINVAL which does not represent
the real issue; this patch changes this behavior by return EOPNOTSUPP.
Additionally, some operations are unsupported by this function, and
returns EINVAL; this patch also changes the return value to EOPNOTSUPP
in this case. Lastly, the function drm_wait_vblank_ioctl is invoked by
libdrm, which is used by many compositors; because of this, it is
important to check if this change breaks any compositor. In this sense,
the following projects were examined:

* Drm-hwcomposer
* Kwin
* Sway
* Wlroots
* Wayland-core
* Weston
* Xorg (67 different drivers)

For each repository the verification happened in three steps:

* Update the main branch
* Look for any occurrence "drmWaitVBlank" with the command:
  git grep -n "drmWaitVBlank"
* Look in the git history of the project with the command:
  git log -SdrmWaitVBlank

Finally, none of the above projects validate the use of EINVAL which
make safe, at least for these projects, to change the return values.

Change since V2:
 Daniel Vetter and Chris Wilson
 - Replace ENOTTY by EOPNOTSUPP
 - Return EINVAL if the parameters are wrong

Signed-off-by: Rodrigo Siqueira 
---
Update:
  Now IGT has a way to validate if a driver has vblank support or not.
  See: 
https://gitlab.freedesktop.org/drm/igt-gpu-tools/commit/2d244aed69165753f3adbbd6468db073dc1acf9A

 drivers/gpu/drm/drm_vblank.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c
index 0d704bddb1a6..d76a783a7d4b 100644
--- a/drivers/gpu/drm/drm_vblank.c
+++ b/drivers/gpu/drm/drm_vblank.c
@@ -1578,10 +1578,10 @@ int drm_wait_vblank_ioctl(struct drm_device *dev, void 
*data,
unsigned int flags, pipe, high_pipe;
 
if (!dev->irq_enabled)
-   return -EINVAL;
+   return -EOPNOTSUPP;
 
if (vblwait->request.type & _DRM_VBLANK_SIGNAL)
-   return -EINVAL;
+   return -EOPNOTSUPP;
 
if (vblwait->request.type &
~(_DRM_VBLANK_TYPES_MASK | _DRM_VBLANK_FLAGS_MASK |
-- 
2.21.0


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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gvt: remove duplicate entry of trace (rev2)

2019-06-12 Thread Patchwork
== Series Details ==

Series: drm/i915/gvt: remove duplicate entry of trace (rev2)
URL   : https://patchwork.freedesktop.org/series/61281/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6242_full -> Patchwork_13247_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Known issues


  Here are the changes found in Patchwork_13247_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_tiled_swapping@non-threaded:
- shard-iclb: [PASS][1] -> [FAIL][2] ([fdo#108686])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/shard-iclb2/igt@gem_tiled_swapp...@non-threaded.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/shard-iclb8/igt@gem_tiled_swapp...@non-threaded.html

  * igt@i915_pm_rpm@system-suspend-modeset:
- shard-skl:  [PASS][3] -> [INCOMPLETE][4] ([fdo#104108] / 
[fdo#107807])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/shard-skl6/igt@i915_pm_...@system-suspend-modeset.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/shard-skl6/igt@i915_pm_...@system-suspend-modeset.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl:  [PASS][5] -> [DMESG-WARN][6] ([fdo#108566]) +4 
similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/shard-apl5/igt@i915_susp...@fence-restore-tiled2untiled.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/shard-apl1/igt@i915_susp...@fence-restore-tiled2untiled.html

  * igt@kms_color@pipe-c-ctm-blue-to-red:
- shard-skl:  [PASS][7] -> [FAIL][8] ([fdo#107201])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/shard-skl4/igt@kms_co...@pipe-c-ctm-blue-to-red.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/shard-skl10/igt@kms_co...@pipe-c-ctm-blue-to-red.html

  * igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen:
- shard-skl:  [PASS][9] -> [FAIL][10] ([fdo#103232]) +1 similar 
issue
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/shard-skl7/igt@kms_cursor_...@pipe-a-cursor-128x42-offscreen.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/shard-skl1/igt@kms_cursor_...@pipe-a-cursor-128x42-offscreen.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-kbl:  [PASS][11] -> [DMESG-WARN][12] ([fdo#108566]) +1 
similar issue
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/shard-kbl2/igt@kms_cursor_...@pipe-c-cursor-suspend.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/shard-kbl3/igt@kms_cursor_...@pipe-c-cursor-suspend.html

  * igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
- shard-glk:  [PASS][13] -> [FAIL][14] ([fdo#107409])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/shard-glk6/igt@kms_cursor_leg...@2x-long-nonblocking-modeset-vs-cursor-atomic.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/shard-glk9/igt@kms_cursor_leg...@2x-long-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_flip@flip-vs-suspend:
- shard-skl:  [PASS][15] -> [INCOMPLETE][16] ([fdo#109507])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/shard-skl9/igt@kms_f...@flip-vs-suspend.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/shard-skl3/igt@kms_f...@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-gtt:
- shard-skl:  [PASS][17] -> [FAIL][18] ([fdo#103167]) +1 similar 
issue
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/shard-skl7/igt@kms_frontbuffer_track...@fbc-1p-primscrn-pri-shrfb-draw-mmap-gtt.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/shard-skl1/igt@kms_frontbuffer_track...@fbc-1p-primscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt:
- shard-iclb: [PASS][19] -> [FAIL][20] ([fdo#103167]) +6 similar 
issues
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/shard-iclb3/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/shard-iclb1/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-shrfb-plflip-blt.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl:  [PASS][21] -> [FAIL][22] ([fdo#108145]) +1 similar 
issue
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/shard-skl4/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/shard-skl10/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html

  * igt@kms_plane_lowres@pipe-a-tiling-y:
- shard-iclb: [PASS][23] -> [FAIL][24] ([fdo#103166])
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/shard-iclb2/igt@kms

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for gpu/drm/i915: globally replace dev_priv with i915

2019-06-12 Thread Patchwork
== Series Details ==

Series: gpu/drm/i915: globally replace dev_priv with i915
URL   : https://patchwork.freedesktop.org/series/61983/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: gpu/drm/i915: globally replace dev_priv with i915
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:2859:26: warning: expression using 
sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:2859:26: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_perf.c:1432:15: warning: memset with byte count of 
16777216
-O:drivers/gpu/drm/i915/i915_perf.c:1490:15: warning: memset with byte count of 
16777216
+drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_irq.c:1407:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_perf.c:1432:15: warning: memset with byte count of 
16777216
+drivers/gpu/drm/i915/i915_perf.c:1490:15: warning: memset with byte count of 
16777216
-O:drivers/gpu/drm/i915/i915_vma.c:584:23: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_vma.c:584:23: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_vma.c:586:23: warning: expression using 
sizeof(void)
+drivers/gpu/drm/i915/i915_vma.c:584:23: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_vma.c:584:23: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_vma.c:586:23: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/intel_audio.c:971:34: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/intel_audio.c:971:34: warning: expression using 
sizeof(void)
+drivers/gpu/drm/i915/intel_audio.c:971:34: warning: expression using 
sizeof(void)
+drivers/gpu/drm/i915/intel_audio.c:971:34: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/intel_bw.c:171:20: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/intel_bw.c:171:20: warning: expression using 
sizeof(void)
+drivers/gpu/drm/i915/intel_bw.c:171:20: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_bw.c:171:20: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/intel_bw.c:244:24: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/intel_bw.c:244:24: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/intel_bw.c:244:24: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/intel_bw.c:244:24: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/intel_bw.c:244:24: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/intel_bw.c:244:24: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/intel_bw.c:244:24: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/intel_bw.c:244:24: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/intel_bw.c:244:24: warning: expression 

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for gpu/drm/i915: globally replace dev_priv with i915

2019-06-12 Thread Patchwork
== Series Details ==

Series: gpu/drm/i915: globally replace dev_priv with i915
URL   : https://patchwork.freedesktop.org/series/61983/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
5585dfe286e9 gpu/drm/i915: globally replace dev_priv with i915
-:633: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "!r"
#633: FILE: drivers/gpu/drm/i915/gem/i915_gem_stolen.c:141:
+   if (r == NULL && !IS_GEN(i915, 3)) {

-:2243: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#2243: FILE: drivers/gpu/drm/i915/gvt/cmd_parser.c:909:
+   if (IS_GEN(gvt->i915, 9) &&
intel_gvt_mmio_is_in_ctx(gvt, offset) &&

-:2863: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#2863: FILE: drivers/gpu/drm/i915/gvt/gtt.c:293:
+static void write_pte64(struct drm_i915_private *i915,
unsigned long index, u64 pte)

-:3109: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'gvt' may be better as 
'(gvt)' to avoid precedence issues
#3109: FILE: drivers/gpu/drm/i915/gvt/gvt.h:376:
+#define gvt_aperture_sz(gvt) (gvt->i915->ggtt.mappable_end)

-:3110: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'gvt' may be better as 
'(gvt)' to avoid precedence issues
#3110: FILE: drivers/gpu/drm/i915/gvt/gvt.h:377:
+#define gvt_aperture_pa_base(gvt) (gvt->i915->ggtt.gmadr.start)

-:3113: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'gvt' may be better as 
'(gvt)' to avoid precedence issues
#3113: FILE: drivers/gpu/drm/i915/gvt/gvt.h:379:
+#define gvt_ggtt_gm_sz(gvt)  (gvt->i915->ggtt.vm.total)

-:3125: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'gvt' may be better as 
'(gvt)' to avoid precedence issues
#3125: FILE: drivers/gpu/drm/i915/gvt/gvt.h:393:
+#define gvt_fence_sz(gvt) (gvt->i915->num_fence_regs)

-:3309: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the 
previous line
#3309: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1420:
+   if (IS_SKYLAKE(vgpu->gvt->i915)
+|| IS_KABYLAKE(vgpu->gvt->i915)

-:3310: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the 
previous line
#3310: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1421:
+|| IS_KABYLAKE(vgpu->gvt->i915)
+|| IS_COFFEELAKE(vgpu->gvt->i915)) {

-:3331: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the 
previous line
#3331: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1445:
+   if (IS_SKYLAKE(vgpu->gvt->i915)
+|| IS_KABYLAKE(vgpu->gvt->i915)

-:3332: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the 
previous line
#3332: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1446:
+|| IS_KABYLAKE(vgpu->gvt->i915)
+|| IS_COFFEELAKE(vgpu->gvt->i915))

-:3457: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the 
previous line
#3457: FILE: drivers/gpu/drm/i915/gvt/handlers.c:3364:
+   } else if (IS_SKYLAKE(i915)
+   || IS_KABYLAKE(i915)

-:3458: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the 
previous line
#3458: FILE: drivers/gpu/drm/i915/gvt/handlers.c:3365:
+   || IS_KABYLAKE(i915)
+   || IS_COFFEELAKE(i915)) {

-:3919: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#3919: FILE: drivers/gpu/drm/i915/gvt/scheduler.c:1019:
+   intel_uncore_forcewake_get(&gvt->i915->uncore,
FORCEWAKE_ALL);

-:3928: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#3928: FILE: drivers/gpu/drm/i915/gvt/scheduler.c:1041:
+   intel_uncore_forcewake_put(&gvt->i915->uncore,
FORCEWAKE_ALL);

-:4443: CHECK:BRACES: braces {} should be used on all arms of this statement
#4443: FILE: drivers/gpu/drm/i915/i915_debugfs.c:907:
+   if (INTEL_GEN(i915) >= 9)
[...]
else {
[...]

-:4959: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional 
statements (8, 63)
#4959: FILE: drivers/gpu/drm/i915/i915_debugfs.c:1496:
+   if (INTEL_GEN(i915) >= 9)
/* no global SR status; inspect per-plane WM */;

-:7255: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written 
"!i915->wq"
#7255: FILE: drivers/gpu/drm/i915/i915_drv.c:819:
+   if (i915->wq == NULL)

-:7261: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written 
"!i915->hotplug.dp_wq"
#7261: FILE: drivers/gpu/drm/i915/i915_drv.c:823:
+   if (i915->hotplug.dp_wq == NULL)

-:8663: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#8663: FILE: drivers/gpu/drm/i915/i915_drv.c:2857:
+static int vlv_resume_prepare(struct drm_i915_private *i915,
bool rpm_resume)

-:9173: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'i915' - possible 
side-effects?
#9173: FILE: drivers/gpu/drm/i915/i915_drv.h:2176:
+#define IS_G

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for include: linux: Regularise the use of FIELD_SIZEOF macro

2019-06-12 Thread Patchwork
== Series Details ==

Series: include: linux: Regularise the use of FIELD_SIZEOF macro
URL   : https://patchwork.freedesktop.org/series/61982/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
9c1c7908df88 include: linux: Regularise the use of FIELD_SIZEOF macro
-:116: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#116: FILE: fs/befs/linuxvfs.c:442:
+   FIELD_SIZEOF(struct befs_inode_info,
i_data.symlink),

-:155: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#155: FILE: fs/freevxfs/vxfs_super.c:333:
+   FIELD_SIZEOF(struct vxfs_inode_info,
vii_immed.vi_immed),

-:168: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#168: FILE: fs/orangefs/super.c:650:
+   FIELD_SIZEOF(struct orangefs_inode_s,
link_target),

-:181: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#181: FILE: fs/ufs/super.c:1473:
+   FIELD_SIZEOF(struct ufs_inode_info,
i_u1.i_symlink),

-:232: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 't' may be better as '(t)' to 
avoid precedence issues
#232: FILE: include/linux/stddef.h:29:
+#define FIELD_SIZEOF(t, f) (sizeof(((t *)0)->f))

-:232: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'f' may be better as '(f)' to 
avoid precedence issues
#232: FILE: include/linux/stddef.h:29:
+#define FIELD_SIZEOF(t, f) (sizeof(((t *)0)->f))

-:372: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 't' may be better as '(t)' to 
avoid precedence issues
#372: FILE: tools/testing/selftests/bpf/bpf_util.h:69:
+#define FIELD_SIZEOF(t, f) (sizeof(((t *)0)->f))

-:372: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'f' may be better as '(f)' to 
avoid precedence issues
#372: FILE: tools/testing/selftests/bpf/bpf_util.h:69:
+#define FIELD_SIZEOF(t, f) (sizeof(((t *)0)->f))

total: 0 errors, 0 warnings, 8 checks, 268 lines checked

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Re: [Intel-gfx] [PATCH] drm/i915/gvt: remove duplicate entry of trace

2019-06-12 Thread Hariprasad Kelam
On Wed, Jun 12, 2019 at 11:22:36AM +0800, Zhenyu Wang wrote:
> On 2019.05.26 13:26:33 +0530, Hariprasad Kelam wrote:
> > Remove duplicate include of trace.h
> > 
> > Issue identified by includecheck
> > 
> > Signed-off-by: Hariprasad Kelam 
> > ---
> >  drivers/gpu/drm/i915/gvt/trace_points.c | 1 -
> >  1 file changed, 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gvt/trace_points.c 
> > b/drivers/gpu/drm/i915/gvt/trace_points.c
> > index a3deed69..569f5e3 100644
> > --- a/drivers/gpu/drm/i915/gvt/trace_points.c
> > +++ b/drivers/gpu/drm/i915/gvt/trace_points.c
> > @@ -32,5 +32,4 @@
> >  
> >  #ifndef __CHECKER__
> >  #define CREATE_TRACE_POINTS
> > -#include "trace.h"
> >  #endif
> > -- 
> 
> This actually caused build issue like
> ERROR: "__tracepoint_gma_index" [drivers/gpu/drm/i915/i915.ko] undefined!
> ERROR: "__tracepoint_render_mmio" [drivers/gpu/drm/i915/i915.ko] undefined!
> ERROR: "__tracepoint_gvt_command" [drivers/gpu/drm/i915/i915.ko] undefined!
> ERROR: "__tracepoint_spt_guest_change" [drivers/gpu/drm/i915/i915.ko] 
> undefined!
> ERROR: "__tracepoint_gma_translate" [drivers/gpu/drm/i915/i915.ko] undefined!
> ERROR: "__tracepoint_spt_alloc" [drivers/gpu/drm/i915/i915.ko] undefined!
> ERROR: "__tracepoint_spt_change" [drivers/gpu/drm/i915/i915.ko] undefined!
> ERROR: "__tracepoint_oos_sync" [drivers/gpu/drm/i915/i915.ko] undefined!
> ERROR: "__tracepoint_write_ir" [drivers/gpu/drm/i915/i915.ko] undefined!
> ERROR: "__tracepoint_propagate_event" [drivers/gpu/drm/i915/i915.ko] 
> undefined!
> ERROR: "__tracepoint_inject_msi" [drivers/gpu/drm/i915/i915.ko] undefined!
> ERROR: "__tracepoint_spt_refcount" [drivers/gpu/drm/i915/i915.ko] undefined!
> ERROR: "__tracepoint_spt_free" [drivers/gpu/drm/i915/i915.ko] undefined!
> ERROR: "__tracepoint_oos_change" [drivers/gpu/drm/i915/i915.ko] undefined!
> scripts/Makefile.modpost:91: recipe for target '__modpost' failed
> 
> Looks we need fix like below.
> 
> Subject: [PATCH] drm/i915/gvt: remove duplicate include of trace.h
> 
> This removes duplicate include of trace.h. Found by Hariprasad Kelam
> with includecheck.
> 
> Reported-by: Hariprasad Kelam 
> Signed-off-by: Zhenyu Wang 
> ---
>  drivers/gpu/drm/i915/gvt/trace_points.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/trace_points.c 
> b/drivers/gpu/drm/i915/gvt/trace_points.c
> index a3deed692b9c..fe552e877e09 100644
> --- a/drivers/gpu/drm/i915/gvt/trace_points.c
> +++ b/drivers/gpu/drm/i915/gvt/trace_points.c
> @@ -28,8 +28,6 @@
>   *
>   */
>  
> -#include "trace.h"
> -
>  #ifndef __CHECKER__
>  #define CREATE_TRACE_POINTS
>  #include "trace.h"
> -- 
> 2.20.1
> 
> -- 
> Open Source Technology Center, Intel ltd.
> 
> $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827

Hi Zhenyu Wang,
Thanks for correcting the patch.
It seems we should first define CREATE_TRACE_POINTS and include trace.h as per 
documentation.

Thanks,
Hariprasad k
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Re: [Intel-gfx] [PATCH V2] include: linux: Regularise the use of FIELD_SIZEOF macro

2019-06-12 Thread Alexei Starovoitov
On Tue, Jun 11, 2019 at 5:00 PM Shyam Saini
 wrote:
>
> Currently, there are 3 different macros, namely sizeof_field, SIZEOF_FIELD
> and FIELD_SIZEOF which are used to calculate the size of a member of
> structure, so to bring uniformity in entire kernel source tree lets use
> FIELD_SIZEOF and replace all occurrences of other two macros with this.
>
> For this purpose, redefine FIELD_SIZEOF in include/linux/stddef.h and
> tools/testing/selftests/bpf/bpf_util.h and remove its defination from
> include/linux/kernel.h

please dont. bpf_util.h is a user space header.
Please leave it as-is.
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Re: [Intel-gfx] [PATCH V2] include: linux: Regularise the use of FIELD_SIZEOF macro

2019-06-12 Thread Andreas Dilger
On Jun 11, 2019, at 2:48 PM, Andrew Morton  wrote:
> 
> On Wed, 12 Jun 2019 01:08:36 +0530 Shyam Saini 
>  wrote:
> 
>> Currently, there are 3 different macros, namely sizeof_field, SIZEOF_FIELD
>> and FIELD_SIZEOF which are used to calculate the size of a member of
>> structure, so to bring uniformity in entire kernel source tree lets use
>> FIELD_SIZEOF and replace all occurrences of other two macros with this.
>> 
>> For this purpose, redefine FIELD_SIZEOF in include/linux/stddef.h and
>> tools/testing/selftests/bpf/bpf_util.h and remove its defination from
>> include/linux/kernel.h
>> 
>> In favour of FIELD_SIZEOF, this patch also deprecates other two similar
>> macros sizeof_field and SIZEOF_FIELD.
>> 
>> For code compatibility reason, retain sizeof_field macro as a wrapper macro
>> to FIELD_SIZEOF
> 
> As Alexey has pointed out, C structs and unions don't have fields -
> they have members.  So this is an opportunity to switch everything to
> a new member_sizeof().
> 
> What do people think of that and how does this impact the patch footprint?

I did a check, and FIELD_SIZEOF() is used about 350x, while sizeof_field()
is about 30x, and SIZEOF_FIELD() is only about 5x.

That said, I'm much more in favour of "sizeof_field()" or "sizeof_member()"
than FIELD_SIZEOF().  Not only does that better match "offsetof()", with
which it is closely related, but is also closer to the original "sizeof()".

Since this is a rather trivial change, it can be split into a number of
patches to get approval/landing via subsystem maintainers, and there is no
huge urgency to remove the original macros until the users are gone.  It
would make sense to remove SIZEOF_FIELD() and sizeof_field() quickly so
they don't gain more users, and the remaining FIELD_SIZEOF() users can be
whittled away as the patches come through the maintainer trees.

Cheers, Andreas







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Re: [Intel-gfx] [PATCH V2] include: linux: Regularise the use of FIELD_SIZEOF macro

2019-06-12 Thread Andreas Dilger
On Jun 11, 2019, at 3:09 PM, Andrew Morton  wrote:
> 
> On Tue, 11 Jun 2019 15:00:10 -0600 Andreas Dilger  wrote:
> 
 to FIELD_SIZEOF
>>> 
>>> As Alexey has pointed out, C structs and unions don't have fields -
>>> they have members.  So this is an opportunity to switch everything to
>>> a new member_sizeof().
>>> 
>>> What do people think of that and how does this impact the patch footprint?
>> 
>> I did a check, and FIELD_SIZEOF() is used about 350x, while sizeof_field()
>> is about 30x, and SIZEOF_FIELD() is only about 5x.
> 
> Erk.  Sorry, I should have grepped.
> 
>> That said, I'm much more in favour of "sizeof_field()" or "sizeof_member()"
>> than FIELD_SIZEOF().  Not only does that better match "offsetof()", with
>> which it is closely related, but is also closer to the original "sizeof()".
>> 
>> Since this is a rather trivial change, it can be split into a number of
>> patches to get approval/landing via subsystem maintainers, and there is no
>> huge urgency to remove the original macros until the users are gone.  It
>> would make sense to remove SIZEOF_FIELD() and sizeof_field() quickly so
>> they don't gain more users, and the remaining FIELD_SIZEOF() users can be
>> whittled away as the patches come through the maintainer trees.
> 
> In that case I'd say let's live with FIELD_SIZEOF() and remove
> sizeof_field() and SIZEOF_FIELD().

The real question is whether we want to live with a sub-standard macro for
the next 20 years rather than taking the opportunity to clean it up now?

> I'm a bit surprised that the FIELD_SIZEOF() definition ends up in
> stddef.h rather than in kernel.h where such things are normally
> defined.  Why is that?

Cheers, Andreas







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Re: [Intel-gfx] [PATCH V2] include: linux: Regularise the use of FIELD_SIZEOF macro

2019-06-12 Thread Shyam Saini
Hi Kees,

Cc'ing William Kucharski,

> On Wed, Jun 12, 2019 at 01:08:36AM +0530, Shyam Saini wrote:
> > In favour of FIELD_SIZEOF, this patch also deprecates other two similar
> > macros sizeof_field and SIZEOF_FIELD.
> >
> > For code compatibility reason, retain sizeof_field macro as a wrapper macro
> > to FIELD_SIZEOF
>
> Can you explain this part? First sentence says you want to remove
> sizeof_field, and the second says you're keeping it? I thought the point
> was to switch all of these to FIELD_SIZEOF()?

Previously, William [1] suggested to retain sizeof_field as macro to
FIELD_SIZEOF
for code compatibility reason. I have removed all the usage of
sizeof_field apart from retained
wrapper macro definition.


[1] https://patchwork.ozlabs.org/patch/1085275/

Thanks,
Shyam

> >
> >  arch/arm64/include/asm/processor.h | 10 +-
> >  arch/mips/cavium-octeon/executive/cvmx-bootmem.c   |  9 +
> >  drivers/gpu/drm/i915/gvt/scheduler.c   |  2 +-
> >  drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c |  4 ++--
> >  fs/befs/linuxvfs.c |  2 +-
> >  fs/ext2/super.c|  2 +-
> >  fs/ext4/super.c|  2 +-
> >  fs/freevxfs/vxfs_super.c   |  2 +-
> >  fs/orangefs/super.c|  2 +-
> >  fs/ufs/super.c |  2 +-
> >  include/linux/kernel.h |  9 -
> >  include/linux/slab.h   |  2 +-
> >  include/linux/stddef.h | 17 ++---
> >  kernel/fork.c  |  2 +-
> >  kernel/utsname.c   |  2 +-
> >  net/caif/caif_socket.c |  2 +-
> >  net/core/skbuff.c  |  2 +-
> >  net/ipv4/raw.c |  2 +-
> >  net/ipv6/raw.c |  2 +-
> >  net/sctp/socket.c  |  4 ++--
> >  tools/testing/selftests/bpf/bpf_util.h | 22 
> > +++---
> >  virt/kvm/kvm_main.c|  2 +-
> >  22 files changed, 58 insertions(+), 47 deletions(-)
> >
> > diff --git a/arch/arm64/include/asm/processor.h 
> > b/arch/arm64/include/asm/processor.h
> > index fcd0e691b1ea..ace906d887cc 100644
> > --- a/arch/arm64/include/asm/processor.h
> > +++ b/arch/arm64/include/asm/processor.h
> > @@ -164,13 +164,13 @@ static inline void 
> > arch_thread_struct_whitelist(unsigned long *offset,
> >   unsigned long *size)
> >  {
> >   /* Verify that there is no padding among the whitelisted fields: */
> > - BUILD_BUG_ON(sizeof_field(struct thread_struct, uw) !=
> > -  sizeof_field(struct thread_struct, uw.tp_value) +
> > -  sizeof_field(struct thread_struct, uw.tp2_value) +
> > -  sizeof_field(struct thread_struct, uw.fpsimd_state));
> > + BUILD_BUG_ON(FIELD_SIZEOF(struct thread_struct, uw) !=
> > +  FIELD_SIZEOF(struct thread_struct, uw.tp_value) +
> > +  FIELD_SIZEOF(struct thread_struct, uw.tp2_value) +
> > +  FIELD_SIZEOF(struct thread_struct, uw.fpsimd_state));
> >
> >   *offset = offsetof(struct thread_struct, uw);
> > - *size = sizeof_field(struct thread_struct, uw);
> > + *size = FIELD_SIZEOF(struct thread_struct, uw);
> >  }
> >
> >  #ifdef CONFIG_COMPAT
> > diff --git a/arch/mips/cavium-octeon/executive/cvmx-bootmem.c 
> > b/arch/mips/cavium-octeon/executive/cvmx-bootmem.c
> > index ba8f82a29a81..44b506a14666 100644
> > --- a/arch/mips/cavium-octeon/executive/cvmx-bootmem.c
> > +++ b/arch/mips/cavium-octeon/executive/cvmx-bootmem.c
> > @@ -45,13 +45,6 @@ static struct cvmx_bootmem_desc *cvmx_bootmem_desc;
> >  /* See header file for descriptions of functions */
> >
> >  /**
> > - * This macro returns the size of a member of a structure.
> > - * Logically it is the same as "sizeof(s::field)" in C++, but
> > - * C lacks the "::" operator.
> > - */
> > -#define SIZEOF_FIELD(s, field) sizeof(((s *)NULL)->field)
> > -
> > -/**
> >   * This macro returns a member of the
> >   * cvmx_bootmem_named_block_desc_t structure. These members can't
> >   * be directly addressed as they might be in memory not directly
> > @@ -65,7 +58,7 @@ static struct cvmx_bootmem_desc *cvmx_bootmem_desc;
> >  #define CVMX_BOOTMEM_NAMED_GET_FIELD(addr, field)\
> >   __cvmx_bootmem_desc_get(addr,   \
> >   offsetof(struct cvmx_bootmem_named_block_desc, field),  \
> > - SIZEOF_FIELD(struct cvmx_bootmem_named_block_desc, field))
> > + FIELD_SIZEOF(struct cvmx_bootmem_named_block_desc, field))
> >
> >  /**
> >   * This function is the implementation of the get macros 

Re: [Intel-gfx] [PATCH V2] include: linux: Regularise the use of FIELD_SIZEOF macro

2019-06-12 Thread Shyam Saini
Hi Andrew,

>
> On Tue, 11 Jun 2019 15:00:10 -0600 Andreas Dilger  wrote:
>
> > >> to FIELD_SIZEOF
> > >
> > > As Alexey has pointed out, C structs and unions don't have fields -
> > > they have members.  So this is an opportunity to switch everything to
> > > a new member_sizeof().
> > >
> > > What do people think of that and how does this impact the patch footprint?
> >
> > I did a check, and FIELD_SIZEOF() is used about 350x, while sizeof_field()
> > is about 30x, and SIZEOF_FIELD() is only about 5x.
>
> Erk.  Sorry, I should have grepped.
>
> > That said, I'm much more in favour of "sizeof_field()" or "sizeof_member()"
> > than FIELD_SIZEOF().  Not only does that better match "offsetof()", with
> > which it is closely related, but is also closer to the original "sizeof()".
> >
> > Since this is a rather trivial change, it can be split into a number of
> > patches to get approval/landing via subsystem maintainers, and there is no
> > huge urgency to remove the original macros until the users are gone.  It
> > would make sense to remove SIZEOF_FIELD() and sizeof_field() quickly so
> > they don't gain more users, and the remaining FIELD_SIZEOF() users can be
> > whittled away as the patches come through the maintainer trees.
>
> In that case I'd say let's live with FIELD_SIZEOF() and remove
> sizeof_field() and SIZEOF_FIELD().
>
> I'm a bit surprised that the FIELD_SIZEOF() definition ends up in
> stddef.h rather than in kernel.h where such things are normally
> defined.  Why is that?

Thanks for pointing out this, I was not aware if this is a convention.
Anyway, I'll keep FIELD_SIZEOF definition in kernel.h in next version.
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[Intel-gfx] [PATCH V2] include: linux: Regularise the use of FIELD_SIZEOF macro

2019-06-12 Thread Shyam Saini
Currently, there are 3 different macros, namely sizeof_field, SIZEOF_FIELD
and FIELD_SIZEOF which are used to calculate the size of a member of
structure, so to bring uniformity in entire kernel source tree lets use
FIELD_SIZEOF and replace all occurrences of other two macros with this.

For this purpose, redefine FIELD_SIZEOF in include/linux/stddef.h and
tools/testing/selftests/bpf/bpf_util.h and remove its defination from
include/linux/kernel.h

In favour of FIELD_SIZEOF, this patch also deprecates other two similar
macros sizeof_field and SIZEOF_FIELD.

For code compatibility reason, retain sizeof_field macro as a wrapper macro
to FIELD_SIZEOF

Signed-off-by: Shyam Saini 
---
Changelog:

V1->V2
- Consolidate previous patch 1 and 2 into single patch
- For code compatibility reason, retain sizeof_field macro as a
  wrapper macro to FIELD_SIZEOF
 
 arch/arm64/include/asm/processor.h | 10 +-
 arch/mips/cavium-octeon/executive/cvmx-bootmem.c   |  9 +
 drivers/gpu/drm/i915/gvt/scheduler.c   |  2 +-
 drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c |  4 ++--
 fs/befs/linuxvfs.c |  2 +-
 fs/ext2/super.c|  2 +-
 fs/ext4/super.c|  2 +-
 fs/freevxfs/vxfs_super.c   |  2 +-
 fs/orangefs/super.c|  2 +-
 fs/ufs/super.c |  2 +-
 include/linux/kernel.h |  9 -
 include/linux/slab.h   |  2 +-
 include/linux/stddef.h | 17 ++---
 kernel/fork.c  |  2 +-
 kernel/utsname.c   |  2 +-
 net/caif/caif_socket.c |  2 +-
 net/core/skbuff.c  |  2 +-
 net/ipv4/raw.c |  2 +-
 net/ipv6/raw.c |  2 +-
 net/sctp/socket.c  |  4 ++--
 tools/testing/selftests/bpf/bpf_util.h | 22 +++---
 virt/kvm/kvm_main.c|  2 +-
 22 files changed, 58 insertions(+), 47 deletions(-)

diff --git a/arch/arm64/include/asm/processor.h 
b/arch/arm64/include/asm/processor.h
index fcd0e691b1ea..ace906d887cc 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -164,13 +164,13 @@ static inline void arch_thread_struct_whitelist(unsigned 
long *offset,
unsigned long *size)
 {
/* Verify that there is no padding among the whitelisted fields: */
-   BUILD_BUG_ON(sizeof_field(struct thread_struct, uw) !=
-sizeof_field(struct thread_struct, uw.tp_value) +
-sizeof_field(struct thread_struct, uw.tp2_value) +
-sizeof_field(struct thread_struct, uw.fpsimd_state));
+   BUILD_BUG_ON(FIELD_SIZEOF(struct thread_struct, uw) !=
+FIELD_SIZEOF(struct thread_struct, uw.tp_value) +
+FIELD_SIZEOF(struct thread_struct, uw.tp2_value) +
+FIELD_SIZEOF(struct thread_struct, uw.fpsimd_state));
 
*offset = offsetof(struct thread_struct, uw);
-   *size = sizeof_field(struct thread_struct, uw);
+   *size = FIELD_SIZEOF(struct thread_struct, uw);
 }
 
 #ifdef CONFIG_COMPAT
diff --git a/arch/mips/cavium-octeon/executive/cvmx-bootmem.c 
b/arch/mips/cavium-octeon/executive/cvmx-bootmem.c
index ba8f82a29a81..44b506a14666 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-bootmem.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-bootmem.c
@@ -45,13 +45,6 @@ static struct cvmx_bootmem_desc *cvmx_bootmem_desc;
 /* See header file for descriptions of functions */
 
 /**
- * This macro returns the size of a member of a structure.
- * Logically it is the same as "sizeof(s::field)" in C++, but
- * C lacks the "::" operator.
- */
-#define SIZEOF_FIELD(s, field) sizeof(((s *)NULL)->field)
-
-/**
  * This macro returns a member of the
  * cvmx_bootmem_named_block_desc_t structure. These members can't
  * be directly addressed as they might be in memory not directly
@@ -65,7 +58,7 @@ static struct cvmx_bootmem_desc *cvmx_bootmem_desc;
 #define CVMX_BOOTMEM_NAMED_GET_FIELD(addr, field)  \
__cvmx_bootmem_desc_get(addr,   \
offsetof(struct cvmx_bootmem_named_block_desc, field),  \
-   SIZEOF_FIELD(struct cvmx_bootmem_named_block_desc, field))
+   FIELD_SIZEOF(struct cvmx_bootmem_named_block_desc, field))
 
 /**
  * This function is the implementation of the get macros defined
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c 
b/drivers/gpu/drm/i915/gvt/scheduler.c
index 0f919f0a43d4..820f95a52542 100644
--- a/drivers/gpu/drm/i915/gvt/scheduler.c
+++ b/drivers/gp

Re: [Intel-gfx] [PATCH 2/5] dt-bindings: display/panel: Expand rotation documentation

2019-06-12 Thread Rob Herring
On Mon, Jun 10, 2019 at 10:03 PM Derek Basehore  wrote:
>
> This adds to the rotation documentation to explain how drivers should
> use the property and gives an example of the property in a devicetree
> node.
>
> Signed-off-by: Derek Basehore 
> ---
>  .../bindings/display/panel/panel.txt  | 32 +++
>  1 file changed, 32 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/panel/panel.txt 
> b/Documentation/devicetree/bindings/display/panel/panel.txt
> index e2e6867852b8..f35d62d933fc 100644
> --- a/Documentation/devicetree/bindings/display/panel/panel.txt
> +++ b/Documentation/devicetree/bindings/display/panel/panel.txt
> @@ -2,3 +2,35 @@ Common display properties
>  -
>
>  - rotation:Display rotation in degrees counter clockwise (0,90,180,270)
> +
> +Property read from the device tree using of of_drm_get_panel_orientation

Don't put kernel specifics into bindings.

> +
> +The panel driver may apply the rotation at the TCON level, which will

What's TCON? Something Mediatek specific IIRC.

> +make the panel look like it isn't rotated to the kernel and any other
> +software.
> +
> +If not, a panel orientation property should be added through the SoC
> +vendor DRM code using the drm_connector_init_panel_orientation_property
> +function.

The 'rotation' property should be defined purely based on how the
panel is mounted relative to a device's orientation. If the display
pipeline has some ability to handle rotation, that's a feature of the
display pipeline and not the panel.

> +
> +Example:

This file is a collection of common properties. It shouldn't have an
example especially as this example is mostly non-common properties.

> +   panel: panel@0 {
> +   compatible = "boe,himax8279d8p";
> +   reg = <0>;
> +   enable-gpios = <&pio 45 0>;

> +   pp33-gpios = <&pio 35 0>;
> +   pp18-gpios = <&pio 36 0>;

BTW, are these upstream because they look like GPIO controlled
supplies which we model with gpio-regulator binding typically.

> +   pinctrl-names = "default", "state_3300mv", "state_1800mv";
> +   pinctrl-0 = <&panel_pins_default>;
> +   pinctrl-1 = <&panel_pins_3300mv>;
> +   pinctrl-2 = <&panel_pins_1800mv>;
> +   backlight = <&backlight_lcd0>;
> +   rotation = <180>;
> +   status = "okay";
> +
> +   port {
> +   panel_in: endpoint {
> +   remote-endpoint = <&dsi_out>;
> +   };
> +   };
> +   };
> --
> 2.22.0.rc2.383.gf4fbbf30c2-goog
>
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Re: [Intel-gfx] [PATCH v2 0/8] RPM Encapsulation

2019-06-12 Thread Chris Wilson
Quoting Daniele Ceraolo Spurio (2019-06-12 19:37:39)
> Rebased series after the display power code has been split out.
> Mostly the same as V1, just small fixes based on review comments
> and CI results. The last patch is new.
> 
> The series grows the code a bit, but I believe it is worth it for the
> extra logical encapsulation. With all debug options disabled:
> 
> add/remove: 0/0 grow/shrink: 92/14 up/down: 1225/-162 (1063)
> Total: Before=1266893, After=1267956, chg +0.08%
> 
> Daniele Ceraolo Spurio (8):
>   drm/i915: prefer i915_runtime_pm in intel_runtime function
>   drm/i915: Remove rpm asserts that use i915
>   drm/i915: make enable/disable rpm assert function use the rpm
> structure
>   drm/i915: move and rename i915_runtime_pm
>   drm/i915: move a few more functions to accept the rpm structure
>   drm/i915: update rpm_get/put to use the rpm structure
>   drm/i915: update with_intel_runtime_pm to use the rpm structure
>   drm/i915: make intel_wakeref work on the rpm struct

Looks fine. I can't think of any neat way to avoid the extra offsets, so
we'll just have to think of a better way of dividing up the driver to
avoid loading unneeded code.

Preemptive Reviewed-by: Chris Wilson 
on the series as nothing leapt out at me from the mechanical churn. 
Please cc Imre on the rebase in case he has a good reason to restructure
it differently.
-Chris
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Re: [Intel-gfx] [PATCH v2 8/8] drm/i915: make intel_wakeref work on the rpm struct

2019-06-12 Thread Chris Wilson
Quoting Daniele Ceraolo Spurio (2019-06-12 19:37:47)
> intel_runtime_pm is the only thing they use from the i915 structure,
> so use that directly.
> 
> Signed-off-by: Daniele Ceraolo Spurio 
> ---
>  drivers/gpu/drm/i915/gt/intel_engine_pm.c |  4 +--
>  drivers/gpu/drm/i915/gt/intel_gt_pm.c |  4 +--
>  drivers/gpu/drm/i915/i915_gem.c   |  2 +-
>  drivers/gpu/drm/i915/intel_wakeref.c  | 32 +++
>  drivers/gpu/drm/i915/intel_wakeref.h  | 18 ++---
>  5 files changed, 30 insertions(+), 30 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c 
> b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> index ccf034764741..903bee3d6c6d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> @@ -37,7 +37,7 @@ static int __engine_unpark(struct intel_wakeref *wf)
>  
>  void intel_engine_pm_get(struct intel_engine_cs *engine)
>  {
> -   intel_wakeref_get(engine->i915, &engine->wakeref, __engine_unpark);
> +   intel_wakeref_get(&engine->i915->runtime_pm, &engine->wakeref, 
> __engine_unpark);
>  }
>  
>  void intel_engine_park(struct intel_engine_cs *engine)
> @@ -131,7 +131,7 @@ static int __engine_park(struct intel_wakeref *wf)
>  
>  void intel_engine_pm_put(struct intel_engine_cs *engine)
>  {
> -   intel_wakeref_put(engine->i915, &engine->wakeref, __engine_park);
> +   intel_wakeref_put(&engine->i915->runtime_pm, &engine->wakeref, 
> __engine_park);
>  }
>  
>  void intel_engine_init__pm(struct intel_engine_cs *engine)
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c 
> b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> index ae7155f0e063..7b5967751762 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> @@ -52,7 +52,7 @@ static int intel_gt_unpark(struct intel_wakeref *wf)
>  
>  void intel_gt_pm_get(struct drm_i915_private *i915)
>  {
> -   intel_wakeref_get(i915, &i915->gt.wakeref, intel_gt_unpark);
> +   intel_wakeref_get(&i915->runtime_pm, &i915->gt.wakeref, 
> intel_gt_unpark);
>  }
>  
>  static int intel_gt_park(struct intel_wakeref *wf)
> @@ -77,7 +77,7 @@ static int intel_gt_park(struct intel_wakeref *wf)
>  
>  void intel_gt_pm_put(struct drm_i915_private *i915)
>  {
> -   intel_wakeref_put(i915, &i915->gt.wakeref, intel_gt_park);
> +   intel_wakeref_put(&i915->runtime_pm, &i915->gt.wakeref, 
> intel_gt_park);
>  }
>  
>  void intel_gt_pm_init(struct drm_i915_private *i915)
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 598faca4899e..8f5510af2ca4 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1776,7 +1776,7 @@ static void i915_gem_init__mm(struct drm_i915_private 
> *i915)
> INIT_LIST_HEAD(&i915->mm.fence_list);
>  
> INIT_LIST_HEAD(&i915->mm.userfault_list);
> -   intel_wakeref_auto_init(&i915->mm.userfault_wakeref, i915);
> +   intel_wakeref_auto_init(&i915->mm.userfault_wakeref, 
> &i915->runtime_pm);
>  
> i915_gem_init__objects(i915);
>  }
> diff --git a/drivers/gpu/drm/i915/intel_wakeref.c 
> b/drivers/gpu/drm/i915/intel_wakeref.c
> index b677ae893d6f..3db6fa682823 100644
> --- a/drivers/gpu/drm/i915/intel_wakeref.c
> +++ b/drivers/gpu/drm/i915/intel_wakeref.c
> @@ -4,23 +4,23 @@
>   * Copyright © 2019 Intel Corporation
>   */
>  
> -#include "intel_drv.h"
> -#include "intel_wakeref.h"
> +#include "intel_runtime_pm.h"
> +#include "i915_gem.h"

Mutters GEM_BUG_ON. We need compartmentalisation and specialisation of
our DEBUG utils.
-Chris
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Re: [Intel-gfx] [PATCH v2 4/8] drm/i915: move and rename i915_runtime_pm

2019-06-12 Thread Daniele Ceraolo Spurio



On 6/12/19 3:14 PM, Chris Wilson wrote:

Quoting Daniele Ceraolo Spurio (2019-06-12 19:37:43)

Asserts aside, all the code working on this structure is in
intel_runtime_pm.c and uses the intel_ prefix, so move the
structure to intel_runtime_pm.h and adopt the same prefix.

Since all the asserts are now working on the runtime_pm structure,
bring them across as well.


Wasn't patch 1 also a rename? Or am I being senile?
-Chris



Patch one replaced i915 with rpm in a bunch of places in the runtime_pm 
file, so more of a struct swap than a rename. This is the renaming patch ;)


Daniele
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Re: [Intel-gfx] [PATCH v2 4/8] drm/i915: move and rename i915_runtime_pm

2019-06-12 Thread Chris Wilson
Quoting Daniele Ceraolo Spurio (2019-06-12 19:37:43)
> Asserts aside, all the code working on this structure is in
> intel_runtime_pm.c and uses the intel_ prefix, so move the
> structure to intel_runtime_pm.h and adopt the same prefix.
> 
> Since all the asserts are now working on the runtime_pm structure,
> bring them across as well.

Wasn't patch 1 also a rename? Or am I being senile?
-Chris
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Re: [Intel-gfx] [PATCH v2 1/8] drm/i915: prefer i915_runtime_pm in intel_runtime function

2019-06-12 Thread Chris Wilson
Quoting Daniele Ceraolo Spurio (2019-06-12 19:37:40)
> As a first step towards updating the code to work on the runtime_pm
> structure instead of i915, rework all the internals to use and pass
> around that.
> 
> v2: add comment for kdev (Jani), move rpm init after pdev init for
> mock_device
> 
> Signed-off-by: Daniele Ceraolo Spurio 
> Cc: Jani Nikula 
> ---
>  drivers/gpu/drm/i915/i915_drv.h   |   2 +
>  drivers/gpu/drm/i915/intel_drv.h  |  10 +-
>  drivers/gpu/drm/i915/intel_runtime_pm.c   | 122 --
>  .../gpu/drm/i915/selftests/mock_gem_device.c  |   4 +-
>  4 files changed, 68 insertions(+), 70 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 0ea7f78ae227..3e7186362bb0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1073,6 +1073,8 @@ struct skl_wm_params {
>   */
>  struct i915_runtime_pm {
> atomic_t wakeref_count;
> +   struct device *kdev; /* points to i915->drm.pdev->dev */
> +   bool available;
> bool suspended;
> bool irqs_enabled;
>  
> diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> b/drivers/gpu/drm/i915/intel_drv.h
> index 3e337317f77e..aec40adf4876 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1656,13 +1656,17 @@ assert_rpm_wakelock_held(struct i915_runtime_pm 
> *rpm, int wakeref_count)
>  }
>  
>  static inline void
> -assert_rpm_raw_wakeref_held(struct drm_i915_private *i915)
> +__assert_rpm_raw_wakeref_held(struct i915_runtime_pm *rpm)

Our naming scheme would make this intel_runtime_pm as it is more HW
facing than user. Plus, Jani will point out it's intel_runtime_pm.c
-Chris
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[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/9] drm/i915/gtt: No need to zero the table for page dirs

2019-06-12 Thread Patchwork
== Series Details ==

Series: series starting with [1/9] drm/i915/gtt: No need to zero the table for 
page dirs
URL   : https://patchwork.freedesktop.org/series/61914/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6240_full -> Patchwork_13246_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_13246_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_13246_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_13246_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_ctx_shared@exec-shared-gtt-blt:
- shard-apl:  [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6240/shard-apl7/igt@gem_ctx_sha...@exec-shared-gtt-blt.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/shard-apl5/igt@gem_ctx_sha...@exec-shared-gtt-blt.html

  
Known issues


  Here are the changes found in Patchwork_13246_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_tiled_swapping@non-threaded:
- shard-iclb: [PASS][3] -> [FAIL][4] ([fdo#108686])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6240/shard-iclb6/igt@gem_tiled_swapp...@non-threaded.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/shard-iclb4/igt@gem_tiled_swapp...@non-threaded.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl:  [PASS][5] -> [DMESG-WARN][6] ([fdo#108566])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6240/shard-kbl4/igt@kms_cursor_...@pipe-a-cursor-suspend.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/shard-kbl3/igt@kms_cursor_...@pipe-a-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-c-cursor-128x42-onscreen:
- shard-skl:  [PASS][7] -> [FAIL][8] ([fdo#103232])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6240/shard-skl8/igt@kms_cursor_...@pipe-c-cursor-128x42-onscreen.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/shard-skl7/igt@kms_cursor_...@pipe-c-cursor-128x42-onscreen.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
- shard-hsw:  [PASS][9] -> [FAIL][10] ([fdo#105767])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6240/shard-hsw2/igt@kms_cursor_leg...@2x-long-cursor-vs-flip-atomic.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/shard-hsw4/igt@kms_cursor_leg...@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_flip@dpms-vs-vblank-race-interruptible:
- shard-kbl:  [PASS][11] -> [FAIL][12] ([fdo#103060])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6240/shard-kbl2/igt@kms_f...@dpms-vs-vblank-race-interruptible.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/shard-kbl1/igt@kms_f...@dpms-vs-vblank-race-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank:
- shard-skl:  [PASS][13] -> [FAIL][14] ([fdo#105363])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6240/shard-skl1/igt@kms_f...@flip-vs-expired-vblank.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/shard-skl5/igt@kms_f...@flip-vs-expired-vblank.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
- shard-iclb: [PASS][15] -> [FAIL][16] ([fdo#103167]) +1 similar 
issue
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6240/shard-iclb3/igt@kms_frontbuffer_track...@fbcpsr-1p-pri-indfb-multidraw.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/shard-iclb1/igt@kms_frontbuffer_track...@fbcpsr-1p-pri-indfb-multidraw.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl:  [PASS][17] -> [FAIL][18] ([fdo#108145])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6240/shard-skl5/igt@kms_plane_alpha_bl...@pipe-a-coverage-7efc.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/shard-skl10/igt@kms_plane_alpha_bl...@pipe-a-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl:  [PASS][19] -> [FAIL][20] ([fdo#108145] / [fdo#110403])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6240/shard-skl8/igt@kms_plane_alpha_bl...@pipe-c-coverage-7efc.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/shard-skl7/igt@kms_plane_alpha_bl...@pipe-c-coverage-7efc.html

  * igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: [PASS][21] -> [SKIP][22] ([fdo#109441])
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6240/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html
   [22]: 
https://intel-gfx-ci.01.

Re: [Intel-gfx] [PATCH 1/5] drm/panel: Add helper for reading DT rotation

2019-06-12 Thread Sam Ravnborg
Hi Derek.

On Mon, Jun 10, 2019 at 09:03:46PM -0700, Derek Basehore wrote:
> This adds a helper function for reading the rotation (panel
> orientation) from the device tree.
> 
> Signed-off-by: Derek Basehore 
> ---
>  drivers/gpu/drm/drm_panel.c | 41 +
>  include/drm/drm_panel.h |  7 +++
>  2 files changed, 48 insertions(+)
> 
> diff --git a/drivers/gpu/drm/drm_panel.c b/drivers/gpu/drm/drm_panel.c
> index dbd5b873e8f2..3b689ce4a51a 100644
> --- a/drivers/gpu/drm/drm_panel.c
> +++ b/drivers/gpu/drm/drm_panel.c
> @@ -172,6 +172,47 @@ struct drm_panel *of_drm_find_panel(const struct 
> device_node *np)
>   return ERR_PTR(-EPROBE_DEFER);
>  }
>  EXPORT_SYMBOL(of_drm_find_panel);
> +
> +/**
> + * of_drm_get_panel_orientation - look up the rotation of the panel using a
> + * device tree node
> + * @np: device tree node of the panel
> + * @orientation: orientation enum to be filled in
> + *
> + * Looks up the rotation of a panel in the device tree. The rotation in the
> + * device tree is counter clockwise.
> + *
> + * Return: 0 when a valid rotation value (0, 90, 180, or 270) is read or the
> + * rotation property doesn't exist. -EERROR otherwise.
> + */
> +int of_drm_get_panel_orientation(const struct device_node *np, int 
> *orientation)
> +{
> + int rotation, ret;
> +
> + ret = of_property_read_u32(np, "rotation", &rotation);

I just noticed that everywhere this code talks about orientation,
but the property that it reads are rotation.
To my best understanding these are not the same.

Sam
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Re: [Intel-gfx] [PATCH 1/5] drm/panel: Add helper for reading DT rotation

2019-06-12 Thread Sam Ravnborg
Hi Derek.

On Mon, Jun 10, 2019 at 09:03:46PM -0700, Derek Basehore wrote:
> This adds a helper function for reading the rotation (panel
> orientation) from the device tree.
> 
> Signed-off-by: Derek Basehore 
> ---
>  drivers/gpu/drm/drm_panel.c | 41 +
>  include/drm/drm_panel.h |  7 +++
>  2 files changed, 48 insertions(+)
> 
> diff --git a/drivers/gpu/drm/drm_panel.c b/drivers/gpu/drm/drm_panel.c
> index dbd5b873e8f2..3b689ce4a51a 100644
> --- a/drivers/gpu/drm/drm_panel.c
> +++ b/drivers/gpu/drm/drm_panel.c
> @@ -172,6 +172,47 @@ struct drm_panel *of_drm_find_panel(const struct 
> device_node *np)
>   return ERR_PTR(-EPROBE_DEFER);
>  }
>  EXPORT_SYMBOL(of_drm_find_panel);
> +
> +/**
> + * of_drm_get_panel_orientation - look up the rotation of the panel using a
> + * device tree node
> + * @np: device tree node of the panel
> + * @orientation: orientation enum to be filled in
The comment says "enum" but the type used is an int.
Why not use enum drm_panel_orientation?

> + *
> + * Looks up the rotation of a panel in the device tree. The rotation in the
> + * device tree is counter clockwise.
> + *
> + * Return: 0 when a valid rotation value (0, 90, 180, or 270) is read or the
> + * rotation property doesn't exist. -EERROR otherwise.
> + */
Initially I read -EEROOR as a specific error code.
But I gues the semantic is to say that a negative error code is returned
if something was wrong.
As we do not use the "-EERROR" syntax anywhere else in drm, please
reword like we do in other places.


Also - it is worth to mention that the rotation returned is
DRM_MODE_PANEL_ORIENTATION_UNKNOWN if the property is not specified.
I wonder if this is correct, as no property could also been
interpretated as DRM_MODE_PANEL_ORIENTATION_NORMAL.
And in most cases the roation property is optional, so one could
assume that no property equals 0 degree.


Sam

> +int of_drm_get_panel_orientation(const struct device_node *np, int 
> *orientation)
> +{
> + int rotation, ret;
> +
> + ret = of_property_read_u32(np, "rotation", &rotation);
> + if (ret == -EINVAL) {
> + /* Don't return an error if there's no rotation property. */
> + *orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
> + return 0;
> + }
> +
> + if (ret < 0)
> + return ret;
> +
> + if (rotation == 0)
> + *orientation = DRM_MODE_PANEL_ORIENTATION_NORMAL;
> + else if (rotation == 90)
> + *orientation = DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
> + else if (rotation == 180)
> + *orientation = DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
> + else if (rotation == 270)
> + *orientation = DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
> + else
> + return -EINVAL;
> +
> + return 0;
> +}
> +EXPORT_SYMBOL(of_drm_get_panel_orientation);
>  #endif
>  
>  MODULE_AUTHOR("Thierry Reding ");
> diff --git a/include/drm/drm_panel.h b/include/drm/drm_panel.h
> index 8c738c0e6e9f..13631b2efbaa 100644
> --- a/include/drm/drm_panel.h
> +++ b/include/drm/drm_panel.h
> @@ -197,11 +197,18 @@ int drm_panel_detach(struct drm_panel *panel);
>  
>  #if defined(CONFIG_OF) && defined(CONFIG_DRM_PANEL)
>  struct drm_panel *of_drm_find_panel(const struct device_node *np);
> +int of_drm_get_panel_orientation(const struct device_node *np,
> +  int *orientation);
>  #else
>  static inline struct drm_panel *of_drm_find_panel(const struct device_node 
> *np)
>  {
>   return ERR_PTR(-ENODEV);
>  }
> +int of_drm_get_panel_orientation(const struct device_node *np,
> +  int *orientation)
> +{
> + return -ENODEV;
> +}
>  #endif
>  
>  #endif
> -- 
> 2.22.0.rc2.383.gf4fbbf30c2-goog
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Re: [Intel-gfx] [PATCH v2 1/4] drm/i915/icl: Assign Master slave crtc links for Transcoder Port Sync

2019-06-12 Thread Manasi Navare
On Wed, Jun 12, 2019 at 10:30:55PM +0300, Ville Syrjälä wrote:
> On Wed, Jun 12, 2019 at 12:11:02PM -0700, Manasi Navare wrote:
> > On Wed, Jun 12, 2019 at 10:04:26PM +0300, Ville Syrjälä wrote:
> > > On Wed, Jun 12, 2019 at 11:39:03AM +0200, Maarten Lankhorst wrote:
> > > > Op 23-04-2019 om 17:48 schreef Manasi Navare:
> > > > > In case of tiled displays when the two tiles are sent across two CRTCs
> > > > > over two separate DP SST connectors, we need a mechanism to 
> > > > > synchronize
> > > > > the two CRTCs and their corresponding transcoders.
> > > > > So use the master-slave mode where there is one master corresponding
> > > > > to last horizontal and vertical tile that needs to be genlocked with
> > > > > all other slave tiles.
> > > > > This patch identifies saves the master CRTC pointer in all the slave
> > > > > CRTC states. This pointer is needed to select the master 
> > > > > CRTC/transcoder
> > > > > while configuring transcoder port sync for the corresponding slaves.
> > > > >
> > > > > v2:
> > > > > * Move this to intel_mode_set_pipe_config(Jani N, Ville)
> > > > > * Use slave_bitmask to save associated slaves in master crtc state 
> > > > > (Ville)
> > > > >
> > > > > Cc: Daniel Vetter 
> > > > > Cc: Ville Syrjälä 
> > > > > Cc: Maarten Lankhorst 
> > > > > Cc: Matt Roper 
> > > > > Signed-off-by: Manasi Navare 
> > > > > ---
> > > > >  drivers/gpu/drm/i915/intel_display.c | 89 
> > > > > 
> > > > >  drivers/gpu/drm/i915/intel_drv.h |  6 ++
> > > > >  2 files changed, 95 insertions(+)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/i915/intel_display.c 
> > > > > b/drivers/gpu/drm/i915/intel_display.c
> > > > > index b276345779e6..92dea2231499 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > > > @@ -11316,6 +11316,86 @@ static int icl_check_nv12_planes(struct 
> > > > > intel_crtc_state *crtc_state)
> > > > >   return 0;
> > > > >  }
> > > > >  
> > > > > +static int icl_add_genlock_crtcs(struct drm_crtc *crtc,
> > > > > +  struct intel_crtc_state *crtc_state,
> > > > > +  struct drm_atomic_state *state)
> > > > > +{
> > > > > + struct drm_i915_private *dev_priv = 
> > > > > to_i915(crtc_state->base.crtc->dev);
> > > > > + struct drm_connector *master_connector, *connector;
> > > > > + struct drm_connector_state *connector_state;
> > > > > + struct drm_connector_list_iter conn_iter;
> > > > > + struct drm_crtc *master_crtc = NULL;
> > > > > + struct drm_crtc_state *master_crtc_state;
> > > > > + int i, tile_group_id;
> > > > > +
> > > > > + if (INTEL_GEN(dev_priv) < 11)
> > > > > + return 0;
> > > > > +
> > > > > + /*
> > > > > +  * In case of tiled displays there could be one or more slaves 
> > > > > but there is
> > > > > +  * only one master. Lets make the CRTC used by the connector 
> > > > > corresponding
> > > > > +  * to the last horizonal and last vertical tile a 
> > > > > master/genlock CRTC.
> > > > > +  * All the other CRTCs corresponding to other tiles of the same 
> > > > > Tile group
> > > > > +  * are the slave CRTCs and hold a pointer to their genlock CRTC.
> > > > > +  */
> > > > > + for_each_new_connector_in_state(state, connector, 
> > > > > connector_state, i) {
> > > > > + if (connector_state->crtc != crtc)
> > > > > + continue;
> > > > > + if (!connector->has_tile)
> > > > > + continue;
> > > > > + if (connector->tile_h_loc == connector->num_h_tile - 1 
> > > > > &&
> > > > > + connector->tile_v_loc == connector->num_v_tile - 1)
> > > > > + continue;
> > > > > + crtc_state->master_crtc = NULL;
> > > > > + tile_group_id = connector->tile_group->id;
> > > > > + drm_connector_list_iter_begin(&dev_priv->drm, 
> > > > > &conn_iter);
> > > > > + drm_for_each_connector_iter(master_connector, 
> > > > > &conn_iter) {
> > > > > + struct drm_connector_state *master_conn_state = 
> > > > > NULL;
> > > > > +
> > > > > + if (!master_connector->has_tile)
> > > > > + continue;
> > > > > + if (master_connector->tile_h_loc != 
> > > > > master_connector->num_h_tile - 1 ||
> > > > > + master_connector->tile_v_loc != 
> > > > > master_connector->num_v_tile - 1)
> > > > > + continue;
> > > > > + if (master_connector->tile_group->id != 
> > > > > tile_group_id)
> > > > > + continue;
> > > > > +
> > > > > + master_conn_state = 
> > > > > drm_atomic_get_connector_state(state,
> > > > > + 
> > > > >master_connector);
> >

Re: [Intel-gfx] [PATCH v3] drm/i915: Add Wa_1409120013:icl,ehl

2019-06-12 Thread Clinton Taylor

Looks good now.

Reviewed-by: Clint Taylor 


-Clint


On 6/12/19 11:36 AM, Matt Roper wrote:

This chicken bit should be set before enabling FBC to avoid screen
corruption when the plane size has odd vertical and horizontal
dimensions.  It is safe to leave the bit set even when FBC is disabled.

v2:
  - The bspec's name for this bit on these platforms ("Spare 14") is
pretty meaningless.  Let's rename the bit definition to something
that more accurately reflects what the bit really does.  (Clint)

v3:
  - The chicken register was already defined (along with a few other
gen9-specific bits) farther down.  Just add the new bit definition
there.  (Clint)

Cc: Clinton Taylor 
Signed-off-by: Matt Roper 
---
  drivers/gpu/drm/i915/i915_reg.h  | 1 +
  drivers/gpu/drm/i915/intel_fbc.c | 4 
  2 files changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index edf9f93934a1..368ee717580c 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3163,6 +3163,7 @@ enum i915_power_well_id {
  #define ILK_DPFC_FENCE_YOFF   _MMIO(0x43218)
  #define ILK_DPFC_CHICKEN  _MMIO(0x43224)
  #define   ILK_DPFC_DISABLE_DUMMY0 (1 << 8)
+#define   ILK_DPFC_CHICKEN_COMP_DUMMY_PIXEL(1 << 14)
  #define   ILK_DPFC_NUKE_ON_ANY_MODIFICATION   (1 << 23)
  #define ILK_FBC_RT_BASE   _MMIO(0x2128)
  #define   ILK_FBC_RT_VALID(1 << 0)
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 5679f2fffb7c..d36cada2cc7d 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -344,6 +344,10 @@ static void gen7_fbc_activate(struct drm_i915_private 
*dev_priv)
   HSW_FBCQ_DIS);
}
  
+	if (IS_GEN(dev_priv, 11))

+   /* Wa_1409120013:icl,ehl */
+   I915_WRITE(ILK_DPFC_CHICKEN, ILK_DPFC_CHICKEN_COMP_DUMMY_PIXEL);
+
I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
  
  	intel_fbc_recompress(dev_priv);

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Re: [Intel-gfx] [PATCH v2 1/4] drm/i915/icl: Assign Master slave crtc links for Transcoder Port Sync

2019-06-12 Thread Ville Syrjälä
On Wed, Jun 12, 2019 at 12:11:02PM -0700, Manasi Navare wrote:
> On Wed, Jun 12, 2019 at 10:04:26PM +0300, Ville Syrjälä wrote:
> > On Wed, Jun 12, 2019 at 11:39:03AM +0200, Maarten Lankhorst wrote:
> > > Op 23-04-2019 om 17:48 schreef Manasi Navare:
> > > > In case of tiled displays when the two tiles are sent across two CRTCs
> > > > over two separate DP SST connectors, we need a mechanism to synchronize
> > > > the two CRTCs and their corresponding transcoders.
> > > > So use the master-slave mode where there is one master corresponding
> > > > to last horizontal and vertical tile that needs to be genlocked with
> > > > all other slave tiles.
> > > > This patch identifies saves the master CRTC pointer in all the slave
> > > > CRTC states. This pointer is needed to select the master CRTC/transcoder
> > > > while configuring transcoder port sync for the corresponding slaves.
> > > >
> > > > v2:
> > > > * Move this to intel_mode_set_pipe_config(Jani N, Ville)
> > > > * Use slave_bitmask to save associated slaves in master crtc state 
> > > > (Ville)
> > > >
> > > > Cc: Daniel Vetter 
> > > > Cc: Ville Syrjälä 
> > > > Cc: Maarten Lankhorst 
> > > > Cc: Matt Roper 
> > > > Signed-off-by: Manasi Navare 
> > > > ---
> > > >  drivers/gpu/drm/i915/intel_display.c | 89 
> > > >  drivers/gpu/drm/i915/intel_drv.h |  6 ++
> > > >  2 files changed, 95 insertions(+)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/intel_display.c 
> > > > b/drivers/gpu/drm/i915/intel_display.c
> > > > index b276345779e6..92dea2231499 100644
> > > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > > @@ -11316,6 +11316,86 @@ static int icl_check_nv12_planes(struct 
> > > > intel_crtc_state *crtc_state)
> > > > return 0;
> > > >  }
> > > >  
> > > > +static int icl_add_genlock_crtcs(struct drm_crtc *crtc,
> > > > +struct intel_crtc_state *crtc_state,
> > > > +struct drm_atomic_state *state)
> > > > +{
> > > > +   struct drm_i915_private *dev_priv = 
> > > > to_i915(crtc_state->base.crtc->dev);
> > > > +   struct drm_connector *master_connector, *connector;
> > > > +   struct drm_connector_state *connector_state;
> > > > +   struct drm_connector_list_iter conn_iter;
> > > > +   struct drm_crtc *master_crtc = NULL;
> > > > +   struct drm_crtc_state *master_crtc_state;
> > > > +   int i, tile_group_id;
> > > > +
> > > > +   if (INTEL_GEN(dev_priv) < 11)
> > > > +   return 0;
> > > > +
> > > > +   /*
> > > > +* In case of tiled displays there could be one or more slaves 
> > > > but there is
> > > > +* only one master. Lets make the CRTC used by the connector 
> > > > corresponding
> > > > +* to the last horizonal and last vertical tile a 
> > > > master/genlock CRTC.
> > > > +* All the other CRTCs corresponding to other tiles of the same 
> > > > Tile group
> > > > +* are the slave CRTCs and hold a pointer to their genlock CRTC.
> > > > +*/
> > > > +   for_each_new_connector_in_state(state, connector, 
> > > > connector_state, i) {
> > > > +   if (connector_state->crtc != crtc)
> > > > +   continue;
> > > > +   if (!connector->has_tile)
> > > > +   continue;
> > > > +   if (connector->tile_h_loc == connector->num_h_tile - 1 
> > > > &&
> > > > +   connector->tile_v_loc == connector->num_v_tile - 1)
> > > > +   continue;
> > > > +   crtc_state->master_crtc = NULL;
> > > > +   tile_group_id = connector->tile_group->id;
> > > > +   drm_connector_list_iter_begin(&dev_priv->drm, 
> > > > &conn_iter);
> > > > +   drm_for_each_connector_iter(master_connector, 
> > > > &conn_iter) {
> > > > +   struct drm_connector_state *master_conn_state = 
> > > > NULL;
> > > > +
> > > > +   if (!master_connector->has_tile)
> > > > +   continue;
> > > > +   if (master_connector->tile_h_loc != 
> > > > master_connector->num_h_tile - 1 ||
> > > > +   master_connector->tile_v_loc != 
> > > > master_connector->num_v_tile - 1)
> > > > +   continue;
> > > > +   if (master_connector->tile_group->id != 
> > > > tile_group_id)
> > > > +   continue;
> > > > +
> > > > +   master_conn_state = 
> > > > drm_atomic_get_connector_state(state,
> > > > +   
> > > >master_connector);
> > > > +   if (IS_ERR(master_conn_state)) {
> > > > +   drm_connector_list_iter_end(&conn_iter);
> > > > +   return PTR_ERR(master_conn_stat

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add Wa_1409120013:icl,ehl (rev3)

2019-06-12 Thread Patchwork
== Series Details ==

Series: drm/i915: Add Wa_1409120013:icl,ehl (rev3)
URL   : https://patchwork.freedesktop.org/series/61867/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6253 -> Patchwork_13258


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13258/

Known issues


  Here are the changes found in Patchwork_13258 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_module_load@reload:
- fi-blb-e6850:   [PASS][1] -> [INCOMPLETE][2] ([fdo#107718])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-blb-e6850/igt@i915_module_l...@reload.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13258/fi-blb-e6850/igt@i915_module_l...@reload.html

  * igt@i915_module_load@reload-no-display:
- fi-icl-u3:  [PASS][3] -> [DMESG-WARN][4] ([fdo#107724]) +2 
similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-u3/igt@i915_module_l...@reload-no-display.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13258/fi-icl-u3/igt@i915_module_l...@reload-no-display.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u:   [PASS][5] -> [FAIL][6] ([fdo#109485])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13258/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html

  
 Possible fixes 

  * igt@gem_busy@busy-all:
- fi-icl-guc: [INCOMPLETE][7] ([fdo#107713]) -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-guc/igt@gem_b...@busy-all.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13258/fi-icl-guc/igt@gem_b...@busy-all.html

  * igt@gem_ctx_create@basic-files:
- fi-icl-u2:  [INCOMPLETE][9] ([fdo#107713] / [fdo#109100]) -> 
[PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-u2/igt@gem_ctx_cre...@basic-files.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13258/fi-icl-u2/igt@gem_ctx_cre...@basic-files.html

  
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
  [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485


Participating hosts (53 -> 47)
--

  Additional (1): fi-icl-dsi 
  Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-byt-clapper fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_6253 -> Patchwork_13258

  CI_DRM_6253: 83fdc69645c5c6b511e36e171f1c75a6132f007c @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5054: 7a295df596fdf71e5c28ecb1fbfec002060e9293 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13258: bd27e788ff82814027cc47d6e99885b6a34cce0f @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

bd27e788ff82 drm/i915: Add Wa_1409120013:icl,ehl

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13258/
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[Intel-gfx] ✗ Fi.CI.BAT: failure for RPM Encapsulation

2019-06-12 Thread Patchwork
== Series Details ==

Series: RPM Encapsulation
URL   : https://patchwork.freedesktop.org/series/61976/
State : failure

== Summary ==

Applying: drm/i915: prefer i915_runtime_pm in intel_runtime function
Applying: drm/i915: Remove rpm asserts that use i915
Applying: drm/i915: make enable/disable rpm assert function use the rpm 
structure
Applying: drm/i915: move and rename i915_runtime_pm
Applying: drm/i915: move a few more functions to accept the rpm structure
Applying: drm/i915: update rpm_get/put to use the rpm structure
error: sha1 information is lacking or useless 
(drivers/gpu/drm/i915/i915_debugfs.c).
error: could not build fake ancestor
hint: Use 'git am --show-current-patch' to see the failed patch
Patch failed at 0006 drm/i915: update rpm_get/put to use the rpm structure
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

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Re: [Intel-gfx] [PATCH v2 1/4] drm/i915/icl: Assign Master slave crtc links for Transcoder Port Sync

2019-06-12 Thread Manasi Navare
On Wed, Jun 12, 2019 at 10:04:26PM +0300, Ville Syrjälä wrote:
> On Wed, Jun 12, 2019 at 11:39:03AM +0200, Maarten Lankhorst wrote:
> > Op 23-04-2019 om 17:48 schreef Manasi Navare:
> > > In case of tiled displays when the two tiles are sent across two CRTCs
> > > over two separate DP SST connectors, we need a mechanism to synchronize
> > > the two CRTCs and their corresponding transcoders.
> > > So use the master-slave mode where there is one master corresponding
> > > to last horizontal and vertical tile that needs to be genlocked with
> > > all other slave tiles.
> > > This patch identifies saves the master CRTC pointer in all the slave
> > > CRTC states. This pointer is needed to select the master CRTC/transcoder
> > > while configuring transcoder port sync for the corresponding slaves.
> > >
> > > v2:
> > > * Move this to intel_mode_set_pipe_config(Jani N, Ville)
> > > * Use slave_bitmask to save associated slaves in master crtc state (Ville)
> > >
> > > Cc: Daniel Vetter 
> > > Cc: Ville Syrjälä 
> > > Cc: Maarten Lankhorst 
> > > Cc: Matt Roper 
> > > Signed-off-by: Manasi Navare 
> > > ---
> > >  drivers/gpu/drm/i915/intel_display.c | 89 
> > >  drivers/gpu/drm/i915/intel_drv.h |  6 ++
> > >  2 files changed, 95 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_display.c 
> > > b/drivers/gpu/drm/i915/intel_display.c
> > > index b276345779e6..92dea2231499 100644
> > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > @@ -11316,6 +11316,86 @@ static int icl_check_nv12_planes(struct 
> > > intel_crtc_state *crtc_state)
> > >   return 0;
> > >  }
> > >  
> > > +static int icl_add_genlock_crtcs(struct drm_crtc *crtc,
> > > +  struct intel_crtc_state *crtc_state,
> > > +  struct drm_atomic_state *state)
> > > +{
> > > + struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
> > > + struct drm_connector *master_connector, *connector;
> > > + struct drm_connector_state *connector_state;
> > > + struct drm_connector_list_iter conn_iter;
> > > + struct drm_crtc *master_crtc = NULL;
> > > + struct drm_crtc_state *master_crtc_state;
> > > + int i, tile_group_id;
> > > +
> > > + if (INTEL_GEN(dev_priv) < 11)
> > > + return 0;
> > > +
> > > + /*
> > > +  * In case of tiled displays there could be one or more slaves but 
> > > there is
> > > +  * only one master. Lets make the CRTC used by the connector 
> > > corresponding
> > > +  * to the last horizonal and last vertical tile a master/genlock CRTC.
> > > +  * All the other CRTCs corresponding to other tiles of the same Tile 
> > > group
> > > +  * are the slave CRTCs and hold a pointer to their genlock CRTC.
> > > +  */
> > > + for_each_new_connector_in_state(state, connector, connector_state, i) {
> > > + if (connector_state->crtc != crtc)
> > > + continue;
> > > + if (!connector->has_tile)
> > > + continue;
> > > + if (connector->tile_h_loc == connector->num_h_tile - 1 &&
> > > + connector->tile_v_loc == connector->num_v_tile - 1)
> > > + continue;
> > > + crtc_state->master_crtc = NULL;
> > > + tile_group_id = connector->tile_group->id;
> > > + drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
> > > + drm_for_each_connector_iter(master_connector, &conn_iter) {
> > > + struct drm_connector_state *master_conn_state = NULL;
> > > +
> > > + if (!master_connector->has_tile)
> > > + continue;
> > > + if (master_connector->tile_h_loc != 
> > > master_connector->num_h_tile - 1 ||
> > > + master_connector->tile_v_loc != 
> > > master_connector->num_v_tile - 1)
> > > + continue;
> > > + if (master_connector->tile_group->id != tile_group_id)
> > > + continue;
> > > +
> > > + master_conn_state = 
> > > drm_atomic_get_connector_state(state,
> > > +
> > > master_connector);
> > > + if (IS_ERR(master_conn_state)) {
> > > + drm_connector_list_iter_end(&conn_iter);
> > > + return PTR_ERR(master_conn_state);
> > > + }
> > > + if (master_conn_state->crtc) {
> > > + master_crtc = master_conn_state->crtc;
> > > + break;
> > > + }
> > > + }
> > > + drm_connector_list_iter_end(&conn_iter);
> > > +
> > > + if (!master_crtc) {
> > > + DRM_DEBUG_KMS("Could not add Master CRTC for Slave CRTC 
> > > %d\n",
> > > +   connector_state->crtc->base.id);
> > > + return -EINVAL;
> > > + }
> > > +
> > > + master_

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/4] drm/i915: Don't clobber M/N values during fastset check (rev2)

2019-06-12 Thread Patchwork
== Series Details ==

Series: series starting with [v2,1/4] drm/i915: Don't clobber M/N values during 
fastset check (rev2)
URL   : https://patchwork.freedesktop.org/series/61960/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6253 -> Patchwork_13257


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13257/

Known issues


  Here are the changes found in Patchwork_13257 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_basic@bad-close:
- fi-icl-y:   [PASS][1] -> [INCOMPLETE][2] ([fdo#107713])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-y/igt@gem_ba...@bad-close.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13257/fi-icl-y/igt@gem_ba...@bad-close.html

  
 Possible fixes 

  * igt@gem_busy@busy-all:
- fi-icl-guc: [INCOMPLETE][3] ([fdo#107713]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-guc/igt@gem_b...@busy-all.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13257/fi-icl-guc/igt@gem_b...@busy-all.html

  * igt@gem_ctx_create@basic-files:
- fi-icl-u2:  [INCOMPLETE][5] ([fdo#107713] / [fdo#109100]) -> 
[PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-u2/igt@gem_ctx_cre...@basic-files.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13257/fi-icl-u2/igt@gem_ctx_cre...@basic-files.html

  
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100


Participating hosts (53 -> 47)
--

  Additional (1): fi-icl-dsi 
  Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-byt-clapper fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_6253 -> Patchwork_13257

  CI_DRM_6253: 83fdc69645c5c6b511e36e171f1c75a6132f007c @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5054: 7a295df596fdf71e5c28ecb1fbfec002060e9293 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13257: 0bdea677061d4717d0130af46e6afb28c0bdcbb6 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

0bdea677061d drm/i915: Drop the _INCOMPLETE for has_infoframe
b7b9d9ff1aa9 drm/i915: Make pipe_config_err() vs. fastset less confusing
51ce57812d1c drm/i915: Constify intel_pipe_config_compare()
f31b23cc1b1a drm/i915: Don't clobber M/N values during fastset check

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13257/
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Re: [Intel-gfx] [PATCH v2 1/4] drm/i915/icl: Assign Master slave crtc links for Transcoder Port Sync

2019-06-12 Thread Ville Syrjälä
On Wed, Jun 12, 2019 at 11:39:03AM +0200, Maarten Lankhorst wrote:
> Op 23-04-2019 om 17:48 schreef Manasi Navare:
> > In case of tiled displays when the two tiles are sent across two CRTCs
> > over two separate DP SST connectors, we need a mechanism to synchronize
> > the two CRTCs and their corresponding transcoders.
> > So use the master-slave mode where there is one master corresponding
> > to last horizontal and vertical tile that needs to be genlocked with
> > all other slave tiles.
> > This patch identifies saves the master CRTC pointer in all the slave
> > CRTC states. This pointer is needed to select the master CRTC/transcoder
> > while configuring transcoder port sync for the corresponding slaves.
> >
> > v2:
> > * Move this to intel_mode_set_pipe_config(Jani N, Ville)
> > * Use slave_bitmask to save associated slaves in master crtc state (Ville)
> >
> > Cc: Daniel Vetter 
> > Cc: Ville Syrjälä 
> > Cc: Maarten Lankhorst 
> > Cc: Matt Roper 
> > Signed-off-by: Manasi Navare 
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 89 
> >  drivers/gpu/drm/i915/intel_drv.h |  6 ++
> >  2 files changed, 95 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c 
> > b/drivers/gpu/drm/i915/intel_display.c
> > index b276345779e6..92dea2231499 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -11316,6 +11316,86 @@ static int icl_check_nv12_planes(struct 
> > intel_crtc_state *crtc_state)
> > return 0;
> >  }
> >  
> > +static int icl_add_genlock_crtcs(struct drm_crtc *crtc,
> > +struct intel_crtc_state *crtc_state,
> > +struct drm_atomic_state *state)
> > +{
> > +   struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
> > +   struct drm_connector *master_connector, *connector;
> > +   struct drm_connector_state *connector_state;
> > +   struct drm_connector_list_iter conn_iter;
> > +   struct drm_crtc *master_crtc = NULL;
> > +   struct drm_crtc_state *master_crtc_state;
> > +   int i, tile_group_id;
> > +
> > +   if (INTEL_GEN(dev_priv) < 11)
> > +   return 0;
> > +
> > +   /*
> > +* In case of tiled displays there could be one or more slaves but 
> > there is
> > +* only one master. Lets make the CRTC used by the connector 
> > corresponding
> > +* to the last horizonal and last vertical tile a master/genlock CRTC.
> > +* All the other CRTCs corresponding to other tiles of the same Tile 
> > group
> > +* are the slave CRTCs and hold a pointer to their genlock CRTC.
> > +*/
> > +   for_each_new_connector_in_state(state, connector, connector_state, i) {
> > +   if (connector_state->crtc != crtc)
> > +   continue;
> > +   if (!connector->has_tile)
> > +   continue;
> > +   if (connector->tile_h_loc == connector->num_h_tile - 1 &&
> > +   connector->tile_v_loc == connector->num_v_tile - 1)
> > +   continue;
> > +   crtc_state->master_crtc = NULL;
> > +   tile_group_id = connector->tile_group->id;
> > +   drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
> > +   drm_for_each_connector_iter(master_connector, &conn_iter) {
> > +   struct drm_connector_state *master_conn_state = NULL;
> > +
> > +   if (!master_connector->has_tile)
> > +   continue;
> > +   if (master_connector->tile_h_loc != 
> > master_connector->num_h_tile - 1 ||
> > +   master_connector->tile_v_loc != 
> > master_connector->num_v_tile - 1)
> > +   continue;
> > +   if (master_connector->tile_group->id != tile_group_id)
> > +   continue;
> > +
> > +   master_conn_state = 
> > drm_atomic_get_connector_state(state,
> > +  
> > master_connector);
> > +   if (IS_ERR(master_conn_state)) {
> > +   drm_connector_list_iter_end(&conn_iter);
> > +   return PTR_ERR(master_conn_state);
> > +   }
> > +   if (master_conn_state->crtc) {
> > +   master_crtc = master_conn_state->crtc;
> > +   break;
> > +   }
> > +   }
> > +   drm_connector_list_iter_end(&conn_iter);
> > +
> > +   if (!master_crtc) {
> > +   DRM_DEBUG_KMS("Could not add Master CRTC for Slave CRTC 
> > %d\n",
> > + connector_state->crtc->base.id);
> > +   return -EINVAL;
> > +   }
> > +
> > +   master_crtc_state = drm_atomic_get_crtc_state(state,
> > + master_crtc);
> > +   if (IS_ERR(master_crtc_stat

[Intel-gfx] [PATCH v2 3/8] drm/i915: make enable/disable rpm assert function use the rpm structure

2019-06-12 Thread Daniele Ceraolo Spurio
With this all the rpm assert-related functions consistently work on
the i915_runtime_pm structure

Signed-off-by: Daniele Ceraolo Spurio 
---
 drivers/gpu/drm/i915/i915_drv.c | 48 +++--
 drivers/gpu/drm/i915/i915_irq.c | 32 +--
 drivers/gpu/drm/i915/intel_drv.h| 12 
 drivers/gpu/drm/i915/intel_uncore.c | 12 
 4 files changed, 53 insertions(+), 51 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 1af6751e1b36..acd70f00c88b 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1890,7 +1890,7 @@ int i915_driver_load(struct pci_dev *pdev, const struct 
pci_device_id *ent)
if (ret < 0)
goto out_pci_disable;
 
-   disable_rpm_wakeref_asserts(dev_priv);
+   disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
ret = i915_driver_init_mmio(dev_priv);
if (ret < 0)
@@ -1906,7 +1906,7 @@ int i915_driver_load(struct pci_dev *pdev, const struct 
pci_device_id *ent)
 
i915_driver_register(dev_priv);
 
-   enable_rpm_wakeref_asserts(dev_priv);
+   enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
i915_welcome_messages(dev_priv);
 
@@ -1918,7 +1918,7 @@ int i915_driver_load(struct pci_dev *pdev, const struct 
pci_device_id *ent)
 out_cleanup_mmio:
i915_driver_cleanup_mmio(dev_priv);
 out_runtime_pm_put:
-   enable_rpm_wakeref_asserts(dev_priv);
+   enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
i915_driver_cleanup_early(dev_priv);
 out_pci_disable:
pci_disable_device(pdev);
@@ -1933,7 +1933,7 @@ void i915_driver_unload(struct drm_device *dev)
struct drm_i915_private *dev_priv = to_i915(dev);
struct pci_dev *pdev = dev_priv->drm.pdev;
 
-   disable_rpm_wakeref_asserts(dev_priv);
+   disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
i915_driver_unregister(dev_priv);
 
@@ -1972,21 +1972,21 @@ void i915_driver_unload(struct drm_device *dev)
 
i915_driver_cleanup_hw(dev_priv);
 
-   enable_rpm_wakeref_asserts(dev_priv);
+   enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 }
 
 static void i915_driver_release(struct drm_device *dev)
 {
struct drm_i915_private *dev_priv = to_i915(dev);
 
-   disable_rpm_wakeref_asserts(dev_priv);
+   disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
i915_gem_fini(dev_priv);
 
i915_ggtt_cleanup_hw(dev_priv);
i915_driver_cleanup_mmio(dev_priv);
 
-   enable_rpm_wakeref_asserts(dev_priv);
+   enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
intel_runtime_pm_cleanup(dev_priv);
 
i915_driver_cleanup_early(dev_priv);
@@ -2081,7 +2081,7 @@ static int i915_drm_suspend(struct drm_device *dev)
struct pci_dev *pdev = dev_priv->drm.pdev;
pci_power_t opregion_target_state;
 
-   disable_rpm_wakeref_asserts(dev_priv);
+   disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
/* We do a lot of poking in a lot of registers, make sure they work
 * properly. */
@@ -2115,7 +2115,7 @@ static int i915_drm_suspend(struct drm_device *dev)
 
intel_csr_ucode_suspend(dev_priv);
 
-   enable_rpm_wakeref_asserts(dev_priv);
+   enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
return 0;
 }
@@ -2138,7 +2138,7 @@ static int i915_drm_suspend_late(struct drm_device *dev, 
bool hibernation)
struct pci_dev *pdev = dev_priv->drm.pdev;
int ret;
 
-   disable_rpm_wakeref_asserts(dev_priv);
+   disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
i915_gem_suspend_late(dev_priv);
 
@@ -2179,7 +2179,7 @@ static int i915_drm_suspend_late(struct drm_device *dev, 
bool hibernation)
pci_set_power_state(pdev, PCI_D3hot);
 
 out:
-   enable_rpm_wakeref_asserts(dev_priv);
+   enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
if (!dev_priv->uncore.user_forcewake.count)
intel_runtime_pm_cleanup(dev_priv);
 
@@ -2215,7 +2215,7 @@ static int i915_drm_resume(struct drm_device *dev)
struct drm_i915_private *dev_priv = to_i915(dev);
int ret;
 
-   disable_rpm_wakeref_asserts(dev_priv);
+   disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
intel_sanitize_gt_powersave(dev_priv);
 
i915_gem_sanitize(dev_priv);
@@ -2275,7 +2275,7 @@ static int i915_drm_resume(struct drm_device *dev)
 
intel_power_domains_enable(dev_priv);
 
-   enable_rpm_wakeref_asserts(dev_priv);
+   enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
return 0;
 }
@@ -2330,7 +2330,7 @@ static int i915_drm_resume_early(struct drm_device *dev)
 
pci_set_master(pdev);
 
-   disable_rpm_wakeref_asserts(dev_priv);
+   disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
ret = vlv_resume_prepare(dev_priv, 

[Intel-gfx] [PATCH v2 6/8] drm/i915: update rpm_get/put to use the rpm structure

2019-06-12 Thread Daniele Ceraolo Spurio
The functions where internally already only using the structure, so we
need to just flip the interface.

v2: rebase

Signed-off-by: Daniele Ceraolo Spurio 
---
 drivers/gpu/drm/i915/gem/i915_gem_mman.c  | 11 +++--
 drivers/gpu/drm/i915/gem/i915_gem_object.c|  4 +-
 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c  |  4 +-
 .../gpu/drm/i915/gem/selftests/huge_pages.c   |  4 +-
 .../i915/gem/selftests/i915_gem_coherency.c   |  4 +-
 .../drm/i915/gem/selftests/i915_gem_context.c | 12 ++---
 .../drm/i915/gem/selftests/i915_gem_mman.c|  4 +-
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |  8 +--
 drivers/gpu/drm/i915/gt/intel_hangcheck.c |  4 +-
 drivers/gpu/drm/i915/gt/intel_reset.c |  4 +-
 drivers/gpu/drm/i915/gt/selftest_hangcheck.c  | 12 ++---
 drivers/gpu/drm/i915/gt/selftest_lrc.c| 36 +++---
 drivers/gpu/drm/i915/gt/selftest_reset.c  |  4 +-
 .../gpu/drm/i915/gt/selftest_workarounds.c| 12 ++---
 drivers/gpu/drm/i915/gvt/aperture_gm.c| 15 +++---
 drivers/gpu/drm/i915/gvt/gvt.h|  4 +-
 drivers/gpu/drm/i915/gvt/sched_policy.c   |  4 +-
 drivers/gpu/drm/i915/gvt/scheduler.c  |  4 +-
 drivers/gpu/drm/i915/i915_debugfs.c   | 49 ++-
 drivers/gpu/drm/i915/i915_gem.c   | 15 +++---
 drivers/gpu/drm/i915/i915_gem_fence_reg.c |  4 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c   |  6 +--
 drivers/gpu/drm/i915/i915_perf.c  |  6 +--
 drivers/gpu/drm/i915/i915_pmu.c   | 12 ++---
 drivers/gpu/drm/i915/i915_sysfs.c | 12 ++---
 drivers/gpu/drm/i915/intel_display.c  | 12 ++---
 drivers/gpu/drm/i915/intel_display_power.c| 37 +++---
 drivers/gpu/drm/i915/intel_fbdev.c|  6 +--
 drivers/gpu/drm/i915/intel_hotplug.c  |  4 +-
 drivers/gpu/drm/i915/intel_runtime_pm.c   | 43 +++-
 drivers/gpu/drm/i915/intel_runtime_pm.h   | 26 +-
 drivers/gpu/drm/i915/intel_wakeref.c  |  8 +--
 drivers/gpu/drm/i915/selftests/i915_active.c  |  8 +--
 drivers/gpu/drm/i915/selftests/i915_gem.c |  4 +-
 .../gpu/drm/i915/selftests/i915_gem_evict.c   |  4 +-
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |  8 +--
 drivers/gpu/drm/i915/selftests/i915_request.c | 20 
 .../gpu/drm/i915/selftests/i915_timeline.c| 16 +++---
 drivers/gpu/drm/i915/selftests/i915_vma.c |  4 +-
 drivers/gpu/drm/i915/selftests/intel_guc.c|  8 +--
 drivers/gpu/drm/i915/selftests/intel_uncore.c |  4 +-
 41 files changed, 234 insertions(+), 232 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index caa61f09f714..8df7900e3435 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -222,6 +222,7 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf)
struct drm_i915_gem_object *obj = to_intel_bo(area->vm_private_data);
struct drm_device *dev = obj->base.dev;
struct drm_i915_private *i915 = to_i915(dev);
+   struct intel_runtime_pm *rpm = &i915->runtime_pm;
struct i915_ggtt *ggtt = &i915->ggtt;
bool write = area->vm_flags & VM_WRITE;
intel_wakeref_t wakeref;
@@ -243,7 +244,7 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf)
if (ret)
goto err;
 
-   wakeref = intel_runtime_pm_get(i915);
+   wakeref = intel_runtime_pm_get(rpm);
 
srcu = i915_reset_trylock(i915);
if (srcu < 0) {
@@ -308,7 +309,7 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf)
goto err_fence;
 
/* Mark as being mmapped into userspace for later revocation */
-   assert_rpm_wakelock_held(&i915->runtime_pm);
+   assert_rpm_wakelock_held(rpm);
if (!i915_vma_set_userfault(vma) && !obj->userfault_count++)
list_add(&obj->userfault_link, &i915->mm.userfault_list);
if (CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
@@ -327,7 +328,7 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf)
 err_reset:
i915_reset_unlock(i915, srcu);
 err_rpm:
-   intel_runtime_pm_put(i915, wakeref);
+   intel_runtime_pm_put(rpm, wakeref);
i915_gem_object_unpin_pages(obj);
 err:
switch (ret) {
@@ -410,7 +411,7 @@ void i915_gem_object_release_mmap(struct 
drm_i915_gem_object *obj)
 * wakeref.
 */
lockdep_assert_held(&i915->drm.struct_mutex);
-   wakeref = intel_runtime_pm_get(i915);
+   wakeref = intel_runtime_pm_get(&i915->runtime_pm);
 
if (!obj->userfault_count)
goto out;
@@ -427,7 +428,7 @@ void i915_gem_object_release_mmap(struct 
drm_i915_gem_object *obj)
wmb();
 
 out:
-   intel_runtime_pm_put(i915, wakeref);
+   intel_runtime_pm_put(&i915->runtime_pm, wakeref);
 }
 
 static int create_mmap_offset(struct drm_i915_gem_object *obj)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c 
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 

[Intel-gfx] [PATCH v2 5/8] drm/i915: move a few more functions to accept the rpm structure

2019-06-12 Thread Daniele Ceraolo Spurio
Focusing on the functions called in few places.

Signed-off-by: Daniele Ceraolo Spurio 
---
 drivers/gpu/drm/i915/i915_debugfs.c   |  2 +-
 drivers/gpu/drm/i915/i915_drv.c   | 22 ++-
 drivers/gpu/drm/i915/intel_runtime_pm.c   | 19 +++-
 drivers/gpu/drm/i915/intel_runtime_pm.h   | 12 +-
 .../gpu/drm/i915/selftests/mock_gem_device.c  |  2 +-
 5 files changed, 28 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index b070e6f3780c..4601ad2d 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2628,7 +2628,7 @@ static int i915_runtime_pm_status(struct seq_file *m, 
void *unused)
if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)) {
struct drm_printer p = drm_seq_file_printer(m);
 
-   print_intel_runtime_pm_wakeref(dev_priv, &p);
+   print_intel_runtime_pm_wakeref(&dev_priv->runtime_pm, &p);
}
 
return 0;
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index fd57031dee47..42e099c2b259 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -909,7 +909,7 @@ static int i915_driver_init_early(struct drm_i915_private 
*dev_priv)
mutex_init(&dev_priv->hdcp_comp_mutex);
 
i915_memcpy_init_early(dev_priv);
-   intel_runtime_pm_init_early(dev_priv);
+   intel_runtime_pm_init_early(&dev_priv->runtime_pm);
 
ret = i915_workqueues_init(dev_priv);
if (ret < 0)
@@ -1752,7 +1752,7 @@ static void i915_driver_register(struct drm_i915_private 
*dev_priv)
drm_kms_helper_poll_init(dev);
 
intel_power_domains_enable(dev_priv);
-   intel_runtime_pm_enable(dev_priv);
+   intel_runtime_pm_enable(&dev_priv->runtime_pm);
 }
 
 /**
@@ -1761,7 +1761,7 @@ static void i915_driver_register(struct drm_i915_private 
*dev_priv)
  */
 static void i915_driver_unregister(struct drm_i915_private *dev_priv)
 {
-   intel_runtime_pm_disable(dev_priv);
+   intel_runtime_pm_disable(&dev_priv->runtime_pm);
intel_power_domains_disable(dev_priv);
 
intel_fbdev_unregister(dev_priv);
@@ -1978,16 +1978,17 @@ void i915_driver_unload(struct drm_device *dev)
 static void i915_driver_release(struct drm_device *dev)
 {
struct drm_i915_private *dev_priv = to_i915(dev);
+   struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
 
-   disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
+   disable_rpm_wakeref_asserts(rpm);
 
i915_gem_fini(dev_priv);
 
i915_ggtt_cleanup_hw(dev_priv);
i915_driver_cleanup_mmio(dev_priv);
 
-   enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
-   intel_runtime_pm_cleanup(dev_priv);
+   enable_rpm_wakeref_asserts(rpm);
+   intel_runtime_pm_cleanup(rpm);
 
i915_driver_cleanup_early(dev_priv);
i915_driver_destroy(dev_priv);
@@ -2136,9 +2137,10 @@ static int i915_drm_suspend_late(struct drm_device *dev, 
bool hibernation)
 {
struct drm_i915_private *dev_priv = to_i915(dev);
struct pci_dev *pdev = dev_priv->drm.pdev;
+   struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
int ret;
 
-   disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
+   disable_rpm_wakeref_asserts(rpm);
 
i915_gem_suspend_late(dev_priv);
 
@@ -2179,9 +2181,9 @@ static int i915_drm_suspend_late(struct drm_device *dev, 
bool hibernation)
pci_set_power_state(pdev, PCI_D3hot);
 
 out:
-   enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
+   enable_rpm_wakeref_asserts(rpm);
if (!dev_priv->uncore.user_forcewake.count)
-   intel_runtime_pm_cleanup(dev_priv);
+   intel_runtime_pm_cleanup(rpm);
 
return ret;
 }
@@ -2943,7 +2945,7 @@ static int intel_runtime_suspend(struct device *kdev)
}
 
enable_rpm_wakeref_asserts(rpm);
-   intel_runtime_pm_cleanup(dev_priv);
+   intel_runtime_pm_cleanup(rpm);
 
if (intel_uncore_arm_unclaimed_mmio_detection(&dev_priv->uncore))
DRM_ERROR("Unclaimed access detected prior to suspending\n");
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 07aaa3e06587..3d9ea3498679 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -262,13 +262,12 @@ untrack_all_intel_runtime_pm_wakerefs(struct 
intel_runtime_pm *rpm)
dump_and_free_wakeref_tracking(&dbg);
 }
 
-void print_intel_runtime_pm_wakeref(struct drm_i915_private *i915,
+void print_intel_runtime_pm_wakeref(struct intel_runtime_pm *rpm,
struct drm_printer *p)
 {
struct intel_runtime_pm_debug dbg = {};
 
do {
-   struct intel_runtime_pm *rpm = &i915->runtime_pm;
unsigned long alloc = dbg.count;

[Intel-gfx] [PATCH v2 7/8] drm/i915: update with_intel_runtime_pm to use the rpm structure

2019-06-12 Thread Daniele Ceraolo Spurio
Matching the underlying get/put functions.

Signed-off-by: Daniele Ceraolo Spurio 
---
 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c  |  8 +++
 .../drm/i915/gem/selftests/i915_gem_context.c |  6 ++---
 drivers/gpu/drm/i915/gt/intel_context.c   |  2 +-
 drivers/gpu/drm/i915/gt/intel_reset.c |  2 +-
 drivers/gpu/drm/i915/gt/selftest_reset.c  |  2 +-
 .../gpu/drm/i915/gt/selftest_workarounds.c|  4 ++--
 drivers/gpu/drm/i915/i915_debugfs.c   | 24 +--
 drivers/gpu/drm/i915/i915_gem.c   |  2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c   |  8 +++
 drivers/gpu/drm/i915/i915_pmu.c   |  3 ++-
 drivers/gpu/drm/i915/i915_sysfs.c |  2 +-
 drivers/gpu/drm/i915/intel_guc_log.c  |  6 ++---
 drivers/gpu/drm/i915/intel_huc.c  |  2 +-
 drivers/gpu/drm/i915/intel_panel.c|  2 +-
 drivers/gpu/drm/i915/intel_pm.c   |  8 +++
 drivers/gpu/drm/i915/intel_runtime_pm.h   | 12 +-
 drivers/gpu/drm/i915/intel_uc.c   |  2 +-
 drivers/gpu/drm/i915/intel_uncore.c   |  2 +-
 drivers/gpu/drm/i915/selftests/i915_gem.c |  6 ++---
 .../gpu/drm/i915/selftests/i915_gem_evict.c   |  2 +-
 drivers/gpu/drm/i915/selftests/i915_request.c |  2 +-
 21 files changed, 54 insertions(+), 53 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c 
b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
index 961ca53c8976..a97e2992836f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
@@ -295,7 +295,7 @@ unsigned long i915_gem_shrink_all(struct drm_i915_private 
*i915)
intel_wakeref_t wakeref;
unsigned long freed = 0;
 
-   with_intel_runtime_pm(i915, wakeref) {
+   with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
freed = i915_gem_shrink(i915, -1UL, NULL,
I915_SHRINK_BOUND |
I915_SHRINK_UNBOUND |
@@ -356,7 +356,7 @@ i915_gem_shrinker_scan(struct shrinker *shrinker, struct 
shrink_control *sc)
if (sc->nr_scanned < sc->nr_to_scan && current_is_kswapd()) {
intel_wakeref_t wakeref;
 
-   with_intel_runtime_pm(i915, wakeref) {
+   with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
freed += i915_gem_shrink(i915,
 sc->nr_to_scan - 
sc->nr_scanned,
 &sc->nr_scanned,
@@ -383,7 +383,7 @@ i915_gem_shrinker_oom(struct notifier_block *nb, unsigned 
long event, void *ptr)
unsigned long flags;
 
freed_pages = 0;
-   with_intel_runtime_pm(i915, wakeref)
+   with_intel_runtime_pm(&i915->runtime_pm, wakeref)
freed_pages += i915_gem_shrink(i915, -1UL, NULL,
   I915_SHRINK_BOUND |
   I915_SHRINK_UNBOUND |
@@ -437,7 +437,7 @@ i915_gem_shrinker_vmap(struct notifier_block *nb, unsigned 
long event, void *ptr
   MAX_SCHEDULE_TIMEOUT))
goto out;
 
-   with_intel_runtime_pm(i915, wakeref)
+   with_intel_runtime_pm(&i915->runtime_pm, wakeref)
freed_pages += i915_gem_shrink(i915, -1UL, NULL,
   I915_SHRINK_BOUND |
   I915_SHRINK_UNBOUND |
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
index 84b83b215b3d..8717111c2f4b 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
@@ -533,7 +533,7 @@ static int igt_ctx_exec(void *arg)
}
}
 
-   with_intel_runtime_pm(i915, wakeref)
+   with_intel_runtime_pm(&i915->runtime_pm, wakeref)
err = gpu_fill(obj, ctx, engine, dw);
if (err) {
pr_err("Failed to fill dword %lu [%lu/%lu] with 
gpu (%s) in ctx %u [full-ppgtt? %s], err=%d\n",
@@ -653,7 +653,7 @@ static int igt_shared_ctx_exec(void *arg)
}
 
err = 0;
-   with_intel_runtime_pm(i915, wakeref)
+   with_intel_runtime_pm(&i915->runtime_pm, wakeref)
err = gpu_fill(obj, ctx, engine, dw);
if (err) {
pr_err("Failed to fill dword %lu [%lu/%lu] with 
gpu (%s) in ctx %u [full-ppgtt? %s], err=%d\n",
@@ -1236,7 +1236,7 @@ static int igt_ctx_readonly(void *arg)
}
 
err = 0;
-   with_intel_runtime_pm(i915, wakeref)
+   w

[Intel-gfx] [PATCH v2 8/8] drm/i915: make intel_wakeref work on the rpm struct

2019-06-12 Thread Daniele Ceraolo Spurio
intel_runtime_pm is the only thing they use from the i915 structure,
so use that directly.

Signed-off-by: Daniele Ceraolo Spurio 
---
 drivers/gpu/drm/i915/gt/intel_engine_pm.c |  4 +--
 drivers/gpu/drm/i915/gt/intel_gt_pm.c |  4 +--
 drivers/gpu/drm/i915/i915_gem.c   |  2 +-
 drivers/gpu/drm/i915/intel_wakeref.c  | 32 +++
 drivers/gpu/drm/i915/intel_wakeref.h  | 18 ++---
 5 files changed, 30 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c 
b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index ccf034764741..903bee3d6c6d 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -37,7 +37,7 @@ static int __engine_unpark(struct intel_wakeref *wf)
 
 void intel_engine_pm_get(struct intel_engine_cs *engine)
 {
-   intel_wakeref_get(engine->i915, &engine->wakeref, __engine_unpark);
+   intel_wakeref_get(&engine->i915->runtime_pm, &engine->wakeref, 
__engine_unpark);
 }
 
 void intel_engine_park(struct intel_engine_cs *engine)
@@ -131,7 +131,7 @@ static int __engine_park(struct intel_wakeref *wf)
 
 void intel_engine_pm_put(struct intel_engine_cs *engine)
 {
-   intel_wakeref_put(engine->i915, &engine->wakeref, __engine_park);
+   intel_wakeref_put(&engine->i915->runtime_pm, &engine->wakeref, 
__engine_park);
 }
 
 void intel_engine_init__pm(struct intel_engine_cs *engine)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c 
b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index ae7155f0e063..7b5967751762 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -52,7 +52,7 @@ static int intel_gt_unpark(struct intel_wakeref *wf)
 
 void intel_gt_pm_get(struct drm_i915_private *i915)
 {
-   intel_wakeref_get(i915, &i915->gt.wakeref, intel_gt_unpark);
+   intel_wakeref_get(&i915->runtime_pm, &i915->gt.wakeref, 
intel_gt_unpark);
 }
 
 static int intel_gt_park(struct intel_wakeref *wf)
@@ -77,7 +77,7 @@ static int intel_gt_park(struct intel_wakeref *wf)
 
 void intel_gt_pm_put(struct drm_i915_private *i915)
 {
-   intel_wakeref_put(i915, &i915->gt.wakeref, intel_gt_park);
+   intel_wakeref_put(&i915->runtime_pm, &i915->gt.wakeref, intel_gt_park);
 }
 
 void intel_gt_pm_init(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 598faca4899e..8f5510af2ca4 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1776,7 +1776,7 @@ static void i915_gem_init__mm(struct drm_i915_private 
*i915)
INIT_LIST_HEAD(&i915->mm.fence_list);
 
INIT_LIST_HEAD(&i915->mm.userfault_list);
-   intel_wakeref_auto_init(&i915->mm.userfault_wakeref, i915);
+   intel_wakeref_auto_init(&i915->mm.userfault_wakeref, &i915->runtime_pm);
 
i915_gem_init__objects(i915);
 }
diff --git a/drivers/gpu/drm/i915/intel_wakeref.c 
b/drivers/gpu/drm/i915/intel_wakeref.c
index b677ae893d6f..3db6fa682823 100644
--- a/drivers/gpu/drm/i915/intel_wakeref.c
+++ b/drivers/gpu/drm/i915/intel_wakeref.c
@@ -4,23 +4,23 @@
  * Copyright © 2019 Intel Corporation
  */
 
-#include "intel_drv.h"
-#include "intel_wakeref.h"
+#include "intel_runtime_pm.h"
+#include "i915_gem.h"
 
-static void rpm_get(struct drm_i915_private *i915, struct intel_wakeref *wf)
+static void rpm_get(struct intel_runtime_pm *rpm, struct intel_wakeref *wf)
 {
-   wf->wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+   wf->wakeref = intel_runtime_pm_get(rpm);
 }
 
-static void rpm_put(struct drm_i915_private *i915, struct intel_wakeref *wf)
+static void rpm_put(struct intel_runtime_pm *rpm, struct intel_wakeref *wf)
 {
intel_wakeref_t wakeref = fetch_and_zero(&wf->wakeref);
 
-   intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+   intel_runtime_pm_put(rpm, wakeref);
GEM_BUG_ON(!wakeref);
 }
 
-int __intel_wakeref_get_first(struct drm_i915_private *i915,
+int __intel_wakeref_get_first(struct intel_runtime_pm *rpm,
  struct intel_wakeref *wf,
  int (*fn)(struct intel_wakeref *wf))
 {
@@ -34,11 +34,11 @@ int __intel_wakeref_get_first(struct drm_i915_private *i915,
if (!atomic_read(&wf->count)) {
int err;
 
-   rpm_get(i915, wf);
+   rpm_get(rpm, wf);
 
err = fn(wf);
if (unlikely(err)) {
-   rpm_put(i915, wf);
+   rpm_put(rpm, wf);
mutex_unlock(&wf->mutex);
return err;
}
@@ -51,7 +51,7 @@ int __intel_wakeref_get_first(struct drm_i915_private *i915,
return 0;
 }
 
-int __intel_wakeref_put_last(struct drm_i915_private *i915,
+int __intel_wakeref_put_last(struct intel_runtime_pm *rpm,
 struct intel_wakeref *wf,
 int (*fn)(struct intel_wakeref *wf))
 {
@@ -59,7 

[Intel-gfx] [PATCH v2 1/8] drm/i915: prefer i915_runtime_pm in intel_runtime function

2019-06-12 Thread Daniele Ceraolo Spurio
As a first step towards updating the code to work on the runtime_pm
structure instead of i915, rework all the internals to use and pass
around that.

v2: add comment for kdev (Jani), move rpm init after pdev init for
mock_device

Signed-off-by: Daniele Ceraolo Spurio 
Cc: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_drv.h   |   2 +
 drivers/gpu/drm/i915/intel_drv.h  |  10 +-
 drivers/gpu/drm/i915/intel_runtime_pm.c   | 122 --
 .../gpu/drm/i915/selftests/mock_gem_device.c  |   4 +-
 4 files changed, 68 insertions(+), 70 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0ea7f78ae227..3e7186362bb0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1073,6 +1073,8 @@ struct skl_wm_params {
  */
 struct i915_runtime_pm {
atomic_t wakeref_count;
+   struct device *kdev; /* points to i915->drm.pdev->dev */
+   bool available;
bool suspended;
bool irqs_enabled;
 
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 3e337317f77e..aec40adf4876 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1656,13 +1656,17 @@ assert_rpm_wakelock_held(struct i915_runtime_pm 
*rpm, int wakeref_count)
 }
 
 static inline void
-assert_rpm_raw_wakeref_held(struct drm_i915_private *i915)
+__assert_rpm_raw_wakeref_held(struct i915_runtime_pm *rpm)
 {
-   struct i915_runtime_pm *rpm = &i915->runtime_pm;
-
assert_rpm_raw_wakeref_held(rpm, atomic_read(&rpm->wakeref_count));
 }
 
+static inline void
+assert_rpm_raw_wakeref_held(struct drm_i915_private *i915)
+{
+   __assert_rpm_raw_wakeref_held(&i915->runtime_pm);
+}
+
 static inline void
 __assert_rpm_wakelock_held(struct i915_runtime_pm *rpm)
 {
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index af3c1ada1b2e..7c602f5c748d 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -75,21 +75,18 @@ static void __print_depot_stack(depot_stack_handle_t stack,
stack_trace_snprint(buf, sz, entries, nr_entries, indent);
 }
 
-static void init_intel_runtime_pm_wakeref(struct drm_i915_private *i915)
+static void init_intel_runtime_pm_wakeref(struct i915_runtime_pm *rpm)
 {
-   struct i915_runtime_pm *rpm = &i915->runtime_pm;
-
spin_lock_init(&rpm->debug.lock);
 }
 
 static noinline depot_stack_handle_t
-track_intel_runtime_pm_wakeref(struct drm_i915_private *i915)
+track_intel_runtime_pm_wakeref(struct i915_runtime_pm *rpm)
 {
-   struct i915_runtime_pm *rpm = &i915->runtime_pm;
depot_stack_handle_t stack, *stacks;
unsigned long flags;
 
-   if (!HAS_RUNTIME_PM(i915))
+   if (!rpm->available)
return -1;
 
stack = __save_depot_stack();
@@ -116,10 +113,9 @@ track_intel_runtime_pm_wakeref(struct drm_i915_private 
*i915)
return stack;
 }
 
-static void untrack_intel_runtime_pm_wakeref(struct drm_i915_private *i915,
+static void untrack_intel_runtime_pm_wakeref(struct i915_runtime_pm *rpm,
 depot_stack_handle_t stack)
 {
-   struct i915_runtime_pm *rpm = &i915->runtime_pm;
unsigned long flags, n;
bool found = false;
 
@@ -237,9 +233,8 @@ dump_and_free_wakeref_tracking(struct 
intel_runtime_pm_debug *debug)
 }
 
 static noinline void
-__intel_wakeref_dec_and_check_tracking(struct drm_i915_private *i915)
+__intel_wakeref_dec_and_check_tracking(struct i915_runtime_pm *rpm)
 {
-   struct i915_runtime_pm *rpm = &i915->runtime_pm;
struct intel_runtime_pm_debug dbg = {};
unsigned long flags;
 
@@ -255,9 +250,8 @@ __intel_wakeref_dec_and_check_tracking(struct 
drm_i915_private *i915)
 }
 
 static noinline void
-untrack_all_intel_runtime_pm_wakerefs(struct drm_i915_private *i915)
+untrack_all_intel_runtime_pm_wakerefs(struct i915_runtime_pm *rpm)
 {
-   struct i915_runtime_pm *rpm = &i915->runtime_pm;
struct intel_runtime_pm_debug dbg = {};
unsigned long flags;
 
@@ -308,76 +302,70 @@ void print_intel_runtime_pm_wakeref(struct 
drm_i915_private *i915,
 
 #else
 
-static void init_intel_runtime_pm_wakeref(struct drm_i915_private *i915)
+static void init_intel_runtime_pm_wakeref(struct i915_runtime_pm *rpm)
 {
 }
 
 static depot_stack_handle_t
-track_intel_runtime_pm_wakeref(struct drm_i915_private *i915)
+track_intel_runtime_pm_wakeref(struct i915_runtime_pm *rpm)
 {
return -1;
 }
 
-static void untrack_intel_runtime_pm_wakeref(struct drm_i915_private *i915,
+static void untrack_intel_runtime_pm_wakeref(struct i915_runtime_pm *rpm,
 intel_wakeref_t wref)
 {
 }
 
 static void
-__intel_wakeref_dec_and_check_tracking(struct drm_i915_private *i915)
+__intel_wakeref_dec_and_check_tracking(struct i915_runtime_pm *rpm)
 {
-   atomic_dec(&i9

[Intel-gfx] [PATCH v2 0/8] RPM Encapsulation

2019-06-12 Thread Daniele Ceraolo Spurio
Rebased series after the display power code has been split out.
Mostly the same as V1, just small fixes based on review comments
and CI results. The last patch is new.

The series grows the code a bit, but I believe it is worth it for the
extra logical encapsulation. With all debug options disabled:

add/remove: 0/0 grow/shrink: 92/14 up/down: 1225/-162 (1063)
Total: Before=1266893, After=1267956, chg +0.08%

Daniele Ceraolo Spurio (8):
  drm/i915: prefer i915_runtime_pm in intel_runtime function
  drm/i915: Remove rpm asserts that use i915
  drm/i915: make enable/disable rpm assert function use the rpm
structure
  drm/i915: move and rename i915_runtime_pm
  drm/i915: move a few more functions to accept the rpm structure
  drm/i915: update rpm_get/put to use the rpm structure
  drm/i915: update with_intel_runtime_pm to use the rpm structure
  drm/i915: make intel_wakeref work on the rpm struct

 drivers/gpu/drm/i915/gem/i915_gem_mman.c  |  11 +-
 drivers/gpu/drm/i915/gem/i915_gem_object.c|   4 +-
 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c  |  12 +-
 .../gpu/drm/i915/gem/selftests/huge_pages.c   |   4 +-
 .../i915/gem/selftests/i915_gem_coherency.c   |   4 +-
 .../drm/i915/gem/selftests/i915_gem_context.c |  18 +-
 .../drm/i915/gem/selftests/i915_gem_mman.c|   4 +-
 drivers/gpu/drm/i915/gt/intel_context.c   |   2 +-
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |   8 +-
 drivers/gpu/drm/i915/gt/intel_engine_pm.c |   4 +-
 drivers/gpu/drm/i915/gt/intel_gt_pm.c |   4 +-
 drivers/gpu/drm/i915/gt/intel_hangcheck.c |   4 +-
 drivers/gpu/drm/i915/gt/intel_reset.c |   6 +-
 drivers/gpu/drm/i915/gt/selftest_hangcheck.c  |  12 +-
 drivers/gpu/drm/i915/gt/selftest_lrc.c|  36 ++--
 drivers/gpu/drm/i915/gt/selftest_reset.c  |   6 +-
 .../gpu/drm/i915/gt/selftest_workarounds.c|  16 +-
 drivers/gpu/drm/i915/gvt/aperture_gm.c|  17 +-
 drivers/gpu/drm/i915/gvt/gvt.h|   4 +-
 drivers/gpu/drm/i915/gvt/sched_policy.c   |   4 +-
 drivers/gpu/drm/i915/gvt/scheduler.c  |   4 +-
 drivers/gpu/drm/i915/i915_debugfs.c   |  75 +++
 drivers/gpu/drm/i915/i915_drv.c   |  62 +++---
 drivers/gpu/drm/i915/i915_drv.h   |  50 +
 drivers/gpu/drm/i915/i915_gem.c   |  19 +-
 drivers/gpu/drm/i915/i915_gem_fence_reg.c |   6 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c   |  14 +-
 drivers/gpu/drm/i915/i915_irq.c   |  38 ++--
 drivers/gpu/drm/i915/i915_perf.c  |   6 +-
 drivers/gpu/drm/i915/i915_pmu.c   |  15 +-
 drivers/gpu/drm/i915/i915_sysfs.c |  14 +-
 drivers/gpu/drm/i915/i915_vma.c   |   2 +-
 drivers/gpu/drm/i915/intel_csr.c  |   2 +-
 drivers/gpu/drm/i915/intel_display.c  |  12 +-
 drivers/gpu/drm/i915/intel_display_power.c|  39 ++--
 drivers/gpu/drm/i915/intel_drv.h  | 105 --
 drivers/gpu/drm/i915/intel_fbdev.c|   6 +-
 drivers/gpu/drm/i915/intel_guc_log.c  |   6 +-
 drivers/gpu/drm/i915/intel_hotplug.c  |   4 +-
 drivers/gpu/drm/i915/intel_huc.c  |   2 +-
 drivers/gpu/drm/i915/intel_panel.c|   2 +-
 drivers/gpu/drm/i915/intel_pm.c   |   8 +-
 drivers/gpu/drm/i915/intel_runtime_pm.c   | 162 +++
 drivers/gpu/drm/i915/intel_runtime_pm.h   | 191 --
 drivers/gpu/drm/i915/intel_uc.c   |   2 +-
 drivers/gpu/drm/i915/intel_uncore.c   |  26 +--
 drivers/gpu/drm/i915/intel_uncore.h   |   4 +-
 drivers/gpu/drm/i915/intel_wakeref.c  |  32 +--
 drivers/gpu/drm/i915/intel_wakeref.h  |  18 +-
 drivers/gpu/drm/i915/selftests/i915_active.c  |   8 +-
 drivers/gpu/drm/i915/selftests/i915_gem.c |  10 +-
 .../gpu/drm/i915/selftests/i915_gem_evict.c   |   6 +-
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |   8 +-
 drivers/gpu/drm/i915/selftests/i915_request.c |  22 +-
 .../gpu/drm/i915/selftests/i915_timeline.c|  16 +-
 drivers/gpu/drm/i915/selftests/i915_vma.c |   4 +-
 drivers/gpu/drm/i915/selftests/intel_guc.c|   8 +-
 drivers/gpu/drm/i915/selftests/intel_uncore.c |   4 +-
 .../gpu/drm/i915/selftests/mock_gem_device.c  |   4 +-
 59 files changed, 594 insertions(+), 602 deletions(-)

-- 
2.20.1

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[Intel-gfx] [PATCH v2 4/8] drm/i915: move and rename i915_runtime_pm

2019-06-12 Thread Daniele Ceraolo Spurio
Asserts aside, all the code working on this structure is in
intel_runtime_pm.c and uses the intel_ prefix, so move the
structure to intel_runtime_pm.h and adopt the same prefix.

Since all the asserts are now working on the runtime_pm structure,
bring them across as well.

v2: drop unneeded include (Chris), don't rename debugfs, rebase

Signed-off-by: Daniele Ceraolo Spurio 
Cc: Chris Wilson 
---
 drivers/gpu/drm/i915/i915_drv.c |   4 +-
 drivers/gpu/drm/i915/i915_drv.h |  52 +
 drivers/gpu/drm/i915/intel_drv.h|  97 ---
 drivers/gpu/drm/i915/intel_runtime_pm.c |  42 +++
 drivers/gpu/drm/i915/intel_runtime_pm.h | 149 
 drivers/gpu/drm/i915/intel_uncore.h |   4 +-
 6 files changed, 175 insertions(+), 173 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index acd70f00c88b..fd57031dee47 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2888,7 +2888,7 @@ static int intel_runtime_suspend(struct device *kdev)
struct pci_dev *pdev = to_pci_dev(kdev);
struct drm_device *dev = pci_get_drvdata(pdev);
struct drm_i915_private *dev_priv = to_i915(dev);
-   struct i915_runtime_pm *rpm = &dev_priv->runtime_pm;
+   struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
int ret;
 
if (WARN_ON_ONCE(!(dev_priv->gt_pm.rc6.enabled && HAS_RC6(dev_priv
@@ -2987,7 +2987,7 @@ static int intel_runtime_resume(struct device *kdev)
struct pci_dev *pdev = to_pci_dev(kdev);
struct drm_device *dev = pci_get_drvdata(pdev);
struct drm_i915_private *dev_priv = to_i915(dev);
-   struct i915_runtime_pm *rpm = &dev_priv->runtime_pm;
+   struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
int ret = 0;
 
if (WARN_ON_ONCE(!HAS_RUNTIME_PM(dev_priv)))
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3e7186362bb0..9960f230c048 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1048,56 +1048,6 @@ struct skl_wm_params {
u32 dbuf_block_size;
 };
 
-/*
- * This struct helps tracking the state needed for runtime PM, which puts the
- * device in PCI D3 state. Notice that when this happens, nothing on the
- * graphics device works, even register access, so we don't get interrupts nor
- * anything else.
- *
- * Every piece of our code that needs to actually touch the hardware needs to
- * either call intel_runtime_pm_get or call intel_display_power_get with the
- * appropriate power domain.
- *
- * Our driver uses the autosuspend delay feature, which means we'll only really
- * suspend if we stay with zero refcount for a certain amount of time. The
- * default value is currently very conservative (see intel_runtime_pm_enable), 
but
- * it can be changed with the standard runtime PM files from sysfs.
- *
- * The irqs_disabled variable becomes true exactly after we disable the IRQs 
and
- * goes back to false exactly before we reenable the IRQs. We use this variable
- * to check if someone is trying to enable/disable IRQs while they're supposed
- * to be disabled. This shouldn't happen and we'll print some error messages in
- * case it happens.
- *
- * For more, read the Documentation/power/runtime_pm.txt.
- */
-struct i915_runtime_pm {
-   atomic_t wakeref_count;
-   struct device *kdev; /* points to i915->drm.pdev->dev */
-   bool available;
-   bool suspended;
-   bool irqs_enabled;
-
-#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
-   /*
-* To aide detection of wakeref leaks and general misuse, we
-* track all wakeref holders. With manual markup (i.e. returning
-* a cookie to each rpm_get caller which they then supply to their
-* paired rpm_put) we can remove corresponding pairs of and keep
-* the array trimmed to active wakerefs.
-*/
-   struct intel_runtime_pm_debug {
-   spinlock_t lock;
-
-   depot_stack_handle_t last_acquire;
-   depot_stack_handle_t last_release;
-
-   depot_stack_handle_t *owners;
-   unsigned long count;
-   } debug;
-#endif
-};
-
 enum intel_pipe_crc_source {
INTEL_PIPE_CRC_SOURCE_NONE,
INTEL_PIPE_CRC_SOURCE_PLANE1,
@@ -1746,7 +1696,7 @@ struct drm_i915_private {
 
struct drm_private_obj bw_obj;
 
-   struct i915_runtime_pm runtime_pm;
+   struct intel_runtime_pm runtime_pm;
 
struct {
bool initialized;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 70ef9b7623f0..1d58f7ec5d84 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1613,101 +1613,4 @@ unsigned int i9xx_plane_max_stride(struct intel_plane 
*plane,
   unsigned int rotation);
 int bdw_get_pipemisc_bpp(struct intel_crtc *crtc);
 
-/* intel_

[Intel-gfx] [PATCH v2 2/8] drm/i915: Remove rpm asserts that use i915

2019-06-12 Thread Daniele Ceraolo Spurio
Quite a few of the call points have already switched to the version
working directly on the runtime_pm structure, so let's switch over the
rest and kill the i915-based asserts.

v2: rebase

Signed-off-by: Daniele Ceraolo Spurio 
---
 drivers/gpu/drm/i915/gem/i915_gem_mman.c   |  2 +-
 drivers/gpu/drm/i915/gvt/aperture_gm.c |  2 +-
 drivers/gpu/drm/i915/i915_gem_fence_reg.c  |  2 +-
 drivers/gpu/drm/i915/i915_irq.c|  6 ++---
 drivers/gpu/drm/i915/i915_vma.c|  2 +-
 drivers/gpu/drm/i915/intel_csr.c   |  2 +-
 drivers/gpu/drm/i915/intel_display_power.c |  4 ++--
 drivers/gpu/drm/i915/intel_drv.h   | 26 ++
 drivers/gpu/drm/i915/intel_runtime_pm.c| 10 -
 drivers/gpu/drm/i915/intel_uncore.c| 12 +-
 drivers/gpu/drm/i915/intel_wakeref.c   |  2 +-
 11 files changed, 29 insertions(+), 41 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index c7b9b34de01b..caa61f09f714 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -308,7 +308,7 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf)
goto err_fence;
 
/* Mark as being mmapped into userspace for later revocation */
-   assert_rpm_wakelock_held(i915);
+   assert_rpm_wakelock_held(&i915->runtime_pm);
if (!i915_vma_set_userfault(vma) && !obj->userfault_count++)
list_add(&obj->userfault_link, &i915->mm.userfault_list);
if (CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c 
b/drivers/gpu/drm/i915/gvt/aperture_gm.c
index 1fa2f65c3cd1..7f4e3456ce11 100644
--- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
+++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
@@ -131,7 +131,7 @@ void intel_vgpu_write_fence(struct intel_vgpu *vgpu,
struct drm_i915_fence_reg *reg;
i915_reg_t fence_reg_lo, fence_reg_hi;
 
-   assert_rpm_wakelock_held(dev_priv);
+   assert_rpm_wakelock_held(&dev_priv->runtime_pm);
 
if (WARN_ON(fence >= vgpu_fence_sz(vgpu)))
return;
diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c 
b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index 10aa6e350bfa..f2cef3fa3deb 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -360,7 +360,7 @@ i915_vma_pin_fence(struct i915_vma *vma)
 * Note that we revoke fences on runtime suspend. Therefore the user
 * must keep the device awake whilst using the fence.
 */
-   assert_rpm_wakelock_held(vma->vm->i915);
+   assert_rpm_wakelock_held(&vma->vm->i915->runtime_pm);
 
/* Just update our place in the LRU if our fence is getting reused. */
if (vma->fence) {
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 11c451358fb8..1fba5652f741 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -589,7 +589,7 @@ void gen6_disable_rps_interrupts(struct drm_i915_private 
*dev_priv)
 
 void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv)
 {
-   assert_rpm_wakelock_held(dev_priv);
+   assert_rpm_wakelock_held(&dev_priv->runtime_pm);
 
spin_lock_irq(&dev_priv->irq_lock);
gen6_reset_pm_iir(dev_priv, dev_priv->pm_guc_events);
@@ -598,7 +598,7 @@ void gen9_reset_guc_interrupts(struct drm_i915_private 
*dev_priv)
 
 void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv)
 {
-   assert_rpm_wakelock_held(dev_priv);
+   assert_rpm_wakelock_held(&dev_priv->runtime_pm);
 
spin_lock_irq(&dev_priv->irq_lock);
if (!dev_priv->guc.interrupts.enabled) {
@@ -612,7 +612,7 @@ void gen9_enable_guc_interrupts(struct drm_i915_private 
*dev_priv)
 
 void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv)
 {
-   assert_rpm_wakelock_held(dev_priv);
+   assert_rpm_wakelock_held(&dev_priv->runtime_pm);
 
spin_lock_irq(&dev_priv->irq_lock);
dev_priv->guc.interrupts.enabled = false;
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 80050f6a0893..1fcdfdddf9a5 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -367,7 +367,7 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma *vma)
int err;
 
/* Access through the GTT requires the device to be awake. */
-   assert_rpm_wakelock_held(vma->vm->i915);
+   assert_rpm_wakelock_held(&vma->vm->i915->runtime_pm);
 
lockdep_assert_held(&vma->vm->i915->drm.struct_mutex);
if (WARN_ON(!i915_vma_is_map_and_fenceable(vma))) {
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index bf0eebd385b9..097153c7f3d4 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -273,7 +273,7 @@ void intel_csr_load_program(struct drm_i915_private 
*dev_priv)
}
 
   

[Intel-gfx] [PATCH v3] drm/i915: Add Wa_1409120013:icl,ehl

2019-06-12 Thread Matt Roper
This chicken bit should be set before enabling FBC to avoid screen
corruption when the plane size has odd vertical and horizontal
dimensions.  It is safe to leave the bit set even when FBC is disabled.

v2:
 - The bspec's name for this bit on these platforms ("Spare 14") is
   pretty meaningless.  Let's rename the bit definition to something
   that more accurately reflects what the bit really does.  (Clint)

v3:
 - The chicken register was already defined (along with a few other
   gen9-specific bits) farther down.  Just add the new bit definition
   there.  (Clint)

Cc: Clinton Taylor 
Signed-off-by: Matt Roper 
---
 drivers/gpu/drm/i915/i915_reg.h  | 1 +
 drivers/gpu/drm/i915/intel_fbc.c | 4 
 2 files changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index edf9f93934a1..368ee717580c 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3163,6 +3163,7 @@ enum i915_power_well_id {
 #define ILK_DPFC_FENCE_YOFF_MMIO(0x43218)
 #define ILK_DPFC_CHICKEN   _MMIO(0x43224)
 #define   ILK_DPFC_DISABLE_DUMMY0 (1 << 8)
+#define   ILK_DPFC_CHICKEN_COMP_DUMMY_PIXEL(1 << 14)
 #define   ILK_DPFC_NUKE_ON_ANY_MODIFICATION(1 << 23)
 #define ILK_FBC_RT_BASE_MMIO(0x2128)
 #define   ILK_FBC_RT_VALID (1 << 0)
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 5679f2fffb7c..d36cada2cc7d 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -344,6 +344,10 @@ static void gen7_fbc_activate(struct drm_i915_private 
*dev_priv)
   HSW_FBCQ_DIS);
}
 
+   if (IS_GEN(dev_priv, 11))
+   /* Wa_1409120013:icl,ehl */
+   I915_WRITE(ILK_DPFC_CHICKEN, ILK_DPFC_CHICKEN_COMP_DUMMY_PIXEL);
+
I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
 
intel_fbc_recompress(dev_priv);
-- 
2.14.5

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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/4] drm/i915: Don't clobber M/N values during fastset check (rev2)

2019-06-12 Thread Patchwork
== Series Details ==

Series: series starting with [v2,1/4] drm/i915: Don't clobber M/N values during 
fastset check (rev2)
URL   : https://patchwork.freedesktop.org/series/61960/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
f31b23cc1b1a drm/i915: Don't clobber M/N values during fastset check
51ce57812d1c drm/i915: Constify intel_pipe_config_compare()
b7b9d9ff1aa9 drm/i915: Make pipe_config_err() vs. fastset less confusing
-:133: WARNING:LONG_LINE: line over 100 characters
#133: FILE: drivers/gpu/drm/i915/intel_display.c:12426:
+"unable to verify whether state matches 
exactly, forcing modeset (expected %s, found %s)\n", \

total: 0 errors, 1 warnings, 0 checks, 256 lines checked
0bdea677061d drm/i915: Drop the _INCOMPLETE for has_infoframe

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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Refine placement of gt.reset_lockmap

2019-06-12 Thread Patchwork
== Series Details ==

Series: drm/i915: Refine placement of gt.reset_lockmap
URL   : https://patchwork.freedesktop.org/series/61973/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6253 -> Patchwork_13256


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13256/

Known issues


  Here are the changes found in Patchwork_13256 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u:   [PASS][1] -> [FAIL][2] ([fdo#109485])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13256/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html

  
 Possible fixes 

  * igt@gem_busy@busy-all:
- fi-icl-guc: [INCOMPLETE][3] ([fdo#107713]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-guc/igt@gem_b...@busy-all.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13256/fi-icl-guc/igt@gem_b...@busy-all.html

  * igt@gem_ctx_create@basic-files:
- fi-icl-u2:  [INCOMPLETE][5] ([fdo#107713] / [fdo#109100]) -> 
[PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6253/fi-icl-u2/igt@gem_ctx_cre...@basic-files.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13256/fi-icl-u2/igt@gem_ctx_cre...@basic-files.html

  
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
  [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485


Participating hosts (53 -> 46)
--

  Additional (1): fi-icl-dsi 
  Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_6253 -> Patchwork_13256

  CI_DRM_6253: 83fdc69645c5c6b511e36e171f1c75a6132f007c @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5054: 7a295df596fdf71e5c28ecb1fbfec002060e9293 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13256: 25831310ce76b92dacbb35ddc5c66c982b483806 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

25831310ce76 drm/i915: Refine placement of gt.reset_lockmap

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13256/
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Re: [Intel-gfx] [PATCH v2 3/4] drm/i915/dp: Trigger modeset if master_crtc or slaves bitmask changes

2019-06-12 Thread Manasi Navare
On Wed, Jun 12, 2019 at 10:32:04AM +0200, Maarten Lankhorst wrote:
> Op 23-04-2019 om 17:49 schreef Manasi Navare:
> > Add the comparison between the current state and new_crtc_state for
> > newly added master_crtc pointer and slave bitmask so that
> > if any of those change then the curernt master-slave links have
> > changed and we need to reconfigure the transcoder port sync register
> > and hence trigger a full modeset.
> >
> > Suggested-by: Ville Syrjälä 
> > Cc: Ville Syrjälä 
> > Cc: Maarten Lankhorst 
> > Cc: Matt Roper 
> > Signed-off-by: Manasi Navare 
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 5 +
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c 
> > b/drivers/gpu/drm/i915/intel_display.c
> > index 81e8cb9fe221..4bd23e61c6fd 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -12524,6 +12524,11 @@ intel_pipe_config_compare(struct drm_i915_private 
> > *dev_priv,
> > PIPE_CONF_CHECK_INFOFRAME(spd);
> > PIPE_CONF_CHECK_INFOFRAME(hdmi);
> >  
> > +   if (INTEL_GEN(dev_priv) >= 11) {
> > +   PIPE_CONF_CHECK_I(trans_port_sync_slaves);
> > +   PIPE_CONF_CHECK_P(master_crtc);
> > +   }
> > +
> >  #undef PIPE_CONF_CHECK_X
> >  #undef PIPE_CONF_CHECK_I
> >  #undef PIPE_CONF_CHECK_BOOL
> 
> Should probably be merged with patch 1/4

Yes in my next revision will combine this into patch 1, also need another patch 
for
HW state readout, that should be a separate patch though right?

Manasi
> 
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Re: [Intel-gfx] [PATCH v2] drm/i915: Add Wa_1409120013:icl,ehl

2019-06-12 Thread Matt Roper
On Wed, Jun 12, 2019 at 11:16:02AM -0700, Matt Roper wrote:
> This chicken bit should be set before enabling FBC to avoid screen
> corruption when the plane size has odd vertical and horizontal
> dimensions.  It is safe to leave the bit set even when FBC is disabled.
> 
> v2:
>  - The bspec's name for this bit on these platforms ("Spare 14") is
>pretty meaningless.  Let's rename the bit definition to something
>that more accurately reflects what the bit really does.  (Clint)

Woops, looks like you also had a comment about the register already
being defined farther down that I didn't see when I first read your
email.  I'll send a v3 shortly.


Matt

> 
> Cc: Clinton Taylor 
> Signed-off-by: Matt Roper 
> ---
>  drivers/gpu/drm/i915/i915_reg.h  | 2 ++
>  drivers/gpu/drm/i915/intel_fbc.c | 4 
>  2 files changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index edf9f93934a1..54654a578c84 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3150,6 +3150,8 @@ enum i915_power_well_id {
>  
>  /* Framebuffer compression for Ironlake */
>  #define ILK_DPFC_CB_BASE _MMIO(0x43200)
> +#define ILK_DPFC_CHICKEN _MMIO(0x43224)
> +#define   ILK_DPFC_CHICKEN_COMP_DUMMY_PIXEL  REG_BIT(14)
>  #define ILK_DPFC_CONTROL _MMIO(0x43208)
>  #define   FBC_CTL_FALSE_COLOR(1 << 10)
>  /* The bit 28-8 is reserved */
> diff --git a/drivers/gpu/drm/i915/intel_fbc.c 
> b/drivers/gpu/drm/i915/intel_fbc.c
> index 5679f2fffb7c..d36cada2cc7d 100644
> --- a/drivers/gpu/drm/i915/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/intel_fbc.c
> @@ -344,6 +344,10 @@ static void gen7_fbc_activate(struct drm_i915_private 
> *dev_priv)
>  HSW_FBCQ_DIS);
>   }
>  
> + if (IS_GEN(dev_priv, 11))
> + /* Wa_1409120013:icl,ehl */
> + I915_WRITE(ILK_DPFC_CHICKEN, ILK_DPFC_CHICKEN_COMP_DUMMY_PIXEL);
> +
>   I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
>  
>   intel_fbc_recompress(dev_priv);
> -- 
> 2.14.5
> 

-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
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[Intel-gfx] [PATCH v2] drm/i915: Add Wa_1409120013:icl,ehl

2019-06-12 Thread Matt Roper
This chicken bit should be set before enabling FBC to avoid screen
corruption when the plane size has odd vertical and horizontal
dimensions.  It is safe to leave the bit set even when FBC is disabled.

v2:
 - The bspec's name for this bit on these platforms ("Spare 14") is
   pretty meaningless.  Let's rename the bit definition to something
   that more accurately reflects what the bit really does.  (Clint)

Cc: Clinton Taylor 
Signed-off-by: Matt Roper 
---
 drivers/gpu/drm/i915/i915_reg.h  | 2 ++
 drivers/gpu/drm/i915/intel_fbc.c | 4 
 2 files changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index edf9f93934a1..54654a578c84 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3150,6 +3150,8 @@ enum i915_power_well_id {
 
 /* Framebuffer compression for Ironlake */
 #define ILK_DPFC_CB_BASE   _MMIO(0x43200)
+#define ILK_DPFC_CHICKEN   _MMIO(0x43224)
+#define   ILK_DPFC_CHICKEN_COMP_DUMMY_PIXELREG_BIT(14)
 #define ILK_DPFC_CONTROL   _MMIO(0x43208)
 #define   FBC_CTL_FALSE_COLOR  (1 << 10)
 /* The bit 28-8 is reserved */
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 5679f2fffb7c..d36cada2cc7d 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -344,6 +344,10 @@ static void gen7_fbc_activate(struct drm_i915_private 
*dev_priv)
   HSW_FBCQ_DIS);
}
 
+   if (IS_GEN(dev_priv, 11))
+   /* Wa_1409120013:icl,ehl */
+   I915_WRITE(ILK_DPFC_CHICKEN, ILK_DPFC_CHICKEN_COMP_DUMMY_PIXEL);
+
I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
 
intel_fbc_recompress(dev_priv);
-- 
2.14.5

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Re: [Intel-gfx] [PATCH] drm/i915: Add Wa_1409120013:icl,ehl

2019-06-12 Thread Clinton Taylor


On 6/10/19 3:27 PM, Matt Roper wrote:

This chicken bit should be set before enabling FBC to avoid screen
corruption when the plane size has odd vertical and horizontal
dimensions.  It is safe to leave the bit set even when FBC is disabled.

Signed-off-by: Matt Roper 
---
  drivers/gpu/drm/i915/i915_reg.h  | 2 ++
  drivers/gpu/drm/i915/intel_fbc.c | 4 
  2 files changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 7a26766ba84d..2af04568449e 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3150,6 +3150,8 @@ enum i915_power_well_id {
  
  /* Framebuffer compression for Ironlake */

  #define ILK_DPFC_CB_BASE  _MMIO(0x43200)
+#define ILK_DPFC_CHICKEN   _MMIO(0x43224)

Duplicate define, 0x43224 is already defined ~12 lines lower.

+#define   ILK_DPFC_CHICKEN_SPARE14 REG_BIT(14)


Any way we can incorporate COMP_DUMMY_PIXEL into this bit definition?

-Clint



  #define ILK_DPFC_CONTROL  _MMIO(0x43208)
  #define   FBC_CTL_FALSE_COLOR (1 << 10)
  /* The bit 28-8 is reserved */
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 5679f2fffb7c..875ad83c3d32 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -344,6 +344,10 @@ static void gen7_fbc_activate(struct drm_i915_private 
*dev_priv)
   HSW_FBCQ_DIS);
}
  
+	if (IS_GEN(dev_priv, 11))

+   /* Wa_1409120013:icl,ehl */
+   I915_WRITE(ILK_DPFC_CHICKEN, ILK_DPFC_CHICKEN_SPARE14);
+
I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
  
  	intel_fbc_recompress(dev_priv);

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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gtt: Skip initializing PT with scratch if full

2019-06-12 Thread Patchwork
== Series Details ==

Series: drm/i915/gtt: Skip initializing PT with scratch if full
URL   : https://patchwork.freedesktop.org/series/61900/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6230_full -> Patchwork_13244_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_13244_full:

### Piglit changes ###

 Possible regressions 

  * spec@!opengl 1.1@copypixels-sync (NEW):
- {pig-snb-2600}: NOTRUN -> [FAIL][1] +2 similar issues
   [1]: None

  
New tests
-

  New tests have been introduced between CI_DRM_6230_full and 
Patchwork_13244_full:

### New Piglit tests (3) ###

  * spec@!opengl 1.0@gl-1.0-read-cache-stress-test:
- Statuses : 1 fail(s)
- Exec time: [16.03] s

  * spec@!opengl 1.1@copypixels-draw-sync:
- Statuses : 1 fail(s)
- Exec time: [29.07] s

  * spec@!opengl 1.1@copypixels-sync:
- Statuses : 1 fail(s)
- Exec time: [30.17] s

  

Known issues


  Here are the changes found in Patchwork_13244_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][2] -> [SKIP][3] ([fdo#110854])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb1/igt@gem_exec_balan...@smoke.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13244/shard-iclb7/igt@gem_exec_balan...@smoke.html

  * igt@kms_draw_crc@draw-method-xrgb-pwrite-ytiled:
- shard-skl:  [PASS][4] -> [FAIL][5] ([fdo#103184] / [fdo#103232] / 
[fdo#108222])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl7/igt@kms_draw_...@draw-method-xrgb-pwrite-ytiled.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13244/shard-skl8/igt@kms_draw_...@draw-method-xrgb-pwrite-ytiled.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-apl:  [PASS][6] -> [DMESG-WARN][7] ([fdo#108566]) +4 
similar issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl7/igt@kms_frontbuffer_track...@fbc-suspend.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13244/shard-apl4/igt@kms_frontbuffer_track...@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
- shard-iclb: [PASS][8] -> [FAIL][9] ([fdo#103167]) +5 similar 
issues
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb3/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13244/shard-iclb2/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
- shard-skl:  [PASS][10] -> [INCOMPLETE][11] ([fdo#104108] / 
[fdo#106978])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl5/igt@kms_frontbuffer_track...@fbcpsr-suspend.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13244/shard-skl6/igt@kms_frontbuffer_track...@fbcpsr-suspend.html

  * igt@kms_setmode@basic:
- shard-hsw:  [PASS][12] -> [FAIL][13] ([fdo#99912])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw1/igt@kms_setm...@basic.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13244/shard-hsw7/igt@kms_setm...@basic.html

  * igt@perf@blocking:
- shard-skl:  [PASS][14] -> [FAIL][15] ([fdo#110728])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl1/igt@p...@blocking.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13244/shard-skl2/igt@p...@blocking.html

  
 Possible fixes 

  * igt@gem_eio@in-flight-suspend:
- shard-glk:  [FAIL][16] ([fdo#110667]) -> [PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-glk2/igt@gem_...@in-flight-suspend.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13244/shard-glk3/igt@gem_...@in-flight-suspend.html

  * igt@i915_suspend@sysfs-reader:
- shard-apl:  [DMESG-WARN][18] ([fdo#108566]) -> [PASS][19] +1 
similar issue
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl5/igt@i915_susp...@sysfs-reader.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13244/shard-apl7/igt@i915_susp...@sysfs-reader.html

  * igt@kms_cursor_crc@pipe-b-cursor-128x128-onscreen:
- shard-apl:  [INCOMPLETE][20] ([fdo#103927]) -> [PASS][21]
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl8/igt@kms_cursor_...@pipe-b-cursor-128x128-onscreen.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13244/shard-apl2/igt@kms_cursor_...@pipe-b-cursor-128x128-onscreen.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk:  [FAIL][22] ([fdo#1

[Intel-gfx] [PATCH v2 1/4] drm/i915: Don't clobber M/N values during fastset check

2019-06-12 Thread Ville Syrjala
From: Ville Syrjälä 

We're now calling intel_pipe_config_compare(..., true) uncoditionally
which means we're always going clobber the calculated M/N values with
the old values if the fuzzy M/N check passes. That causes problems
because the fuzzy check allows for a huge difference in the values.

I'm actually tempted to just make the M/N checks exact, but that might
prevent fastboot from kicking in when people want it. So for now let's
overwrite the computed values with the old values only if decide to skip
the modeset.

v2: Copy has_drrs along with M/N M2/N2 values

Cc: sta...@vger.kernel.org
Cc: blubber...@protonmail.com
Cc: Maarten Lankhorst 
Cc: Hans de Goede 
Tested-by: blubber...@protonmail.com
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110782
Fixes: d19f958db23c ("drm/i915: Enable fastset for non-boot modesets.")
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_display.c | 36 +---
 1 file changed, 28 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 1b1ddb48ca7a..3d8ed1cf0ab7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12299,9 +12299,6 @@ intel_compare_link_m_n(const struct intel_link_m_n *m_n,
  m2_n2->gmch_m, m2_n2->gmch_n, !adjust) &&
intel_compare_m_n(m_n->link_m, m_n->link_n,
  m2_n2->link_m, m2_n2->link_n, !adjust)) {
-   if (adjust)
-   *m2_n2 = *m_n;
-
return true;
}
 
@@ -13433,6 +13430,33 @@ static int calc_watermark_data(struct 
intel_atomic_state *state)
return 0;
 }
 
+static void intel_crtc_check_fastset(struct intel_crtc_state *old_crtc_state,
+struct intel_crtc_state *new_crtc_state)
+{
+   struct drm_i915_private *dev_priv =
+   to_i915(new_crtc_state->base.crtc->dev);
+
+   if (!intel_pipe_config_compare(dev_priv, old_crtc_state,
+  new_crtc_state, true))
+   return;
+
+   new_crtc_state->base.mode_changed = false;
+   new_crtc_state->update_pipe = true;
+
+   /*
+* If we're not doing the full modeset we want to
+* keep the current M/N values as they may be
+* sufficiently different to the computed values
+* to cause problems.
+*
+* FIXME: should really copy more fuzzy state here
+*/
+   new_crtc_state->fdi_m_n = old_crtc_state->fdi_m_n;
+   new_crtc_state->dp_m_n = old_crtc_state->dp_m_n;
+   new_crtc_state->dp_m2_n2 = old_crtc_state->dp_m2_n2;
+   new_crtc_state->has_drrs = old_crtc_state->has_drrs;
+}
+
 /**
  * intel_atomic_check - validate state object
  * @dev: drm device
@@ -13474,11 +13498,7 @@ static int intel_atomic_check(struct drm_device *dev,
if (ret)
goto fail;
 
-   if (intel_pipe_config_compare(dev_priv, old_crtc_state,
- new_crtc_state, true)) {
-   new_crtc_state->base.mode_changed = false;
-   new_crtc_state->update_pipe = true;
-   }
+   intel_crtc_check_fastset(old_crtc_state, new_crtc_state);
 
if (needs_modeset(&new_crtc_state->base))
any_ms = true;
-- 
2.21.0

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[Intel-gfx] [PATCH] drm/i915: Refine placement of gt.reset_lockmap

2019-06-12 Thread Chris Wilson
If we pull the lockmap into reset_prepare/reset_finish, it will
naturally cover i915_gem_set_wedged() as well as i915_reset(). And with
another tweak, we can pull __i915_gem_unset_wedged() underneath the
lockmap covering the mutexes used there.

As a bonus, it should hide the ugliness of the i915_reset exit path ;)

Signed-off-by: Chris Wilson 
Cc: Mika Kuoppala 
---
 drivers/gpu/drm/i915/gt/intel_reset.c | 12 +++-
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c 
b/drivers/gpu/drm/i915/gt/intel_reset.c
index 6368b37f26d1..952e11b4b5c5 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -723,6 +723,8 @@ static void reset_prepare(struct drm_i915_private *i915)
enum intel_engine_id id;
 
intel_gt_pm_get(i915);
+   lock_map_acquire(&i915->gt.reset_lockmap);
+
for_each_engine(engine, i915, id)
reset_prepare_engine(engine);
 
@@ -773,6 +775,8 @@ static void reset_finish(struct drm_i915_private *i915)
reset_finish_engine(engine);
intel_engine_signal_breadcrumbs(engine);
}
+
+   lock_map_release(&i915->gt.reset_lockmap);
intel_gt_pm_put(i915);
 }
 
@@ -978,17 +982,17 @@ void i915_reset(struct drm_i915_private *i915,
 
might_sleep();
GEM_BUG_ON(!test_bit(I915_RESET_BACKOFF, &error->flags));
-   lock_map_acquire(&i915->gt.reset_lockmap);
+
+   reset_prepare(i915);
 
/* Clear any previous failed attempts at recovery. Time to try again. */
if (!__i915_gem_unset_wedged(i915))
-   goto unlock;
+   goto finish;
 
if (reason)
dev_notice(i915->drm.dev, "Resetting chip for %s\n", reason);
error->reset_count++;
 
-   reset_prepare(i915);
 
if (!intel_has_gpu_reset(i915)) {
if (i915_modparams.reset)
@@ -1030,8 +1034,6 @@ void i915_reset(struct drm_i915_private *i915,
 
 finish:
reset_finish(i915);
-unlock:
-   lock_map_release(&i915->gt.reset_lockmap);
return;
 
 taint:
-- 
2.20.1

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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: kerneldoc warnings squelched

2019-06-12 Thread Patchwork
== Series Details ==

Series: drm/i915: kerneldoc warnings squelched
URL   : https://patchwork.freedesktop.org/series/61969/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6252 -> Patchwork_13255


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13255/

Known issues


  Here are the changes found in Patchwork_13255 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_create@basic-files:
- fi-cml-u:   [PASS][1] -> [INCOMPLETE][2] ([fdo#110566])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6252/fi-cml-u/igt@gem_ctx_cre...@basic-files.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13255/fi-cml-u/igt@gem_ctx_cre...@basic-files.html

  * igt@gem_ctx_switch@basic-default:
- fi-icl-y:   [PASS][3] -> [INCOMPLETE][4] ([fdo#107713] / 
[fdo#108569])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6252/fi-icl-y/igt@gem_ctx_swi...@basic-default.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13255/fi-icl-y/igt@gem_ctx_swi...@basic-default.html

  * igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850:   [PASS][5] -> [INCOMPLETE][6] ([fdo#107718])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6252/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13255/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html

  
 Possible fixes 

  * igt@i915_selftest@live_hangcheck:
- fi-icl-dsi: [INCOMPLETE][7] ([fdo#107713] / [fdo#108569]) -> 
[PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6252/fi-icl-dsi/igt@i915_selftest@live_hangcheck.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13255/fi-icl-dsi/igt@i915_selftest@live_hangcheck.html

  
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#110566]: https://bugs.freedesktop.org/show_bug.cgi?id=110566


Participating hosts (54 -> 44)
--

  Missing(10): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-icl-u3 fi-pnv-d510 fi-bdw-samus fi-byt-clapper fi-skl-6600u 


Build changes
-

  * Linux: CI_DRM_6252 -> Patchwork_13255

  CI_DRM_6252: 09066cdbe32b397ea4cc1033361dd949f74e050b @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5054: 7a295df596fdf71e5c28ecb1fbfec002060e9293 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13255: 0df0f9fce05af8a03fbd7db9aeaada164be20791 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

0df0f9fce05a drm/i915: kerneldoc warnings squelched

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13255/
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Nuke atomic set/get prop plane stubs

2019-06-12 Thread Patchwork
== Series Details ==

Series: drm/i915: Nuke atomic set/get prop plane stubs
URL   : https://patchwork.freedesktop.org/series/61898/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6230_full -> Patchwork_13242_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Known issues


  Here are the changes found in Patchwork_13242_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#110854])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb1/igt@gem_exec_balan...@smoke.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/shard-iclb5/igt@gem_exec_balan...@smoke.html

  * 
igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive:
- shard-iclb: [PASS][3] -> [INCOMPLETE][4] ([fdo#107713])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb3/igt@gem_persistent_rel...@forked-interruptible-faulting-reloc-thrash-inactive.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/shard-iclb7/igt@gem_persistent_rel...@forked-interruptible-faulting-reloc-thrash-inactive.html

  * igt@gem_pwrite@big-gtt-forwards:
- shard-iclb: [PASS][5] -> [INCOMPLETE][6] ([fdo#107713] / 
[fdo#109100])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb4/igt@gem_pwr...@big-gtt-forwards.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/shard-iclb7/igt@gem_pwr...@big-gtt-forwards.html

  * igt@gem_softpin@noreloc-s3:
- shard-apl:  [PASS][7] -> [DMESG-WARN][8] ([fdo#108566])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl6/igt@gem_soft...@noreloc-s3.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/shard-apl4/igt@gem_soft...@noreloc-s3.html

  * igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
- shard-glk:  [PASS][9] -> [FAIL][10] ([fdo#106509] / [fdo#107409])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-glk1/igt@kms_cursor_leg...@2x-long-nonblocking-modeset-vs-cursor-atomic.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/shard-glk4/igt@kms_cursor_leg...@2x-long-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_flip@flip-vs-expired-vblank:
- shard-skl:  [PASS][11] -> [FAIL][12] ([fdo#105363])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl4/igt@kms_f...@flip-vs-expired-vblank.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/shard-skl7/igt@kms_f...@flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-glk:  [PASS][13] -> [FAIL][14] ([fdo#102887] / [fdo#105363])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-glk4/igt@kms_f...@flip-vs-expired-vblank-interruptible.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/shard-glk1/igt@kms_f...@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-rmfb-interruptible:
- shard-hsw:  [PASS][15] -> [INCOMPLETE][16] ([fdo#103540])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw1/igt@kms_f...@flip-vs-rmfb-interruptible.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/shard-hsw1/igt@kms_f...@flip-vs-rmfb-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc:
- shard-hsw:  [PASS][17] -> [SKIP][18] ([fdo#109271]) +10 similar 
issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw4/igt@kms_frontbuffer_track...@fbc-2p-primscrn-spr-indfb-draw-mmap-wc.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/shard-hsw1/igt@kms_frontbuffer_track...@fbc-2p-primscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite:
- shard-iclb: [PASS][19] -> [FAIL][20] ([fdo#103167]) +3 similar 
issues
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb4/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/shard-iclb2/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html

  * igt@kms_setmode@basic:
- shard-hsw:  [PASS][21] -> [FAIL][22] ([fdo#99912])
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw1/igt@kms_setm...@basic.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/shard-hsw8/igt@kms_setm...@basic.html

  * igt@perf@blocking:
- shard-skl:  [PASS][23] -> [FAIL][24] ([fdo#110728])
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl1/igt@p...@blocking.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/shard-skl1/igt@p..

Re: [Intel-gfx] [REBASED PATCH 1/2] drm/i915: Move intel_add_dsi_properties to intel_dsi

2019-06-12 Thread Kulkarni, Vandita

> -Original Message-
> From: Intel-gfx  On Behalf Of Ville
> Syrjälä
> Sent: Tuesday, June 11, 2019 5:52 PM
> To: Nikula, Jani 
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [REBASED PATCH 1/2] drm/i915: Move
> intel_add_dsi_properties to intel_dsi
> 
> On Mon, Jun 10, 2019 at 10:45:14PM +0300, Jani Nikula wrote:
> > From: Vandita Kulkarni 
> >
> > Since intel_add_dsi_properties will be used by other platforms too
> > move it out of platform specific file.
> >
> > Signed-off-by: Vandita Kulkarni 
> > Signed-off-by: Jani Nikula 
> > ---
> >  drivers/gpu/drm/i915/intel_dsi.c | 32 
> > drivers/gpu/drm/i915/intel_dsi.h |  3 +++
> >  drivers/gpu/drm/i915/vlv_dsi.c   | 42 +---
> >  3 files changed, 36 insertions(+), 41 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dsi.c
> > b/drivers/gpu/drm/i915/intel_dsi.c
> > index 5fec02aceaed..26124a8fe531 100644
> > --- a/drivers/gpu/drm/i915/intel_dsi.c
> > +++ b/drivers/gpu/drm/i915/intel_dsi.c
> > @@ -116,6 +116,12 @@ intel_dsi_get_panel_orientation(struct
> intel_connector *connector)
> > struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> > enum drm_panel_orientation orientation;
> >
> > +   if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> > +   orientation = vlv_dsi_get_hw_panel_orientation(connector);
> > +   if (orientation !=
> DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
> > +   return orientation;
> > +   }
> > +
> > orientation = dev_priv->vbt.dsi.orientation;
> > if (orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
> > return orientation;
> > @@ -126,3 +132,29 @@ intel_dsi_get_panel_orientation(struct
> > intel_connector *connector)
> >
> > return DRM_MODE_PANEL_ORIENTATION_NORMAL;
> >  }
> > +
> > +void intel_dsi_add_properties(struct intel_connector *connector) {
> > +   struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> > +
> > +   if (connector->panel.fixed_mode) {
> > +   u32 allowed_scalers;
> > +
> > +   allowed_scalers = BIT(DRM_MODE_SCALE_ASPECT) |
> > +   BIT(DRM_MODE_SCALE_FULLSCREEN);
> > +   if (!HAS_GMCH(dev_priv))
> > +   allowed_scalers |= BIT(DRM_MODE_SCALE_CENTER);
> > +
> > +   drm_connector_attach_scaling_mode_property(&connector-
> >base,
> > +
>   allowed_scalers);
> > +
> > +   connector->base.state->scaling_mode =
> DRM_MODE_SCALE_ASPECT;
> > +
> > +   connector->base.display_info.panel_orientation =
> > +   intel_dsi_get_panel_orientation(connector);
> > +   drm_connector_init_panel_orientation_property(
> > +   &connector->base,
> > +   connector->panel.fixed_mode->hdisplay,
> > +   connector->panel.fixed_mode->vdisplay);
> 
> I think I'd rather just duplicate the required parts in the icl code.
> That way we don't have to have VLV/CHV specific stuff in the generic code.
Okay, will make the change.
Thanks
Vandita

> 
> > +   }
> > +}
> > diff --git a/drivers/gpu/drm/i915/intel_dsi.h
> > b/drivers/gpu/drm/i915/intel_dsi.h
> > index 6d20434636cd..11f7bfb28299 100644
> > --- a/drivers/gpu/drm/i915/intel_dsi.h
> > +++ b/drivers/gpu/drm/i915/intel_dsi.h
> > @@ -162,6 +162,7 @@ int intel_dsi_bitrate(const struct intel_dsi
> > *intel_dsi);  int intel_dsi_tlpx_ns(const struct intel_dsi
> > *intel_dsi);  enum drm_panel_orientation
> > intel_dsi_get_panel_orientation(struct intel_connector *connector);
> > +void intel_dsi_add_properties(struct intel_connector *connector);
> >
> >  /* vlv_dsi.c */
> >  void vlv_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum
> > port port); @@ -173,6 +174,8 @@ struct intel_dsi_host
> *intel_dsi_host_init(struct intel_dsi *intel_dsi,
> >const struct mipi_dsi_host_ops
> *funcs,
> >enum port port);
> >  void vlv_dsi_init(struct drm_i915_private *dev_priv);
> > +enum drm_panel_orientation
> > +vlv_dsi_get_hw_panel_orientation(struct intel_connector *connector);
> >
> >  /* vlv_dsi_pll.c */
> >  int vlv_dsi_pll_compute(struct intel_encoder *encoder, diff --git
> > a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c
> > index e272d826210a..9f911623d685 100644
> > --- a/drivers/gpu/drm/i915/vlv_dsi.c
> > +++ b/drivers/gpu/drm/i915/vlv_dsi.c
> > @@ -1591,7 +1591,7 @@ static const struct drm_connector_funcs
> intel_dsi_connector_funcs = {
> > .atomic_duplicate_state = intel_digital_connector_duplicate_state,
> >  };
> >
> > -static enum drm_panel_orientation
> > +enum drm_panel_orientation
> >  vlv_dsi_get_hw_panel_orientation(struct intel_connector *connector)
> > {
> > struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> @@
> > -1629,46 +1629,6 @@ vlv_dsi_get_hw_panel_orientation(struct
> intel_connector *conn

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: kerneldoc warnings squelched

2019-06-12 Thread Patchwork
== Series Details ==

Series: drm/i915: kerneldoc warnings squelched
URL   : https://patchwork.freedesktop.org/series/61969/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
0df0f9fce05a drm/i915: kerneldoc warnings squelched
-:9: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description 
(prefer a maximum 75 chars per line)
#9: 
drivers/gpu/drm/i915//gem/i915_gem_shrinker.c:142: warning: Function parameter 
or member 'shrink' not described in 'i915_gem_shrink'

total: 0 errors, 1 warnings, 0 checks, 16 lines checked

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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2] drm/i915: Keep contexts pinned until after the next kernel context switch (rev2)

2019-06-12 Thread Patchwork
== Series Details ==

Series: series starting with [v2] drm/i915: Keep contexts pinned until after 
the next kernel context switch (rev2)
URL   : https://patchwork.freedesktop.org/series/61946/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6251 -> Patchwork_13254


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13254/

Known issues


  Here are the changes found in Patchwork_13254 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@vgem_basic@dmabuf-fence:
- fi-icl-u3:  [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) +2 
similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6251/fi-icl-u3/igt@vgem_ba...@dmabuf-fence.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13254/fi-icl-u3/igt@vgem_ba...@dmabuf-fence.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s4-devices:
- fi-blb-e6850:   [INCOMPLETE][3] ([fdo#107718]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6251/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13254/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html

  * igt@gem_flink_basic@double-flink:
- fi-icl-u3:  [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6] +1 
similar issue
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6251/fi-icl-u3/igt@gem_flink_ba...@double-flink.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13254/fi-icl-u3/igt@gem_flink_ba...@double-flink.html

  
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724


Participating hosts (51 -> 47)
--

  Additional (2): fi-icl-dsi fi-skl-iommu 
  Missing(6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-byt-clapper 


Build changes
-

  * Linux: CI_DRM_6251 -> Patchwork_13254

  CI_DRM_6251: 796f31ae8178af1598db09c4640873504a36b395 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5053: b90ebd9c21518f305a61ee50aea38462ef01e65c @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13254: 3028af14aae113fb2d3aacbaf81e841584ef3734 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

3028af14aae1 drm/i915/execlists: Force preemption
cd324ac73cb8 drm/i915/execlists: Minimalistic timeslicing
aff0830f921c drm/i915/execlists: Preempt-to-busy
d40bab648ec8 drm/i915: Flush the execution-callbacks on retiring
a458b25070a5 drm/i915: Replace engine->timeline with a plain list
11e02dde299e drm/i915: Stop retiring along engine
8566c15aaa58 drm/i915: Keep contexts pinned until after the next kernel context 
switch

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13254/
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Re: [Intel-gfx] [PATCH 3/4] drm/i915: Make pipe_config_err() vs. fastset less confusing

2019-06-12 Thread Imre Deak
On Wed, Jun 12, 2019 at 04:08:00PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> Rename pipe_config_err() to pipe_config_mismatch(), and also print
> whether we're doing the fastset check or the sw vs. hw state readout
> check. Should make the logs a bit less confusing when they're not
> filled with what looks like a real error.
> 
> Also rename the 'adjust' variable to 'fastset' to make it clear what
> it means.
> 
> Signed-off-by: Ville Syrjälä 

Makes it easier to differentiate the two reason for a comparison
mismatch in the log at a glance:

Reviewed-by: Imre Deak 

> ---
>  drivers/gpu/drm/i915/intel_display.c | 158 +--
>  1 file changed, 79 insertions(+), 79 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index dcc301df6174..ec3b7e825613 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -12309,16 +12309,16 @@ intel_compare_infoframe(const union hdmi_infoframe 
> *a,
>  }
>  
>  static void
> -pipe_config_infoframe_err(struct drm_i915_private *dev_priv,
> -   bool adjust, const char *name,
> -   const union hdmi_infoframe *a,
> -   const union hdmi_infoframe *b)
> +pipe_config_infoframe_mismatch(struct drm_i915_private *dev_priv,
> +bool fastset, const char *name,
> +const union hdmi_infoframe *a,
> +const union hdmi_infoframe *b)
>  {
> - if (adjust) {
> + if (fastset) {
>   if ((drm_debug & DRM_UT_KMS) == 0)
>   return;
>  
> - drm_dbg(DRM_UT_KMS, "mismatch in %s infoframe", name);
> + drm_dbg(DRM_UT_KMS, "fastset mismatch in %s infoframe", name);
>   drm_dbg(DRM_UT_KMS, "expected:");
>   hdmi_infoframe_log(KERN_DEBUG, dev_priv->drm.dev, a);
>   drm_dbg(DRM_UT_KMS, "found");
> @@ -12333,7 +12333,7 @@ pipe_config_infoframe_err(struct drm_i915_private 
> *dev_priv,
>  }
>  
>  static void __printf(3, 4)
> -pipe_config_err(bool adjust, const char *name, const char *format, ...)
> +pipe_config_mismatch(bool fastset, const char *name, const char *format, ...)
>  {
>   struct va_format vaf;
>   va_list args;
> @@ -12342,8 +12342,8 @@ pipe_config_err(bool adjust, const char *name, const 
> char *format, ...)
>   vaf.fmt = format;
>   vaf.va = &args;
>  
> - if (adjust)
> - drm_dbg(DRM_UT_KMS, "mismatch in %s %pV", name, &vaf);
> + if (fastset)
> + drm_dbg(DRM_UT_KMS, "fastset mismatch in %s %pV", name, &vaf);
>   else
>   drm_err("mismatch in %s %pV", name, &vaf);
>  
> @@ -12370,11 +12370,11 @@ static bool fastboot_enabled(struct 
> drm_i915_private *dev_priv)
>  static bool
>  intel_pipe_config_compare(const struct intel_crtc_state *current_config,
> const struct intel_crtc_state *pipe_config,
> -   bool adjust)
> +   bool fastset)
>  {
>   struct drm_i915_private *dev_priv = 
> to_i915(current_config->base.crtc->dev);
>   bool ret = true;
> - bool fixup_inherited = adjust &&
> + bool fixup_inherited = fastset &&
>   (current_config->base.mode.private_flags & 
> I915_MODE_FLAG_INHERITED) &&
>   !(pipe_config->base.mode.private_flags & 
> I915_MODE_FLAG_INHERITED);
>  
> @@ -12385,30 +12385,30 @@ intel_pipe_config_compare(const struct 
> intel_crtc_state *current_config,
>  
>  #define PIPE_CONF_CHECK_X(name) do { \
>   if (current_config->name != pipe_config->name) { \
> - pipe_config_err(adjust, __stringify(name), \
> -   "(expected 0x%08x, found 0x%08x)\n", \
> -   current_config->name, \
> -   pipe_config->name); \
> + pipe_config_mismatch(fastset, __stringify(name), \
> +  "(expected 0x%08x, found 0x%08x)\n", \
> +  current_config->name, \
> +  pipe_config->name); \
>   ret = false; \
>   } \
>  } while (0)
>  
>  #define PIPE_CONF_CHECK_I(name) do { \
>   if (current_config->name != pipe_config->name) { \
> - pipe_config_err(adjust, __stringify(name), \
> -   "(expected %i, found %i)\n", \
> -   current_config->name, \
> -   pipe_config->name); \
> + pipe_config_mismatch(fastset, __stringify(name), \
> +  "(expected %i, found %i)\n", \
> +  current_config->name, \
> +  pipe_config->name); \
>   ret = false; \
>   } \
>  } while (0)
>  
>  #define PIPE_CONF_CHECK_BOOL(name) do { \
>   if (current_config->name != pipe_config->name) { \
> - pi

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2] drm/i915: Keep contexts pinned until after the next kernel context switch (rev2)

2019-06-12 Thread Patchwork
== Series Details ==

Series: series starting with [v2] drm/i915: Keep contexts pinned until after 
the next kernel context switch (rev2)
URL   : https://patchwork.freedesktop.org/series/61946/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Keep contexts pinned until after the next kernel context 
switch
Okay!

Commit: drm/i915: Stop retiring along engine
Okay!

Commit: drm/i915: Replace engine->timeline with a plain list
Okay!

Commit: drm/i915: Flush the execution-callbacks on retiring
Okay!

Commit: drm/i915/execlists: Preempt-to-busy
-drivers/gpu/drm/i915/selftests/../i915_utils.h:220:16: warning: expression 
using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_utils.h:232:16: warning: expression 
using sizeof(void)

Commit: drm/i915/execlists: Minimalistic timeslicing
+drivers/gpu/drm/i915/gt/intel_lrc.c:876:16: warning: expression using 
sizeof(void)
+drivers/gpu/drm/i915/gt/intel_lrc.c:876:16: warning: expression using 
sizeof(void)

Commit: drm/i915/execlists: Force preemption
+
+drivers/gpu/drm/i915/i915_utils.h:232:16: warning: expression using 
sizeof(void)
+Error in reading or end of file.

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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2] drm/i915: Keep contexts pinned until after the next kernel context switch (rev2)

2019-06-12 Thread Patchwork
== Series Details ==

Series: series starting with [v2] drm/i915: Keep contexts pinned until after 
the next kernel context switch (rev2)
URL   : https://patchwork.freedesktop.org/series/61946/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
8566c15aaa58 drm/i915: Keep contexts pinned until after the next kernel context 
switch
11e02dde299e drm/i915: Stop retiring along engine
a458b25070a5 drm/i915: Replace engine->timeline with a plain list
-:180: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#180: FILE: drivers/gpu/drm/i915/gt/intel_engine_types.h:292:
+   spinlock_t lock;

total: 0 errors, 0 warnings, 1 checks, 968 lines checked
d40bab648ec8 drm/i915: Flush the execution-callbacks on retiring
aff0830f921c drm/i915/execlists: Preempt-to-busy
-:1494: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'p_ptr' - possible 
side-effects?
#1494: FILE: drivers/gpu/drm/i915/i915_utils.h:134:
+#define ptr_count_dec(p_ptr) do {  \
+   typeof(p_ptr) __p = (p_ptr);\
+   unsigned long __v = (unsigned long)(*__p);  \
+   *__p = (typeof(*p_ptr))(--__v); \
+} while (0)

-:1500: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'p_ptr' - possible 
side-effects?
#1500: FILE: drivers/gpu/drm/i915/i915_utils.h:140:
+#define ptr_count_inc(p_ptr) do {  \
+   typeof(p_ptr) __p = (p_ptr);\
+   unsigned long __v = (unsigned long)(*__p);  \
+   *__p = (typeof(*p_ptr))(++__v); \
+} while (0)

-:1783: WARNING:LINE_SPACING: Missing a blank line after declarations
#1783: FILE: drivers/gpu/drm/i915/intel_guc_submission.c:820:
+   int rem = ARRAY_SIZE(execlists->inflight) - idx;
+   memmove(execlists->inflight, port, rem * sizeof(*port));

total: 0 errors, 1 warnings, 2 checks, 1682 lines checked
cd324ac73cb8 drm/i915/execlists: Minimalistic timeslicing
-:345: WARNING:LONG_LINE: line over 100 characters
#345: FILE: drivers/gpu/drm/i915/gt/selftest_lrc.c:211:
+ 2 * RUNTIME_INFO(outer->i915)->num_engines * 
(count + 2) * (count + 3)) < 0) {

total: 0 errors, 1 warnings, 0 checks, 426 lines checked
3028af14aae1 drm/i915/execlists: Force preemption

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Re: [Intel-gfx] [PATCH] drm/i915: kerneldoc warnings squelched

2019-06-12 Thread Ville Syrjälä
On Wed, Jun 12, 2019 at 04:13:11PM +0100, Chris Wilson wrote:
> drivers/gpu/drm/i915//gem/i915_gem_shrinker.c:142: warning: Function 
> parameter or member 'shrink' not described in 'i915_gem_shrink'
> drivers/gpu/drm/i915//gem/i915_gem_shrinker.c:142: warning: Excess function 
> parameter 'flags' description in 'i915_gem_shrink'
> 
> drivers/gpu/drm/i915//intel_display.c:13443: warning: Function parameter or 
> member '_state' not described in 'intel_atomic_check'
> drivers/gpu/drm/i915//intel_display.c:13443: warning: Excess function 
> parameter 'state' description in 'intel_atomic_check'
> 
> Signed-off-by: Chris Wilson 
> ---
>  drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 2 +-
>  drivers/gpu/drm/i915/intel_display.c | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c 
> b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
> index 1b93bc334630..e15f37bef36a 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
> @@ -114,7 +114,7 @@ static void try_to_writeback(struct drm_i915_gem_object 
> *obj,
>   * @i915: i915 device
>   * @target: amount of memory to make available, in pages
>   * @nr_scanned: optional output for number of pages scanned (incremental)
> - * @flags: control flags for selecting cache types
> + * @shrink: control flags for selecting cache types
>   *
>   * This function is the main interface to the shrinker. It will try to 
> release
>   * up to @target pages of main memory backing storage from buffer objects.
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index 1b1ddb48ca7a..e681ed99cdf2 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -13436,7 +13436,7 @@ static int calc_watermark_data(struct 
> intel_atomic_state *state)
>  /**
>   * intel_atomic_check - validate state object
>   * @dev: drm device
> - * @state: state to validate
> + * @_state: state to validate
>   */

Not sure most of these docs are actually useful. But too lazy to
look through all of them to check.

Reviewed-by: Ville Syrjälä 

>  static int intel_atomic_check(struct drm_device *dev,
> struct drm_atomic_state *_state)
> -- 
> 2.20.1
> 
> ___
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
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[Intel-gfx] [PATCH] drm/i915: kerneldoc warnings squelched

2019-06-12 Thread Chris Wilson
drivers/gpu/drm/i915//gem/i915_gem_shrinker.c:142: warning: Function parameter 
or member 'shrink' not described in 'i915_gem_shrink'
drivers/gpu/drm/i915//gem/i915_gem_shrinker.c:142: warning: Excess function 
parameter 'flags' description in 'i915_gem_shrink'

drivers/gpu/drm/i915//intel_display.c:13443: warning: Function parameter or 
member '_state' not described in 'intel_atomic_check'
drivers/gpu/drm/i915//intel_display.c:13443: warning: Excess function parameter 
'state' description in 'intel_atomic_check'

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 2 +-
 drivers/gpu/drm/i915/intel_display.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c 
b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
index 1b93bc334630..e15f37bef36a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
@@ -114,7 +114,7 @@ static void try_to_writeback(struct drm_i915_gem_object 
*obj,
  * @i915: i915 device
  * @target: amount of memory to make available, in pages
  * @nr_scanned: optional output for number of pages scanned (incremental)
- * @flags: control flags for selecting cache types
+ * @shrink: control flags for selecting cache types
  *
  * This function is the main interface to the shrinker. It will try to release
  * up to @target pages of main memory backing storage from buffer objects.
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 1b1ddb48ca7a..e681ed99cdf2 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13436,7 +13436,7 @@ static int calc_watermark_data(struct 
intel_atomic_state *state)
 /**
  * intel_atomic_check - validate state object
  * @dev: drm device
- * @state: state to validate
+ * @_state: state to validate
  */
 static int intel_atomic_check(struct drm_device *dev,
  struct drm_atomic_state *_state)
-- 
2.20.1

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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2)

2019-06-12 Thread Patchwork
== Series Details ==

Series: series starting with [1/2] drm/i915/guc: Move 
intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2)
URL   : https://patchwork.freedesktop.org/series/61887/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6230_full -> Patchwork_13240_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Known issues


  Here are the changes found in Patchwork_13240_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_isolation@vecs0-s3:
- shard-skl:  [PASS][1] -> [INCOMPLETE][2] ([fdo#104108])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl1/igt@gem_ctx_isolat...@vecs0-s3.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-skl5/igt@gem_ctx_isolat...@vecs0-s3.html

  * igt@gem_softpin@noreloc-s3:
- shard-apl:  [PASS][3] -> [DMESG-WARN][4] ([fdo#108566])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl6/igt@gem_soft...@noreloc-s3.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-apl7/igt@gem_soft...@noreloc-s3.html

  * igt@kms_flip@flip-vs-expired-vblank:
- shard-skl:  [PASS][5] -> [FAIL][6] ([fdo#105363])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl4/igt@kms_f...@flip-vs-expired-vblank.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-skl4/igt@kms_f...@flip-vs-expired-vblank.html

  * igt@kms_flip_tiling@flip-to-x-tiled:
- shard-iclb: [PASS][7] -> [FAIL][8] ([fdo#108134])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb5/igt@kms_flip_til...@flip-to-x-tiled.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-iclb4/igt@kms_flip_til...@flip-to-x-tiled.html

  * igt@kms_flip_tiling@flip-x-tiled:
- shard-iclb: [PASS][9] -> [FAIL][10] ([fdo#108303])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb5/igt@kms_flip_til...@flip-x-tiled.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-iclb4/igt@kms_flip_til...@flip-x-tiled.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
- shard-iclb: [PASS][11] -> [FAIL][12] ([fdo#103167]) +1 similar 
issue
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb3/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-iclb5/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt:
- shard-hsw:  [PASS][13] -> [SKIP][14] ([fdo#109271]) +20 similar 
issues
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw8/igt@kms_frontbuffer_track...@fbc-2p-primscrn-indfb-plflip-blt.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-hsw1/igt@kms_frontbuffer_track...@fbc-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_setmode@basic:
- shard-hsw:  [PASS][15] -> [FAIL][16] ([fdo#99912])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw1/igt@kms_setm...@basic.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-hsw8/igt@kms_setm...@basic.html
- shard-kbl:  [PASS][17] -> [FAIL][18] ([fdo#99912])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-kbl2/igt@kms_setm...@basic.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-kbl3/igt@kms_setm...@basic.html

  
 Possible fixes 

  * igt@gem_eio@in-flight-suspend:
- shard-glk:  [FAIL][19] ([fdo#110667]) -> [PASS][20]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-glk2/igt@gem_...@in-flight-suspend.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-glk4/igt@gem_...@in-flight-suspend.html

  * igt@gem_mmap_gtt@forked-medium-copy:
- shard-iclb: [INCOMPLETE][21] ([fdo#107713]) -> [PASS][22]
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb4/igt@gem_mmap_...@forked-medium-copy.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-iclb3/igt@gem_mmap_...@forked-medium-copy.html

  * igt@i915_suspend@sysfs-reader:
- shard-apl:  [DMESG-WARN][23] ([fdo#108566]) -> [PASS][24]
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl5/igt@i915_susp...@sysfs-reader.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-apl7/igt@i915_susp...@sysfs-reader.html

  * igt@kms_cursor_crc@pipe-b-cursor-128x128-onscreen:
- shard-apl:  [INCOMPLETE][25] ([fdo#103927]) -> [PASS][26]
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl8/igt@kms_cursor_...@pipe-b-cursor-128x128-onscreen.html
   [26]: 
https://intel-gfx-

Re: [Intel-gfx] ✗ Fi.CI.SPARSE: warning for dma-fence/reservation: Markup rcu protected access for DEBUG_MUTEXES

2019-06-12 Thread Chris Wilson
Quoting Patchwork (2019-06-12 15:07:50)
> == Series Details ==
> 
> Series: dma-fence/reservation: Markup rcu protected access for DEBUG_MUTEXES
> URL   : https://patchwork.freedesktop.org/series/61963/
> State : warning
> 
> == Summary ==
> 
> $ dim sparse origin/drm-tip
> Sparse version: v0.5.2
> Commit: dma-fence/reservation: Markup rcu protected access for DEBUG_MUTEXES
> -./include/linux/reservation.h:220:20: warning: dereference of noderef 
> expression
[snip]
> -./include/linux/reservation.h:220:45: warning: dereference of noderef 
> expression
> -./include/linux/reservation

That'll cheer up some of the warnings CI periodically sends.
Thanks for the quick review,
-Chris
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[Intel-gfx] ✓ Fi.CI.BAT: success for dma-fence/reservation: Markup rcu protected access for DEBUG_MUTEXES

2019-06-12 Thread Patchwork
== Series Details ==

Series: dma-fence/reservation: Markup rcu protected access for DEBUG_MUTEXES
URL   : https://patchwork.freedesktop.org/series/61963/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6249 -> Patchwork_13253


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13253/

Known issues


  Here are the changes found in Patchwork_13253 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_suspend@basic-s4-devices:
- fi-blb-e6850:   [PASS][1] -> [INCOMPLETE][2] ([fdo#107718])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6249/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13253/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html

  * igt@i915_module_load@reload-no-display:
- fi-icl-dsi: [PASS][3] -> [INCOMPLETE][4] ([fdo#107713])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6249/fi-icl-dsi/igt@i915_module_l...@reload-no-display.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13253/fi-icl-dsi/igt@i915_module_l...@reload-no-display.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u:   [PASS][5] -> [FAIL][6] ([fdo#109485])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6249/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13253/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html

  
 Possible fixes 

  * igt@gem_ctx_switch@basic-default:
- fi-icl-guc: [INCOMPLETE][7] ([fdo#107713] / [fdo#108569]) -> 
[PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6249/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13253/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-icl-u3:  [FAIL][9] ([fdo#103167]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6249/fi-icl-u3/igt@kms_frontbuffer_track...@basic.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13253/fi-icl-u3/igt@kms_frontbuffer_track...@basic.html

  * igt@prime_vgem@basic-busy-default:
- fi-icl-u3:  [DMESG-WARN][11] ([fdo#107724]) -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6249/fi-icl-u3/igt@prime_v...@basic-busy-default.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13253/fi-icl-u3/igt@prime_v...@basic-busy-default.html

  
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485


Participating hosts (54 -> 47)
--

  Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-byt-clapper fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_6249 -> Patchwork_13253

  CI_DRM_6249: ad2da645fd69d899e9415712648e095f5ffd0e8f @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5053: b90ebd9c21518f305a61ee50aea38462ef01e65c @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13253: 2e975fe17885a94bf30e3d96df2cb9b5607f22bf @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

2e975fe17885 dma-fence/reservation: Markup rcu protected access for 
DEBUG_MUTEXES

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13253/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2] drm/i915: Keep contexts pinned until after the next kernel context switch

2019-06-12 Thread Chris Wilson
We need to keep the context image pinned in memory until after the GPU
has finished writing into it. Since it continues to write as we signal
the final breadcrumb, we need to keep it pinned until the request after
it is complete. Currently we know the order in which requests execute on
each engine, and so to remove that presumption we need to identify a
request/context-switch we know must occur after our completion. Any
request queued after the signal must imply a context switch, for
simplicity we use a fresh request from the kernel context.

The sequence of operations for keeping the context pinned until saved is:

 - On context activation, we preallocate a node for each physical engine
   the context may operate on. This is to avoid allocations during
   unpinning, which may be from inside FS_RECLAIM context (aka the
   shrinker)

 - On context deactivation on retirement of the last active request (which
   is before we know the context has been saved), we add the
   preallocated node onto a barrier list on each engine

 - On engine idling, we emit a switch to kernel context. When this
   switch completes, we know that all previous contexts must have been
   saved, and so on retiring this request we can finally unpin all the
   contexts that were marked as deactivated prior to the switch.

We can enhance this in future by flushing all the idle contexts on a
regular heartbeat pulse of a switch to kernel context, which will also
be used to check for hung engines.

v2: intel_context_active_acquire/_release

Signed-off-by: Chris Wilson 
Cc: Mika Kuoppala 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c   | 24 ++
 drivers/gpu/drm/i915/gem/i915_gem_context.h   |  1 -
 drivers/gpu/drm/i915/gem/i915_gem_pm.c| 20 -
 drivers/gpu/drm/i915/gt/intel_context.c   | 80 ---
 drivers/gpu/drm/i915/gt/intel_context.h   |  3 +
 drivers/gpu/drm/i915/gt/intel_context_types.h |  6 +-
 drivers/gpu/drm/i915/gt/intel_engine.h|  2 -
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 23 +-
 drivers/gpu/drm/i915/gt/intel_engine_pm.c |  2 +
 drivers/gpu/drm/i915/gt/intel_engine_types.h  | 13 +--
 drivers/gpu/drm/i915/gt/intel_lrc.c   | 62 ++
 drivers/gpu/drm/i915/gt/intel_ringbuffer.c| 44 +-
 drivers/gpu/drm/i915/gt/mock_engine.c | 11 +--
 drivers/gpu/drm/i915/i915_active.c| 78 ++
 drivers/gpu/drm/i915/i915_active.h|  5 ++
 drivers/gpu/drm/i915/i915_active_types.h  |  3 +
 drivers/gpu/drm/i915/i915_gem.c   |  4 -
 drivers/gpu/drm/i915/i915_request.c   | 15 
 .../gpu/drm/i915/selftests/mock_gem_device.c  |  1 -
 19 files changed, 213 insertions(+), 184 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index c86ca9f21532..6200060aef05 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -692,17 +692,6 @@ int i915_gem_contexts_init(struct drm_i915_private 
*dev_priv)
return 0;
 }
 
-void i915_gem_contexts_lost(struct drm_i915_private *dev_priv)
-{
-   struct intel_engine_cs *engine;
-   enum intel_engine_id id;
-
-   lockdep_assert_held(&dev_priv->drm.struct_mutex);
-
-   for_each_engine(engine, dev_priv, id)
-   intel_engine_lost_context(engine);
-}
-
 void i915_gem_contexts_fini(struct drm_i915_private *i915)
 {
lockdep_assert_held(&i915->drm.struct_mutex);
@@ -1203,10 +1192,6 @@ gen8_modify_rpcs(struct intel_context *ce, struct 
intel_sseu sseu)
if (ret)
goto out_add;
 
-   ret = gen8_emit_rpcs_config(rq, ce, sseu);
-   if (ret)
-   goto out_add;
-
/*
 * Guarantee context image and the timeline remains pinned until the
 * modifying request is retired by setting the ce activity tracker.
@@ -1214,9 +1199,12 @@ gen8_modify_rpcs(struct intel_context *ce, struct 
intel_sseu sseu)
 * But we only need to take one pin on the account of it. Or in other
 * words transfer the pinned ce object to tracked active request.
 */
-   if (!i915_active_request_isset(&ce->active_tracker))
-   __intel_context_pin(ce);
-   __i915_active_request_set(&ce->active_tracker, rq);
+   GEM_BUG_ON(i915_active_is_idle(&ce->active));
+   ret = i915_active_ref(&ce->active, rq->fence.context, rq);
+   if (ret)
+   goto out_add;
+
+   ret = gen8_emit_rpcs_config(rq, ce, sseu);
 
 out_add:
i915_request_add(rq);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.h 
b/drivers/gpu/drm/i915/gem/i915_gem_context.h
index 630392c77e48..9691dd062f72 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.h
@@ -134,7 +134,6 @@ static inline bool i915_gem_context_is_kernel(struct 
i915_gem_context *ctx)
 
 /* i915_gem_context.c */
 int __must_check i915_gem_c

Re: [Intel-gfx] [PATCH 1/8] drm/i915: Keep contexts pinned until after the next kernel context switch

2019-06-12 Thread Chris Wilson
Quoting Mika Kuoppala (2019-06-12 15:09:49)
> Chris Wilson  writes:
> >> > +int i915_active_acquire_preallocate_barrier(struct i915_active *ref,
> >> > + struct intel_engine_cs *engine)
> >> > +{
> >> > + struct drm_i915_private *i915 = engine->i915;
> >> > + unsigned long tmp;
> >> > + int err = 0;
> >> > +
> >> > + GEM_BUG_ON(!engine->mask);
> >> > + for_each_engine_masked(engine, i915, engine->mask, tmp) {
> >> > + struct intel_context *kctx = engine->kernel_context;
> >> > + struct active_node *node;
> >> > +
> >> > + node = kmem_cache_alloc(global.slab_cache, GFP_KERNEL);
> >> > + if (unlikely(!node)) {
> >> > + err = -ENOMEM;
> >> > + break;
> >> > + }
> >> > +
> >> > + i915_active_request_init(&node->base,
> >> > +  (void *)engine, node_retire);
> 
> In commit you promise that you will queue a request for kernel context.
> But in here, you seem to use (abuse!?) the active request to
> make a shadow of a request and use it to call the idle barriers.

So this is preallocate, because we have to reserve some memory when
pinning the context as we cannot allocate during unpinning (which can
happen inside the shrinker).

Then on context unpin, we attach this preallocated node onto a list on
the engine, all while keeping the context marked as still active.

Later on, when the engine is marked as idle we flush the barriers with a
context switch to the kernel, see switch_to_kernel_context() in
intel_engine_pm.c, and the i915_request_add_barriers().

The intention is that we also call i915_request_add_barriers() when
emitting the heartbeat requests (once we eliminate the struct_mutex
interposition) so that there is a regular idling pulse and contexts are
not pinned for an eternity.
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 1/8] drm/i915: Keep contexts pinned until after the next kernel context switch

2019-06-12 Thread Mika Kuoppala
Chris Wilson  writes:

> Quoting Mika Kuoppala (2019-06-12 14:29:48)
>> Chris Wilson  writes:
>> 
>> > We need to keep the context image pinned in memory until after the GPU
>> > has finished writing into it. Since it continues to write as we signal
>> > the final breadcrumb, we need to keep it pinned until the request after
>> > it is complete. Currently we know the order in which requests execute on
>> > each engine, and so to remove that presumption we need to identify a
>> > request/context-switch we know must occur after our completion. Any
>> > request queued after the signal must imply a context switch, for
>> > simplicity we use a fresh request from the kernel context.
>> >
>> > Signed-off-by: Chris Wilson 
>> > ---
>> >  drivers/gpu/drm/i915/gem/i915_gem_context.c   | 24 ++
>> >  drivers/gpu/drm/i915/gem/i915_gem_context.h   |  1 -
>> >  drivers/gpu/drm/i915/gem/i915_gem_pm.c| 20 -
>> >  drivers/gpu/drm/i915/gt/intel_context.c   | 80 ---
>> >  drivers/gpu/drm/i915/gt/intel_context.h   |  3 +
>> >  drivers/gpu/drm/i915/gt/intel_context_types.h |  6 +-
>> >  drivers/gpu/drm/i915/gt/intel_engine.h|  2 -
>> >  drivers/gpu/drm/i915/gt/intel_engine_cs.c | 23 +-
>> >  drivers/gpu/drm/i915/gt/intel_engine_pm.c |  2 +
>> >  drivers/gpu/drm/i915/gt/intel_engine_types.h  | 13 +--
>> >  drivers/gpu/drm/i915/gt/intel_lrc.c   | 62 ++
>> >  drivers/gpu/drm/i915/gt/intel_ringbuffer.c| 44 +-
>> >  drivers/gpu/drm/i915/gt/mock_engine.c | 11 +--
>> >  drivers/gpu/drm/i915/i915_active.c| 80 ++-
>> >  drivers/gpu/drm/i915/i915_active.h|  5 ++
>> >  drivers/gpu/drm/i915/i915_active_types.h  |  3 +
>> >  drivers/gpu/drm/i915/i915_gem.c   |  4 -
>> >  drivers/gpu/drm/i915/i915_request.c   | 15 
>> >  .../gpu/drm/i915/selftests/mock_gem_device.c  |  1 -
>> >  19 files changed, 214 insertions(+), 185 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
>> > b/drivers/gpu/drm/i915/gem/i915_gem_context.c
>> > index c86ca9f21532..6200060aef05 100644
>> > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
>> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
>> > @@ -692,17 +692,6 @@ int i915_gem_contexts_init(struct drm_i915_private 
>> > *dev_priv)
>> >   return 0;
>> >  }
>> >  
>> > -void i915_gem_contexts_lost(struct drm_i915_private *dev_priv)
>> > -{
>> > - struct intel_engine_cs *engine;
>> > - enum intel_engine_id id;
>> > -
>> > - lockdep_assert_held(&dev_priv->drm.struct_mutex);
>> > -
>> > - for_each_engine(engine, dev_priv, id)
>> > - intel_engine_lost_context(engine);
>> > -}
>> > -
>> >  void i915_gem_contexts_fini(struct drm_i915_private *i915)
>> >  {
>> >   lockdep_assert_held(&i915->drm.struct_mutex);
>> > @@ -1203,10 +1192,6 @@ gen8_modify_rpcs(struct intel_context *ce, struct 
>> > intel_sseu sseu)
>> >   if (ret)
>> >   goto out_add;
>> >  
>> > - ret = gen8_emit_rpcs_config(rq, ce, sseu);
>> > - if (ret)
>> > - goto out_add;
>> > -
>> >   /*
>> >* Guarantee context image and the timeline remains pinned until the
>> >* modifying request is retired by setting the ce activity tracker.
>> > @@ -1214,9 +1199,12 @@ gen8_modify_rpcs(struct intel_context *ce, struct 
>> > intel_sseu sseu)
>> >* But we only need to take one pin on the account of it. Or in other
>> >* words transfer the pinned ce object to tracked active request.
>> >*/
>> > - if (!i915_active_request_isset(&ce->active_tracker))
>> > - __intel_context_pin(ce);
>> > - __i915_active_request_set(&ce->active_tracker, rq);
>> > + GEM_BUG_ON(i915_active_is_idle(&ce->active));
>> > + ret = i915_active_ref(&ce->active, rq->fence.context, rq);
>> 
>> 
>> Why the place to keep the context alive is this function?
>
> This is a special case where we have one context (the kernel context)
> writing into the context state object of another. To keep the target
> context state pinned, we mark the entire context as active.
>  
>> In other words, if the sseu state is not changed, we bail out early
>> and don't setup the tracker and thus fail in promise for keeping it alive.
>
> As we don't need to keep it alive for an access that never happened.
>
>> > + if (ret)
>> > + goto out_add;
>> > +
>> > + ret = gen8_emit_rpcs_config(rq, ce, sseu);
>> >  
>> >  out_add:
>> >   i915_request_add(rq);
>> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.h 
>> > b/drivers/gpu/drm/i915/gem/i915_gem_context.h
>> > index 630392c77e48..9691dd062f72 100644
>> > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.h
>> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.h
>> > @@ -134,7 +134,6 @@ static inline bool i915_gem_context_is_kernel(struct 
>> > i915_gem_context *ctx)
>> >  
>> >  /* i915_gem_context.c */
>> >  int __m

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for dma-fence/reservation: Markup rcu protected access for DEBUG_MUTEXES

2019-06-12 Thread Patchwork
== Series Details ==

Series: dma-fence/reservation: Markup rcu protected access for DEBUG_MUTEXES
URL   : https://patchwork.freedesktop.org/series/61963/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: dma-fence/reservation: Markup rcu protected access for DEBUG_MUTEXES
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:20: warning: dereference of noderef 
expression
-./include/linux/reservation.h:220:2

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Don't clobber M/N values during fastset check

2019-06-12 Thread Patchwork
== Series Details ==

Series: series starting with [1/4] drm/i915: Don't clobber M/N values during 
fastset check
URL   : https://patchwork.freedesktop.org/series/61960/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6248 -> Patchwork_13252


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_13252 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_13252, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13252/

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_13252:

### IGT changes ###

 Possible regressions 

  * igt@gem_close_race@basic-threads:
- fi-icl-y:   [PASS][1] -> [DMESG-WARN][2] +8 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6248/fi-icl-y/igt@gem_close_r...@basic-threads.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13252/fi-icl-y/igt@gem_close_r...@basic-threads.html

  
Known issues


  Here are the changes found in Patchwork_13252 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@kms_chamelium@dp-crc-fast:
- fi-cml-u2:  [PASS][3] -> [FAIL][4] ([fdo#110627])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6248/fi-cml-u2/igt@kms_chamel...@dp-crc-fast.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13252/fi-cml-u2/igt@kms_chamel...@dp-crc-fast.html

  * igt@kms_flip@basic-flip-vs-dpms:
- fi-bxt-dsi: [PASS][5] -> [INCOMPLETE][6] ([fdo#103927])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6248/fi-bxt-dsi/igt@kms_f...@basic-flip-vs-dpms.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13252/fi-bxt-dsi/igt@kms_f...@basic-flip-vs-dpms.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy:   [PASS][7] -> [DMESG-WARN][8] ([fdo#102614])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6248/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13252/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html

  
 Possible fixes 

  * igt@gem_ctx_switch@basic-default:
- fi-icl-u2:  [INCOMPLETE][9] ([fdo#107713] / [fdo#108569]) -> 
[PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6248/fi-icl-u2/igt@gem_ctx_swi...@basic-default.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13252/fi-icl-u2/igt@gem_ctx_swi...@basic-default.html

  * igt@i915_module_load@reload:
- fi-ilk-650: [DMESG-WARN][11] ([fdo#106387]) -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6248/fi-ilk-650/igt@i915_module_l...@reload.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13252/fi-ilk-650/igt@i915_module_l...@reload.html

  
 Warnings 

  * igt@i915_pm_rpm@basic-pci-d3-state:
- fi-kbl-guc: [FAIL][13] ([fdo#110829]) -> [SKIP][14] ([fdo#109271])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6248/fi-kbl-guc/igt@i915_pm_...@basic-pci-d3-state.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13252/fi-kbl-guc/igt@i915_pm_...@basic-pci-d3-state.html

  
  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#106387]: https://bugs.freedesktop.org/show_bug.cgi?id=106387
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#110627]: https://bugs.freedesktop.org/show_bug.cgi?id=110627
  [fdo#110829]: https://bugs.freedesktop.org/show_bug.cgi?id=110829


Participating hosts (53 -> 45)
--

  Additional (1): fi-cml-u 
  Missing(9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-pnv-d510 fi-byt-n2820 fi-byt-clapper fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_6248 -> Patchwork_13252

  CI_DRM_6248: 4f407039f4a40b1a7de2974a87f8aebc1782b74b @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5053: b90ebd9c21518f305a61ee50aea38462ef01e65c @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13252: 90a1b356ee441124c988a62160e5f9caa276c190 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

90a1b356ee44 drm/i915: Drop the _INCOMPLETE for has_infoframe
2b517a2a0592 drm/i915: Make pipe_config_err() vs. fastset less confusing
2e4eb369f0c4 drm/i915: Constify intel_pipe_config_compare()
bc29623ab5e2 drm/i915: Don't clobber M/N values during fastset check

== Logs ==

For more details see: https://intel-gfx-ci.0

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/6] drm/i915: Remove I915_READ8

2019-06-12 Thread Patchwork
== Series Details ==

Series: series starting with [CI,1/6] drm/i915: Remove I915_READ8
URL   : https://patchwork.freedesktop.org/series/61886/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6230_full -> Patchwork_13236_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Known issues


  Here are the changes found in Patchwork_13236_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#110854])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb1/igt@gem_exec_balan...@smoke.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/shard-iclb5/igt@gem_exec_balan...@smoke.html

  * igt@gem_persistent_relocs@forked-interruptible-thrash-inactive:
- shard-apl:  [PASS][3] -> [INCOMPLETE][4] ([fdo#103927])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl8/igt@gem_persistent_rel...@forked-interruptible-thrash-inactive.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/shard-apl7/igt@gem_persistent_rel...@forked-interruptible-thrash-inactive.html

  * igt@gem_tiled_swapping@non-threaded:
- shard-kbl:  [PASS][5] -> [FAIL][6] ([fdo#108686])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-kbl3/igt@gem_tiled_swapp...@non-threaded.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/shard-kbl4/igt@gem_tiled_swapp...@non-threaded.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl:  [PASS][7] -> [DMESG-WARN][8] ([fdo#108566]) +6 
similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl6/igt@i915_susp...@fence-restore-tiled2untiled.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/shard-apl5/igt@i915_susp...@fence-restore-tiled2untiled.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite:
- shard-hsw:  [PASS][9] -> [SKIP][10] ([fdo#109271]) +28 similar 
issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw2/igt@kms_frontbuffer_track...@fbc-2p-primscrn-cur-indfb-draw-pwrite.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/shard-hsw1/igt@kms_frontbuffer_track...@fbc-2p-primscrn-cur-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render:
- shard-iclb: [PASS][11] -> [FAIL][12] ([fdo#103167]) +2 similar 
issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb7/igt@kms_frontbuffer_track...@fbc-rgb565-draw-render.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/shard-iclb6/igt@kms_frontbuffer_track...@fbc-rgb565-draw-render.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-kbl:  [PASS][13] -> [DMESG-WARN][14] ([fdo#108566])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-kbl3/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/shard-kbl3/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-a-planes.html

  * igt@kms_setmode@basic:
- shard-hsw:  [PASS][15] -> [FAIL][16] ([fdo#99912])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw1/igt@kms_setm...@basic.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/shard-hsw2/igt@kms_setm...@basic.html
- shard-kbl:  [PASS][17] -> [FAIL][18] ([fdo#99912])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-kbl2/igt@kms_setm...@basic.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/shard-kbl7/igt@kms_setm...@basic.html

  * igt@perf@polling:
- shard-skl:  [PASS][19] -> [FAIL][20] ([fdo#110728])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl7/igt@p...@polling.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/shard-skl4/igt@p...@polling.html

  
 Possible fixes 

  * igt@gem_eio@in-flight-suspend:
- shard-glk:  [FAIL][21] ([fdo#110667]) -> [PASS][22]
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-glk2/igt@gem_...@in-flight-suspend.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/shard-glk7/igt@gem_...@in-flight-suspend.html

  * igt@gem_mmap_gtt@forked-medium-copy:
- shard-iclb: [INCOMPLETE][23] ([fdo#107713]) -> [PASS][24]
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb4/igt@gem_mmap_...@forked-medium-copy.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/shard-iclb1/igt@gem_mmap_...@forked-medium-copy.html

  * igt@kms_cursor_crc@pipe-b-cursor-128x128-onscreen:
- shard-apl:  [INCOMPLETE][25] ([fdo#103927]) -> [PASS][26]
   [25]: 
https://intel-gfx-ci.01.org/tr

Re: [Intel-gfx] [PATCH 1/8] drm/i915: Keep contexts pinned until after the next kernel context switch

2019-06-12 Thread Chris Wilson
Quoting Mika Kuoppala (2019-06-12 14:29:48)
> Chris Wilson  writes:
> 
> > We need to keep the context image pinned in memory until after the GPU
> > has finished writing into it. Since it continues to write as we signal
> > the final breadcrumb, we need to keep it pinned until the request after
> > it is complete. Currently we know the order in which requests execute on
> > each engine, and so to remove that presumption we need to identify a
> > request/context-switch we know must occur after our completion. Any
> > request queued after the signal must imply a context switch, for
> > simplicity we use a fresh request from the kernel context.
> >
> > Signed-off-by: Chris Wilson 
> > ---
> >  drivers/gpu/drm/i915/gem/i915_gem_context.c   | 24 ++
> >  drivers/gpu/drm/i915/gem/i915_gem_context.h   |  1 -
> >  drivers/gpu/drm/i915/gem/i915_gem_pm.c| 20 -
> >  drivers/gpu/drm/i915/gt/intel_context.c   | 80 ---
> >  drivers/gpu/drm/i915/gt/intel_context.h   |  3 +
> >  drivers/gpu/drm/i915/gt/intel_context_types.h |  6 +-
> >  drivers/gpu/drm/i915/gt/intel_engine.h|  2 -
> >  drivers/gpu/drm/i915/gt/intel_engine_cs.c | 23 +-
> >  drivers/gpu/drm/i915/gt/intel_engine_pm.c |  2 +
> >  drivers/gpu/drm/i915/gt/intel_engine_types.h  | 13 +--
> >  drivers/gpu/drm/i915/gt/intel_lrc.c   | 62 ++
> >  drivers/gpu/drm/i915/gt/intel_ringbuffer.c| 44 +-
> >  drivers/gpu/drm/i915/gt/mock_engine.c | 11 +--
> >  drivers/gpu/drm/i915/i915_active.c| 80 ++-
> >  drivers/gpu/drm/i915/i915_active.h|  5 ++
> >  drivers/gpu/drm/i915/i915_active_types.h  |  3 +
> >  drivers/gpu/drm/i915/i915_gem.c   |  4 -
> >  drivers/gpu/drm/i915/i915_request.c   | 15 
> >  .../gpu/drm/i915/selftests/mock_gem_device.c  |  1 -
> >  19 files changed, 214 insertions(+), 185 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
> > b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > index c86ca9f21532..6200060aef05 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > @@ -692,17 +692,6 @@ int i915_gem_contexts_init(struct drm_i915_private 
> > *dev_priv)
> >   return 0;
> >  }
> >  
> > -void i915_gem_contexts_lost(struct drm_i915_private *dev_priv)
> > -{
> > - struct intel_engine_cs *engine;
> > - enum intel_engine_id id;
> > -
> > - lockdep_assert_held(&dev_priv->drm.struct_mutex);
> > -
> > - for_each_engine(engine, dev_priv, id)
> > - intel_engine_lost_context(engine);
> > -}
> > -
> >  void i915_gem_contexts_fini(struct drm_i915_private *i915)
> >  {
> >   lockdep_assert_held(&i915->drm.struct_mutex);
> > @@ -1203,10 +1192,6 @@ gen8_modify_rpcs(struct intel_context *ce, struct 
> > intel_sseu sseu)
> >   if (ret)
> >   goto out_add;
> >  
> > - ret = gen8_emit_rpcs_config(rq, ce, sseu);
> > - if (ret)
> > - goto out_add;
> > -
> >   /*
> >* Guarantee context image and the timeline remains pinned until the
> >* modifying request is retired by setting the ce activity tracker.
> > @@ -1214,9 +1199,12 @@ gen8_modify_rpcs(struct intel_context *ce, struct 
> > intel_sseu sseu)
> >* But we only need to take one pin on the account of it. Or in other
> >* words transfer the pinned ce object to tracked active request.
> >*/
> > - if (!i915_active_request_isset(&ce->active_tracker))
> > - __intel_context_pin(ce);
> > - __i915_active_request_set(&ce->active_tracker, rq);
> > + GEM_BUG_ON(i915_active_is_idle(&ce->active));
> > + ret = i915_active_ref(&ce->active, rq->fence.context, rq);
> 
> 
> Why the place to keep the context alive is this function?

This is a special case where we have one context (the kernel context)
writing into the context state object of another. To keep the target
context state pinned, we mark the entire context as active.
 
> In other words, if the sseu state is not changed, we bail out early
> and don't setup the tracker and thus fail in promise for keeping it alive.

As we don't need to keep it alive for an access that never happened.

> > + if (ret)
> > + goto out_add;
> > +
> > + ret = gen8_emit_rpcs_config(rq, ce, sseu);
> >  
> >  out_add:
> >   i915_request_add(rq);
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.h 
> > b/drivers/gpu/drm/i915/gem/i915_gem_context.h
> > index 630392c77e48..9691dd062f72 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.h
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.h
> > @@ -134,7 +134,6 @@ static inline bool i915_gem_context_is_kernel(struct 
> > i915_gem_context *ctx)
> >  
> >  /* i915_gem_context.c */
> >  int __must_check i915_gem_contexts_init(struct drm_i915_private *dev_priv);
> > -void i915_gem_contexts_lost(struct drm_i915_private *dev_priv);
> 

Re: [Intel-gfx] [PATCH] dma-fence/reservation: Markup rcu protected access for DEBUG_MUTEXES

2019-06-12 Thread Christian König

Am 12.06.19 um 15:28 schrieb Chris Wilson:

Mark the access to reservation_object.fence as being protected to
silence sparse.

Signed-off-by: Chris Wilson 


Reviewed-by: Christian König 


---
  include/linux/reservation.h | 8 ++--
  1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/include/linux/reservation.h b/include/linux/reservation.h
index ee750765cc94..644a22dbe53b 100644
--- a/include/linux/reservation.h
+++ b/include/linux/reservation.h
@@ -216,8 +216,12 @@ reservation_object_unlock(struct reservation_object *obj)
  {
  #ifdef CONFIG_DEBUG_MUTEXES
/* Test shared fence slot reservation */
-   if (obj->fence)
-   obj->fence->shared_max = obj->fence->shared_count;
+   if (rcu_access_pointer(obj->fence)) {
+   struct reservation_object_list *fence =
+   reservation_object_get_list(obj);
+
+   fence->shared_max = fence->shared_count;
+   }
  #endif
ww_mutex_unlock(&obj->lock);
  }


___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 1/8] drm/i915: Keep contexts pinned until after the next kernel context switch

2019-06-12 Thread Mika Kuoppala
Chris Wilson  writes:

> We need to keep the context image pinned in memory until after the GPU
> has finished writing into it. Since it continues to write as we signal
> the final breadcrumb, we need to keep it pinned until the request after
> it is complete. Currently we know the order in which requests execute on
> each engine, and so to remove that presumption we need to identify a
> request/context-switch we know must occur after our completion. Any
> request queued after the signal must imply a context switch, for
> simplicity we use a fresh request from the kernel context.
>
> Signed-off-by: Chris Wilson 
> ---
>  drivers/gpu/drm/i915/gem/i915_gem_context.c   | 24 ++
>  drivers/gpu/drm/i915/gem/i915_gem_context.h   |  1 -
>  drivers/gpu/drm/i915/gem/i915_gem_pm.c| 20 -
>  drivers/gpu/drm/i915/gt/intel_context.c   | 80 ---
>  drivers/gpu/drm/i915/gt/intel_context.h   |  3 +
>  drivers/gpu/drm/i915/gt/intel_context_types.h |  6 +-
>  drivers/gpu/drm/i915/gt/intel_engine.h|  2 -
>  drivers/gpu/drm/i915/gt/intel_engine_cs.c | 23 +-
>  drivers/gpu/drm/i915/gt/intel_engine_pm.c |  2 +
>  drivers/gpu/drm/i915/gt/intel_engine_types.h  | 13 +--
>  drivers/gpu/drm/i915/gt/intel_lrc.c   | 62 ++
>  drivers/gpu/drm/i915/gt/intel_ringbuffer.c| 44 +-
>  drivers/gpu/drm/i915/gt/mock_engine.c | 11 +--
>  drivers/gpu/drm/i915/i915_active.c| 80 ++-
>  drivers/gpu/drm/i915/i915_active.h|  5 ++
>  drivers/gpu/drm/i915/i915_active_types.h  |  3 +
>  drivers/gpu/drm/i915/i915_gem.c   |  4 -
>  drivers/gpu/drm/i915/i915_request.c   | 15 
>  .../gpu/drm/i915/selftests/mock_gem_device.c  |  1 -
>  19 files changed, 214 insertions(+), 185 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
> b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index c86ca9f21532..6200060aef05 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -692,17 +692,6 @@ int i915_gem_contexts_init(struct drm_i915_private 
> *dev_priv)
>   return 0;
>  }
>  
> -void i915_gem_contexts_lost(struct drm_i915_private *dev_priv)
> -{
> - struct intel_engine_cs *engine;
> - enum intel_engine_id id;
> -
> - lockdep_assert_held(&dev_priv->drm.struct_mutex);
> -
> - for_each_engine(engine, dev_priv, id)
> - intel_engine_lost_context(engine);
> -}
> -
>  void i915_gem_contexts_fini(struct drm_i915_private *i915)
>  {
>   lockdep_assert_held(&i915->drm.struct_mutex);
> @@ -1203,10 +1192,6 @@ gen8_modify_rpcs(struct intel_context *ce, struct 
> intel_sseu sseu)
>   if (ret)
>   goto out_add;
>  
> - ret = gen8_emit_rpcs_config(rq, ce, sseu);
> - if (ret)
> - goto out_add;
> -
>   /*
>* Guarantee context image and the timeline remains pinned until the
>* modifying request is retired by setting the ce activity tracker.
> @@ -1214,9 +1199,12 @@ gen8_modify_rpcs(struct intel_context *ce, struct 
> intel_sseu sseu)
>* But we only need to take one pin on the account of it. Or in other
>* words transfer the pinned ce object to tracked active request.
>*/
> - if (!i915_active_request_isset(&ce->active_tracker))
> - __intel_context_pin(ce);
> - __i915_active_request_set(&ce->active_tracker, rq);
> + GEM_BUG_ON(i915_active_is_idle(&ce->active));
> + ret = i915_active_ref(&ce->active, rq->fence.context, rq);


Why the place to keep the context alive is this function?

In other words, if the sseu state is not changed, we bail out early
and don't setup the tracker and thus fail in promise for keeping it alive.

> + if (ret)
> + goto out_add;
> +
> + ret = gen8_emit_rpcs_config(rq, ce, sseu);
>  
>  out_add:
>   i915_request_add(rq);
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.h 
> b/drivers/gpu/drm/i915/gem/i915_gem_context.h
> index 630392c77e48..9691dd062f72 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.h
> @@ -134,7 +134,6 @@ static inline bool i915_gem_context_is_kernel(struct 
> i915_gem_context *ctx)
>  
>  /* i915_gem_context.c */
>  int __must_check i915_gem_contexts_init(struct drm_i915_private *dev_priv);
> -void i915_gem_contexts_lost(struct drm_i915_private *dev_priv);
>  void i915_gem_contexts_fini(struct drm_i915_private *dev_priv);
>  
>  int i915_gem_context_open(struct drm_i915_private *i915,
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c 
> b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> index f40f13c0b8b7..59b6d45b1936 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> @@ -10,6 +10,22 @@
>  #include "i915_drv.h"
>  #include "i915_globals.h"
>  
> +static void call_idle_barriers(struct intel_engine_cs *engine)
> +{
> + 

[Intel-gfx] [PATCH] dma-fence/reservation: Markup rcu protected access for DEBUG_MUTEXES

2019-06-12 Thread Chris Wilson
Mark the access to reservation_object.fence as being protected to
silence sparse.

Signed-off-by: Chris Wilson 
---
 include/linux/reservation.h | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/include/linux/reservation.h b/include/linux/reservation.h
index ee750765cc94..644a22dbe53b 100644
--- a/include/linux/reservation.h
+++ b/include/linux/reservation.h
@@ -216,8 +216,12 @@ reservation_object_unlock(struct reservation_object *obj)
 {
 #ifdef CONFIG_DEBUG_MUTEXES
/* Test shared fence slot reservation */
-   if (obj->fence)
-   obj->fence->shared_max = obj->fence->shared_count;
+   if (rcu_access_pointer(obj->fence)) {
+   struct reservation_object_list *fence =
+   reservation_object_get_list(obj);
+
+   fence->shared_max = fence->shared_count;
+   }
 #endif
ww_mutex_unlock(&obj->lock);
 }
-- 
2.20.1

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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Combine unbound/bound list tracking for objects

2019-06-12 Thread Patchwork
== Series Details ==

Series: drm/i915: Combine unbound/bound list tracking for objects
URL   : https://patchwork.freedesktop.org/series/61952/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6248 -> Patchwork_13251


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13251/

Known issues


  Here are the changes found in Patchwork_13251 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live_evict:
- fi-bsw-kefka:   [PASS][1] -> [DMESG-WARN][2] ([fdo#107709])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6248/fi-bsw-kefka/igt@i915_selftest@live_evict.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13251/fi-bsw-kefka/igt@i915_selftest@live_evict.html

  
 Possible fixes 

  * igt@gem_ctx_switch@basic-default:
- fi-icl-u2:  [INCOMPLETE][3] ([fdo#107713] / [fdo#108569]) -> 
[PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6248/fi-icl-u2/igt@gem_ctx_swi...@basic-default.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13251/fi-icl-u2/igt@gem_ctx_swi...@basic-default.html

  * igt@i915_module_load@reload:
- fi-ilk-650: [DMESG-WARN][5] ([fdo#106387]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6248/fi-ilk-650/igt@i915_module_l...@reload.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13251/fi-ilk-650/igt@i915_module_l...@reload.html

  
 Warnings 

  * igt@i915_pm_rpm@basic-pci-d3-state:
- fi-kbl-guc: [FAIL][7] ([fdo#110829]) -> [SKIP][8] ([fdo#109271])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6248/fi-kbl-guc/igt@i915_pm_...@basic-pci-d3-state.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13251/fi-kbl-guc/igt@i915_pm_...@basic-pci-d3-state.html

  
  [fdo#106387]: https://bugs.freedesktop.org/show_bug.cgi?id=106387
  [fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#110829]: https://bugs.freedesktop.org/show_bug.cgi?id=110829


Participating hosts (53 -> 45)
--

  Additional (1): fi-cml-u 
  Missing(9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-byt-clapper fi-blb-e6850 fi-icl-dsi fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_6248 -> Patchwork_13251

  CI_DRM_6248: 4f407039f4a40b1a7de2974a87f8aebc1782b74b @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5053: b90ebd9c21518f305a61ee50aea38462ef01e65c @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13251: 4171f44848492e8ef43e4a3f4386a2d38bdee86b @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

4171f4484849 drm/i915: Combine unbound/bound list tracking for objects

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13251/
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Don't clobber M/N values during fastset check

2019-06-12 Thread Patchwork
== Series Details ==

Series: series starting with [1/4] drm/i915: Don't clobber M/N values during 
fastset check
URL   : https://patchwork.freedesktop.org/series/61960/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
bc29623ab5e2 drm/i915: Don't clobber M/N values during fastset check
2e4eb369f0c4 drm/i915: Constify intel_pipe_config_compare()
2b517a2a0592 drm/i915: Make pipe_config_err() vs. fastset less confusing
-:132: WARNING:LONG_LINE: line over 100 characters
#132: FILE: drivers/gpu/drm/i915/intel_display.c:12426:
+"unable to verify whether state matches 
exactly, forcing modeset (expected %s, found %s)\n", \

total: 0 errors, 1 warnings, 0 checks, 256 lines checked
90a1b356ee44 drm/i915: Drop the _INCOMPLETE for has_infoframe

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[Intel-gfx] [PATCH 2/4] drm/i915: Constify intel_pipe_config_compare()

2019-06-12 Thread Ville Syrjala
From: Ville Syrjälä 

Now that intel_pipe_config_compare() no longer clobbers the passed
in state we can make both crtc states const. And while at we simplify
the calling convention, and clean up intel_compare_link_m_n() a bit.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_display.c | 43 +++-
 1 file changed, 17 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 73b3e92b7ed5..dcc301df6174 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12291,18 +12291,14 @@ intel_compare_m_n(unsigned int m, unsigned int n,
 
 static bool
 intel_compare_link_m_n(const struct intel_link_m_n *m_n,
-  struct intel_link_m_n *m2_n2,
-  bool adjust)
-{
-   if (m_n->tu == m2_n2->tu &&
-   intel_compare_m_n(m_n->gmch_m, m_n->gmch_n,
- m2_n2->gmch_m, m2_n2->gmch_n, !adjust) &&
-   intel_compare_m_n(m_n->link_m, m_n->link_n,
- m2_n2->link_m, m2_n2->link_n, !adjust)) {
-   return true;
-   }
-
-   return false;
+  const struct intel_link_m_n *m2_n2,
+  bool exact)
+{
+   return m_n->tu == m2_n2->tu &&
+   intel_compare_m_n(m_n->gmch_m, m_n->gmch_n,
+ m2_n2->gmch_m, m2_n2->gmch_n, exact) &&
+   intel_compare_m_n(m_n->link_m, m_n->link_n,
+ m2_n2->link_m, m2_n2->link_n, exact);
 }
 
 static bool
@@ -12372,11 +12368,11 @@ static bool fastboot_enabled(struct drm_i915_private 
*dev_priv)
 }
 
 static bool
-intel_pipe_config_compare(struct drm_i915_private *dev_priv,
- struct intel_crtc_state *current_config,
- struct intel_crtc_state *pipe_config,
+intel_pipe_config_compare(const struct intel_crtc_state *current_config,
+ const struct intel_crtc_state *pipe_config,
  bool adjust)
 {
+   struct drm_i915_private *dev_priv = 
to_i915(current_config->base.crtc->dev);
bool ret = true;
bool fixup_inherited = adjust &&
(current_config->base.mode.private_flags & 
I915_MODE_FLAG_INHERITED) &&
@@ -12447,7 +12443,7 @@ intel_pipe_config_compare(struct drm_i915_private 
*dev_priv,
 #define PIPE_CONF_CHECK_M_N(name) do { \
if (!intel_compare_link_m_n(¤t_config->name, \
&pipe_config->name,\
-   adjust)) { \
+   !adjust)) { \
pipe_config_err(adjust, __stringify(name), \
  "(expected tu %i gmch %i/%i link %i/%i, " \
  "found tu %i, gmch %i/%i link %i/%i)\n", \
@@ -12472,9 +12468,9 @@ intel_pipe_config_compare(struct drm_i915_private 
*dev_priv,
  */
 #define PIPE_CONF_CHECK_M_N_ALT(name, alt_name) do { \
if (!intel_compare_link_m_n(¤t_config->name, \
-   &pipe_config->name, adjust) && \
+   &pipe_config->name, !adjust) && \
!intel_compare_link_m_n(¤t_config->alt_name, \
-   &pipe_config->name, adjust)) { \
+   &pipe_config->name, !adjust)) { \
pipe_config_err(adjust, __stringify(name), \
  "(expected tu %i gmch %i/%i link %i/%i, " \
  "or tu %i gmch %i/%i link %i/%i, " \
@@ -12984,8 +12980,7 @@ verify_crtc_state(struct drm_crtc *crtc,
intel_pipe_config_sanity_check(dev_priv, pipe_config);
 
sw_config = to_intel_crtc_state(new_crtc_state);
-   if (!intel_pipe_config_compare(dev_priv, sw_config,
-  pipe_config, false)) {
+   if (!intel_pipe_config_compare(sw_config, pipe_config, false)) {
I915_STATE_WARN(1, "pipe state doesn't match!\n");
intel_dump_pipe_config(pipe_config, NULL, "[hw state]");
intel_dump_pipe_config(sw_config, NULL, "[sw state]");
@@ -13430,14 +13425,10 @@ static int calc_watermark_data(struct 
intel_atomic_state *state)
return 0;
 }
 
-static void intel_crtc_check_fastset(struct intel_crtc_state *old_crtc_state,
+static void intel_crtc_check_fastset(const struct intel_crtc_state 
*old_crtc_state,
 struct intel_crtc_state *new_crtc_state)
 {
-   struct drm_i915_private *dev_priv =
-   to_i915(new_crtc_state->base.crtc->dev);
-
-   if (!intel_pipe_config_compare(dev_priv, old_crtc_state,
-  new_crtc_state, true))
+   if (!intel_pipe_config_compare(old_crtc_state, new_crtc_state, true))
return;
 
new_crtc_state->base.mode_changed = false;
-- 
2.21.0


[Intel-gfx] [PATCH 4/4] drm/i915: Drop the _INCOMPLETE for has_infoframe

2019-06-12 Thread Ville Syrjala
From: Ville Syrjälä 

We have full infoframe readout now so we can replace the
PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_infoframe) with the normal
PIPE_CONF_CHECK_BOOL(has_infoframe).

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_display.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index ec3b7e825613..72fb04863acd 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12570,7 +12570,7 @@ intel_pipe_config_compare(const struct intel_crtc_state 
*current_config,
 
PIPE_CONF_CHECK_BOOL(hdmi_scrambling);
PIPE_CONF_CHECK_BOOL(hdmi_high_tmds_clock_ratio);
-   PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_infoframe);
+   PIPE_CONF_CHECK_BOOL(has_infoframe);
 
PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_audio);
 
-- 
2.21.0

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