[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Fix incorrect test parameter for DP link layer compliance
== Series Details == Series: drm/i915/dp: Fix incorrect test parameter for DP link layer compliance URL : https://patchwork.freedesktop.org/series/71587/ State : success == Summary == CI Bug Log - changes from CI_DRM_7671 -> Patchwork_15984 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/index.html Known issues Here are the changes found in Patchwork_15984 that come from known issues: ### IGT changes ### Issues hit * igt@gem_close_race@basic-threads: - fi-byt-n2820: [PASS][1] -> [TIMEOUT][2] ([i915#816]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7671/fi-byt-n2820/igt@gem_close_r...@basic-threads.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/fi-byt-n2820/igt@gem_close_r...@basic-threads.html * igt@i915_module_load@reload-with-fault-injection: - fi-kbl-x1275: [PASS][3] -> [INCOMPLETE][4] ([i915#879]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7671/fi-kbl-x1275/igt@i915_module_l...@reload-with-fault-injection.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/fi-kbl-x1275/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_pm_rpm@module-reload: - fi-skl-lmem:[PASS][5] -> [DMESG-WARN][6] ([i915#592]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7671/fi-skl-lmem/igt@i915_pm_...@module-reload.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/fi-skl-lmem/igt@i915_pm_...@module-reload.html Possible fixes * igt@gem_close_race@basic-threads: - fi-byt-j1900: [TIMEOUT][7] ([i915#816]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7671/fi-byt-j1900/igt@gem_close_r...@basic-threads.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/fi-byt-j1900/igt@gem_close_r...@basic-threads.html * igt@gem_exec_suspend@basic-s0: - fi-cml-s: [INCOMPLETE][9] ([i915#283]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7671/fi-cml-s/igt@gem_exec_susp...@basic-s0.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/fi-cml-s/igt@gem_exec_susp...@basic-s0.html * igt@i915_selftest@live_blt: - fi-hsw-4770:[DMESG-FAIL][11] ([i915#725]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7671/fi-hsw-4770/igt@i915_selftest@live_blt.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/fi-hsw-4770/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_gem_contexts: - fi-cfl-guc: [DMESG-FAIL][13] ([i915#623]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7671/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html Warnings * igt@i915_module_load@reload-with-fault-injection: - fi-skl-6770hq: [INCOMPLETE][15] ([i915#671]) -> [DMESG-WARN][16] ([i915#88]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7671/fi-skl-6770hq/igt@i915_module_l...@reload-with-fault-injection.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/fi-skl-6770hq/igt@i915_module_l...@reload-with-fault-injection.html [i915#283]: https://gitlab.freedesktop.org/drm/intel/issues/283 [i915#592]: https://gitlab.freedesktop.org/drm/intel/issues/592 [i915#623]: https://gitlab.freedesktop.org/drm/intel/issues/623 [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671 [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725 [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816 [i915#879]: https://gitlab.freedesktop.org/drm/intel/issues/879 [i915#88]: https://gitlab.freedesktop.org/drm/intel/issues/88 Participating hosts (48 -> 47) -- Additional (5): fi-hsw-peppy fi-bwr-2160 fi-snb-2520m fi-gdg-551 fi-tgl-y Missing(6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper Build changes - * CI: CI-20190529 -> None * Linux: CI_DRM_7671 -> Patchwork_15984 CI-20190529: 20190529 CI_DRM_7671: 2348d330223761be0a66ce3725d9be35fec0019a @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5357: a555a4b98f90dab655d24bb3d07e9291a8b8dac8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_15984: 90511185275dbe3d72fb5e141d9f07488c187350 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 90511185275d drm/i915/dp: Fix incorrect test parameter for DP link layer compliance == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org
[Intel-gfx] [PATCH] drm/i915/dp: Fix incorrect test parameter for DP link layer compliance
Run intel_dp_compliance would failed at video pattern related
test case sometimes. DP test applet read incorrect test type
from kernel to cause this symptom. Add a "\n" (newline) in
seq_printf() then DP test applet will get proper parameters.
Cc: Manasi Navare
Cc: Jani Nikula
Cc: Daniel Vetter
Cc: Ville Syrjala
Cc: Cooper Chiou
Signed-off-by: Lee Shawn C
---
drivers/gpu/drm/i915/i915_debugfs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 0ac98e39eb75..74180158a909 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3167,7 +3167,7 @@ static int i915_displayport_test_data_show(struct
seq_file *m, void *data)
intel_dp = enc_to_intel_dp(>base);
if (intel_dp->compliance.test_type ==
DP_TEST_LINK_EDID_READ)
- seq_printf(m, "%lx",
+ seq_printf(m, "%lx\n",
intel_dp->compliance.test_data.edid);
else if (intel_dp->compliance.test_type ==
DP_TEST_LINK_VIDEO_PATTERN) {
@@ -3209,7 +3209,7 @@ static int i915_displayport_test_type_show(struct
seq_file *m, void *data)
if (encoder && connector->status == connector_status_connected)
{
intel_dp = enc_to_intel_dp(>base);
- seq_printf(m, "%02lx", intel_dp->compliance.test_type);
+ seq_printf(m, "%02lx\n",
intel_dp->compliance.test_type);
} else
seq_puts(m, "0");
}
--
2.17.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Support discontiguous lmem object maps (rev3)
== Series Details == Series: drm/i915/gem: Support discontiguous lmem object maps (rev3) URL : https://patchwork.freedesktop.org/series/71557/ State : success == Summary == CI Bug Log - changes from CI_DRM_7667_full -> Patchwork_15979_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_15979_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_isolation@vcs1-dirty-create: - shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#109276] / [fdo#112080]) +2 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-iclb4/igt@gem_ctx_isolat...@vcs1-dirty-create.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/shard-iclb5/igt@gem_ctx_isolat...@vcs1-dirty-create.html * igt@gem_ctx_persistence@processes: - shard-skl: [PASS][3] -> [FAIL][4] ([i915#570]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-skl7/igt@gem_ctx_persiste...@processes.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/shard-skl10/igt@gem_ctx_persiste...@processes.html * igt@gem_ctx_persistence@rcs0-mixed-process: - shard-skl: [PASS][5] -> [FAIL][6] ([i915#679]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-skl1/igt@gem_ctx_persiste...@rcs0-mixed-process.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/shard-skl5/igt@gem_ctx_persiste...@rcs0-mixed-process.html * igt@gem_ctx_shared@q-smoketest-all: - shard-tglb: [PASS][7] -> [INCOMPLETE][8] ([fdo#111735]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-tglb7/igt@gem_ctx_sha...@q-smoketest-all.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/shard-tglb3/igt@gem_ctx_sha...@q-smoketest-all.html * igt@gem_exec_parallel@vcs1-fds: - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#112080]) +8 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-iclb4/igt@gem_exec_paral...@vcs1-fds.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/shard-iclb5/igt@gem_exec_paral...@vcs1-fds.html * igt@gem_exec_parallel@vecs0-fds: - shard-tglb: [PASS][11] -> [INCOMPLETE][12] ([i915#472]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-tglb6/igt@gem_exec_paral...@vecs0-fds.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/shard-tglb6/igt@gem_exec_paral...@vecs0-fds.html * igt@gem_exec_schedule@preempt-contexts-bsd2: - shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#109276]) +12 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-iclb2/igt@gem_exec_sched...@preempt-contexts-bsd2.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/shard-iclb5/igt@gem_exec_sched...@preempt-contexts-bsd2.html * igt@gem_exec_schedule@preempt-queue-contexts-render: - shard-tglb: [PASS][15] -> [INCOMPLETE][16] ([fdo#111606] / [fdo#111677]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-tglb7/igt@gem_exec_sched...@preempt-queue-contexts-render.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/shard-tglb8/igt@gem_exec_sched...@preempt-queue-contexts-render.html * igt@gem_exec_schedule@wide-bsd: - shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#112146]) +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-iclb6/igt@gem_exec_sched...@wide-bsd.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/shard-iclb2/igt@gem_exec_sched...@wide-bsd.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-skl: [PASS][19] -> [FAIL][20] ([i915#644]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-skl6/igt@gem_pp...@flink-and-close-vma-leak.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/shard-skl4/igt@gem_pp...@flink-and-close-vma-leak.html * igt@gem_workarounds@suspend-resume-fd: - shard-kbl: [PASS][21] -> [DMESG-WARN][22] ([i915#180]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-kbl7/igt@gem_workarou...@suspend-resume-fd.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/shard-kbl4/igt@gem_workarou...@suspend-resume-fd.html * igt@i915_suspend@debugfs-reader: - shard-apl: [PASS][23] -> [DMESG-WARN][24] ([i915#180]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-apl7/igt@i915_susp...@debugfs-reader.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/shard-apl4/igt@i915_susp...@debugfs-reader.html * igt@kms_cursor_crc@pipe-a-cursor-64x64-random: - shard-skl: [PASS][25] -> [FAIL][26] ([i915#54]) [25]:
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gt: Drop mutex serialisation between context pin/unpin
== Series Details == Series: drm/i915/gt: Drop mutex serialisation between context pin/unpin URL : https://patchwork.freedesktop.org/series/71568/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7667_full -> Patchwork_15977_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_15977_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_15977_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_15977_full: ### IGT changes ### Possible regressions * igt@gem_bad_reloc@negative-reloc-bsd: - shard-tglb: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-tglb3/igt@gem_bad_re...@negative-reloc-bsd.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15977/shard-tglb9/igt@gem_bad_re...@negative-reloc-bsd.html * igt@gem_tiled_partial_pwrite_pread@reads: - shard-hsw: [PASS][3] -> [FAIL][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-hsw2/igt@gem_tiled_partial_pwrite_pr...@reads.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15977/shard-hsw2/igt@gem_tiled_partial_pwrite_pr...@reads.html Known issues Here are the changes found in Patchwork_15977_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_busy@close-race: - shard-tglb: [PASS][5] -> [INCOMPLETE][6] ([i915#435]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-tglb2/igt@gem_b...@close-race.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15977/shard-tglb9/igt@gem_b...@close-race.html * igt@gem_ctx_isolation@vecs0-s3: - shard-apl: [PASS][7] -> [DMESG-WARN][8] ([i915#180]) +2 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-apl7/igt@gem_ctx_isolat...@vecs0-s3.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15977/shard-apl1/igt@gem_ctx_isolat...@vecs0-s3.html * igt@gem_ctx_persistence@bcs0-mixed-process: - shard-glk: [PASS][9] -> [FAIL][10] ([i915#679]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-glk2/igt@gem_ctx_persiste...@bcs0-mixed-process.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15977/shard-glk8/igt@gem_ctx_persiste...@bcs0-mixed-process.html * igt@gem_ctx_persistence@processes: - shard-skl: [PASS][11] -> [FAIL][12] ([i915#570]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-skl7/igt@gem_ctx_persiste...@processes.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15977/shard-skl6/igt@gem_ctx_persiste...@processes.html * igt@gem_ctx_persistence@vcs1-mixed-process: - shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#109276] / [fdo#112080]) +3 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-iclb4/igt@gem_ctx_persiste...@vcs1-mixed-process.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15977/shard-iclb8/igt@gem_ctx_persiste...@vcs1-mixed-process.html * igt@gem_ctx_shared@q-smoketest-all: - shard-tglb: [PASS][15] -> [INCOMPLETE][16] ([fdo#111735]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-tglb7/igt@gem_ctx_sha...@q-smoketest-all.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15977/shard-tglb3/igt@gem_ctx_sha...@q-smoketest-all.html * igt@gem_eio@unwedge-stress: - shard-snb: [PASS][17] -> [FAIL][18] ([i915#232]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-snb7/igt@gem_...@unwedge-stress.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15977/shard-snb1/igt@gem_...@unwedge-stress.html * igt@gem_exec_parallel@vcs1-fds: - shard-iclb: [PASS][19] -> [SKIP][20] ([fdo#112080]) +12 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-iclb4/igt@gem_exec_paral...@vcs1-fds.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15977/shard-iclb8/igt@gem_exec_paral...@vcs1-fds.html * igt@gem_exec_reloc@basic-write-read-active: - shard-skl: [PASS][21] -> [DMESG-WARN][22] ([i915#109]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-skl4/igt@gem_exec_re...@basic-write-read-active.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15977/shard-skl5/igt@gem_exec_re...@basic-write-read-active.html * igt@gem_exec_schedule@in-order-bsd: - shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#112146]) +5 similar issues [23]:
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/5] drm/i915/gt: Include a bunch more rcs image state
== Series Details == Series: series starting with [1/5] drm/i915/gt: Include a bunch more rcs image state URL : https://patchwork.freedesktop.org/series/71565/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7667_full -> Patchwork_15976_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_15976_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_15976_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_15976_full: ### IGT changes ### Possible regressions * igt@drm_import_export@import-close-race-flink: - shard-tglb: [PASS][1] -> [DMESG-WARN][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-tglb7/igt@drm_import_exp...@import-close-race-flink.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/shard-tglb4/igt@drm_import_exp...@import-close-race-flink.html * igt@gem_exec_schedule@preempt-other-chain-render: - shard-tglb: [PASS][3] -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-tglb9/igt@gem_exec_sched...@preempt-other-chain-render.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/shard-tglb4/igt@gem_exec_sched...@preempt-other-chain-render.html * igt@runner@aborted: - shard-tglb: NOTRUN -> [FAIL][5] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/shard-tglb4/igt@run...@aborted.html Known issues Here are the changes found in Patchwork_15976_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_isolation@vcs1-dirty-create: - shard-iclb: [PASS][6] -> [SKIP][7] ([fdo#109276] / [fdo#112080]) +3 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-iclb4/igt@gem_ctx_isolat...@vcs1-dirty-create.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/shard-iclb3/igt@gem_ctx_isolat...@vcs1-dirty-create.html * igt@gem_ctx_shared@q-smoketest-bsd1: - shard-tglb: [PASS][8] -> [INCOMPLETE][9] ([fdo#111735]) +2 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-tglb7/igt@gem_ctx_sha...@q-smoketest-bsd1.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/shard-tglb9/igt@gem_ctx_sha...@q-smoketest-bsd1.html * igt@gem_exec_parallel@vcs1-fds: - shard-iclb: [PASS][10] -> [SKIP][11] ([fdo#112080]) +15 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-iclb4/igt@gem_exec_paral...@vcs1-fds.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/shard-iclb3/igt@gem_exec_paral...@vcs1-fds.html * igt@gem_exec_schedule@in-order-bsd: - shard-iclb: [PASS][12] -> [SKIP][13] ([fdo#112146]) +3 similar issues [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-iclb7/igt@gem_exec_sched...@in-order-bsd.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/shard-iclb1/igt@gem_exec_sched...@in-order-bsd.html * igt@gem_exec_schedule@preempt-contexts-bsd2: - shard-iclb: [PASS][14] -> [SKIP][15] ([fdo#109276]) +16 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-iclb2/igt@gem_exec_sched...@preempt-contexts-bsd2.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/shard-iclb8/igt@gem_exec_sched...@preempt-contexts-bsd2.html * igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive: - shard-tglb: [PASS][16] -> [TIMEOUT][17] ([fdo#112126] / [i915#530]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-tglb2/igt@gem_persistent_rel...@forked-interruptible-faulting-reloc-thrash-inactive.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/shard-tglb5/igt@gem_persistent_rel...@forked-interruptible-faulting-reloc-thrash-inactive.html * igt@i915_pm_rps@waitboost: - shard-iclb: [PASS][18] -> [FAIL][19] ([i915#413]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-iclb8/igt@i915_pm_...@waitboost.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/shard-iclb5/igt@i915_pm_...@waitboost.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: [PASS][20] -> [FAIL][21] ([i915#79]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/shard-skl10/igt@kms_f...@flip-vs-expired-vblank-interruptible.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/shard-skl5/igt@kms_f...@flip-vs-expired-vblank-interruptible.html *
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dsi: Parse the I2C element from the VBT MIPI sequence block
== Series Details == Series: drm/i915/dsi: Parse the I2C element from the VBT MIPI sequence block URL : https://patchwork.freedesktop.org/series/71581/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7668 -> Patchwork_15983 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_15983 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_15983, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15983/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_15983: ### IGT changes ### Possible regressions * igt@i915_selftest@live_gt_pm: - fi-kbl-7500u: [PASS][1] -> [DMESG-WARN][2] +23 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-kbl-7500u/igt@i915_selftest@live_gt_pm.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15983/fi-kbl-7500u/igt@i915_selftest@live_gt_pm.html * igt@i915_selftest@live_uncore: - fi-kbl-7500u: [PASS][3] -> [DMESG-FAIL][4] +7 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-kbl-7500u/igt@i915_selftest@live_uncore.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15983/fi-kbl-7500u/igt@i915_selftest@live_uncore.html Known issues Here are the changes found in Patchwork_15983 that come from known issues: ### IGT changes ### Issues hit * igt@i915_module_load@reload-with-fault-injection: - fi-cfl-8700k: [PASS][5] -> [INCOMPLETE][6] ([i915#505]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15983/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html - fi-skl-lmem:[PASS][7] -> [INCOMPLETE][8] ([i915#671]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15983/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_selftest@live_blt: - fi-hsw-4770r: [PASS][9] -> [DMESG-FAIL][10] ([i915#553] / [i915#725]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-hsw-4770r/igt@i915_selftest@live_blt.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15983/fi-hsw-4770r/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_gem_contexts: - fi-byt-j1900: [PASS][11] -> [DMESG-FAIL][12] ([i915#722]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15983/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html Possible fixes * igt@i915_selftest@live_active: - fi-kbl-r: [DMESG-FAIL][13] -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-kbl-r/igt@i915_selftest@live_active.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15983/fi-kbl-r/igt@i915_selftest@live_active.html * igt@i915_selftest@live_blt: - fi-byt-j1900: [DMESG-FAIL][15] ([i915#725]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-byt-j1900/igt@i915_selftest@live_blt.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15983/fi-byt-j1900/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_gem: - fi-bdw-5557u: [FAIL][17] -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-bdw-5557u/igt@i915_selftest@live_gem.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15983/fi-bdw-5557u/igt@i915_selftest@live_gem.html * igt@kms_chamelium@hdmi-crc-fast: - fi-icl-u2: [FAIL][19] ([fdo#109635]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-icl-u2/igt@kms_chamel...@hdmi-crc-fast.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15983/fi-icl-u2/igt@kms_chamel...@hdmi-crc-fast.html Warnings * igt@i915_selftest@live_blt: - fi-hsw-4770:[DMESG-FAIL][21] ([i915#553] / [i915#725]) -> [DMESG-FAIL][22] ([i915#725]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-hsw-4770/igt@i915_selftest@live_blt.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15983/fi-hsw-4770/igt@i915_selftest@live_blt.html [fdo#109635]: https://bugs.freedesktop.org/show_bug.cgi?id=109635 [i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505 [i915#553]:
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Flush ongoing retires during wait_for_idle (rev2)
== Series Details == Series: drm/i915/gt: Flush ongoing retires during wait_for_idle (rev2) URL : https://patchwork.freedesktop.org/series/71575/ State : success == Summary == CI Bug Log - changes from CI_DRM_7668 -> Patchwork_15982 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/index.html Known issues Here are the changes found in Patchwork_15982 that come from known issues: ### IGT changes ### Issues hit * igt@gem_close_race@basic-threads: - fi-byt-j1900: [PASS][1] -> [TIMEOUT][2] ([i915#816]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-byt-j1900/igt@gem_close_r...@basic-threads.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/fi-byt-j1900/igt@gem_close_r...@basic-threads.html * igt@i915_module_load@reload-with-fault-injection: - fi-cfl-8700k: [PASS][3] -> [INCOMPLETE][4] ([i915#505]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html - fi-skl-lmem:[PASS][5] -> [INCOMPLETE][6] ([i915#671]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_selftest@live_execlists: - fi-kbl-soraka: [PASS][7] -> [DMESG-FAIL][8] ([i915#656]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-kbl-soraka/igt@i915_selftest@live_execlists.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/fi-kbl-soraka/igt@i915_selftest@live_execlists.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-skl-6700k2: [PASS][9] -> [INCOMPLETE][10] ([i915#69]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-skl-6700k2/igt@kms_chamel...@common-hpd-after-suspend.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/fi-skl-6700k2/igt@kms_chamel...@common-hpd-after-suspend.html Possible fixes * igt@i915_selftest@live_blt: - fi-hsw-4770:[DMESG-FAIL][11] ([i915#553] / [i915#725]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-hsw-4770/igt@i915_selftest@live_blt.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/fi-hsw-4770/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_gem: - fi-bdw-5557u: [FAIL][13] -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-bdw-5557u/igt@i915_selftest@live_gem.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/fi-bdw-5557u/igt@i915_selftest@live_gem.html * igt@kms_chamelium@hdmi-crc-fast: - fi-icl-u2: [FAIL][15] ([fdo#109635]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-icl-u2/igt@kms_chamel...@hdmi-crc-fast.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/fi-icl-u2/igt@kms_chamel...@hdmi-crc-fast.html [fdo#109635]: https://bugs.freedesktop.org/show_bug.cgi?id=109635 [i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505 [i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553 [i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656 [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671 [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69 [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725 [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816 Participating hosts (48 -> 37) -- Additional (5): fi-skl-guc fi-bwr-2160 fi-cfl-8109u fi-kbl-8809g fi-bsw-kefka Missing(16): fi-hsw-4770r fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-apl-guc fi-snb-2520m fi-ctg-p8600 fi-kbl-x1275 fi-gdg-551 fi-ivb-3770 fi-elk-e7500 fi-bdw-samus fi-byt-clapper fi-kbl-r fi-skl-6600u fi-snb-2600 Build changes - * CI: CI-20190529 -> None * Linux: CI_DRM_7668 -> Patchwork_15982 CI-20190529: 20190529 CI_DRM_7668: e63e1b81764ac9d3edbf178821a6cbbc8d7eab9d @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5357: a555a4b98f90dab655d24bb3d07e9291a8b8dac8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_15982: 2d91290589a7b59496d0936d861e89f068c6f986 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 2d91290589a7 drm/i915/gt: Flush ongoing retires during wait_for_idle == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org
[Intel-gfx] [PATCH] drm/i915/dsi: Parse the I2C element from the VBT MIPI sequence block
Parsing the i2c element is mainly done to transfer the payload from the
MIPI sequence block to the relevant slave device. In some cases, the
commands that are part of the payload can be used to turn on the backlight.
This patch is actually a refactored version of this old patch:
https://lists.freedesktop.org/archives/intel-gfx/2014-December/056897.html
In addition to the refactoring, the old patch is augmented by looking up
the i2c bus from ACPI NS instead of relying on the bus number provided
in the VBT.
Cc: Deepak M
Cc: Nabendu Maiti
Cc: Matt Roper
Cc: Bob Paauwe
Signed-off-by: Vivek Kasireddy
---
drivers/gpu/drm/i915/display/intel_dsi.h | 3 +
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 93
2 files changed, 96 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h
b/drivers/gpu/drm/i915/display/intel_dsi.h
index b15be5814599..5651bc8aa5c2 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi.h
+++ b/drivers/gpu/drm/i915/display/intel_dsi.h
@@ -68,6 +68,9 @@ struct intel_dsi {
/* number of DSI lanes */
unsigned int lane_count;
+ /* i2c bus associated with the slave device */
+ int i2c_bus_num;
+
/*
* video mode pixel format
*
diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
index f90946c912ee..60441a5a3dba 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
@@ -83,6 +83,12 @@ static struct gpio_map vlv_gpio_table[] = {
{ VLV_GPIO_NC_11_PANEL1_BKLTCTL },
};
+struct i2c_adapter_lookup {
+ u16 slave_addr;
+ struct intel_dsi *intel_dsi;
+ acpi_handle dev_handle;
+};
+
#define CHV_GPIO_IDX_START_N 0
#define CHV_GPIO_IDX_START_E 73
#define CHV_GPIO_IDX_START_SW 100
@@ -375,8 +381,93 @@ static const u8 *mipi_exec_gpio(struct intel_dsi
*intel_dsi, const u8 *data)
return data;
}
+static int i2c_adapter_lookup(struct acpi_resource *ares, void *data)
+{
+ struct i2c_adapter_lookup *lookup = data;
+ struct intel_dsi *intel_dsi = lookup->intel_dsi;
+ struct acpi_resource_i2c_serialbus *sb;
+ struct i2c_adapter *adapter;
+ acpi_handle adapter_handle;
+ acpi_status status;
+
+ if (intel_dsi->i2c_bus_num >= 0 ||
+ !i2c_acpi_get_i2c_resource(ares, ))
+ return 1;
+
+ if (lookup->slave_addr != sb->slave_address)
+ return 1;
+
+ status = acpi_get_handle(lookup->dev_handle,
+sb->resource_source.string_ptr,
+_handle);
+ if (ACPI_FAILURE(status))
+ return 1;
+
+ adapter = i2c_acpi_find_adapter_by_handle(adapter_handle);
+ if (adapter)
+ intel_dsi->i2c_bus_num = adapter->nr;
+
+ return 1;
+}
+
static const u8 *mipi_exec_i2c(struct intel_dsi *intel_dsi, const u8 *data)
{
+ struct drm_device *dev = intel_dsi->base.base.dev;
+ struct i2c_adapter *adapter;
+ struct acpi_device *acpi_dev;
+ struct list_head resource_list;
+ struct i2c_adapter_lookup lookup;
+ struct i2c_msg msg;
+ int ret;
+ u8 vbt_i2c_bus_num = *(data + 2);
+ u16 slave_addr = *(u16 *)(data + 3);
+ u8 reg_offset = *(data + 5);
+ u8 payload_size = *(data + 6);
+ u8 *payload_data;
+
+ if (intel_dsi->i2c_bus_num < 0) {
+ intel_dsi->i2c_bus_num = vbt_i2c_bus_num;
+
+ acpi_dev = ACPI_COMPANION(>pdev->dev);
+ if (acpi_dev) {
+ memset(, 0, sizeof(lookup));
+ lookup.slave_addr = slave_addr;
+ lookup.intel_dsi = intel_dsi;
+ lookup.dev_handle = acpi_device_handle(acpi_dev);
+
+ INIT_LIST_HEAD(_list);
+ acpi_dev_get_resources(acpi_dev, _list,
+ i2c_adapter_lookup,
+ );
+ acpi_dev_free_resource_list(_list);
+ }
+ }
+
+ adapter = i2c_get_adapter(intel_dsi->i2c_bus_num);
+ if (!adapter)
+ goto out;
+
+ payload_data = kzalloc(payload_size + 1, GFP_KERNEL);
+ if (!payload_data)
+ goto out;
+
+ payload_data[0] = reg_offset;
+ memcpy(_data[1], (data + 7), payload_size);
+
+ msg.addr = slave_addr;
+ msg.flags = 0;
+ msg.len = payload_size + 1;
+ msg.buf = payload_data;
+
+ ret = i2c_transfer(adapter, , 1);
+ if (ret < 0)
+ DRM_ERROR("i2c transfer failed");
+
+ kfree(payload_data);
+ i2c_put_adapter(adapter);
+
+ return data + payload_size + 7;
+out:
DRM_DEBUG_KMS("Skipping I2C element execution\n");
return data + *(data + 6) + 7;
@@ -664,6 +755,8 @@ bool
Re: [Intel-gfx] [PATCH v2] drm/i915: remove ICP_PP_CONTROL
Today I saw this register and had a vague memory of having already
removed it in the past.
It seems this patch has never been reviewed/applied.
Ping
Lucas De Marchi
On Fri, Mar 8, 2019 at 3:23 PM Lucas De Marchi wrote:
>
> This register was placed in the middle of the PP_STATUS definition
> instead of together with the PP_CONTROL where it should. Since it's not
> used and there are no current plans to use it, just remove the
> definition.
>
> v2: remove the define rather than moving it.
>
> Signed-off-by: Lucas De Marchi
> ---
> drivers/gpu/drm/i915/i915_reg.h | 11 ---
> 1 file changed, 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c0cd7a836799..4a855befa838 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4692,17 +4692,6 @@ enum {
> #define _PP_STATUS 0x61200
> #define PP_STATUS(pps_idx) _MMIO_PPS(pps_idx, _PP_STATUS)
> #define PP_ON(1 << 31)
> -
> -#define _PP_CONTROL_1 0xc7204
> -#define _PP_CONTROL_2 0xc7304
> -#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
> - _PP_CONTROL_2)
> -#define POWER_CYCLE_DELAY_MASK(0x1f << 4)
> -#define POWER_CYCLE_DELAY_SHIFT 4
> -#define VDD_OVERRIDE_FORCE(1 << 3)
> -#define BACKLIGHT_ENABLE (1 << 2)
> -#define PWR_DOWN_ON_RESET (1 << 1)
> -#define PWR_STATE_TARGET (1 << 0)
> /*
> * Indicates that all dependencies of the panel are on:
> *
> --
> 2.20.1
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Lucas De Marchi
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/selftest: Move igt_atomic_section[] out of the header (rev2)
== Series Details == Series: drm/i915/selftest: Move igt_atomic_section[] out of the header (rev2) URL : https://patchwork.freedesktop.org/series/71577/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7668 -> Patchwork_15981 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_15981 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_15981, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15981/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_15981: ### IGT changes ### Possible regressions * igt@runner@aborted: - fi-kbl-x1275: NOTRUN -> [FAIL][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15981/fi-kbl-x1275/igt@run...@aborted.html Known issues Here are the changes found in Patchwork_15981 that come from known issues: ### IGT changes ### Issues hit * igt@i915_module_load@reload-with-fault-injection: - fi-cfl-8700k: [PASS][2] -> [INCOMPLETE][3] ([i915#505]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15981/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html - fi-skl-lmem:[PASS][4] -> [INCOMPLETE][5] ([i915#671]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15981/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_selftest@live_blt: - fi-hsw-4770r: [PASS][6] -> [DMESG-FAIL][7] ([i915#553] / [i915#725]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-hsw-4770r/igt@i915_selftest@live_blt.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15981/fi-hsw-4770r/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_execlists: - fi-kbl-x1275: [PASS][8] -> [DMESG-FAIL][9] ([i915#841]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-kbl-x1275/igt@i915_selftest@live_execlists.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15981/fi-kbl-x1275/igt@i915_selftest@live_execlists.html * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: [PASS][10] -> [DMESG-WARN][11] ([i915#44]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15981/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html Possible fixes * igt@i915_module_load@reload-with-fault-injection: - fi-skl-6700k2: [INCOMPLETE][12] ([i915#671]) -> [PASS][13] [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15981/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_selftest@live_active: - fi-kbl-r: [DMESG-FAIL][14] -> [PASS][15] [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-kbl-r/igt@i915_selftest@live_active.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15981/fi-kbl-r/igt@i915_selftest@live_active.html * igt@i915_selftest@live_blt: - fi-hsw-4770:[DMESG-FAIL][16] ([i915#553] / [i915#725]) -> [PASS][17] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-hsw-4770/igt@i915_selftest@live_blt.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15981/fi-hsw-4770/igt@i915_selftest@live_blt.html * igt@kms_chamelium@hdmi-crc-fast: - fi-icl-u2: [FAIL][18] ([fdo#109635]) -> [PASS][19] [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-icl-u2/igt@kms_chamel...@hdmi-crc-fast.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15981/fi-icl-u2/igt@kms_chamel...@hdmi-crc-fast.html [fdo#109635]: https://bugs.freedesktop.org/show_bug.cgi?id=109635 [i915#44]: https://gitlab.freedesktop.org/drm/intel/issues/44 [i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505 [i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553 [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671 [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725 [i915#841]: https://gitlab.freedesktop.org/drm/intel/issues/841 Participating hosts (48 -> 43) -- Additional (4): fi-skl-guc fi-cfl-8109u fi-bwr-2160 fi-kbl-8809g Missing(9): fi-ilk-m540
[Intel-gfx] [CI] drm/i915/gt: Flush ongoing retires during wait_for_idle
Synchronise with any background retires and parking we may have spawned,
so that all requests are accounted for.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/878
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 14 +-
drivers/gpu/drm/i915/intel_wakeref.c| 5 +++--
drivers/gpu/drm/i915/intel_wakeref.h| 9 +++--
3 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index fc691c130ba6..7ef1d37970f6 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -26,18 +26,22 @@ static bool retire_requests(struct intel_timeline *tl)
return !i915_active_fence_isset(>last_request);
}
-static void flush_submission(struct intel_gt *gt)
+static bool flush_submission(struct intel_gt *gt)
{
struct intel_engine_cs *engine;
enum intel_engine_id id;
+ bool active = false;
if (!intel_gt_pm_is_awake(gt))
- return;
+ return false;
for_each_engine(engine, gt, id) {
intel_engine_flush_submission(engine);
- flush_work(>retire_work);
+ active |= flush_work(>retire_work);
+ active |= flush_work(>wakeref.work);
}
+
+ return active;
}
static void engine_retire(struct work_struct *work)
@@ -147,9 +151,9 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt,
long timeout)
}
}
- active_count += !retire_requests(tl);
+ if (!retire_requests(tl) || flush_submission(gt))
+ active_count++;
- flush_submission(gt); /* sync with concurrent retirees */
spin_lock(>lock);
/* Resume iteration after dropping lock */
diff --git a/drivers/gpu/drm/i915/intel_wakeref.c
b/drivers/gpu/drm/i915/intel_wakeref.c
index 59aa1b6f1827..8fbf6f4d3f26 100644
--- a/drivers/gpu/drm/i915/intel_wakeref.c
+++ b/drivers/gpu/drm/i915/intel_wakeref.c
@@ -95,16 +95,17 @@ static void __intel_wakeref_put_work(struct work_struct
*wrk)
void __intel_wakeref_init(struct intel_wakeref *wf,
struct intel_runtime_pm *rpm,
const struct intel_wakeref_ops *ops,
- struct lock_class_key *key)
+ struct intel_wakeref_lockclass *key)
{
wf->rpm = rpm;
wf->ops = ops;
- __mutex_init(>mutex, "wakeref", key);
+ __mutex_init(>mutex, "wakeref.mutex", >mutex);
atomic_set(>count, 0);
wf->wakeref = 0;
INIT_WORK(>work, __intel_wakeref_put_work);
+ lockdep_init_map(>work.lockdep_map, "wakeref.work", >work, 0);
}
int intel_wakeref_wait_for_idle(struct intel_wakeref *wf)
diff --git a/drivers/gpu/drm/i915/intel_wakeref.h
b/drivers/gpu/drm/i915/intel_wakeref.h
index 8d945db94b7a..7d1e676b71ef 100644
--- a/drivers/gpu/drm/i915/intel_wakeref.h
+++ b/drivers/gpu/drm/i915/intel_wakeref.h
@@ -44,12 +44,17 @@ struct intel_wakeref {
struct work_struct work;
};
+struct intel_wakeref_lockclass {
+ struct lock_class_key mutex;
+ struct lock_class_key work;
+};
+
void __intel_wakeref_init(struct intel_wakeref *wf,
struct intel_runtime_pm *rpm,
const struct intel_wakeref_ops *ops,
- struct lock_class_key *key);
+ struct intel_wakeref_lockclass *key);
#define intel_wakeref_init(wf, rpm, ops) do { \
- static struct lock_class_key __key; \
+ static struct intel_wakeref_lockclass __key;\
\
__intel_wakeref_init((wf), (rpm), (ops), &__key); \
} while (0)
--
2.25.0.rc0
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftest: Move igt_atomic_section[] out of the header (rev2)
== Series Details == Series: drm/i915/selftest: Move igt_atomic_section[] out of the header (rev2) URL : https://patchwork.freedesktop.org/series/71577/ State : warning == Summary == $ dim checkpatch origin/drm-tip 29693862b296 drm/i915/selftest: Move igt_atomic_section[] out of the header -:25: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #25: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 106 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Flush ongoing retires during wait_for_idle
== Series Details == Series: drm/i915/gt: Flush ongoing retires during wait_for_idle URL : https://patchwork.freedesktop.org/series/71575/ State : success == Summary == CI Bug Log - changes from CI_DRM_7668 -> Patchwork_15980 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15980/index.html Known issues Here are the changes found in Patchwork_15980 that come from known issues: ### IGT changes ### Issues hit * igt@gem_close_race@basic-threads: - fi-byt-j1900: [PASS][1] -> [TIMEOUT][2] ([i915#816]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-byt-j1900/igt@gem_close_r...@basic-threads.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15980/fi-byt-j1900/igt@gem_close_r...@basic-threads.html * igt@i915_module_load@reload-with-fault-injection: - fi-cfl-8700k: [PASS][3] -> [INCOMPLETE][4] ([i915#505]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15980/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html - fi-bxt-dsi: [PASS][5] -> [INCOMPLETE][6] ([fdo#103927]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15980/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_selftest@live_blt: - fi-hsw-4770r: [PASS][7] -> [DMESG-FAIL][8] ([i915#553] / [i915#725]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-hsw-4770r/igt@i915_selftest@live_blt.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15980/fi-hsw-4770r/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_gt_lrc: - fi-skl-6600u: [PASS][9] -> [DMESG-FAIL][10] ([i915#889]) +7 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-skl-6600u/igt@i915_selftest@live_gt_lrc.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15980/fi-skl-6600u/igt@i915_selftest@live_gt_lrc.html * igt@i915_selftest@live_late_gt_pm: - fi-skl-6600u: [PASS][11] -> [DMESG-WARN][12] ([i915#889]) +23 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-skl-6600u/igt@i915_selftest@live_late_gt_pm.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15980/fi-skl-6600u/igt@i915_selftest@live_late_gt_pm.html * igt@kms_frontbuffer_tracking@basic: - fi-icl-dsi: [PASS][13] -> [DMESG-WARN][14] ([i915#109]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-icl-dsi/igt@kms_frontbuffer_track...@basic.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15980/fi-icl-dsi/igt@kms_frontbuffer_track...@basic.html Possible fixes * igt@i915_module_load@reload-with-fault-injection: - fi-skl-6700k2: [INCOMPLETE][15] ([i915#671]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15980/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_selftest@live_active: - fi-kbl-r: [DMESG-FAIL][17] -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-kbl-r/igt@i915_selftest@live_active.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15980/fi-kbl-r/igt@i915_selftest@live_active.html * igt@i915_selftest@live_gem: - fi-bdw-5557u: [FAIL][19] -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-bdw-5557u/igt@i915_selftest@live_gem.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15980/fi-bdw-5557u/igt@i915_selftest@live_gem.html * igt@kms_chamelium@hdmi-crc-fast: - fi-icl-u2: [FAIL][21] ([fdo#109635]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-icl-u2/igt@kms_chamel...@hdmi-crc-fast.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15980/fi-icl-u2/igt@kms_chamel...@hdmi-crc-fast.html Warnings * igt@i915_selftest@live_blt: - fi-hsw-4770:[DMESG-FAIL][23] ([i915#553] / [i915#725]) -> [DMESG-FAIL][24] ([i915#725]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/fi-hsw-4770/igt@i915_selftest@live_blt.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15980/fi-hsw-4770/igt@i915_selftest@live_blt.html [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#109635]: https://bugs.freedesktop.org/show_bug.cgi?id=109635 [i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109 [i915#505]:
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Flush ongoing retires during wait_for_idle
== Series Details == Series: drm/i915/gt: Flush ongoing retires during wait_for_idle URL : https://patchwork.freedesktop.org/series/71575/ State : warning == Summary == $ dim checkpatch origin/drm-tip d965fea13a5b drm/i915/gt: Flush ongoing retires during wait_for_idle -:29: WARNING:ONE_SEMICOLON: Statements terminations use 1 semicolon #29: FILE: drivers/gpu/drm/i915/gt/intel_gt_requests.c:36: + return false;; total: 0 errors, 1 warnings, 0 checks, 76 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/selftest: Move igt_atomic_section[] out of the header
Move the definition of the igt_atomic_section[] into a C file, leaving
the declaration in the header so as not to upset headertest!
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/selftests/igt_atomic.c | 47 +
drivers/gpu/drm/i915/selftests/igt_atomic.h | 41 +-
3 files changed, 49 insertions(+), 40 deletions(-)
create mode 100644 drivers/gpu/drm/i915/selftests/igt_atomic.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 1a2fad832a4d..5992ef800534 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -252,6 +252,7 @@ i915-$(CONFIG_DRM_I915_SELFTEST) += \
gem/selftests/igt_gem_utils.o \
selftests/i915_random.o \
selftests/i915_selftest.o \
+ selftests/igt_atomic.o \
selftests/igt_flush_test.o \
selftests/igt_live_test.o \
selftests/igt_mmap.o \
diff --git a/drivers/gpu/drm/i915/selftests/igt_atomic.c
b/drivers/gpu/drm/i915/selftests/igt_atomic.c
new file mode 100644
index ..fb506b699095
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/igt_atomic.c
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2018 Intel Corporation
+ */
+
+#include
+#include
+#include
+
+#include "igt_atomic.h"
+
+static void __preempt_begin(void)
+{
+ preempt_disable();
+}
+
+static void __preempt_end(void)
+{
+ preempt_enable();
+}
+
+static void __softirq_begin(void)
+{
+ local_bh_disable();
+}
+
+static void __softirq_end(void)
+{
+ local_bh_enable();
+}
+
+static void __hardirq_begin(void)
+{
+ local_irq_disable();
+}
+
+static void __hardirq_end(void)
+{
+ local_irq_enable();
+}
+
+const struct igt_atomic_section igt_atomic_phases[] = {
+ { "preempt", __preempt_begin, __preempt_end },
+ { "softirq", __softirq_begin, __softirq_end },
+ { "hardirq", __hardirq_begin, __hardirq_end },
+ { }
+};
diff --git a/drivers/gpu/drm/i915/selftests/igt_atomic.h
b/drivers/gpu/drm/i915/selftests/igt_atomic.h
index 93ec89f487ec..1991798abf4b 100644
--- a/drivers/gpu/drm/i915/selftests/igt_atomic.h
+++ b/drivers/gpu/drm/i915/selftests/igt_atomic.h
@@ -6,51 +6,12 @@
#ifndef IGT_ATOMIC_H
#define IGT_ATOMIC_H
-#include
-#include
-#include
-
-static void __preempt_begin(void)
-{
- preempt_disable();
-}
-
-static void __preempt_end(void)
-{
- preempt_enable();
-}
-
-static void __softirq_begin(void)
-{
- local_bh_disable();
-}
-
-static void __softirq_end(void)
-{
- local_bh_enable();
-}
-
-static void __hardirq_begin(void)
-{
- local_irq_disable();
-}
-
-static void __hardirq_end(void)
-{
- local_irq_enable();
-}
-
struct igt_atomic_section {
const char *name;
void (*critical_section_begin)(void);
void (*critical_section_end)(void);
};
-static const struct igt_atomic_section igt_atomic_phases[] = {
- { "preempt", __preempt_begin, __preempt_end },
- { "softirq", __softirq_begin, __softirq_end },
- { "hardirq", __hardirq_begin, __hardirq_end },
- { }
-};
+extern const struct igt_atomic_section igt_atomic_phases[];
#endif /* IGT_ATOMIC_H */
--
2.25.0.rc0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/selftest: Move igt_atomic_section[] out of the header
Move the definition of the igt_atomic_section[] into a C file, leaving
the declaration in the header so as not to upset headertest!
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/selftests/igt_atomic.c | 42 +
drivers/gpu/drm/i915/selftests/igt_atomic.h | 41 +---
3 files changed, 44 insertions(+), 40 deletions(-)
create mode 100644 drivers/gpu/drm/i915/selftests/igt_atomic.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 1a2fad832a4d..5992ef800534 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -252,6 +252,7 @@ i915-$(CONFIG_DRM_I915_SELFTEST) += \
gem/selftests/igt_gem_utils.o \
selftests/i915_random.o \
selftests/i915_selftest.o \
+ selftests/igt_atomic.o \
selftests/igt_flush_test.o \
selftests/igt_live_test.o \
selftests/igt_mmap.o \
diff --git a/drivers/gpu/drm/i915/selftests/igt_atomic.c
b/drivers/gpu/drm/i915/selftests/igt_atomic.c
new file mode 100644
index ..1cacb45ef290
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/igt_atomic.c
@@ -0,0 +1,42 @@
+#include
+#include
+#include
+
+#include "igt_atomic.h"
+
+static void __preempt_begin(void)
+{
+ preempt_disable();
+}
+
+static void __preempt_end(void)
+{
+ preempt_enable();
+}
+
+static void __softirq_begin(void)
+{
+ local_bh_disable();
+}
+
+static void __softirq_end(void)
+{
+ local_bh_enable();
+}
+
+static void __hardirq_begin(void)
+{
+ local_irq_disable();
+}
+
+static void __hardirq_end(void)
+{
+ local_irq_enable();
+}
+
+const struct igt_atomic_section igt_atomic_phases[] = {
+ { "preempt", __preempt_begin, __preempt_end },
+ { "softirq", __softirq_begin, __softirq_end },
+ { "hardirq", __hardirq_begin, __hardirq_end },
+ { }
+};
diff --git a/drivers/gpu/drm/i915/selftests/igt_atomic.h
b/drivers/gpu/drm/i915/selftests/igt_atomic.h
index 93ec89f487ec..1991798abf4b 100644
--- a/drivers/gpu/drm/i915/selftests/igt_atomic.h
+++ b/drivers/gpu/drm/i915/selftests/igt_atomic.h
@@ -6,51 +6,12 @@
#ifndef IGT_ATOMIC_H
#define IGT_ATOMIC_H
-#include
-#include
-#include
-
-static void __preempt_begin(void)
-{
- preempt_disable();
-}
-
-static void __preempt_end(void)
-{
- preempt_enable();
-}
-
-static void __softirq_begin(void)
-{
- local_bh_disable();
-}
-
-static void __softirq_end(void)
-{
- local_bh_enable();
-}
-
-static void __hardirq_begin(void)
-{
- local_irq_disable();
-}
-
-static void __hardirq_end(void)
-{
- local_irq_enable();
-}
-
struct igt_atomic_section {
const char *name;
void (*critical_section_begin)(void);
void (*critical_section_end)(void);
};
-static const struct igt_atomic_section igt_atomic_phases[] = {
- { "preempt", __preempt_begin, __preempt_end },
- { "softirq", __softirq_begin, __softirq_end },
- { "hardirq", __hardirq_begin, __hardirq_end },
- { }
-};
+extern const struct igt_atomic_section igt_atomic_phases[];
#endif /* IGT_ATOMIC_H */
--
2.25.0.rc0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/gt: Flush ongoing retires during wait_for_idle
Synchronise with any background retires and parking we may have spawned,
so that all requests are accounted for.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/878
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 14 +-
drivers/gpu/drm/i915/intel_wakeref.c| 7 +--
drivers/gpu/drm/i915/intel_wakeref.h| 9 +++--
3 files changed, 21 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index fc691c130ba6..0c3d8517010a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -26,18 +26,22 @@ static bool retire_requests(struct intel_timeline *tl)
return !i915_active_fence_isset(>last_request);
}
-static void flush_submission(struct intel_gt *gt)
+static bool flush_submission(struct intel_gt *gt)
{
struct intel_engine_cs *engine;
enum intel_engine_id id;
+ bool active = false;
if (!intel_gt_pm_is_awake(gt))
- return;
+ return false;;
for_each_engine(engine, gt, id) {
intel_engine_flush_submission(engine);
- flush_work(>retire_work);
+ active |= flush_work(>retire_work);
+ active |= flush_work(>wakeref.work);
}
+
+ return active;
}
static void engine_retire(struct work_struct *work)
@@ -147,9 +151,9 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt,
long timeout)
}
}
- active_count += !retire_requests(tl);
+ if (!retire_requests(tl) || flush_submission(gt))
+ active_count++;
- flush_submission(gt); /* sync with concurrent retirees */
spin_lock(>lock);
/* Resume iteration after dropping lock */
diff --git a/drivers/gpu/drm/i915/intel_wakeref.c
b/drivers/gpu/drm/i915/intel_wakeref.c
index 59aa1b6f1827..1a57898d5a06 100644
--- a/drivers/gpu/drm/i915/intel_wakeref.c
+++ b/drivers/gpu/drm/i915/intel_wakeref.c
@@ -95,16 +95,19 @@ static void __intel_wakeref_put_work(struct work_struct
*wrk)
void __intel_wakeref_init(struct intel_wakeref *wf,
struct intel_runtime_pm *rpm,
const struct intel_wakeref_ops *ops,
- struct lock_class_key *key)
+ struct intel_wakeref_lockclass *key)
{
wf->rpm = rpm;
wf->ops = ops;
- __mutex_init(>mutex, "wakeref", key);
+ __mutex_init(>mutex, "wakeref.mutex", >mutex);
atomic_set(>count, 0);
wf->wakeref = 0;
INIT_WORK(>work, __intel_wakeref_put_work);
+#ifdef CONFIG_LOCKDEP
+ lockdep_init_map(>work.lockdep_map, "wakeref.work", >work, 0);
+#endif
}
int intel_wakeref_wait_for_idle(struct intel_wakeref *wf)
diff --git a/drivers/gpu/drm/i915/intel_wakeref.h
b/drivers/gpu/drm/i915/intel_wakeref.h
index 8d945db94b7a..7d1e676b71ef 100644
--- a/drivers/gpu/drm/i915/intel_wakeref.h
+++ b/drivers/gpu/drm/i915/intel_wakeref.h
@@ -44,12 +44,17 @@ struct intel_wakeref {
struct work_struct work;
};
+struct intel_wakeref_lockclass {
+ struct lock_class_key mutex;
+ struct lock_class_key work;
+};
+
void __intel_wakeref_init(struct intel_wakeref *wf,
struct intel_runtime_pm *rpm,
const struct intel_wakeref_ops *ops,
- struct lock_class_key *key);
+ struct intel_wakeref_lockclass *key);
#define intel_wakeref_init(wf, rpm, ops) do { \
- static struct lock_class_key __key; \
+ static struct intel_wakeref_lockclass __key;\
\
__intel_wakeref_init((wf), (rpm), (ops), &__key); \
} while (0)
--
2.25.0.rc0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH resend 1/2] drm/connector: Split out orientation quirk detection (v2)
Hi Rodrigo,
Thank you for the review.
On 02-01-2020 19:17, Rodrigo Vivi wrote:
On Mon, Dec 16, 2019 at 12:51:57PM +0100, Hans de Goede wrote:
From: Derek Basehore
Not every platform needs quirk detection for panel orientation, so
split the drm_connector_init_panel_orientation_property into two
functions. One for platforms without the need for quirks, and the
other for platforms that need quirks.
Hans de Goede (changes in v2):
Rename the function from drm_connector_init_panel_orientation_property
to drm_connector_set_panel_orientation[_with_quirk] and pass in the
panel-orientation to set.
Beside the rename, also make the function set the passed in value
only once, if the value was set before (to a value other then
DRM_MODE_PANEL_ORIENTATION_UNKNOWN) make any further set calls a no-op.
This change is preparation for allowing the user to override the
panel-orientation for any connector from the kernel commandline.
When the panel-orientation is overridden this way, then we must ignore
the panel-orientation detection done by the driver.
Signed-off-by: Derek Basehore
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/drm_connector.c | 74 ++---
drivers/gpu/drm/i915/display/icl_dsi.c | 5 +-
drivers/gpu/drm/i915/display/intel_dp.c | 9 ++-
drivers/gpu/drm/i915/display/vlv_dsi.c | 5 +-
include/drm/drm_connector.h | 9 ++-
5 files changed, 71 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 0965632008a9..f4fa5c59717d 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -1139,7 +1139,8 @@ static const struct drm_prop_enum_list dp_colorspaces[] =
{
*coordinates, so if userspace rotates the picture to adjust for
*the orientation it must also apply the same transformation to the
*touchscreen input coordinates. This property is initialized by calling
- * drm_connector_init_panel_orientation_property().
+ * drm_connector_set_panel_orientation() or
+ * drm_connector_set_panel_orientation_with_quirk()
do we have a better name than quirks for these dsi modes?
The difference between the 2 functions is that the second one calls
drm_get_panel_orientation_quirk() and that if that returns a valid
orientation it overwrites the passed orientation with the return value
from drm_get_panel_orientation_quirk(), so the name seems correct.
As for drm_get_panel_orientation_quirk() itself that currently is only
defined on x86 (it is a static inline no-op elsewhere) and it used
DMI string matching to check for a model specific quirk. So again the
name seems correct.
*
* scaling mode:
*This property defines how a non-native mode is upscaled to the native
@@ -2046,38 +2047,41 @@ void drm_connector_set_vrr_capable_property(
EXPORT_SYMBOL(drm_connector_set_vrr_capable_property);
/**
- * drm_connector_init_panel_orientation_property -
- * initialize the connecters panel_orientation property
- * @connector: connector for which to init the panel-orientation property.
- * @width: width in pixels of the panel, used for panel quirk detection
- * @height: height in pixels of the panel, used for panel quirk detection
+ * drm_connector_set_panel_orientation - sets the connecter's panel_orientation
+ * @connector: connector for which to set the panel-orientation property.
+ * @panel_orientation: drm_panel_orientation value to set
+ *
+ * This function sets the connector's panel_orientation and attaches
+ * a "panel orientation" property to the connector.
*
- * This function should only be called for built-in panels, after setting
- * connector->display_info.panel_orientation first (if known).
+ * Calling this function on a connector where the panel_orientation has
+ * already been set is a no-op (e.g. the orientation has been overridden with
+ * a kernel commandline option).
*
- * This function will check for platform specific (e.g. DMI based) quirks
- * overriding display_info.panel_orientation first, then if panel_orientation
- * is not DRM_MODE_PANEL_ORIENTATION_UNKNOWN it will attach the
- * "panel orientation" property to the connector.
+ * It is allowed to call this function with a panel_orientation of
+ * DRM_MODE_PANEL_ORIENTATION_UNKNOWN, in which case it is a no-op.
*
* Returns:
* Zero on success, negative errno on failure.
*/
-int drm_connector_init_panel_orientation_property(
- struct drm_connector *connector, int width, int height)
+int drm_connector_set_panel_orientation(
+ struct drm_connector *connector,
+ enum drm_panel_orientation panel_orientation)
{
struct drm_device *dev = connector->dev;
struct drm_display_info *info = >display_info;
struct drm_property *prop;
- int orientation_quirk;
- orientation_quirk = drm_get_panel_orientation_quirk(width, height);
- if (orientation_quirk != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
-
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Support discontiguous lmem object maps (rev3)
== Series Details == Series: drm/i915/gem: Support discontiguous lmem object maps (rev3) URL : https://patchwork.freedesktop.org/series/71557/ State : success == Summary == CI Bug Log - changes from CI_DRM_7667 -> Patchwork_15979 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/index.html Known issues Here are the changes found in Patchwork_15979 that come from known issues: ### IGT changes ### Issues hit * igt@i915_selftest@live_blt: - fi-hsw-4770r: [PASS][1] -> [DMESG-FAIL][2] ([i915#563]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-hsw-4770r/igt@i915_selftest@live_blt.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/fi-hsw-4770r/igt@i915_selftest@live_blt.html - fi-hsw-4770:[PASS][3] -> [DMESG-FAIL][4] ([i915#725]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-hsw-4770/igt@i915_selftest@live_blt.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/fi-hsw-4770/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_gem_contexts: - fi-byt-j1900: [PASS][5] -> [DMESG-FAIL][6] ([i915#722]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html Possible fixes * igt@i915_selftest@live_mman: - fi-bxt-dsi: [DMESG-WARN][7] ([i915#889]) -> [PASS][8] +23 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-bxt-dsi/igt@i915_selftest@live_mman.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/fi-bxt-dsi/igt@i915_selftest@live_mman.html * igt@i915_selftest@live_reset: - fi-bxt-dsi: [DMESG-FAIL][9] ([i915#889]) -> [PASS][10] +7 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-bxt-dsi/igt@i915_selftest@live_reset.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/fi-bxt-dsi/igt@i915_selftest@live_reset.html * igt@i915_selftest@live_workarounds: - fi-bwr-2160:[FAIL][11] ([i915#878]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-bwr-2160/igt@i915_selftest@live_workarounds.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/fi-bwr-2160/igt@i915_selftest@live_workarounds.html [i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563 [i915#722]: https://gitlab.freedesktop.org/drm/intel/issues/722 [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725 [i915#878]: https://gitlab.freedesktop.org/drm/intel/issues/878 [i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889 Participating hosts (46 -> 38) -- Additional (4): fi-skl-6770hq fi-blb-e6850 fi-bdw-5557u fi-kbl-7500u Missing(12): fi-kbl-soraka fi-glk-dsi fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-elk-e7500 fi-bsw-kefka fi-skl-lmem fi-byt-clapper fi-bsw-nick fi-bdw-samus fi-kbl-r Build changes - * CI: CI-20190529 -> None * Linux: CI_DRM_7667 -> Patchwork_15979 CI-20190529: 20190529 CI_DRM_7667: e60a61aa9e6849fc2dba1085b1ba99c4847f20cf @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5357: a555a4b98f90dab655d24bb3d07e9291a8b8dac8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_15979: cb66594b48515552683cfc66c91c24fe340d646e @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == cb66594b4851 drm/i915/gem: Support discontiguous lmem object maps == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15979/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gem: Support discontiguous lmem object maps (rev3)
== Series Details == Series: drm/i915/gem: Support discontiguous lmem object maps (rev3) URL : https://patchwork.freedesktop.org/series/71557/ State : warning == Summary == $ dim checkpatch origin/drm-tip cb66594b4851 drm/i915/gem: Support discontiguous lmem object maps -:183: CHECK:SPACING: spaces preferred around that '*' (ctx:ExO) #183: FILE: drivers/gpu/drm/i915/gem/i915_gem_pages.c:294: + **ptes++ = mk_pte(page, pgprot); ^ -:194: CHECK:SPACING: spaces preferred around that '*' (ctx:ExO) #194: FILE: drivers/gpu/drm/i915/gem/i915_gem_pages.c:305: + **ptes++ = iomap_pte(iomap, addr, pgprot); ^ total: 0 errors, 0 warnings, 2 checks, 289 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2] drm/i915/gem: Support discontiguous lmem object maps
Create a vmap for discontinguous lmem objects to support
i915_gem_object_pin_map().
v2: Offset io address by region.start for fake-lmem
Signed-off-by: Chris Wilson
Cc: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 40 --
drivers/gpu/drm/i915/gem/i915_gem_lmem.h | 8 --
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 79 +++
.../gpu/drm/i915/gem/selftests/huge_pages.c | 41 --
.../drm/i915/selftests/intel_memory_region.c | 33
5 files changed, 78 insertions(+), 123 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
index 520cc9cac471..70543c83df06 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
@@ -16,46 +16,6 @@ const struct drm_i915_gem_object_ops i915_gem_lmem_obj_ops =
{
.release = i915_gem_object_release_memory_region,
};
-/* XXX: Time to vfunc your life up? */
-void __iomem *
-i915_gem_object_lmem_io_map_page(struct drm_i915_gem_object *obj,
-unsigned long n)
-{
- resource_size_t offset;
-
- offset = i915_gem_object_get_dma_address(obj, n);
- offset -= obj->mm.region->region.start;
-
- return io_mapping_map_wc(>mm.region->iomap, offset, PAGE_SIZE);
-}
-
-void __iomem *
-i915_gem_object_lmem_io_map_page_atomic(struct drm_i915_gem_object *obj,
- unsigned long n)
-{
- resource_size_t offset;
-
- offset = i915_gem_object_get_dma_address(obj, n);
- offset -= obj->mm.region->region.start;
-
- return io_mapping_map_atomic_wc(>mm.region->iomap, offset);
-}
-
-void __iomem *
-i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj,
- unsigned long n,
- unsigned long size)
-{
- resource_size_t offset;
-
- GEM_BUG_ON(!i915_gem_object_is_contiguous(obj));
-
- offset = i915_gem_object_get_dma_address(obj, n);
- offset -= obj->mm.region->region.start;
-
- return io_mapping_map_wc(>mm.region->iomap, offset, size);
-}
-
bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj)
{
return obj->ops == _gem_lmem_obj_ops;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
b/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
index 7c176b8b7d2f..fc3f15580fe3 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
@@ -14,14 +14,6 @@ struct intel_memory_region;
extern const struct drm_i915_gem_object_ops i915_gem_lmem_obj_ops;
-void __iomem *i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj,
- unsigned long n, unsigned long size);
-void __iomem *i915_gem_object_lmem_io_map_page(struct drm_i915_gem_object *obj,
- unsigned long n);
-void __iomem *
-i915_gem_object_lmem_io_map_page_atomic(struct drm_i915_gem_object *obj,
- unsigned long n);
-
bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj);
struct drm_i915_gem_object *
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 75197ca696a8..54aca5c9101e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -158,9 +158,7 @@ static void __i915_gem_object_reset_page_iter(struct
drm_i915_gem_object *obj)
static void unmap_object(struct drm_i915_gem_object *obj, void *ptr)
{
- if (i915_gem_object_is_lmem(obj))
- io_mapping_unmap((void __force __iomem *)ptr);
- else if (is_vmalloc_addr(ptr))
+ if (is_vmalloc_addr(ptr))
vunmap(ptr);
else
kunmap(kmap_to_page(ptr));
@@ -236,46 +234,44 @@ int __i915_gem_object_put_pages(struct
drm_i915_gem_object *obj)
return err;
}
+static inline pte_t iomap_pte(resource_size_t base,
+ dma_addr_t offset,
+ pgprot_t prot)
+{
+ return pte_mkspecial(pfn_pte((base + offset) >> PAGE_SHIFT, prot));
+}
+
/* The 'mapping' part of i915_gem_object_pin_map() below */
static void *i915_gem_object_map(struct drm_i915_gem_object *obj,
enum i915_map_type type)
{
- unsigned long n_pages = obj->base.size >> PAGE_SHIFT;
+ unsigned long n_pte = obj->base.size >> PAGE_SHIFT;
struct sg_table *sgt = obj->mm.pages;
- struct sgt_iter sgt_iter;
- struct page *page;
- struct page *stack_pages[32];
- struct page **pages = stack_pages;
- unsigned long i = 0;
+ pte_t *stack[32], **mem;
+ struct vm_struct *area;
pgprot_t pgprot;
- void *addr;
- if (i915_gem_object_is_lmem(obj)) {
- void __iomem *io;
-
- if (type != I915_MAP_WC)
- return NULL;
-
- io =
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Drop mutex serialisation between context pin/unpin
== Series Details == Series: drm/i915/gt: Drop mutex serialisation between context pin/unpin URL : https://patchwork.freedesktop.org/series/71568/ State : success == Summary == CI Bug Log - changes from CI_DRM_7667 -> Patchwork_15977 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15977/index.html Known issues Here are the changes found in Patchwork_15977 that come from known issues: ### IGT changes ### Possible fixes * igt@i915_module_load@reload-with-fault-injection: - fi-skl-lmem:[INCOMPLETE][1] ([i915#671]) -> [PASS][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15977/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_selftest@live_mman: - fi-bxt-dsi: [DMESG-WARN][3] ([i915#889]) -> [PASS][4] +23 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-bxt-dsi/igt@i915_selftest@live_mman.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15977/fi-bxt-dsi/igt@i915_selftest@live_mman.html * igt@i915_selftest@live_reset: - fi-bxt-dsi: [DMESG-FAIL][5] ([i915#889]) -> [PASS][6] +7 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-bxt-dsi/igt@i915_selftest@live_reset.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15977/fi-bxt-dsi/igt@i915_selftest@live_reset.html [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671 [i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889 Participating hosts (46 -> 40) -- Additional (4): fi-blb-e6850 fi-bdw-5557u fi-ivb-3770 fi-skl-6600u Missing(10): fi-hsw-peppy fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-ilk-650 fi-ctg-p8600 fi-gdg-551 fi-byt-clapper fi-bdw-samus fi-snb-2600 Build changes - * CI: CI-20190529 -> None * Linux: CI_DRM_7667 -> Patchwork_15977 CI-20190529: 20190529 CI_DRM_7667: e60a61aa9e6849fc2dba1085b1ba99c4847f20cf @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5357: a555a4b98f90dab655d24bb3d07e9291a8b8dac8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_15977: 395d527730339d2b907a2dfc94890eae41462393 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 395d52773033 drm/i915/gt: Drop mutex serialisation between context pin/unpin == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15977/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: remove boolean comparisons in conditionals.
== Series Details == Series: drm/i915: remove boolean comparisons in conditionals. URL : https://patchwork.freedesktop.org/series/71569/ State : failure == Summary == Applying: drm/i915: remove boolean comparisons in conditionals. Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/display/intel_ddi.c M drivers/gpu/drm/i915/display/intel_dp.c M drivers/gpu/drm/i915/display/intel_sdvo.c Falling back to patching base and 3-way merge... Auto-merging drivers/gpu/drm/i915/display/intel_sdvo.c Auto-merging drivers/gpu/drm/i915/display/intel_dp.c Auto-merging drivers/gpu/drm/i915/display/intel_ddi.c CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/display/intel_ddi.c error: Failed to merge in the changes. hint: Use 'git am --show-current-patch' to see the failed patch Patch failed at 0001 drm/i915: remove boolean comparisons in conditionals. When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915/gt: Include a bunch more rcs image state
== Series Details ==
Series: series starting with [1/5] drm/i915/gt: Include a bunch more rcs image
state
URL : https://patchwork.freedesktop.org/series/71565/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7667 -> Patchwork_15976
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/index.html
Known issues
Here are the changes found in Patchwork_15976 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live_blt:
- fi-byt-j1900: [PASS][1] -> [DMESG-FAIL][2] ([i915#725])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-byt-j1900/igt@i915_selftest@live_blt.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/fi-byt-j1900/igt@i915_selftest@live_blt.html
- fi-hsw-4770:[PASS][3] -> [DMESG-FAIL][4] ([i915#725])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-hsw-4770/igt@i915_selftest@live_blt.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/fi-hsw-4770/igt@i915_selftest@live_blt.html
- fi-hsw-4770r: [PASS][5] -> [DMESG-FAIL][6] ([i915#725])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-hsw-4770r/igt@i915_selftest@live_blt.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/fi-hsw-4770r/igt@i915_selftest@live_blt.html
Possible fixes
* igt@i915_module_load@reload-with-fault-injection:
- fi-skl-lmem:[INCOMPLETE][7] ([i915#671]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html
* igt@i915_selftest@live_gt_engines:
- fi-bxt-dsi: [DMESG-FAIL][9] ([i915#889]) -> [PASS][10] +7 similar
issues
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-bxt-dsi/igt@i915_selftest@live_gt_engines.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/fi-bxt-dsi/igt@i915_selftest@live_gt_engines.html
* igt@i915_selftest@live_mman:
- fi-bxt-dsi: [DMESG-WARN][11] ([i915#889]) -> [PASS][12] +23
similar issues
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-bxt-dsi/igt@i915_selftest@live_mman.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/fi-bxt-dsi/igt@i915_selftest@live_mman.html
* igt@i915_selftest@live_workarounds:
- fi-bwr-2160:[FAIL][13] ([i915#878]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-bwr-2160/igt@i915_selftest@live_workarounds.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/fi-bwr-2160/igt@i915_selftest@live_workarounds.html
* igt@kms_busy@basic-flip-pipe-a:
- {fi-tgl-guc}: [DMESG-WARN][15] ([i915#402]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-tgl-guc/igt@kms_b...@basic-flip-pipe-a.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/fi-tgl-guc/igt@kms_b...@basic-flip-pipe-a.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#878]: https://gitlab.freedesktop.org/drm/intel/issues/878
[i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889
Participating hosts (46 -> 45)
--
Additional (5): fi-bdw-5557u fi-skl-6770hq fi-kbl-7500u fi-ivb-3770
fi-blb-e6850
Missing(6): fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-gdg-551
fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7667 -> Patchwork_15976
CI-20190529: 20190529
CI_DRM_7667: e60a61aa9e6849fc2dba1085b1ba99c4847f20cf @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5357: a555a4b98f90dab655d24bb3d07e9291a8b8dac8 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15976: 0c77ece7c3e9c3078d5347bfd87b06045a20c904 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
0c77ece7c3e9 drm/i915/gt: Always poison the kernel_context image before
unparking
3af8edaa285a drm/i915/gt: Discard stale context state from across idling
ed9d9bc9491f drm/i915/gt: Ignore stale context state upon resume
ad10e072d9a8 drm/i915/gt: Clear LRC image inline
45be0b74860c drm/i915/gt: Include a bunch more rcs image state
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15976/index.html
___
Intel-gfx mailing list
Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only
On Tue, Dec 31, 2019 at 04:00:07PM +0200, Kai Vehmanen wrote:
> Revert changes done in commit f6ec9483091f ("drm/i915: extend audio
> CDCLK>=2*BCLK constraint to more platforms"). Audio drivers
> communicate with i915 over HDA bus multiple times during system
> boot-up and each of these transactions result in matching
> get_power/put_power calls to i915, and depending on the platform,
> a modeset change causing visible flicker.
>
> GLK is the only platform with minimum CDCLK significantly lower
> than BCLK, and thus for GLK setting a higher CDCLK is mandatory.
>
> For other platforms, minimum CDCLK is close but below 2*BCLK
> (e.g. on ICL, CDCLK=176.4kHz with BCLK=96kHz). Spec-wise the constraint
> should be set, but in practise no communication errors have been
> reported and the downside if set is the flicker observed at boot-time.
>
> Revert to old behaviour until better mechanism to manage
> probe-time clocks is available.
>
> The full CDCLK>=2*BCLK constraint is still enforced at pipe
> enable time in intel_crtc_compute_min_cdclk().
>
> Bugzilla: https://gitlab.freedesktop.org/drm/intel/issues/913
> Signed-off-by: Kai Vehmanen
> ---
>
> Notes:
> v2: d'oh, change put_power() as well
>
> drivers/gpu/drm/i915/display/intel_audio.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_audio.c
> b/drivers/gpu/drm/i915/display/intel_audio.c
> index 27710098d056..e406719a6716 100644
> --- a/drivers/gpu/drm/i915/display/intel_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_audio.c
> @@ -856,7 +856,7 @@ static unsigned long
> i915_audio_component_get_power(struct device *kdev)
> }
>
> /* Force CDCLK to 2*BCLK as long as we need audio powered. */
> - if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> + if (IS_GEMINILAKE(dev_priv))
I believe for correctness we should at least say this is for display_10 but
since we don't have display gen defined probably the right thing to do here
is to at least replace this per:
IS_GEN(dev_priv, 10) || IS_GEMINILAKE(dev_priv)
> glk_force_audio_cdclk(dev_priv, true);
>
> if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> @@ -875,7 +875,7 @@ static void i915_audio_component_put_power(struct device
> *kdev,
>
> /* Stop forcing CDCLK to 2*BCLK if no need for audio to be powered. */
> if (--dev_priv->audio_power_refcount == 0)
> - if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> + if (IS_GEMINILAKE(dev_priv))
> glk_force_audio_cdclk(dev_priv, false);
>
> intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO, cookie);
> --
> 2.17.1
>
> ___
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/gt: Include a bunch more rcs image state
== Series Details == Series: series starting with [1/5] drm/i915/gt: Include a bunch more rcs image state URL : https://patchwork.freedesktop.org/series/71565/ State : warning == Summary == $ dim checkpatch origin/drm-tip 45be0b74860c drm/i915/gt: Include a bunch more rcs image state -:22: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'count' - possible side-effects? #22: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:495: +#define LRI(count, flags) ((flags) << 6 | (count) | BUILD_BUG_ON_ZERO(count >= BIT(6))) total: 0 errors, 0 warnings, 1 checks, 119 lines checked ad10e072d9a8 drm/i915/gt: Clear LRC image inline -:40: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #40: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:507: +#define END(x) 0, (x) total: 1 errors, 0 warnings, 0 checks, 239 lines checked ed9d9bc9491f drm/i915/gt: Ignore stale context state upon resume 3af8edaa285a drm/i915/gt: Discard stale context state from across idling 0c77ece7c3e9 drm/i915/gt: Always poison the kernel_context image before unparking ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH resend 1/2] drm/connector: Split out orientation quirk detection (v2)
On Mon, Dec 16, 2019 at 12:51:57PM +0100, Hans de Goede wrote:
> From: Derek Basehore
>
> Not every platform needs quirk detection for panel orientation, so
> split the drm_connector_init_panel_orientation_property into two
> functions. One for platforms without the need for quirks, and the
> other for platforms that need quirks.
>
> Hans de Goede (changes in v2):
>
> Rename the function from drm_connector_init_panel_orientation_property
> to drm_connector_set_panel_orientation[_with_quirk] and pass in the
> panel-orientation to set.
>
> Beside the rename, also make the function set the passed in value
> only once, if the value was set before (to a value other then
> DRM_MODE_PANEL_ORIENTATION_UNKNOWN) make any further set calls a no-op.
>
> This change is preparation for allowing the user to override the
> panel-orientation for any connector from the kernel commandline.
> When the panel-orientation is overridden this way, then we must ignore
> the panel-orientation detection done by the driver.
>
> Signed-off-by: Derek Basehore
> Signed-off-by: Hans de Goede
> ---
> drivers/gpu/drm/drm_connector.c | 74 ++---
> drivers/gpu/drm/i915/display/icl_dsi.c | 5 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 9 ++-
> drivers/gpu/drm/i915/display/vlv_dsi.c | 5 +-
> include/drm/drm_connector.h | 9 ++-
> 5 files changed, 71 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
> index 0965632008a9..f4fa5c59717d 100644
> --- a/drivers/gpu/drm/drm_connector.c
> +++ b/drivers/gpu/drm/drm_connector.c
> @@ -1139,7 +1139,8 @@ static const struct drm_prop_enum_list dp_colorspaces[]
> = {
> * coordinates, so if userspace rotates the picture to adjust for
> * the orientation it must also apply the same transformation to the
> * touchscreen input coordinates. This property is initialized by calling
> - * drm_connector_init_panel_orientation_property().
> + * drm_connector_set_panel_orientation() or
> + * drm_connector_set_panel_orientation_with_quirk()
do we have a better name than quirks for these dsi modes?
> *
> * scaling mode:
> * This property defines how a non-native mode is upscaled to the native
> @@ -2046,38 +2047,41 @@ void drm_connector_set_vrr_capable_property(
> EXPORT_SYMBOL(drm_connector_set_vrr_capable_property);
>
> /**
> - * drm_connector_init_panel_orientation_property -
> - * initialize the connecters panel_orientation property
> - * @connector: connector for which to init the panel-orientation property.
> - * @width: width in pixels of the panel, used for panel quirk detection
> - * @height: height in pixels of the panel, used for panel quirk detection
> + * drm_connector_set_panel_orientation - sets the connecter's
> panel_orientation
> + * @connector: connector for which to set the panel-orientation property.
> + * @panel_orientation: drm_panel_orientation value to set
> + *
> + * This function sets the connector's panel_orientation and attaches
> + * a "panel orientation" property to the connector.
> *
> - * This function should only be called for built-in panels, after setting
> - * connector->display_info.panel_orientation first (if known).
> + * Calling this function on a connector where the panel_orientation has
> + * already been set is a no-op (e.g. the orientation has been overridden with
> + * a kernel commandline option).
> *
> - * This function will check for platform specific (e.g. DMI based) quirks
> - * overriding display_info.panel_orientation first, then if panel_orientation
> - * is not DRM_MODE_PANEL_ORIENTATION_UNKNOWN it will attach the
> - * "panel orientation" property to the connector.
> + * It is allowed to call this function with a panel_orientation of
> + * DRM_MODE_PANEL_ORIENTATION_UNKNOWN, in which case it is a no-op.
> *
> * Returns:
> * Zero on success, negative errno on failure.
> */
> -int drm_connector_init_panel_orientation_property(
> - struct drm_connector *connector, int width, int height)
> +int drm_connector_set_panel_orientation(
> + struct drm_connector *connector,
> + enum drm_panel_orientation panel_orientation)
> {
> struct drm_device *dev = connector->dev;
> struct drm_display_info *info = >display_info;
> struct drm_property *prop;
> - int orientation_quirk;
>
> - orientation_quirk = drm_get_panel_orientation_quirk(width, height);
> - if (orientation_quirk != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
> - info->panel_orientation = orientation_quirk;
> + /* Already set? */
> + if (info->panel_orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
> + return 0;
What happens on the scenario of ICL DSI here?
In case we had something badly set we just respect the bad choices?
Any way to at least have some kind of warn when we tried the dsi mode but
it had already been set?
>
> - if (info->panel_orientation ==
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gem: Support discontiguous lmem object maps (rev2)
== Series Details == Series: drm/i915/gem: Support discontiguous lmem object maps (rev2) URL : https://patchwork.freedesktop.org/series/71557/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7667 -> Patchwork_15975 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_15975 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_15975, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15975/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_15975: ### IGT changes ### Possible regressions * igt@i915_selftest@live_hugepages: - fi-skl-lmem:NOTRUN -> [DMESG-FAIL][1] +1 similar issue [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15975/fi-skl-lmem/igt@i915_selftest@live_hugepages.html Known issues Here are the changes found in Patchwork_15975 that come from known issues: ### IGT changes ### Issues hit * igt@i915_module_load@reload-with-fault-injection: - fi-cfl-8700k: [PASS][2] -> [INCOMPLETE][3] ([i915#505]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15975/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_selftest@live_blt: - fi-byt-j1900: [PASS][4] -> [DMESG-FAIL][5] ([i915#725]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-byt-j1900/igt@i915_selftest@live_blt.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15975/fi-byt-j1900/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_hangcheck: - fi-icl-u3: [PASS][6] -> [DMESG-FAIL][7] ([i915#419]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-icl-u3/igt@i915_selftest@live_hangcheck.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15975/fi-icl-u3/igt@i915_selftest@live_hangcheck.html * igt@i915_selftest@live_reset: - fi-cfl-guc: [PASS][8] -> [DMESG-FAIL][9] ([i915#889]) +7 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-cfl-guc/igt@i915_selftest@live_reset.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15975/fi-cfl-guc/igt@i915_selftest@live_reset.html * igt@i915_selftest@live_workarounds: - fi-cfl-guc: [PASS][10] -> [DMESG-WARN][11] ([i915#889]) +23 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-cfl-guc/igt@i915_selftest@live_workarounds.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15975/fi-cfl-guc/igt@i915_selftest@live_workarounds.html Possible fixes * igt@i915_module_load@reload-with-fault-injection: - fi-skl-lmem:[INCOMPLETE][12] ([i915#671]) -> [PASS][13] [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15975/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_selftest@live_workarounds: - fi-bwr-2160:[FAIL][14] ([i915#878]) -> [PASS][15] [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-bwr-2160/igt@i915_selftest@live_workarounds.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15975/fi-bwr-2160/igt@i915_selftest@live_workarounds.html Warnings * igt@i915_module_load@reload-with-fault-injection: - fi-bxt-dsi: [DMESG-WARN][16] ([i915#889]) -> [INCOMPLETE][17] ([fdo#103927]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7667/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15975/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [i915#419]: https://gitlab.freedesktop.org/drm/intel/issues/419 [i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505 [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671 [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725 [i915#878]: https://gitlab.freedesktop.org/drm/intel/issues/878 [i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889 Participating hosts (46 -> 46) -- Additional (6): fi-bdw-5557u fi-skl-6770hq fi-kbl-7500u fi-ivb-3770 fi-blb-e6850 fi-skl-6600u Missing(6): fi-hsw-4770r fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes - * CI: CI-20190529 -> None
Re: [Intel-gfx] [PATCH v3 2/9] drm/dp: get/set phy compliance pattern
On 2019-12-30 11:05 a.m., Manna, Animesh wrote:
> On 24-12-2019 01:23, Harry Wentland wrote:
>>
>> On 2019-12-23 12:03 p.m., Animesh Manna wrote:
>>> During phy compliance auto test mode source need to read
>>> requested test pattern from sink through DPCD. After processing
>>> the request source need to set the pattern. So set/get method
>>> added in drm layer as it is DP protocol.
>>>
>>> v2: As per review feedback from Manasi on RFC version,
>>> - added dp revision as function argument in set_phy_pattern api.
>>> - used int for link_rate and u8 for lane_count to align with
>>> existing code.
>>>
>>> Signed-off-by: Animesh Manna
>>> ---
>>> drivers/gpu/drm/drm_dp_helper.c | 93
>>> +
>>> include/drm/drm_dp_helper.h | 31 +++
>>> 2 files changed, 124 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/drm_dp_helper.c
>>> b/drivers/gpu/drm/drm_dp_helper.c
>>> index 2c7870aef469..91c80973aa83 100644
>>> --- a/drivers/gpu/drm/drm_dp_helper.c
>>> +++ b/drivers/gpu/drm/drm_dp_helper.c
>>> @@ -1371,3 +1371,96 @@ int
>>> drm_dp_dsc_sink_supported_input_bpcs(const u8
>>> dsc_dpcd[DP_DSC_RECEIVER_CAP_S
>>> return num_bpc;
>>> }
>>> EXPORT_SYMBOL(drm_dp_dsc_sink_supported_input_bpcs);
>>> +
>>> +/**
>>> + * drm_dp_get_phy_test_pattern() - get the requested pattern from
>>> the sink.
>>> + * @aux: DisplayPort AUX channel
>>> + * @data: DP phy compliance test parameters.
>>> + *
>>> + * Returns 0 on success or a negative error code on failure.
>>> + */
>>> +int drm_dp_get_phy_test_pattern(struct drm_dp_aux *aux,
>>> + struct drm_dp_phy_test_params *data)
>>> +{
>>> + int err;
>>> + u8 rate, lanes;
>>> +
>>> + err = drm_dp_dpcd_readb(aux, DP_TEST_LINK_RATE, );
>>> + if (err < 0)
>>> + return err;
>>> + data->link_rate = drm_dp_bw_code_to_link_rate(rate);
>>> +
>>> + err = drm_dp_dpcd_readb(aux, DP_TEST_LANE_COUNT, );
>>> + if (err < 0)
>>> + return err;
>>> + data->num_lanes = lanes & DP_MAX_LANE_COUNT_MASK;
>>> +
>>> + if (lanes & DP_ENHANCED_FRAME_CAP)
>>> + data->enahanced_frame_cap = true;
>>> +
>>> + err = drm_dp_dpcd_readb(aux, DP_PHY_TEST_PATTERN,
>>> >phy_pattern);
>>> + if (err < 0)
>>> + return err;
>>> +
>>> + switch (data->phy_pattern) {
>>> + case DP_PHY_TEST_PATTERN_80BIT_CUSTOM:
>>> + err = drm_dp_dpcd_read(aux, DP_TEST_80BIT_CUSTOM_PATTERN_7_0,
>>> + >custom80, 10);
>> Using sizeof(data->custom80) might be safer.
>>
>>> + if (err < 0)
>>> + return err;
>>> +
>>> + break;
>>> + case DP_PHY_TEST_PATTERN_CP2520:
>>> + err = drm_dp_dpcd_read(aux, DP_TEST_HBR2_SCRAMBLER_RESET,
>>> + >hbr2_reset, 2);
>> Same here, using sizeof(data->hbr2_reset).
>>
>>> + if (err < 0)
>>> + return err;
>>> + }
>>> +
>>> + return 0;
>>> +}
>>> +EXPORT_SYMBOL(drm_dp_get_phy_test_pattern);
>>> +
>>> +/**
>>> + * drm_dp_set_phy_test_pattern() - set the pattern to the sink.
>>> + * @aux: DisplayPort AUX channel
>>> + * @data: DP phy compliance test parameters.
>>> + *
>>> + * Returns 0 on success or a negative error code on failure.
>>> + */
>>> +int drm_dp_set_phy_test_pattern(struct drm_dp_aux *aux,
>>> + struct drm_dp_phy_test_params *data, u8 dp_rev)
>>> +{
>>> + int err, i;
>>> + u8 link_config[2];
>>> + u8 test_pattern;
>>> +
>>> + link_config[0] = drm_dp_link_rate_to_bw_code(data->link_rate);
>>> + link_config[1] = data->num_lanes;
>>> + if (data->enahanced_frame_cap)
>>> + link_config[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
>>> + err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, link_config, 2);
>>> + if (err < 0)
>>> + return err;
>>> +
>>> + test_pattern = data->phy_pattern;
>>> + if (dp_rev < 0x12) {
>>> + test_pattern = (test_pattern << 2) &
>>> + DP_LINK_QUAL_PATTERN_11_MASK;
>>> + err = drm_dp_dpcd_writeb(aux, DP_TRAINING_PATTERN_SET,
>>> + test_pattern);
>>> + if (err < 0)
>>> + return err;
>>> + } else {
>>> + for (i = 0; i < data->num_lanes; i++) {
>>> + err = drm_dp_dpcd_writeb(aux,
>>> + DP_LINK_QUAL_LANE0_SET + i,
>>> + test_pattern);
>>> + if (err < 0)
>>> + return err;
>>> + }
>>> + }
>>> +
>>> + return 0;
>>> +}
>>> +EXPORT_SYMBOL(drm_dp_set_phy_test_pattern);
>>> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
>>> index d6e560870fb1..42a364748308 100644
>>> --- a/include/drm/drm_dp_helper.h
>>> +++ b/include/drm/drm_dp_helper.h
>>> @@ -700,6 +700,15 @@
>>> # define DP_TEST_COUNT_MASK 0xf
>>> #define DP_PHY_TEST_PATTERN 0x248
>>> +# define DP_PHY_TEST_PATTERN_SEL_MASK 0x7
>>> +# define DP_PHY_TEST_PATTERN_NONE 0x0
>>> +# define DP_PHY_TEST_PATTERN_D10_2
[Intel-gfx] [PATCH] drm/i915: remove boolean comparisons in conditionals.
Remove unnecessary comparisons to true/false in if statements.
Issues found by coccinelle.
Signed-off-by: Wambui Karuga
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 9ba794cb9b4f..c065078b3be2 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1812,7 +1812,7 @@ void intel_ddi_set_vc_payload_alloc(const struct
intel_crtc_state *crtc_state,
u32 temp;
temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
- if (state == true)
+ if (state)
temp |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
else
temp &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index aa515261cb9f..93140c75386a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4958,7 +4958,7 @@ intel_dp_check_mst_status(struct intel_dp *intel_dp)
WARN_ON_ONCE(intel_dp->active_mst_links < 0);
bret = intel_dp_get_sink_irq_esi(intel_dp, esi);
go_again:
- if (bret == true) {
+ if (bret) {
/* check link status - esi[10] = 0x200c */
if (intel_dp->active_mst_links > 0 &&
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c
b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 47f5d87a938a..cff254c52f5e 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -3292,8 +3292,8 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
if (!intel_sdvo_get_capabilities(intel_sdvo, _sdvo->caps))
goto err;
- if (intel_sdvo_output_setup(intel_sdvo,
- intel_sdvo->caps.output_flags) != true) {
+ if (!intel_sdvo_output_setup(intel_sdvo,
+intel_sdvo->caps.output_flags)) {
DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
SDVO_NAME(intel_sdvo));
/* Output_setup can leave behind connectors! */
--
2.17.1
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gem: Support discontiguous lmem object maps (rev2)
== Series Details == Series: drm/i915/gem: Support discontiguous lmem object maps (rev2) URL : https://patchwork.freedesktop.org/series/71557/ State : warning == Summary == $ dim checkpatch origin/drm-tip 1d5e8b6368cf drm/i915/gem: Support discontiguous lmem object maps -:181: CHECK:SPACING: spaces preferred around that '*' (ctx:ExO) #181: FILE: drivers/gpu/drm/i915/gem/i915_gem_pages.c:294: + **ptes++ = mk_pte(page, pgprot); ^ -:189: CHECK:SPACING: spaces preferred around that '*' (ctx:ExO) #189: FILE: drivers/gpu/drm/i915/gem/i915_gem_pages.c:302: + **ptes++ = iomap_pte(iomap, addr, pgprot); ^ total: 0 errors, 0 warnings, 2 checks, 286 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/gt: Drop mutex serialisation between context pin/unpin
The last remaining reason for serialising the pin/unpin of the
intel_context is to ensure that our preallocated wakerefs are not
consumed too early (i.e. the unpin of the previous phase does not emit
the idle barriers for this phase before we even submit). All of the
other operations within the context pin/unpin are supposed to be
atomic... Therefore, we can reduce the serialisation to being just on
the i915_active.preallocated_barriers itself and drop the nested
pin_mutex from intel_context_unpin().
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Cc: Maarten Lankhorst
---
drivers/gpu/drm/i915/gt/intel_context.c | 18 +-
drivers/gpu/drm/i915/i915_active.c | 20
2 files changed, 21 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c
b/drivers/gpu/drm/i915/gt/intel_context.c
index c25d2be2ae0f..63b19d7a3c0f 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -122,22 +122,14 @@ int __intel_context_do_pin(struct intel_context *ce)
void intel_context_unpin(struct intel_context *ce)
{
- if (likely(atomic_add_unless(>pin_count, -1, 1)))
+ if (!atomic_dec_and_test(>pin_count))
return;
- /* We may be called from inside intel_context_pin() to evict another */
- intel_context_get(ce);
- mutex_lock_nested(>pin_mutex, SINGLE_DEPTH_NESTING);
-
- if (likely(atomic_dec_and_test(>pin_count))) {
- CE_TRACE(ce, "retire\n");
+ CE_TRACE(ce, "unpin\n");
+ ce->ops->unpin(ce);
- ce->ops->unpin(ce);
-
- intel_context_active_release(ce);
- }
-
- mutex_unlock(>pin_mutex);
+ intel_context_get(ce);
+ intel_context_active_release(ce);
intel_context_put(ce);
}
diff --git a/drivers/gpu/drm/i915/i915_active.c
b/drivers/gpu/drm/i915/i915_active.c
index cfe09964622b..dc317b5171f0 100644
--- a/drivers/gpu/drm/i915/i915_active.c
+++ b/drivers/gpu/drm/i915/i915_active.c
@@ -605,12 +605,15 @@ int i915_active_acquire_preallocate_barrier(struct
i915_active *ref,
struct intel_engine_cs *engine)
{
intel_engine_mask_t tmp, mask = engine->mask;
+ struct llist_node *pos = NULL, *next;
struct intel_gt *gt = engine->gt;
- struct llist_node *pos, *next;
int err;
GEM_BUG_ON(i915_active_is_idle(ref));
- GEM_BUG_ON(!llist_empty(>preallocated_barriers));
+
+ /* Wait until the previous preallocation is completed */
+ while (!llist_empty(>preallocated_barriers))
+ cond_resched();
/*
* Preallocate a node for each physical engine supporting the target
@@ -653,16 +656,25 @@ int i915_active_acquire_preallocate_barrier(struct
i915_active *ref,
GEM_BUG_ON(rcu_access_pointer(node->base.fence) !=
ERR_PTR(-EAGAIN));
GEM_BUG_ON(barrier_to_engine(node) != engine);
- llist_add(barrier_to_ll(node), >preallocated_barriers);
+ next = barrier_to_ll(node);
+ next->next = pos;
+ if (!pos)
+ pos = next;
intel_engine_pm_get(engine);
}
+ GEM_BUG_ON(!llist_empty(>preallocated_barriers));
+ llist_add_batch(next, pos, >preallocated_barriers);
+
return 0;
unwind:
- llist_for_each_safe(pos, next, take_preallocated_barriers(ref)) {
+ while (pos) {
struct active_node *node = barrier_from_ll(pos);
+ next = pos->next;
+ pos = next;
+
atomic_dec(>count);
intel_engine_pm_put(barrier_to_engine(node));
--
2.25.0.rc0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/7] drm/i915/tgl: Make sure a semiplanar UV plane is tile row size aligned
On Wed, 2020-01-01 at 01:37 +0200, Imre Deak wrote:
> Currently the GGTT offset of a UV plane in a semiplanar YUV FB is
> tile
> size (4kB) aligned. I noticed, that enforcing only this alignment
> leads
> oddly to random memory corruptions on TGL while scanning out Y-tiled
> FBs. This issue can be easily reproduced with a UV plane offset that
> is
> not aligned to the plane's tile row size.
>
> Some experiments showed the correct alignment to be tile row size
> indeed. This also makes sense, since the de-tiling fence created for
> the
> object - with its own stride and so "left" and "right" edge - applies
> to
> all the planes in the FB, so each tile row of all planes should be
> tile
> row aligned.
>
> In fact BSpec requires this alignment since SKL. On SKL we may
> enforce
> this due to the AUX plane x,y coords check, but on ICL and TGL we
> don't.
> For now enforce this only on TGL; I can follow up with any necessary
> change for ICL after more tests.
>
> BSpec requires a stricter alignment for linear UV planes too (kind of
> a
> tile row alignment), but it's unclear whether that's really needed
> (couldn't be explained with the de-tiling fence as above) and
> enforcing
> that could break existing user space; so avoid that too for now until
> more tests.
>
> v2:
> - Clarify the commit log wrt. the address space the alignment applies
> to.
> (Chris)
>
> Cc: Chris Wilson
> Cc: Ville Syrjälä
> Signed-off-by: Imre Deak
> Acked-by: Chris Wilson
Reviewed-by: Mika Kahola
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 36
> ++--
> 1 file changed, 33 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 6e4152770c15..bbc9cf288067 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1995,6 +1995,13 @@ intel_format_info_is_yuv_semiplanar(const
> struct drm_format_info *info,
> info->num_planes == (is_ccs_modifier(modifier) ? 4 : 2);
> }
>
> +static bool is_semiplanar_uv_plane(const struct drm_framebuffer *fb,
> +int color_plane)
> +{
> + return intel_format_info_is_yuv_semiplanar(fb->format, fb-
> >modifier) &&
> +color_plane == 1;
> +}
> +
> static unsigned int
> intel_tile_width_bytes(const struct drm_framebuffer *fb, int
> color_plane)
> {
> @@ -2069,6 +2076,16 @@ static void intel_tile_dims(const struct
> drm_framebuffer *fb, int color_plane,
> *tile_height = intel_tile_height(fb, color_plane);
> }
>
> +static unsigned int intel_tile_row_size(const struct drm_framebuffer
> *fb,
> + int color_plane)
> +{
> + unsigned int tile_width, tile_height;
> +
> + intel_tile_dims(fb, color_plane, _width, _height);
> +
> + return fb->pitches[color_plane] * tile_height;
> +}
> +
> unsigned int
> intel_fb_align_height(const struct drm_framebuffer *fb,
> int color_plane, unsigned int height)
> @@ -2143,7 +2160,8 @@ static unsigned int intel_surf_alignment(const
> struct drm_framebuffer *fb,
> struct drm_i915_private *dev_priv = to_i915(fb->dev);
>
> /* AUX_DIST needs only 4K alignment */
> - if (is_aux_plane(fb, color_plane))
> + if ((INTEL_GEN(dev_priv) < 12 && is_aux_plane(fb, color_plane))
> ||
> + is_ccs_plane(fb, color_plane))
> return 4096;
>
> switch (fb->modifier) {
> @@ -2158,6 +2176,10 @@ static unsigned int intel_surf_alignment(const
> struct drm_framebuffer *fb,
> case I915_FORMAT_MOD_Y_TILED_CCS:
> case I915_FORMAT_MOD_Yf_TILED_CCS:
> case I915_FORMAT_MOD_Y_TILED:
> + if (INTEL_GEN(dev_priv) >= 12 &&
> + is_semiplanar_uv_plane(fb, color_plane))
> + return intel_tile_row_size(fb, color_plane);
> + /* Fall-through */
> case I915_FORMAT_MOD_Yf_TILED:
> return 1 * 1024 * 1024;
> default:
> @@ -2505,9 +2527,17 @@ static int intel_fb_offset_to_xy(int *x, int
> *y,
> {
> struct drm_i915_private *dev_priv = to_i915(fb->dev);
> unsigned int height;
> + u32 alignment;
> +
> + if (INTEL_GEN(dev_priv) >= 12 &&
> + is_semiplanar_uv_plane(fb, color_plane))
> + alignment = intel_tile_row_size(fb, color_plane);
> + else if (fb->modifier != DRM_FORMAT_MOD_LINEAR)
> + alignment = intel_tile_size(dev_priv);
> + else
> + alignment = 0;
>
> - if (fb->modifier != DRM_FORMAT_MOD_LINEAR &&
> - fb->offsets[color_plane] % intel_tile_size(dev_priv)) {
> + if (alignment != 0 && fb->offsets[color_plane] % alignment) {
> DRM_DEBUG_KMS("Misaligned offset 0x%08x for color plane
> %d\n",
> fb->offsets[color_plane], color_plane);
> return -EINVAL;
___
Intel-gfx
Re: [Intel-gfx] [PATCH 4/7] drm/i915: Make sure plane dims are correct for UV CCS planes
On Wed, 2020-01-01 at 01:37 +0200, Imre Deak wrote:
> As intel_fb_plane_get_subsampling() returns the subsampling factor
> wrt.
> its main plane, for a CCS plane we need to apply both the main and
> the
> CCS plane's subsampling factor on the FB's dimensions to get the CCS
> plane's dimensions.
>
> Cc: Dhinakaran Pandiyan
> Cc: Mika Kahola
> Cc: Radhakrishna Sripada
> Cc: Ville Syrjälä
> Cc: Matt Roper
> Signed-off-by: Imre Deak
Reviewed-by: Mika Kahola
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 8 ++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 2c2450d3469b..d5128e900660 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2913,11 +2913,15 @@ intel_fb_check_ccs_xy(struct drm_framebuffer
> *fb, int ccs_plane, int x, int y)
> static void
> intel_fb_plane_dims(int *w, int *h, struct drm_framebuffer *fb, int
> color_plane)
> {
> + int main_plane = is_ccs_plane(fb, color_plane) ?
> + ccs_to_main_plane(fb, color_plane) : 0;
> + int main_hsub, main_vsub;
> int hsub, vsub;
>
> + intel_fb_plane_get_subsampling(_hsub, _vsub, fb,
> main_plane);
> intel_fb_plane_get_subsampling(, , fb, color_plane);
> - *w = fb->width / hsub;
> - *h = fb->height / vsub;
> + *w = fb->width / main_hsub / hsub;
> + *h = fb->height / main_vsub / vsub;
> }
>
> /*
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: save state of AUD_FREQ_CNTRL on all gen9+ platforms
Hey, On Tue, 31 Dec 2019, Matt Roper wrote: > On Tue, Dec 31, 2019 at 04:47:18PM +0200, Kai Vehmanen wrote: > > On old platforms the default values of AUD_FREQ_CNTRL are > > typically used (as set by BIOS), so this has not been an issue, > > but future platforms will definitely need this. Extend the state > > save logic to cover all gen9+ platforms. [...] > Given that the lack of this save/restore was causing noticeable problems > on ICL/TGL, do you know whether the same problems were also seen on > EHL/JSL? If so, we may want Cc: stable and Fixes: tags so that it gets > backported? the fix is most critical for TGL and later (due to changed hw default values gen12 display onwards). For EHL/JSL, this would seem less important as systems are shipping using the hw default configuration in which case this patch is not needed. Based on current data, I'd probably skip the Cc stable at this point as TGL is already covered -- or limit to "v5.5+". PS A newbie question, if decision is to cc stable, should I add it as the original submitted and resend V2, or are stable tags typically added by the intel-gfx maintainers when applying a patch (i.e. no actions needed from me). In sound tree, latter seems to be the norm.. I see both conventions used here on intel-gfx. Br, Kai ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/5] drm/i915/gt: Clear LRC image inline
When creating the initial LRC image, we also want to clear the MI_NOOPs
and register values. Rather than use a blanket memset beforehand, apply
the clears inline, close the context image and force inhibition of the
uninitialised reminder.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_lrc.c| 88 +++---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 13 ++--
2 files changed, 58 insertions(+), 43 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 029496d2dfb5..b36fd108f0c6 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -488,9 +488,15 @@ lrc_descriptor(struct intel_context *ce, struct
intel_engine_cs *engine)
return desc;
}
-static u32 *set_offsets(u32 *regs,
+static inline unsigned int dword_in_page(void *addr)
+{
+ return offset_in_page(addr) / sizeof(u32);
+}
+
+static void set_offsets(u32 *regs,
const u8 *data,
- const struct intel_engine_cs *engine)
+ const struct intel_engine_cs *engine,
+ bool clear)
#define NOP(x) (BIT(7) | (x))
#define LRI(count, flags) ((flags) << 6 | (count) | BUILD_BUG_ON_ZERO(count >=
BIT(6)))
#define POSTED BIT(0)
@@ -498,7 +504,7 @@ static u32 *set_offsets(u32 *regs,
#define REG16(x) \
(((x) >> 9) | BIT(7) | BUILD_BUG_ON_ZERO(x >= 0x1)), \
(((x) >> 2) & 0x7f)
-#define END() 0
+#define END(x) 0, (x)
{
const u32 base = engine->mmio_base;
@@ -506,7 +512,10 @@ static u32 *set_offsets(u32 *regs,
u8 count, flags;
if (*data & BIT(7)) { /* skip */
- regs += *data++ & ~BIT(7);
+ count = *data++ & ~BIT(7);
+ if (clear)
+ memset32(regs, MI_NOOP, count);
+ regs += count;
continue;
}
@@ -532,12 +541,25 @@ static u32 *set_offsets(u32 *regs,
offset |= v & ~BIT(7);
} while (v & BIT(7));
- *regs = base + (offset << 2);
+ regs[0] = base + (offset << 2);
+ if (clear)
+ regs[1] = 0;
regs += 2;
} while (--count);
}
- return regs;
+ if (clear) {
+ u8 count = *++data;
+
+ /* Clear past the tail for HW access */
+ GEM_BUG_ON(dword_in_page(regs) > count);
+ memset32(regs, MI_NOOP, count - dword_in_page(regs));
+
+ /* Close the batch; used mainly by live_lrc_layout() */
+ *regs = MI_BATCH_BUFFER_END;
+ if (INTEL_GEN(engine->i915) >= 10)
+ *regs |= BIT(0);
+ }
}
static const u8 gen8_xcs_offsets[] = {
@@ -572,7 +594,7 @@ static const u8 gen8_xcs_offsets[] = {
REG16(0x200),
REG(0x028),
- END(),
+ END(80)
};
static const u8 gen9_xcs_offsets[] = {
@@ -656,7 +678,7 @@ static const u8 gen9_xcs_offsets[] = {
REG16(0x67c),
REG(0x068),
- END(),
+ END(176)
};
static const u8 gen12_xcs_offsets[] = {
@@ -688,7 +710,7 @@ static const u8 gen12_xcs_offsets[] = {
REG16(0x274),
REG16(0x270),
- END(),
+ END(80)
};
static const u8 gen8_rcs_offsets[] = {
@@ -725,7 +747,7 @@ static const u8 gen8_rcs_offsets[] = {
LRI(1, 0),
REG(0x0c8),
- END(),
+ END(80)
};
static const u8 gen9_rcs_offsets[] = {
@@ -809,7 +831,7 @@ static const u8 gen9_rcs_offsets[] = {
REG16(0x67c),
REG(0x68),
- END()
+ END(176)
};
static const u8 gen11_rcs_offsets[] = {
@@ -850,7 +872,7 @@ static const u8 gen11_rcs_offsets[] = {
LRI(1, 0),
REG(0x0c8),
- END(),
+ END(80)
};
static const u8 gen12_rcs_offsets[] = {
@@ -891,7 +913,7 @@ static const u8 gen12_rcs_offsets[] = {
LRI(1, 0),
REG(0x0c8),
- END(),
+ END(80)
};
#undef END
@@ -1529,7 +1551,7 @@ static bool can_merge_rq(const struct i915_request *prev,
static void virtual_update_register_offsets(u32 *regs,
struct intel_engine_cs *engine)
{
- set_offsets(regs, reg_offsets(engine), engine);
+ set_offsets(regs, reg_offsets(engine), engine, false);
}
static bool virtual_matches(const struct virtual_engine *ve,
@@ -4043,15 +4065,19 @@ static u32 intel_lr_indirect_ctx_offset(const struct
intel_engine_cs *engine)
static void init_common_reg_state(u32 * const regs,
const struct intel_engine_cs *engine,
- const struct intel_ring *ring)
+ const struct intel_ring *ring,
+ bool
[Intel-gfx] [PATCH 4/5] drm/i915/gt: Discard stale context state from across idling
Before we idle, on parking, we switch to the kernel context such that we
have a scratch context loaded while the GPU idle, protecting any
precious user state. Be paranoid and assume that the idle state may have
been trashed, and reset the kernel_context image after idling.
Signed-off-by: Chris Wilson
Cc: Imre Deak
Reviewed-by: Matthew Auld
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_engine_pm.c | 6 ++
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 8
drivers/gpu/drm/i915/gt/mock_engine.c | 5 +
3 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index cd82f0baef49..1b9f73948f22 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -20,6 +20,7 @@ static int __engine_unpark(struct intel_wakeref *wf)
{
struct intel_engine_cs *engine =
container_of(wf, typeof(*engine), wakeref);
+ struct intel_context *ce;
void *map;
ENGINE_TRACE(engine, "\n");
@@ -34,6 +35,11 @@ static int __engine_unpark(struct intel_wakeref *wf)
if (!IS_ERR_OR_NULL(map))
engine->pinned_default_state = map;
+ /* Discard stale context state from across idling */
+ ce = engine->kernel_context;
+ if (ce)
+ ce->ops->reset(ce);
+
if (engine->unpark)
engine->unpark(engine);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index 9b220c930ebc..d1c2f034296a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -213,16 +213,8 @@ int intel_gt_resume(struct intel_gt *gt)
intel_llc_enable(>llc);
for_each_engine(engine, gt, id) {
- struct intel_context *ce;
-
intel_engine_pm_get(engine);
- ce = engine->kernel_context;
- if (ce) {
- GEM_BUG_ON(!intel_context_is_pinned(ce));
- ce->ops->reset(ce);
- }
-
engine->serial++; /* kernel context lost */
err = engine->resume(engine);
diff --git a/drivers/gpu/drm/i915/gt/mock_engine.c
b/drivers/gpu/drm/i915/gt/mock_engine.c
index 4e1eafa94be9..d0e68ce9aa51 100644
--- a/drivers/gpu/drm/i915/gt/mock_engine.c
+++ b/drivers/gpu/drm/i915/gt/mock_engine.c
@@ -152,6 +152,10 @@ static int mock_context_pin(struct intel_context *ce)
return intel_context_active_acquire(ce);
}
+static void mock_context_reset(struct intel_context *ce)
+{
+}
+
static const struct intel_context_ops mock_context_ops = {
.alloc = mock_context_alloc,
@@ -161,6 +165,7 @@ static const struct intel_context_ops mock_context_ops = {
.enter = intel_context_enter_engine,
.exit = intel_context_exit_engine,
+ .reset = mock_context_reset,
.destroy = mock_context_destroy,
};
--
2.25.0.rc0
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 5/5] drm/i915/gt: Always poison the kernel_context image before unparking
Keep scrubbing the kernel_context image with poison before we reset it
in order to demonstrate that we will be resilient in the case where it
is accidentally overwritten on idle.
Suggested-by: Imre Deak
Signed-off-by: Chris Wilson
Cc: Imre Deak
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_context_types.h | 2 ++
drivers/gpu/drm/i915/gt/intel_engine_pm.c | 18 +-
drivers/gpu/drm/i915/gt/intel_lrc.c | 4 ++--
3 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index 9527a659546c..ca1420fb8b53 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -17,6 +17,8 @@
#include "intel_engine_types.h"
#include "intel_sseu.h"
+#define CONTEXT_REDZONE POISON_INUSE
+
struct i915_gem_context;
struct i915_vma;
struct intel_context;
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index 1b9f73948f22..ea90ab3e396e 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -37,8 +37,24 @@ static int __engine_unpark(struct intel_wakeref *wf)
/* Discard stale context state from across idling */
ce = engine->kernel_context;
- if (ce)
+ if (ce) {
+ GEM_BUG_ON(test_bit(CONTEXT_VALID_BIT, >flags));
+
+ /* First poison the image to verify we never fully trust it */
+ if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM) && ce->state) {
+ struct drm_i915_gem_object *obj = ce->state->obj;
+ int type = i915_coherent_map_type(engine->i915);
+
+ map = i915_gem_object_pin_map(obj, type);
+ if (!IS_ERR(map)) {
+ memset(map, CONTEXT_REDZONE, obj->base.size);
+ i915_gem_object_flush_map(obj);
+ i915_gem_object_unpin_map(obj);
+ }
+ }
+
ce->ops->reset(ce);
+ }
if (engine->unpark)
engine->unpark(engine);
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index b21a191bda3b..170b5a0139a3 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -2507,7 +2507,7 @@ set_redzone(void *vaddr, const struct intel_engine_cs
*engine)
vaddr += engine->context_size;
- memset(vaddr, POISON_INUSE, I915_GTT_PAGE_SIZE);
+ memset(vaddr, CONTEXT_REDZONE, I915_GTT_PAGE_SIZE);
}
static void
@@ -2518,7 +2518,7 @@ check_redzone(const void *vaddr, const struct
intel_engine_cs *engine)
vaddr += engine->context_size;
- if (memchr_inv(vaddr, POISON_INUSE, I915_GTT_PAGE_SIZE))
+ if (memchr_inv(vaddr, CONTEXT_REDZONE, I915_GTT_PAGE_SIZE))
dev_err_once(engine->i915->drm.dev,
"%s context redzone overwritten!\n",
engine->name);
--
2.25.0.rc0
___
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[Intel-gfx] [PATCH 3/5] drm/i915/gt: Ignore stale context state upon resume
We leave the kernel_context on the HW as we suspend (and while idle).
There is no guarantee that is complete in memory, so we try to inhibit
restoration from the kernel_context. Reinforce the inhibition by
scrubbing the context.
Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 11 ++-
drivers/gpu/drm/i915/gt/intel_ring_submission.c | 2 +-
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index b36fd108f0c6..b21a191bda3b 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -2602,6 +2602,9 @@ static int execlists_context_alloc(struct intel_context
*ce)
static void execlists_context_reset(struct intel_context *ce)
{
+ CE_TRACE(ce, "reset\n");
+ GEM_BUG_ON(!intel_context_is_pinned(ce));
+
/*
* Because we emit WA_TAIL_DWORDS there may be a disparity
* between our bookkeeping in ce->ring->head and ce->ring->tail and
@@ -2618,8 +2621,14 @@ static void execlists_context_reset(struct intel_context
*ce)
* So to avoid that we reset the context images upon resume. For
* simplicity, we just zero everything out.
*/
- intel_ring_reset(ce->ring, 0);
+ intel_ring_reset(ce->ring, ce->ring->emit);
+
+ /* Scrub away the garbage */
+ execlists_init_reg_state(ce->lrc_reg_state,
+ce, ce->engine, ce->ring, true);
__execlists_update_reg_state(ce, ce->engine);
+
+ ce->lrc_desc |= CTX_DESC_FORCE_RESTORE;
}
static const struct intel_context_ops execlists_context_ops = {
diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
index 48dbe46edbff..2e1478a48a4b 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
@@ -1347,7 +1347,7 @@ static int ring_context_pin(struct intel_context *ce)
static void ring_context_reset(struct intel_context *ce)
{
- intel_ring_reset(ce->ring, 0);
+ intel_ring_reset(ce->ring, ce->ring->emit);
}
static const struct intel_context_ops ring_context_ops = {
--
2.25.0.rc0
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[Intel-gfx] [PATCH 1/5] drm/i915/gt: Include a bunch more rcs image state
Empirically the minimal context image we use for rcs is insufficient to
state the engine. This is demonstrated if we poison the context image
such that any uninitialised state is invalid, and so if the engine
samples beyond our defined region, will fail to start.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_lrc.c| 88 +-
drivers/gpu/drm/i915/gt/selftest_lrc.c | 7 ++
2 files changed, 94 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 00895f83f61e..029496d2dfb5 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -492,7 +492,7 @@ static u32 *set_offsets(u32 *regs,
const u8 *data,
const struct intel_engine_cs *engine)
#define NOP(x) (BIT(7) | (x))
-#define LRI(count, flags) ((flags) << 6 | (count))
+#define LRI(count, flags) ((flags) << 6 | (count) | BUILD_BUG_ON_ZERO(count >=
BIT(6)))
#define POSTED BIT(0)
#define REG(x) (((x) >> 2) | BUILD_BUG_ON_ZERO(x >= 0x200))
#define REG16(x) \
@@ -728,6 +728,90 @@ static const u8 gen8_rcs_offsets[] = {
END(),
};
+static const u8 gen9_rcs_offsets[] = {
+ NOP(1),
+ LRI(14, POSTED),
+ REG16(0x244),
+ REG(0x34),
+ REG(0x30),
+ REG(0x38),
+ REG(0x3c),
+ REG(0x168),
+ REG(0x140),
+ REG(0x110),
+ REG(0x11c),
+ REG(0x114),
+ REG(0x118),
+ REG(0x1c0),
+ REG(0x1c4),
+ REG(0x1c8),
+
+ NOP(3),
+ LRI(9, POSTED),
+ REG16(0x3a8),
+ REG16(0x28c),
+ REG16(0x288),
+ REG16(0x284),
+ REG16(0x280),
+ REG16(0x27c),
+ REG16(0x278),
+ REG16(0x274),
+ REG16(0x270),
+
+ NOP(13),
+ LRI(1, 0),
+ REG(0xc8),
+
+ NOP(13),
+ LRI(44, POSTED),
+ REG(0x28),
+ REG(0x9c),
+ REG(0xc0),
+ REG(0x178),
+ REG(0x17c),
+ REG16(0x358),
+ REG(0x170),
+ REG(0x150),
+ REG(0x154),
+ REG(0x158),
+ REG16(0x41c),
+ REG16(0x600),
+ REG16(0x604),
+ REG16(0x608),
+ REG16(0x60c),
+ REG16(0x610),
+ REG16(0x614),
+ REG16(0x618),
+ REG16(0x61c),
+ REG16(0x620),
+ REG16(0x624),
+ REG16(0x628),
+ REG16(0x62c),
+ REG16(0x630),
+ REG16(0x634),
+ REG16(0x638),
+ REG16(0x63c),
+ REG16(0x640),
+ REG16(0x644),
+ REG16(0x648),
+ REG16(0x64c),
+ REG16(0x650),
+ REG16(0x654),
+ REG16(0x658),
+ REG16(0x65c),
+ REG16(0x660),
+ REG16(0x664),
+ REG16(0x668),
+ REG16(0x66c),
+ REG16(0x670),
+ REG16(0x674),
+ REG16(0x678),
+ REG16(0x67c),
+ REG(0x68),
+
+ END()
+};
+
static const u8 gen11_rcs_offsets[] = {
NOP(1),
LRI(15, POSTED),
@@ -832,6 +916,8 @@ static const u8 *reg_offsets(const struct intel_engine_cs
*engine)
return gen12_rcs_offsets;
else if (INTEL_GEN(engine->i915) >= 11)
return gen11_rcs_offsets;
+ else if (INTEL_GEN(engine->i915) >= 9)
+ return gen9_rcs_offsets;
else
return gen8_rcs_offsets;
} else {
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c
b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 9ec9833c9c7b..943b623f00e9 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -3406,6 +3406,13 @@ static int live_lrc_layout(void *arg)
continue;
}
+ if (lrc[dw] == 0) {
+ pr_debug("%s: skipped instruction %x at dword
%d\n",
+engine->name, lri, dw);
+ dw++;
+ continue;
+ }
+
if ((lri & GENMASK(31, 23)) != MI_INSTR(0x22, 0)) {
pr_err("%s: Expected LRI command at dword %d,
found %08x\n",
engine->name, dw, lri);
--
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[Intel-gfx] [PULL] drm-misc-next
drm-misc-next-2020-01-02: drm-misc-next for v5.6: UAPI Changes: - Commandline parser: Add support for panel orientation, and per-mode options. - Fix IOCTL naming for dma-buf heaps. Cross-subsystem Changes: - Rename DMA_HEAP_IOC_ALLOC to DMA_HEAP_IOCTL_ALLOC before it becomes abi. - Change DMA-BUF system-heap's name to system. - Fix leak in error handling in dma_heap_ioctl(), and make a symbol static. - Fix udma-buf cpu access. - Fix ti devicetree bindings. Core Changes: - Add CTA-861-G modes with VIC >= 193. - Change error handling and remove bug_on in *drm_dev_init. - Export drm_panel_of_backlight() correctly once more. - Add support for lvds decoders. - Convert drm/client and drm/(gem-,)fb-helper to drm-device based logging and update logging todo. Driver Changes: - Add support for dsi/px30 to rockchip. - Add fb damage support to virtio. - Use dma_resv locking wrappers in vc4, msm, etnaviv. - Make functions in virtio static, and perform some simplifications. - Add suspend support to sun4i. - Add A64 mipi dsi support to sun4i. - Add runtime pm suspend to komeda. - Associated driver fixes. The following changes since commit 2156873f08c7893811f34177aa923ab1ea486591: drm/tilcdc: Remove obsolete bundled tilcdc tfp410 driver (2019-12-16 10:45:43 +0200) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-next-2020-01-02 for you to fetch changes up to 1ce0d5162b98bf6120db1b259d0f0706e69f15fd: drm/panel: declare variable as __be16 (2020-01-01 19:53:50 +0100) drm-misc-next for v5.6: UAPI Changes: - Commandline parser: Add support for panel orientation, and per-mode options. - Fix IOCTL naming for dma-buf heaps. Cross-subsystem Changes: - Rename DMA_HEAP_IOC_ALLOC to DMA_HEAP_IOCTL_ALLOC before it becomes abi. - Change DMA-BUF system-heap's name to system. - Fix leak in error handling in dma_heap_ioctl(), and make a symbol static. - Fix udma-buf cpu access. - Fix ti devicetree bindings. Core Changes: - Add CTA-861-G modes with VIC >= 193. - Change error handling and remove bug_on in *drm_dev_init. - Export drm_panel_of_backlight() correctly once more. - Add support for lvds decoders. - Convert drm/client and drm/(gem-,)fb-helper to drm-device based logging and update logging todo. Driver Changes: - Add support for dsi/px30 to rockchip. - Add fb damage support to virtio. - Use dma_resv locking wrappers in vc4, msm, etnaviv. - Make functions in virtio static, and perform some simplifications. - Add suspend support to sun4i. - Add A64 mipi dsi support to sun4i. - Add runtime pm suspend to komeda. - Associated driver fixes. Aditya Pakki (1): drm: remove duplicate check on parent and avoid BUG_ON Andrew F. Davis (2): dma-buf: heaps: Use _IOCTL_ for userspace IOCTL identifier dma-buf: heaps: Remove redundant heap identifier from system heap name Andy Shevchenko (1): drm/drm_panel: Fix EXPORT of drm_panel_of_backlight() one more time Colin Ian King (2): dma-buf: fix resource leak on -ENOTTY error return path drm/gma500: fix null dereference of pointer fb before null check Daniel Vetter (7): drm/virtio: plane_state->fb iff plane_state->crtc drm/msm: Use dma_resv locking wrappers drm/vc4: Use dma_resv locking wrappers drm/etnaviv: Use dma_resv locking wrappers drm/malidp: plane_state->fb iff plane_state->crtc drm/mediatek: plane_state->fb iff plane_state->crtc drm/todo: Updating logging todo Fabrizio Castro (10): dt-bindings: display: bridge: Convert lvds-transmitter binding to json-schema dt-bindings: display: bridge: lvds-transmitter: Document powerdown-gpios dt-bindings: display: bridge: lvds-transmitter: Absorb ti, ds90c185.txt dt-bindings: display: bridge: lvds-transmitter: Document "ti, sn75lvds83" drm/bridge: Repurpose lvds-encoder.c drm/bridge: lvds-codec: Add "lvds-decoder" support drm/bridge: lvds-codec: Simplify panel DT node localisation dt-bindings: display: bridge: Repurpose lvds-encoder dt-bindings: display: bridge: lvds-codec: Document ti, ds90cf384a dt-bindings: display: bridge: lvds-codec: Absorb thine, thc63lvdm83d.txt Gerd Hoffmann (3): drm/virtio: skip set_scanout if framebuffer didn't change drm/virtio: batch display update commands. drm/virtio: use damage info for display updates. Gurchetan Singh (7): udmabuf: fix dma-buf cpu access drm/virtio: static-ify virtio_fence_signaled drm/virtio: static-ify virtio_gpu_framebuffer_init drm/virtio: get rid of drm_encoder_to_virtio_gpu_output drm/virtio: simplify getting fake offset drm/virtio: move to_virtio_fence inside virtgpu_fence drm/virtio: move drm_connector_to_virtio_gpu_output to virtgpu_display Hans de Goede (11): drm/modes: parse_cmdline: Fix
Re: [Intel-gfx] [PATCH] drm/i915/gem: Support discontiguous lmem object maps
On Thu, 2 Jan 2020 at 11:44, Chris Wilson wrote:
>
> Quoting Matthew Auld (2020-01-02 11:39:41)
> > On Thu, 2 Jan 2020 at 10:38, Chris Wilson wrote:
> > >
> > > Create a vmap for discontinguous lmem objects to support
> > > i915_gem_object_pin_map().
> >
> > Yes, please.
> >
> > >
> > > Signed-off-by: Chris Wilson
> > > Cc: Matthew Auld
> > > ---
> >
> > [snip]
> >
> > > @@ -288,12 +284,28 @@ static void *i915_gem_object_map(struct
> > > drm_i915_gem_object *obj,
> > > pgprot = pgprot_writecombine(PAGE_KERNEL_IO);
> > > break;
> > > }
> > > - addr = vmap(pages, n_pages, 0, pgprot);
> > >
> > > - if (pages != stack_pages)
> > > - kvfree(pages);
> > > + if (i915_gem_object_has_struct_page(obj)) {
> > > + struct sgt_iter iter;
> > > + struct page *page;
> > > + pte_t **ptes = mem;
> > > +
> > > + for_each_sgt_page(page, iter, sgt)
> > > + **ptes++ = mk_pte(page, pgprot);
> > > + } else {
> > > + const resource_size_t iomap = obj->mm.region->iomap.base;
> > > + struct sgt_iter iter;
> > > + dma_addr_t addr;
> > > + pte_t **ptes = mem;
> > > +
> > > + for_each_sgt_daddr(addr, iter, sgt)
> >
> > addr -= region.start; for poor old fake local-memory.
>
> Positive? I wasn't sure since we are using the physical address and not
> a mapping within the mapping?
I think so. It's 1:1 mapped so:
fake_lmem_start = 4G;
iomap = mappable_aperture_start;
daddr = fake_lmem_start + n;
n = daddr - fake_lmem_start;
io_addr = iomap + n;
>
> It's hard to tell, since so long as the address exists we can read/write
> to it, and only later pay the consequences of corrupting someone else's
> memory.
BAT results should tell us, where we write from the gpu and then read
from the cpu.
> -Chris
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Re: [Intel-gfx] [PATCH 1/8] drm/i915: Fix cmdparser drm.debug
On Thu, 02 Jan 2020, Chris Wilson wrote:
> Quoting Jani Nikula (2020-01-02 09:56:05)
>> On Sat, 07 Dec 2019, Chris Wilson wrote:
>> > The cmdparser rejection debug is not for driver development, but for the
>> > user, for which we use a plain DRM_DEBUG().
>>
>> ...
>>
>> > - DRM_DEBUG_DRIVER("CMD: Abnormal rcs cmd length! 0x%08X\n",
>> > cmd_header);
>> > + DRM_DEBUG("CMD: Abnormal rcs cmd length! 0x%08X\n", cmd_header);
>>
>> That's not what the documentation says about the difference between
>> DRM_DEBUG and DRM_DEBUG_DRIVER.
>
> The documentation seems to be a misconception.
How so? DRM_DEBUG() translates to DRM_UT_CORE category, which has been
intended for "generic drm code" since the beginning:
4fefcb27050b ("drm: add separate drm debugging levels")
87fdff81cd2d ("DRM: Add the explanation about DRM debug level")
Because there's so much DRM_DEBUG() usage across drivers, I've named the
new drm_device specific logging macros drm_dbg_core() for DRM_UT_CORE
and drm_dbg() for DRM_UT_DRIVER, with the idea that drm_dbg_core() would
be used exclusively for drivers/gpu/drm/drm_*.[ch].
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH 3/7] drm/i915: Add debug message for FB plane[0].offset!=0 error
On Wed, 2020-01-01 at 01:37 +0200, Imre Deak wrote:
> Print a debug message if the FB plane[0] offset is not 0 as expected,
> to
> help understainding an add FB IOCTL fail.
>
> Cc: Chris Wilson
> Cc: Ville Syrjälä
> Cc: Mika Kahola
> Signed-off-by: Imre Deak
Reviewed-by: Mika Kahola
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index bbc9cf288067..2c2450d3469b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -16912,8 +16912,11 @@ static int intel_framebuffer_init(struct
> intel_framebuffer *intel_fb,
> }
>
> /* FIXME need to adjust LINOFF/TILEOFF accordingly. */
> - if (mode_cmd->offsets[0] != 0)
> + if (mode_cmd->offsets[0] != 0) {
> + DRM_DEBUG_KMS("plane 0 offset (0x%08x) must be 0\n",
> + mode_cmd->offsets[0]);
> goto err;
> + }
>
> drm_helper_mode_fill_fb_struct(_priv->drm, fb, mode_cmd);
>
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Re: [Intel-gfx] [PATCH] drm/i915/gem: Support discontiguous lmem object maps
Quoting Matthew Auld (2020-01-02 11:39:41)
> On Thu, 2 Jan 2020 at 10:38, Chris Wilson wrote:
> >
> > Create a vmap for discontinguous lmem objects to support
> > i915_gem_object_pin_map().
>
> Yes, please.
>
> >
> > Signed-off-by: Chris Wilson
> > Cc: Matthew Auld
> > ---
>
> [snip]
>
> > @@ -288,12 +284,28 @@ static void *i915_gem_object_map(struct
> > drm_i915_gem_object *obj,
> > pgprot = pgprot_writecombine(PAGE_KERNEL_IO);
> > break;
> > }
> > - addr = vmap(pages, n_pages, 0, pgprot);
> >
> > - if (pages != stack_pages)
> > - kvfree(pages);
> > + if (i915_gem_object_has_struct_page(obj)) {
> > + struct sgt_iter iter;
> > + struct page *page;
> > + pte_t **ptes = mem;
> > +
> > + for_each_sgt_page(page, iter, sgt)
> > + **ptes++ = mk_pte(page, pgprot);
> > + } else {
> > + const resource_size_t iomap = obj->mm.region->iomap.base;
> > + struct sgt_iter iter;
> > + dma_addr_t addr;
> > + pte_t **ptes = mem;
> > +
> > + for_each_sgt_daddr(addr, iter, sgt)
>
> addr -= region.start; for poor old fake local-memory.
Positive? I wasn't sure since we are using the physical address and not
a mapping within the mapping?
It's hard to tell, since so long as the address exists we can read/write
to it, and only later pay the consequences of corrupting someone else's
memory.
-Chris
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Re: [Intel-gfx] [PATCH] drm/i915/gem: Support discontiguous lmem object maps
On Thu, 2 Jan 2020 at 10:38, Chris Wilson wrote:
>
> Create a vmap for discontinguous lmem objects to support
> i915_gem_object_pin_map().
Yes, please.
>
> Signed-off-by: Chris Wilson
> Cc: Matthew Auld
> ---
[snip]
> @@ -288,12 +284,28 @@ static void *i915_gem_object_map(struct
> drm_i915_gem_object *obj,
> pgprot = pgprot_writecombine(PAGE_KERNEL_IO);
> break;
> }
> - addr = vmap(pages, n_pages, 0, pgprot);
>
> - if (pages != stack_pages)
> - kvfree(pages);
> + if (i915_gem_object_has_struct_page(obj)) {
> + struct sgt_iter iter;
> + struct page *page;
> + pte_t **ptes = mem;
> +
> + for_each_sgt_page(page, iter, sgt)
> + **ptes++ = mk_pte(page, pgprot);
> + } else {
> + const resource_size_t iomap = obj->mm.region->iomap.base;
> + struct sgt_iter iter;
> + dma_addr_t addr;
> + pte_t **ptes = mem;
> +
> + for_each_sgt_daddr(addr, iter, sgt)
addr -= region.start; for poor old fake local-memory.
> + **ptes++ = iomap_pte(iomap, addr, pgprot);
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Re: [Intel-gfx] [PATCH 1/8] drm/i915: Fix cmdparser drm.debug
Quoting Jani Nikula (2020-01-02 09:56:05)
> On Sat, 07 Dec 2019, Chris Wilson wrote:
> > The cmdparser rejection debug is not for driver development, but for the
> > user, for which we use a plain DRM_DEBUG().
>
> ...
>
> > - DRM_DEBUG_DRIVER("CMD: Abnormal rcs cmd length! 0x%08X\n",
> > cmd_header);
> > + DRM_DEBUG("CMD: Abnormal rcs cmd length! 0x%08X\n", cmd_header);
>
> That's not what the documentation says about the difference between
> DRM_DEBUG and DRM_DEBUG_DRIVER.
Please note these have nothing to do with debugging the driver in any
form whatsoever.
-Chris
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Re: [Intel-gfx] [PATCH 1/8] drm/i915: Fix cmdparser drm.debug
Quoting Jani Nikula (2020-01-02 09:56:05)
> On Sat, 07 Dec 2019, Chris Wilson wrote:
> > The cmdparser rejection debug is not for driver development, but for the
> > user, for which we use a plain DRM_DEBUG().
>
> ...
>
> > - DRM_DEBUG_DRIVER("CMD: Abnormal rcs cmd length! 0x%08X\n",
> > cmd_header);
> > + DRM_DEBUG("CMD: Abnormal rcs cmd length! 0x%08X\n", cmd_header);
>
> That's not what the documentation says about the difference between
> DRM_DEBUG and DRM_DEBUG_DRIVER.
The documentation seems to be a misconception.
-Chris
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/gem: Single page objects are naturally contiguous (rev3)
== Series Details == Series: series starting with [1/2] drm/i915/gem: Single page objects are naturally contiguous (rev3) URL : https://patchwork.freedesktop.org/series/71549/ State : success == Summary == CI Bug Log - changes from CI_DRM_7664_full -> Patchwork_15974_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_15974_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_busy@close-race: - shard-tglb: [PASS][1] -> [INCOMPLETE][2] ([i915#435]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/shard-tglb5/igt@gem_b...@close-race.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/shard-tglb9/igt@gem_b...@close-race.html * igt@gem_ctx_persistence@rcs0-mixed-process: - shard-glk: [PASS][3] -> [FAIL][4] ([i915#679]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/shard-glk8/igt@gem_ctx_persiste...@rcs0-mixed-process.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/shard-glk9/igt@gem_ctx_persiste...@rcs0-mixed-process.html * igt@gem_ctx_persistence@vcs1-mixed-process: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276] / [fdo#112080]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/shard-iclb1/igt@gem_ctx_persiste...@vcs1-mixed-process.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/shard-iclb3/igt@gem_ctx_persiste...@vcs1-mixed-process.html * igt@gem_ctx_shared@exec-shared-gtt-bsd: - shard-skl: [PASS][7] -> [FAIL][8] ([i915#616]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/shard-skl5/igt@gem_ctx_sha...@exec-shared-gtt-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/shard-skl7/igt@gem_ctx_sha...@exec-shared-gtt-bsd.html * igt@gem_eio@kms: - shard-tglb: [PASS][9] -> [INCOMPLETE][10] ([i915#476]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/shard-tglb7/igt@gem_...@kms.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/shard-tglb9/igt@gem_...@kms.html * igt@gem_exec_balancer@nop: - shard-tglb: [PASS][11] -> [INCOMPLETE][12] ([fdo#111736]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/shard-tglb8/igt@gem_exec_balan...@nop.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/shard-tglb8/igt@gem_exec_balan...@nop.html * igt@gem_exec_schedule@independent-bsd2: - shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#109276]) +14 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/shard-iclb2/igt@gem_exec_sched...@independent-bsd2.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/shard-iclb7/igt@gem_exec_sched...@independent-bsd2.html * igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd: - shard-iclb: [PASS][15] -> [SKIP][16] ([fdo#112146]) +8 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/shard-iclb3/igt@gem_exec_sched...@preempt-queue-contexts-chain-bsd.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/shard-iclb4/igt@gem_exec_sched...@preempt-queue-contexts-chain-bsd.html * igt@gem_exec_suspend@basic-s3: - shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +4 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/shard-kbl7/igt@gem_exec_susp...@basic-s3.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/shard-kbl7/igt@gem_exec_susp...@basic-s3.html * igt@gem_pipe_control_store_loop@reused-buffer: - shard-tglb: [PASS][19] -> [INCOMPLETE][20] ([i915#707] / [i915#796]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/shard-tglb7/igt@gem_pipe_control_store_l...@reused-buffer.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/shard-tglb8/igt@gem_pipe_control_store_l...@reused-buffer.html * igt@i915_selftest@live_requests: - shard-tglb: [PASS][21] -> [INCOMPLETE][22] ([i915#472]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/shard-tglb7/igt@i915_selftest@live_requests.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/shard-tglb5/igt@i915_selftest@live_requests.html * igt@kms_color@pipe-a-ctm-0-5: - shard-skl: [PASS][23] -> [DMESG-WARN][24] ([i915#109]) +1 similar issue [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/shard-skl9/igt@kms_co...@pipe-a-ctm-0-5.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/shard-skl5/igt@kms_co...@pipe-a-ctm-0-5.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-glk: [PASS][25] -> [FAIL][26] ([i915#79]) [25]:
[Intel-gfx] [PATCH] drm/i915/gem: Support discontiguous lmem object maps
Create a vmap for discontinguous lmem objects to support
i915_gem_object_pin_map().
Signed-off-by: Chris Wilson
Cc: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 40 --
drivers/gpu/drm/i915/gem/i915_gem_lmem.h | 8 --
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 76 +++
.../gpu/drm/i915/gem/selftests/huge_pages.c | 41 +-
.../drm/i915/selftests/intel_memory_region.c | 33
5 files changed, 75 insertions(+), 123 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
index 520cc9cac471..70543c83df06 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
@@ -16,46 +16,6 @@ const struct drm_i915_gem_object_ops i915_gem_lmem_obj_ops =
{
.release = i915_gem_object_release_memory_region,
};
-/* XXX: Time to vfunc your life up? */
-void __iomem *
-i915_gem_object_lmem_io_map_page(struct drm_i915_gem_object *obj,
-unsigned long n)
-{
- resource_size_t offset;
-
- offset = i915_gem_object_get_dma_address(obj, n);
- offset -= obj->mm.region->region.start;
-
- return io_mapping_map_wc(>mm.region->iomap, offset, PAGE_SIZE);
-}
-
-void __iomem *
-i915_gem_object_lmem_io_map_page_atomic(struct drm_i915_gem_object *obj,
- unsigned long n)
-{
- resource_size_t offset;
-
- offset = i915_gem_object_get_dma_address(obj, n);
- offset -= obj->mm.region->region.start;
-
- return io_mapping_map_atomic_wc(>mm.region->iomap, offset);
-}
-
-void __iomem *
-i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj,
- unsigned long n,
- unsigned long size)
-{
- resource_size_t offset;
-
- GEM_BUG_ON(!i915_gem_object_is_contiguous(obj));
-
- offset = i915_gem_object_get_dma_address(obj, n);
- offset -= obj->mm.region->region.start;
-
- return io_mapping_map_wc(>mm.region->iomap, offset, size);
-}
-
bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj)
{
return obj->ops == _gem_lmem_obj_ops;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
b/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
index 7c176b8b7d2f..fc3f15580fe3 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
@@ -14,14 +14,6 @@ struct intel_memory_region;
extern const struct drm_i915_gem_object_ops i915_gem_lmem_obj_ops;
-void __iomem *i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj,
- unsigned long n, unsigned long size);
-void __iomem *i915_gem_object_lmem_io_map_page(struct drm_i915_gem_object *obj,
- unsigned long n);
-void __iomem *
-i915_gem_object_lmem_io_map_page_atomic(struct drm_i915_gem_object *obj,
- unsigned long n);
-
bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj);
struct drm_i915_gem_object *
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 75197ca696a8..b5fa3b45cfa9 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -158,9 +158,7 @@ static void __i915_gem_object_reset_page_iter(struct
drm_i915_gem_object *obj)
static void unmap_object(struct drm_i915_gem_object *obj, void *ptr)
{
- if (i915_gem_object_is_lmem(obj))
- io_mapping_unmap((void __force __iomem *)ptr);
- else if (is_vmalloc_addr(ptr))
+ if (is_vmalloc_addr(ptr))
vunmap(ptr);
else
kunmap(kmap_to_page(ptr));
@@ -236,46 +234,44 @@ int __i915_gem_object_put_pages(struct
drm_i915_gem_object *obj)
return err;
}
+static inline pte_t iomap_pte(resource_size_t base,
+ dma_addr_t offset,
+ pgprot_t prot)
+{
+ return pte_mkspecial(pfn_pte((base + offset) >> PAGE_SHIFT, prot));
+}
+
/* The 'mapping' part of i915_gem_object_pin_map() below */
static void *i915_gem_object_map(struct drm_i915_gem_object *obj,
enum i915_map_type type)
{
- unsigned long n_pages = obj->base.size >> PAGE_SHIFT;
+ unsigned long n_pte = obj->base.size >> PAGE_SHIFT;
struct sg_table *sgt = obj->mm.pages;
- struct sgt_iter sgt_iter;
- struct page *page;
- struct page *stack_pages[32];
- struct page **pages = stack_pages;
- unsigned long i = 0;
+ pte_t *stack[32], **mem;
+ struct vm_struct *area;
pgprot_t pgprot;
- void *addr;
-
- if (i915_gem_object_is_lmem(obj)) {
- void __iomem *io;
-
- if (type != I915_MAP_WC)
- return NULL;
- io = i915_gem_object_lmem_io_map(obj, 0, obj->base.size);
-
[Intel-gfx] [PATCH] drm/i915/gem: Support discontiguous lmem object maps
Create a vmap for discontinguous lmem objects to support
i915_gem_object_pin_map().
Signed-off-by: Chris Wilson
Cc: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 40 --
drivers/gpu/drm/i915/gem/i915_gem_lmem.h | 8 --
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 74 +++
.../gpu/drm/i915/gem/selftests/huge_pages.c | 41 +-
.../drm/i915/selftests/intel_memory_region.c | 33 -
5 files changed, 73 insertions(+), 123 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
index 520cc9cac471..70543c83df06 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
@@ -16,46 +16,6 @@ const struct drm_i915_gem_object_ops i915_gem_lmem_obj_ops =
{
.release = i915_gem_object_release_memory_region,
};
-/* XXX: Time to vfunc your life up? */
-void __iomem *
-i915_gem_object_lmem_io_map_page(struct drm_i915_gem_object *obj,
-unsigned long n)
-{
- resource_size_t offset;
-
- offset = i915_gem_object_get_dma_address(obj, n);
- offset -= obj->mm.region->region.start;
-
- return io_mapping_map_wc(>mm.region->iomap, offset, PAGE_SIZE);
-}
-
-void __iomem *
-i915_gem_object_lmem_io_map_page_atomic(struct drm_i915_gem_object *obj,
- unsigned long n)
-{
- resource_size_t offset;
-
- offset = i915_gem_object_get_dma_address(obj, n);
- offset -= obj->mm.region->region.start;
-
- return io_mapping_map_atomic_wc(>mm.region->iomap, offset);
-}
-
-void __iomem *
-i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj,
- unsigned long n,
- unsigned long size)
-{
- resource_size_t offset;
-
- GEM_BUG_ON(!i915_gem_object_is_contiguous(obj));
-
- offset = i915_gem_object_get_dma_address(obj, n);
- offset -= obj->mm.region->region.start;
-
- return io_mapping_map_wc(>mm.region->iomap, offset, size);
-}
-
bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj)
{
return obj->ops == _gem_lmem_obj_ops;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
b/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
index 7c176b8b7d2f..fc3f15580fe3 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
@@ -14,14 +14,6 @@ struct intel_memory_region;
extern const struct drm_i915_gem_object_ops i915_gem_lmem_obj_ops;
-void __iomem *i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj,
- unsigned long n, unsigned long size);
-void __iomem *i915_gem_object_lmem_io_map_page(struct drm_i915_gem_object *obj,
- unsigned long n);
-void __iomem *
-i915_gem_object_lmem_io_map_page_atomic(struct drm_i915_gem_object *obj,
- unsigned long n);
-
bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj);
struct drm_i915_gem_object *
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 75197ca696a8..b4d242f7001c 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -158,9 +158,7 @@ static void __i915_gem_object_reset_page_iter(struct
drm_i915_gem_object *obj)
static void unmap_object(struct drm_i915_gem_object *obj, void *ptr)
{
- if (i915_gem_object_is_lmem(obj))
- io_mapping_unmap((void __force __iomem *)ptr);
- else if (is_vmalloc_addr(ptr))
+ if (is_vmalloc_addr(ptr))
vunmap(ptr);
else
kunmap(kmap_to_page(ptr));
@@ -236,46 +234,44 @@ int __i915_gem_object_put_pages(struct
drm_i915_gem_object *obj)
return err;
}
+static inline pte_t iomap_pte(resource_size_t base,
+ dma_addr_t offset,
+ pgprot_t prot)
+{
+ return pte_mkspecial(pfn_pte((base + offset) >> PAGE_SHIFT, prot));
+}
+
/* The 'mapping' part of i915_gem_object_pin_map() below */
static void *i915_gem_object_map(struct drm_i915_gem_object *obj,
enum i915_map_type type)
{
- unsigned long n_pages = obj->base.size >> PAGE_SHIFT;
+ unsigned long n_pte = obj->base.size >> PAGE_SHIFT;
struct sg_table *sgt = obj->mm.pages;
- struct sgt_iter sgt_iter;
- struct page *page;
- struct page *stack_pages[32];
- struct page **pages = stack_pages;
- unsigned long i = 0;
+ pte_t *stack_ptes[32];
+ pte_t **ptes = stack_ptes;
+ struct vm_struct *area;
pgprot_t pgprot;
- void *addr;
-
- if (i915_gem_object_is_lmem(obj)) {
- void __iomem *io;
-
- if (type != I915_MAP_WC)
- return NULL;
- io =
Re: [Intel-gfx] [PATCH 3/3] drm/i915: reimplement header test feature
On Thu, 19 Dec 2019, Chris Wilson wrote:
> Quoting Jani Nikula (2019-12-19 15:56:52)
>> From: Masahiro Yamada
>>
>> I implemented a small build rule in drivers/gpu/drm/i915/Makefile
>> without relying on the special header-test-y syntax that was removed in
>> commit fcbb8461fd23 ("kbuild: remove header compile test").
>>
>> I excluded some headers from the test coverage. I hope somebody
>> intrested can take a closer look at them.
>>
>> Dummy subdir Makefiles can be removed altogether as single target build
>> use case is now covered by commit 394053f4a4b3 ("kbuild: make single
>> targets work more correctly").
>>
>> v2 by Jani:
>> - add selftests/i915_perf_selftests.h to no-header-test
>> - add .gitignore for *.hdrtest
>>
>> Cc: Chris Wilson
>> Cc: Masahiro Yamada
>> Signed-off-by: Masahiro Yamada
>> Signed-off-by: Jani Nikula
>
> Whelp, I guess that explains why CI didn't tell me off for breaking the
> self-contained headers. The pattern matching works, I didn't see any
> residue after a make clean, and git status is not swamped with the
> artifacts. Single object build still works. O=_build still works
> (O=_build -j10 did not, hopefully that is not significant???)
I couldn't reproduce any issues with parallel out-of-tree
builds. Fingers crossed.
> Everything looks (mostly) in order,
> Reviewed-by: Chris Wilson
Thanks, pushed.
BR,
Jani.
> -Chris
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Graphics Center
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 3/9] drm/i915/dp: Move vswing/pre-emphasis adjustment calculation
On 02-01-2020 14:48, Jani Nikula wrote:
On Mon, 30 Dec 2019, Animesh Manna wrote:
vswing/pre-emphasis adjustment calculation is needed in processing
of auto phy compliance request other than link training, so moved
the same function in intel_dp.c.
I guess I'm still asking why you think this is better located in
intel_dp.c than intel_dp_link_training.c, as the function has been moved
once in the other direction already to split out stuff from intel_dp.c
and to make the file smaller. Even the file name suggests it should
really be in intel_dp_link_training.c, right?
Just a thought, can we change the name to "intel_dp_link_config.c" from
"intel_dp_link_training.c" which will provide little wider scope
and all the function playing with link configuration can be under it and also
exposed through header file.
AFAIK, processing phy compliance request always do not need link training. I
understood link training is very specific process consisting of clock recovery
+ channel eq.
So I am afraid of exposing intel_get_adjust_train() from
intel_dp_link_training.c which is not only specific to link-training. Need your
suggestion.
Regards,
Animesh
BR,
Jani.
No functional change.
v1: initial patch.
v2:
- used "intel_dp" prefix in function name. (Jani)
- used array notation instead pointer for link_status. (Ville)
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_dp.c | 34 ++
drivers/gpu/drm/i915/display/intel_dp.h | 4 +++
.../drm/i915/display/intel_dp_link_training.c | 36 ++-
3 files changed, 40 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 991f343579ef..2a27ee106089 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4110,6 +4110,40 @@ ivb_cpu_edp_signal_levels(u8 train_set)
}
}
+void
+intel_dp_get_adjust_train(struct intel_dp *intel_dp,
+ const u8 link_status[DP_LINK_STATUS_SIZE])
+{
+ u8 v = 0;
+ u8 p = 0;
+ int lane;
+ u8 voltage_max;
+ u8 preemph_max;
+
+ for (lane = 0; lane < intel_dp->lane_count; lane++) {
+ u8 this_v = drm_dp_get_adjust_request_voltage(link_status,
+ lane);
+ u8 this_p = drm_dp_get_adjust_request_pre_emphasis(link_status,
+ lane);
+
+ if (this_v > v)
+ v = this_v;
+ if (this_p > p)
+ p = this_p;
+ }
+
+ voltage_max = intel_dp_voltage_max(intel_dp);
+ if (v >= voltage_max)
+ v = voltage_max | DP_TRAIN_MAX_SWING_REACHED;
+
+ preemph_max = intel_dp_pre_emphasis_max(intel_dp, v);
+ if (p >= preemph_max)
+ p = preemph_max | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
+
+ for (lane = 0; lane < 4; lane++)
+ intel_dp->train_set[lane] = v | p;
+}
+
void
intel_dp_set_signal_levels(struct intel_dp *intel_dp)
{
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
b/drivers/gpu/drm/i915/display/intel_dp.h
index 3da166054788..83eadc87af26 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -9,6 +9,7 @@
#include
#include
+#include
#include "i915_reg.h"
@@ -91,6 +92,9 @@ void
intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
u8 dp_train_pat);
void
+intel_dp_get_adjust_train(struct intel_dp *intel_dp,
+ const u8 link_status[DP_LINK_STATUS_SIZE]);
+void
intel_dp_set_signal_levels(struct intel_dp *intel_dp);
void intel_dp_set_idle_link_train(struct intel_dp *intel_dp);
u8
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 2a1130dd1ad0..e8ff9e279800 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -34,38 +34,6 @@ intel_dp_dump_link_status(const u8
link_status[DP_LINK_STATUS_SIZE])
link_status[3], link_status[4], link_status[5]);
}
-static void
-intel_get_adjust_train(struct intel_dp *intel_dp,
- const u8 link_status[DP_LINK_STATUS_SIZE])
-{
- u8 v = 0;
- u8 p = 0;
- int lane;
- u8 voltage_max;
- u8 preemph_max;
-
- for (lane = 0; lane < intel_dp->lane_count; lane++) {
- u8 this_v = drm_dp_get_adjust_request_voltage(link_status,
lane);
- u8 this_p = drm_dp_get_adjust_request_pre_emphasis(link_status,
lane);
-
- if (this_v > v)
- v = this_v;
- if (this_p > p)
- p = this_p;
- }
-
- voltage_max =
Re: [Intel-gfx] [PATCH 1/2] drm/i915/gem: Single page objects are naturally contiguous
On Wed, 1 Jan 2020 at 22:08, Chris Wilson wrote: > > Small objects that only occupy a single page are naturally contiguous, > so mark them as such and allow them the special abilities that come with > it. > > A more thorough treatment would extend i915_gem_object_pin_map() to > support discontiguous lmem objects, following the example of > ioremap_prot() and use get_vm_area() + remap_io_sg(). > > Signed-off-by: Chris Wilson > Cc: Matthew Auld Reviewed-by: Matthew Auld ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: remove boolean comparisons in conditionals.
On Thu, 02 Jan 2020, Wambui Karuga wrote:
> Remove unnecessary comparisons to true/false in if statements.
> Issues found by coccinelle.
>
> Signed-off-by: Wambui Karuga
Thanks for the patch.
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> drivers/gpu/drm/i915/display/intel_sdvo.c | 4 ++--
> 3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 9ba794cb9b4f..c065078b3be2 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1812,7 +1812,7 @@ void intel_ddi_set_vc_payload_alloc(const struct
> intel_crtc_state *crtc_state,
> u32 temp;
>
> temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
> - if (state == true)
> + if (state)
> temp |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
> else
> temp &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index aa515261cb9f..93140c75386a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4958,7 +4958,7 @@ intel_dp_check_mst_status(struct intel_dp *intel_dp)
> WARN_ON_ONCE(intel_dp->active_mst_links < 0);
> bret = intel_dp_get_sink_irq_esi(intel_dp, esi);
> go_again:
> - if (bret == true) {
> + if (bret) {
>
> /* check link status - esi[10] = 0x200c */
> if (intel_dp->active_mst_links > 0 &&
> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c
> b/drivers/gpu/drm/i915/display/intel_sdvo.c
> index 47f5d87a938a..cff254c52f5e 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
> @@ -3292,8 +3292,8 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
> if (!intel_sdvo_get_capabilities(intel_sdvo, _sdvo->caps))
> goto err;
>
> - if (intel_sdvo_output_setup(intel_sdvo,
> - intel_sdvo->caps.output_flags) != true) {
> + if (!intel_sdvo_output_setup(intel_sdvo,
> + intel_sdvo->caps.output_flags)) {
> DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
> SDVO_NAME(intel_sdvo));
> /* Output_setup can leave behind connectors! */
--
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH] drm/i915: Add DPCD quirk for AUO PSR2 panel
On Tue, 10 Dec 2019, Gaurav K Singh wrote:
> Currently on AUO PSR2 panel on Gen9 chromebook, we are observing
> below issues:
> (i) The display will show garbage after pressing sign
> out icon in log in screen when wallpaper is one of Solid colors
> & PSR2 is enabled
> (ii) The characters of display is not clear when switch
> OS mode to dev mode.
>
> Before this patch, on this panel, we set idle frame count to 6
> that is number of idle frames before entering PSR2 deep sleep
> and the number of frames to enter into Selective update we set
> to 1.
>
> On this AUO panel, we suspect there is some DP synchronization
> latency needed, due to which we are facing the above issues.
>
> With current TCON of the AUO panel, DPCD reg
> DP_SYNCHRONIZATION_LATENCY_IN_SINK (0x2009) offset is giving a
> value of 0x0.
>
> This patch sets idle frame count to 9 and frame count for selective
> update to 9, after which we are not seeing the above mentioned issues.
>
> Ideally this value needs to be corrected in TCON of the panel
> since this value comes from DPCD reg 0x2009 offset and i915 driver
> uses it. Working with AUO panel vendor to get this fixed in the
> panel TCON. In the meantime fixing this as DPCD quirk in the kernel.
>
> Signed-off-by: Gaurav K Singh
> ---
> drivers/gpu/drm/drm_dp_helper.c | 3 +++
> drivers/gpu/drm/i915/display/intel_psr.c | 6 ++
> include/drm/drm_dp_helper.h | 9 +
> 3 files changed, 18 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
> index 2c7870aef469..96eaeef814d3 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -1155,6 +1155,9 @@ struct dpcd_quirk {
> { OUI(0x00, 0x10, 0xfa), DEVICE_ID_ANY, false,
> BIT(DP_DPCD_QUIRK_NO_PSR) },
> /* CH7511 seems to leave SINK_COUNT zeroed */
> { OUI(0x00, 0x00, 0x00), DEVICE_ID('C', 'H', '7', '5', '1', '1'),
> false, BIT(DP_DPCD_QUIRK_NO_SINK_COUNT) },
> + /* AUO PSR2 panels need some more DP synchronization latency */
> + { OUI(0x00, 0x1c, 0xf8), DEVICE_ID_ANY, false,
> BIT(DP_DPCD_QUIRK_SYNCHRONIZATION_LATENCY) },
DEVICE_ID_ANY seems pretty lax.
BR,
Jani.
> +
> };
>
> #undef OUI
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 16e9ff47d519..1023b08ad093 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -296,6 +296,12 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
> dev_priv->psr.sink_sync_latency =
> intel_dp_get_sink_sync_latency(intel_dp);
>
> + if (drm_dp_has_quirk(_dp->desc,
> DP_DPCD_QUIRK_SYNCHRONIZATION_LATENCY)) {
> + DRM_DEBUG_KMS("AUO PSR2 panel need more synchronization
> latency\n");
> + if (dev_priv->psr.sink_sync_latency == 0)
> + dev_priv->psr.sink_sync_latency = 8;
> + }
> +
> dev_priv->psr.dp = intel_dp;
>
> if (INTEL_GEN(dev_priv) >= 9 &&
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 8f8f3632e697..6018b79f2d61 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -1522,6 +1522,15 @@ enum drm_dp_quirk {
>* The driver should ignore SINK_COUNT during detection.
>*/
> DP_DPCD_QUIRK_NO_SINK_COUNT,
> + /**
> + * @DP_DPCD_QUIRK_SYNCHRONIZATION_LATENCY
> + *
> + * The Helios AUO PSR2 panel requires more number of frames on PSR exit,
> + * to synchronize to the Source device-provided timing. Currently DPCD
> + * 0x2009 offset in TCON has the value of 0. Increasing this value to 8
> + * till this gets fixed in TCON of the panel.
> + */
> + DP_DPCD_QUIRK_SYNCHRONIZATION_LATENCY,
> };
>
> /**
--
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH 1/8] drm/i915: Fix cmdparser drm.debug
On Sat, 07 Dec 2019, Chris Wilson wrote:
> The cmdparser rejection debug is not for driver development, but for the
> user, for which we use a plain DRM_DEBUG().
...
> - DRM_DEBUG_DRIVER("CMD: Abnormal rcs cmd length! 0x%08X\n", cmd_header);
> + DRM_DEBUG("CMD: Abnormal rcs cmd length! 0x%08X\n", cmd_header);
That's not what the documentation says about the difference between
DRM_DEBUG and DRM_DEBUG_DRIVER.
BR,
Jani.
--
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gem: Single page objects are naturally contiguous (rev3)
== Series Details == Series: series starting with [1/2] drm/i915/gem: Single page objects are naturally contiguous (rev3) URL : https://patchwork.freedesktop.org/series/71549/ State : success == Summary == CI Bug Log - changes from CI_DRM_7664 -> Patchwork_15974 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/index.html Known issues Here are the changes found in Patchwork_15974 that come from known issues: ### IGT changes ### Issues hit * igt@i915_module_load@reload-with-fault-injection: - fi-icl-guc: [PASS][1] -> [DMESG-WARN][2] ([i915#109]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-icl-guc/igt@i915_module_l...@reload-with-fault-injection.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/fi-icl-guc/igt@i915_module_l...@reload-with-fault-injection.html - fi-skl-lmem:[PASS][3] -> [INCOMPLETE][4] ([i915#671]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_selftest@live_blt: - fi-hsw-4770:[PASS][5] -> [DMESG-FAIL][6] ([i915#725]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-hsw-4770/igt@i915_selftest@live_blt.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/fi-hsw-4770/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_hangcheck: - fi-bwr-2160:[PASS][7] -> [FAIL][8] ([i915#878]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-bwr-2160/igt@i915_selftest@live_hangcheck.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/fi-bwr-2160/igt@i915_selftest@live_hangcheck.html Possible fixes * igt@i915_selftest@live_gt_pm: - fi-bwr-2160:[FAIL][9] ([i915#878]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-bwr-2160/igt@i915_selftest@live_gt_pm.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/fi-bwr-2160/igt@i915_selftest@live_gt_pm.html Warnings * igt@i915_module_load@reload-with-fault-injection: - fi-kbl-x1275: [INCOMPLETE][11] ([i915#879]) -> [DMESG-WARN][12] ([i915#62] / [i915#92]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-kbl-x1275/igt@i915_module_l...@reload-with-fault-injection.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/fi-kbl-x1275/igt@i915_module_l...@reload-with-fault-injection.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - fi-kbl-x1275: [DMESG-WARN][13] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][14] ([i915#62] / [i915#92]) +3 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-kbl-x1275/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/fi-kbl-x1275/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy: - fi-kbl-x1275: [DMESG-WARN][15] ([i915#62] / [i915#92]) -> [DMESG-WARN][16] ([i915#62] / [i915#92] / [i915#95]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-kbl-x1275/igt@kms_cursor_leg...@basic-flip-after-cursor-legacy.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15974/fi-kbl-x1275/igt@kms_cursor_leg...@basic-flip-after-cursor-legacy.html [i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109 [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62 [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671 [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725 [i915#878]: https://gitlab.freedesktop.org/drm/intel/issues/878 [i915#879]: https://gitlab.freedesktop.org/drm/intel/issues/879 [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (46 -> 45) -- Additional (7): fi-bdw-5557u fi-skl-6770hq fi-kbl-7500u fi-ivb-3770 fi-tgl-y fi-skl-6700k2 fi-snb-2600 Missing(8): fi-hsw-4770r fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes - * CI: CI-20190529 -> None * Linux: CI_DRM_7664 -> Patchwork_15974 CI-20190529: 20190529 CI_DRM_7664: d207bb67a1192ff32488fdc403e6708def18d80f @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5357: a555a4b98f90dab655d24bb3d07e9291a8b8dac8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_15974: efa9113eee90caf4f47acf2a8bc0373302f52f69 @ git://anongit.freedesktop.org/gfx-ci/linux ==
Re: [Intel-gfx] [PATCH v3 8/9] drm/i915/dp: Update the pattern as per request
On Mon, 30 Dec 2019, Animesh Manna wrote:
> As per request from DP phy compliance test few special
> test pattern need to set by source. Added function
> to set pattern in DP_COMP_CTL register. It will be
> called along with other test parameters like vswing,
> pre-emphasis programming in atomic_commit_tail path.
>
> Signed-off-by: Animesh Manna
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 55 +
> 1 file changed, 55 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index cbefda9b6204..7c3f65e5d88b 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5005,6 +5005,61 @@ static u8 intel_dp_prepare_phytest(struct intel_dp
> *intel_dp)
> return DP_TEST_ACK;
> }
>
> +static inline void intel_dp_phy_pattern_update(struct intel_dp *intel_dp)
As a general rule, please only use the inline keyword for static inlines
in headers. Sometimes, it's useful in small helpers, but usually you
should just let the compiler decide what gets inlined.
In this case, the inline probably just hides the compiler warning about
the unused function.
BR,
Jani.
> +{
> + struct drm_i915_private *dev_priv =
> + to_i915(dp_to_dig_port(intel_dp)->base.base.dev);
> + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> + struct drm_dp_phy_test_params *data =
> + _dp->compliance.test_data.phytest;
> + u32 temp;
> +
> + switch (data->phy_pattern) {
> + case DP_PHY_TEST_PATTERN_NONE:
> + DRM_DEBUG_KMS("Disable Phy Test Pattern\n");
> + I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port), 0x0);
> + break;
> + case DP_PHY_TEST_PATTERN_D10_2:
> + DRM_DEBUG_KMS("Set D10.2 Phy Test Pattern\n");
> + I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port),
> +DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_D10_2);
> + break;
> + case DP_PHY_TEST_PATTERN_ERROR_COUNT:
> + DRM_DEBUG_KMS("Set Error Count Phy Test Pattern\n");
> + I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port),
> +DDI_DP_COMP_CTL_ENABLE |
> +DDI_DP_COMP_CTL_SCRAMBLED_0);
> + break;
> + case DP_PHY_TEST_PATTERN_PRBS7:
> + DRM_DEBUG_KMS("Set PRBS7 Phy Test Pattern\n");
> + I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port),
> +DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_PRBS7);
> + break;
> + case DP_PHY_TEST_PATTERN_80BIT_CUSTOM:
> + DRM_DEBUG_KMS("Set 80Bit Custom Phy Test Pattern\n");
> + temp = ((data->custom80[0] << 24) | (data->custom80[1] << 16) |
> + (data->custom80[2] << 8) | (data->custom80[3]));
> + I915_WRITE(DDI_DP_COMP_PAT(intel_dig_port->base.port, 0), temp);
> + temp = ((data->custom80[4] << 24) | (data->custom80[5] << 16) |
> + (data->custom80[6] << 8) | (data->custom80[7]));
> + I915_WRITE(DDI_DP_COMP_PAT(intel_dig_port->base.port, 1), temp);
> + temp = ((data->custom80[8] << 8) | data->custom80[9]);
> + I915_WRITE(DDI_DP_COMP_PAT(intel_dig_port->base.port, 2), temp);
> + I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port),
> +DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_CUSTOM80);
> + break;
> + case DP_PHY_TEST_PATTERN_CP2520:
> + DRM_DEBUG_KMS("Set HBR2 compliance Phy Test Pattern\n");
> + temp = ((data->hbr2_reset[1] << 8) | data->hbr2_reset[0]);
> + I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port),
> +DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_HBR2 |
> +temp);
> + break;
> + default:
> + WARN(1, "Invalid Phy Test PAttern\n");
> + }
> +}
> +
> static u8 intel_dp_autotest_phy_pattern(struct intel_dp *intel_dp)
> {
> u8 test_result = DP_TEST_NAK;
--
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Re: [Intel-gfx] [PATCH v3 3/9] drm/i915/dp: Move vswing/pre-emphasis adjustment calculation
On Mon, 30 Dec 2019, Animesh Manna wrote:
> vswing/pre-emphasis adjustment calculation is needed in processing
> of auto phy compliance request other than link training, so moved
> the same function in intel_dp.c.
I guess I'm still asking why you think this is better located in
intel_dp.c than intel_dp_link_training.c, as the function has been moved
once in the other direction already to split out stuff from intel_dp.c
and to make the file smaller. Even the file name suggests it should
really be in intel_dp_link_training.c, right?
BR,
Jani.
>
> No functional change.
>
> v1: initial patch.
> v2:
> - used "intel_dp" prefix in function name. (Jani)
> - used array notation instead pointer for link_status. (Ville)
>
> Signed-off-by: Animesh Manna
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 34 ++
> drivers/gpu/drm/i915/display/intel_dp.h | 4 +++
> .../drm/i915/display/intel_dp_link_training.c | 36 ++-
> 3 files changed, 40 insertions(+), 34 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 991f343579ef..2a27ee106089 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4110,6 +4110,40 @@ ivb_cpu_edp_signal_levels(u8 train_set)
> }
> }
>
> +void
> +intel_dp_get_adjust_train(struct intel_dp *intel_dp,
> + const u8 link_status[DP_LINK_STATUS_SIZE])
> +{
> + u8 v = 0;
> + u8 p = 0;
> + int lane;
> + u8 voltage_max;
> + u8 preemph_max;
> +
> + for (lane = 0; lane < intel_dp->lane_count; lane++) {
> + u8 this_v = drm_dp_get_adjust_request_voltage(link_status,
> + lane);
> + u8 this_p = drm_dp_get_adjust_request_pre_emphasis(link_status,
> +lane);
> +
> + if (this_v > v)
> + v = this_v;
> + if (this_p > p)
> + p = this_p;
> + }
> +
> + voltage_max = intel_dp_voltage_max(intel_dp);
> + if (v >= voltage_max)
> + v = voltage_max | DP_TRAIN_MAX_SWING_REACHED;
> +
> + preemph_max = intel_dp_pre_emphasis_max(intel_dp, v);
> + if (p >= preemph_max)
> + p = preemph_max | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
> +
> + for (lane = 0; lane < 4; lane++)
> + intel_dp->train_set[lane] = v | p;
> +}
> +
> void
> intel_dp_set_signal_levels(struct intel_dp *intel_dp)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index 3da166054788..83eadc87af26 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -9,6 +9,7 @@
> #include
>
> #include
> +#include
>
> #include "i915_reg.h"
>
> @@ -91,6 +92,9 @@ void
> intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
> u8 dp_train_pat);
> void
> +intel_dp_get_adjust_train(struct intel_dp *intel_dp,
> + const u8 link_status[DP_LINK_STATUS_SIZE]);
> +void
> intel_dp_set_signal_levels(struct intel_dp *intel_dp);
> void intel_dp_set_idle_link_train(struct intel_dp *intel_dp);
> u8
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index 2a1130dd1ad0..e8ff9e279800 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -34,38 +34,6 @@ intel_dp_dump_link_status(const u8
> link_status[DP_LINK_STATUS_SIZE])
> link_status[3], link_status[4], link_status[5]);
> }
>
> -static void
> -intel_get_adjust_train(struct intel_dp *intel_dp,
> -const u8 link_status[DP_LINK_STATUS_SIZE])
> -{
> - u8 v = 0;
> - u8 p = 0;
> - int lane;
> - u8 voltage_max;
> - u8 preemph_max;
> -
> - for (lane = 0; lane < intel_dp->lane_count; lane++) {
> - u8 this_v = drm_dp_get_adjust_request_voltage(link_status,
> lane);
> - u8 this_p = drm_dp_get_adjust_request_pre_emphasis(link_status,
> lane);
> -
> - if (this_v > v)
> - v = this_v;
> - if (this_p > p)
> - p = this_p;
> - }
> -
> - voltage_max = intel_dp_voltage_max(intel_dp);
> - if (v >= voltage_max)
> - v = voltage_max | DP_TRAIN_MAX_SWING_REACHED;
> -
> - preemph_max = intel_dp_pre_emphasis_max(intel_dp, v);
> - if (p >= preemph_max)
> - p = preemph_max | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
> -
> - for (lane = 0; lane < 4; lane++)
> - intel_dp->train_set[lane] = v | p;
> -}
> -
> static bool
> intel_dp_set_link_train(struct intel_dp *intel_dp,
> u8 dp_train_pat)
> @@ -215,7 +183,7 @@
Re: [Intel-gfx] [PATCH v2 3/5] drm/i915/dsi: Init panel-enable GPIO to low when the LCD is initially off (v2)
On Mon, 16 Dec 2019, Hans de Goede wrote:
> When the LCD has not been turned on by the firmware/GOP, because e.g. the
> device was booted with an external monitor connected over HDMI, we should
> not turn on the panel-enable GPIO when we request it.
>
> Turning on the panel-enable GPIO when we request it, means we turn it on
> too early in the init-sequence, which causes some panels to not correctly
> light up.
>
> This commits adds a panel_is_on parameter to intel_dsi_vbt_gpio_init()
> and makes intel_dsi_vbt_gpio_init() set the initial GPIO value accordingly.
>
> This fixes the panel not lighting up on a Thundersoft TST168 tablet when
> booted with an external monitor connected over HDMI.
>
> Changes in v2:
> - Call intel_dsi_get_hw_state() to check if the panel is on instead of
> relying on the current_mode pointer
>
> Reviewed-by: Linus Walleij
> Signed-off-by: Hans de Goede
> ---
> drivers/gpu/drm/i915/display/intel_dsi.h | 2 +-
> drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 7 +++
> drivers/gpu/drm/i915/display/vlv_dsi.c | 4 +++-
> 3 files changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h
> b/drivers/gpu/drm/i915/display/intel_dsi.h
> index de7e51cd3460..675771ea91aa 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/display/intel_dsi.h
> @@ -203,7 +203,7 @@ void bxt_dsi_reset_clocks(struct intel_encoder *encoder,
> enum port port);
>
> /* intel_dsi_vbt.c */
> bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);
> -void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi);
> +void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool panel_is_on);
> void intel_dsi_vbt_gpio_cleanup(struct intel_dsi *intel_dsi);
> void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi,
>enum mipi_seq seq_id);
> diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
> b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
> index 8be7d6c507aa..4210f449553e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
> @@ -688,17 +688,16 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi,
> u16 panel_id)
> * On some BYT/CHT devs some sequences are incomplete and we need to manually
> * control some GPIOs.
> */
> -void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi)
> +void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool panel_is_on)
> {
> struct drm_device *dev = intel_dsi->base.base.dev;
> struct drm_i915_private *dev_priv = to_i915(dev);
> struct mipi_config *mipi_config = dev_priv->vbt.dsi.config;
> + enum gpiod_flags flags = panel_is_on ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW;
>
> if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
> mipi_config->pwm_blc == PPS_BLC_PMIC) {
> - intel_dsi->gpio_panel =
> - gpiod_get(dev->dev, "panel", GPIOD_OUT_HIGH);
> -
> + intel_dsi->gpio_panel = gpiod_get(dev->dev, "panel", flags);
> if (IS_ERR(intel_dsi->gpio_panel)) {
> DRM_ERROR("Failed to own gpio for panel control\n");
> intel_dsi->gpio_panel = NULL;
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c
> b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index c1edd8857af0..d0efee09c593 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -1759,6 +1759,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
> struct drm_connector *connector;
> struct drm_display_mode *current_mode, *fixed_mode;
> enum port port;
> + enum pipe pipe;
>
> DRM_DEBUG_KMS("\n");
>
> @@ -1857,7 +1858,8 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
>
> vlv_dphy_param_init(intel_dsi);
>
> - intel_dsi_vbt_gpio_init(intel_dsi);
> + intel_dsi_vbt_gpio_init(intel_dsi,
> + intel_dsi_get_hw_state(intel_encoder, ));
Feels a bit scary to call into the hooks before everything is
initialized, but this seems safe. Fingers crossed.
Reviewed-by: Jani Nikula
>
> drm_connector_init(dev, connector, _dsi_connector_funcs,
> DRM_MODE_CONNECTOR_DSI);
--
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH v2 1/5] pinctrl: Allow modules to use pinctrl_[un]register_mappings
On Mon, 30 Dec 2019, Linus Walleij wrote: > On Mon, Dec 16, 2019 at 9:51 PM Hans de Goede wrote: > >> Currently only the drivers/pinctrl/devicetree.c code allows registering >> pinctrl-mappings which may later be unregistered, all other mappings >> are assumed to be permanent. >> >> Non-dt platforms may also want to register pinctrl mappings from code which >> is build as a module, which requires being able to unregister the mapping >> when the module is unloaded to avoid dangling pointers. >> >> To allow unregistering the mappings the devicetree code uses 2 internal >> functions: pinctrl_register_map and pinctrl_unregister_map. >> >> pinctrl_register_map allows the devicetree code to tell the core to >> not memdup the mappings as it retains ownership of them and >> pinctrl_unregister_map does the unregistering, note this only works >> when the mappings where not memdupped. >> >> The only code relying on the memdup/shallow-copy done by >> pinctrl_register_mappings is arch/arm/mach-u300/core.c this commit >> replaces the __initdata with const, so that the shallow-copy is no >> longer necessary. >> >> After that we can get rid of the internal pinctrl_unregister_map function >> and just use pinctrl_register_mappings directly everywhere. >> >> This commit also renames pinctrl_unregister_map to >> pinctrl_unregister_mappings so that its naming matches its >> pinctrl_register_mappings counter-part and exports it. >> >> Together these 2 changes will allow non-dt platform code to >> register pinctrl-mappings from modules without breaking things on >> module unload (as they can now unregister the mapping on unload). >> >> Signed-off-by: Hans de Goede > > This v2 works fine for me, I applied it to this immutable branch in the > pinctrl tree: > https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git/log/?h=ib-pinctrl-unreg-mappings > > And pulled that into the pinctrl "devel" branch for v5.6. > > Please pull this immutable branch into the Intel DRM tree and apply > the rest of the stuff on top! Thanks, pulled to drm-intel-next-queued. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/gem: Single page objects are naturally contiguous (rev3)
== Series Details == Series: series starting with [1/2] drm/i915/gem: Single page objects are naturally contiguous (rev3) URL : https://patchwork.freedesktop.org/series/71549/ State : warning == Summary == $ dim checkpatch origin/drm-tip 8ba365583e40 drm/i915/gem: Single page objects are naturally contiguous efa9113eee90 drm/i915/gem: Support discontiguous lmem object maps -:81: CHECK:SPACING: spaces preferred around that '*' (ctx:ExO) #81: FILE: drivers/gpu/drm/i915/gem/i915_gem_pages.c:291: + **ptes++ = iomap_wc_pte(iomap, addr); ^ total: 0 errors, 0 warnings, 1 checks, 69 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Re-init lspcon after HPD if lspcon probe failed (rev4)
== Series Details == Series: drm/i915: Re-init lspcon after HPD if lspcon probe failed (rev4) URL : https://patchwork.freedesktop.org/series/71314/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7664 -> Patchwork_15973 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_15973 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_15973, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15973/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_15973: ### IGT changes ### Possible regressions * igt@kms_chamelium@dp-crc-fast: - fi-kbl-7500u: NOTRUN -> [DMESG-WARN][1] +5 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15973/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-icl-u2: [PASS][2] -> [DMESG-WARN][3] +3 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15973/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html * igt@kms_flip@basic-flip-vs-dpms: - fi-skl-guc: [PASS][4] -> [DMESG-WARN][5] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-skl-guc/igt@kms_f...@basic-flip-vs-dpms.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15973/fi-skl-guc/igt@kms_f...@basic-flip-vs-dpms.html Known issues Here are the changes found in Patchwork_15973 that come from known issues: ### IGT changes ### Issues hit * igt@i915_module_load@reload-with-fault-injection: - fi-bxt-dsi: [PASS][6] -> [INCOMPLETE][7] ([fdo#103927]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15973/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_selftest@live_blt: - fi-hsw-4770:[PASS][8] -> [DMESG-FAIL][9] ([i915#563]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-hsw-4770/igt@i915_selftest@live_blt.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15973/fi-hsw-4770/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_gt_engines: - fi-cfl-8700k: [PASS][10] -> [DMESG-FAIL][11] ([i915#889]) +7 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-cfl-8700k/igt@i915_selftest@live_gt_engines.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15973/fi-cfl-8700k/igt@i915_selftest@live_gt_engines.html * igt@i915_selftest@live_gt_pm: - fi-cfl-8700k: [PASS][12] -> [DMESG-WARN][13] ([i915#889]) +23 similar issues [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-cfl-8700k/igt@i915_selftest@live_gt_pm.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15973/fi-cfl-8700k/igt@i915_selftest@live_gt_pm.html * igt@kms_chamelium@dp-crc-fast: - fi-icl-u2: [PASS][14] -> [DMESG-FAIL][15] ([fdo#109635] / [i915#262]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-icl-u2/igt@kms_chamel...@dp-crc-fast.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15973/fi-icl-u2/igt@kms_chamel...@dp-crc-fast.html * igt@kms_chamelium@dp-hpd-fast: - fi-icl-u2: [PASS][16] -> [DMESG-FAIL][17] ([fdo#109635]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-icl-u2/igt@kms_chamel...@dp-hpd-fast.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15973/fi-icl-u2/igt@kms_chamel...@dp-hpd-fast.html Possible fixes * igt@gem_close_race@basic-threads: - fi-byt-j1900: [TIMEOUT][18] ([i915#816]) -> [PASS][19] [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-byt-j1900/igt@gem_close_r...@basic-threads.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15973/fi-byt-j1900/igt@gem_close_r...@basic-threads.html * igt@i915_selftest@live_gt_pm: - fi-bwr-2160:[FAIL][20] ([i915#878]) -> [PASS][21] [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7664/fi-bwr-2160/igt@i915_selftest@live_gt_pm.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15973/fi-bwr-2160/igt@i915_selftest@live_gt_pm.html Warnings * igt@i915_module_load@reload-with-fault-injection: - fi-kbl-x1275: [INCOMPLETE][22] ([i915#879]) -> [DMESG-WARN][23] ([i915#62] / [i915#92]) [22]:
[Intel-gfx] [PATCH] drm/i915/gem: Support discontiguous lmem object maps
Create a vmap for discontinguous lmem objects to support
i915_gem_object_pin_map().
Signed-off-by: Chris Wilson
Cc: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 46 ---
1 file changed, 40 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 75197ca696a8..288b0e84c891 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -158,10 +158,10 @@ static void __i915_gem_object_reset_page_iter(struct
drm_i915_gem_object *obj)
static void unmap_object(struct drm_i915_gem_object *obj, void *ptr)
{
- if (i915_gem_object_is_lmem(obj))
- io_mapping_unmap((void __force __iomem *)ptr);
- else if (is_vmalloc_addr(ptr))
+ if (is_vmalloc_addr(ptr))
vunmap(ptr);
+ else if (i915_gem_object_is_lmem(obj))
+ io_mapping_unmap((void __force __iomem *)ptr);
else
kunmap(kmap_to_page(ptr));
}
@@ -236,6 +236,12 @@ int __i915_gem_object_put_pages(struct drm_i915_gem_object
*obj)
return err;
}
+static inline pte_t iomap_wc_pte(resource_size_t base, dma_addr_t offset)
+{
+ return pte_mkspecial(pfn_pte((base + offset) >> PAGE_SHIFT,
+pgprot_writecombine(PAGE_KERNEL)));
+}
+
/* The 'mapping' part of i915_gem_object_pin_map() below */
static void *i915_gem_object_map(struct drm_i915_gem_object *obj,
enum i915_map_type type)
@@ -251,13 +257,41 @@ static void *i915_gem_object_map(struct
drm_i915_gem_object *obj,
void *addr;
if (i915_gem_object_is_lmem(obj)) {
- void __iomem *io;
+ const resource_size_t iomap = obj->mm.region->iomap.base;
+ struct vm_struct *area;
+ dma_addr_t addr;
+ pte_t **ptes;
+ void *mem;
if (type != I915_MAP_WC)
return NULL;
- io = i915_gem_object_lmem_io_map(obj, 0, obj->base.size);
- return (void __force *)io;
+ if (i915_gem_object_is_contiguous(obj)) {
+ void __iomem *io =
+ i915_gem_object_lmem_io_map(obj,
+ 0, obj->base.size);
+
+ return (void __force *)io;
+ }
+
+ mem = kvmalloc_array(obj->base.size >> PAGE_SHIFT,
+sizeof(*ptes),
+GFP_KERNEL);
+ if (!mem)
+ return NULL;
+
+ area = alloc_vm_area(obj->base.size, mem);
+ if (!area) {
+ kvfree(mem);
+ return NULL;
+ }
+
+ ptes = mem;
+ for_each_sgt_daddr(addr, sgt_iter, sgt)
+ **ptes++ = iomap_wc_pte(iomap, addr);
+ kvfree(mem);
+
+ return area->addr;
}
/* A single page can always be kmapped */
--
2.25.0.rc0
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Re: [Intel-gfx] [PATCH] drm/i915/gem: Support discontiguous lmem object maps
Quoting Chris Wilson (2020-01-01 22:09:27) > + ptes = mem; > + for_each_sgt_daddr(addr, sgt_iter, sgt) > + **ptes++ = io_wc_pte(addr); Addr is just relative to the start of lmem, this needs the iobar offset as well. That magic is that using any old physical address just works, until you hit something important! -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
